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arch/arm/dts/ast2500-u-boot.dtsi 1.07 KB
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  #include <dt-bindings/clock/ast2500-scu.h>
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  #include <dt-bindings/reset/ast2500-reset.h>
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  #include "ast2500.dtsi"
  
  / {
  	scu: clock-controller@1e6e2000 {
  		compatible = "aspeed,ast2500-scu";
  		reg = <0x1e6e2000 0x1000>;
  		u-boot,dm-pre-reloc;
  		#clock-cells = <1>;
  		#reset-cells = <1>;
  	};
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  	rst: reset-controller {
  		u-boot,dm-pre-reloc;
  		compatible = "aspeed,ast2500-reset";
  		aspeed,wdt = <&wdt1>;
  		#reset-cells = <1>;
  	};
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  	sdrammc: sdrammc@1e6e0000 {
  		u-boot,dm-pre-reloc;
  		compatible = "aspeed,ast2500-sdrammc";
  		reg = <0x1e6e0000 0x174
  			0x1e6e0200 0x1d4 >;
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  		#reset-cells = <1>;
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  		clocks = <&scu PLL_MPLL>;
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  		resets = <&rst AST_RESET_SDRAM>;
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  	};
  
  	ahb {
  		u-boot,dm-pre-reloc;
  
  		apb {
  			u-boot,dm-pre-reloc;
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  		};
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  	};
  };
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  &uart1 {
  	clocks = <&scu PCLK_UART1>;
  };
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  &uart2 {
  	clocks = <&scu PCLK_UART2>;
  };
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  &uart3 {
  	clocks = <&scu PCLK_UART3>;
  };
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  &uart4 {
  	clocks = <&scu PCLK_UART4>;
  };
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  &uart5 {
  	clocks = <&scu PCLK_UART5>;
  };
  
  &timer {
  	u-boot,dm-pre-reloc;
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  };
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  &mac0 {
  	clocks = <&scu PCLK_MAC1>, <&scu PLL_D2PLL>;
  };
  
  &mac1 {
  	clocks = <&scu PCLK_MAC2>, <&scu PLL_D2PLL>;
  };