Blame view
post/lib_powerpc/cmpi.c
1.8 KB
ad5bb451a Restructure POST ... |
1 2 3 4 |
/* * (C) Copyright 2002 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * |
1a4596601 Add GPL-2.0+ SPDX... |
5 |
* SPDX-License-Identifier: GPL-2.0+ |
ad5bb451a Restructure POST ... |
6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 |
*/ #include <common.h> /* * CPU test * Integer compare instructions: cmpwi, cmplwi * * To verify these instructions the test runs them with * different combinations of operands, reads the condition * register value and compares it with the expected one. * The test contains a pre-built table * containing the description of each test case: the instruction, * the values of the operands, the condition field to save * the result in and the expected result. */ |
ad5bb451a Restructure POST ... |
22 23 |
#include <post.h> #include "cpu_asm.h" |
6d0f6bcf3 rename CFG_ macro... |
24 |
#if CONFIG_POST & CONFIG_SYS_POST_CPU |
ad5bb451a Restructure POST ... |
25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 |
extern void cpu_post_exec_11 (ulong *code, ulong *res, ulong op1); static struct cpu_post_cmpi_s { ulong cmd; ulong op1; ushort op2; ulong cr; ulong res; } cpu_post_cmpi_table[] = { { OP_CMPWI, 123, 123, 2, 0x02 }, { OP_CMPWI, 123, 133, 3, 0x08 }, { OP_CMPWI, 123, -133, 4, 0x04 }, { OP_CMPLWI, 123, 123, 2, 0x02 }, { OP_CMPLWI, 123, -133, 3, 0x08 }, { OP_CMPLWI, 123, 113, 4, 0x04 }, }; |
d2397817f post: use ARRAY_SIZE |
80 |
static unsigned int cpu_post_cmpi_size = ARRAY_SIZE(cpu_post_cmpi_table); |
ad5bb451a Restructure POST ... |
81 82 83 84 85 |
int cpu_post_test_cmpi (void) { int ret = 0; unsigned int i; |
f2302d443 Fix merge problems |
86 |
int flag = disable_interrupts(); |
ad5bb451a Restructure POST ... |
87 88 89 90 |
for (i = 0; i < cpu_post_cmpi_size && ret == 0; i++) { struct cpu_post_cmpi_s *test = cpu_post_cmpi_table + i; |
53677ef18 Big white-space c... |
91 |
unsigned long code[] = |
ad5bb451a Restructure POST ... |
92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 |
{ ASM_1IC(test->cmd, test->cr, 3, test->op2), ASM_MFCR(3), ASM_BLR }; ulong res; cpu_post_exec_11 (code, & res, test->op1); ret = ((res >> (28 - 4 * test->cr)) & 0xe) == test->res ? 0 : -1; if (ret != 0) { post_log ("Error at cmpi test %d ! ", i); } } |
f2302d443 Fix merge problems |
109 110 |
if (flag) enable_interrupts(); |
ad5bb451a Restructure POST ... |
111 112 113 114 |
return ret; } #endif |