Blame view

doc/README.p2020rdb 3.87 KB
728ece343   Poonam Aggrwal   85xx: Add support...
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
  Overview
  --------
  P2020RDB is a Low End Dual core platform supporting the P2020 processor
  of QorIQ series. P2020 is an e500 based dual core SOC.
  
  Building U-boot
  -----------
  To build the u-boot for P2020RDB:
  	make P2020RDB_config
  	make
  
  NOR Flash Banks
  -----------
  RDB board for P2020 has two flash banks. They are both present on boot.
  
  Booting by default is always from the boot bank at 0xef00_0000.
  
  Memory Map
  ----------
  0xef00_0000 - 0xef7f_ffff	Alernate bank		8MB
  0xe800_0000 - 0xefff_ffff	Boot bank		8MB
  
  0xef78_0000 - 0xef7f_ffff	Alternate u-boot address	512KB
  0xeff8_0000 - 0xefff_ffff	Boot u-boot address		512KB
  
  Switch settings to boot from the NOR flash banks
  ------------------------------------------------
  SW4[8]=0 default NOR Flash bank
  SW4[8]=1 Alternate NOR Flash bank
  
  Flashing Images
  ---------------
  To place a new u-boot image in the alternate flash bank and then boot
  with that new image temporarily, use this:
  	tftp 1000000 u-boot.bin
  	erase ef780000 ef7fffff
  	cp.b 1000000 ef780000 80000
  
  Now to boot from the alternate bank change the SW4[8] from 0 to 1.
  
  To program the image in the boot flash bank:
  	tftp 1000000 u-boot.bin
  	protect off all
  	erase eff80000 ffffffff
  	cp.b 1000000 eff80000 80000
  
  Using the Device Tree Source File
  ---------------------------------
  To create the DTB (Device Tree Binary) image file,
  use a command similar to this:
  
  	dtc -b 0 -f -I dts -O dtb p2020rdb.dts > p2020rdb.dtb
  
  Likely, that .dts file will come from here;
  
  	linux-2.6/arch/powerpc/boot/dts/p2020rdb.dts
  
  Booting Linux
  -------------
  Place a linux uImage in the TFTP disk area.
  
  	tftp 1000000 uImage.p2020rdb
  	tftp 2000000 rootfs.ext2.gz.uboot
  	tftp c00000 p2020rdb.dtb
  	bootm 1000000 2000000 c00000
  
  Implementing AMP(Asymmetric MultiProcessing)
  ---------------------------------------------
  1. Build kernel image for core0:
  
  	a. $ make 85xx/p1_p2_rdb_defconfig
  
  	b. $ make menuconfig
  	   - un-select "Processor support"->
  		"Symetric multi-processing support"
  
  	c. $ make uImage
  
  	d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core0
  
  2. Build kernel image for core1:
  
  	a. $ make 85xx/p1_p2_rdb_defconfig
  
  	b. $ make menuconfig
  	   - Un-select "Processor support"->
  		"Symetric multi-processing support"
  	   - Select "Advanced setup" ->
  		"Prompt for advanced kernel configuration options"
  		- Select
  			"Set physical address where the kernel is loaded"
  			and set it to 0x20000000, asssuming core1 will
  			start from 512MB.
  		- Select "Set custom page offset address"
  		- Select "Set custom kernel base address"
  		- Select "Set maximum low memory"
  	   - "Exit" and save the selection.
  
  	c. $ make uImage
  
  	d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core1
  
  3. Create dtb for core0:
  
  	$ dtc -I dts -O dtb -f -b 0
  		 arch/powerpc/boot/dts/p2020rdb_camp_core0.dts >
  		 /tftpboot/p2020rdb_camp_core0.dtb
  
  4. Create dtb for core1:
  
  	$ dtc -I dts -O dtb -f -b 1
  		 arch/powerpc/boot/dts/p2020rdb_camp_core1.dts >
  		 /tftpboot/p2020rdb_camp_core1.dtb
  
  5. Bring up two cores separately:
  
  	a. Power on the board, under u-boot prompt:
  		=> setenv <serverip>
  		=> setenv <ipaddr>
  		=> setenv bootargs root=/dev/ram rw console=ttyS0,115200
  	b. Bring up core1's kernel first:
  		=> setenv bootm_low 0x20000000
  		=> setenv bootm_size 0x10000000
  		=> tftp 21000000 uImage.core1
  		=> tftp 22000000 ramdiskfile
  		=> tftp 20c00000 p2020rdb_camp_core1.dtb
  		=> interrupts off
  		=> bootm start 21000000 22000000 20c00000
  		=> bootm loados
  		=> bootm ramdisk
  		=> bootm fdt
  		=> fdt boardsetup
  		=> fdt chosen $initrd_start $initrd_end
  		=> bootm prep
  		=> cpu 1 release $bootm_low - $fdtaddr -
  	c. Bring up core0's kernel(on the same u-boot console):
  		=> setenv bootm_low 0
  		=> setenv bootm_size 0x20000000
  		=> tftp 1000000 uImage.core0
  		=> tftp 2000000 ramdiskfile
  		=> tftp c00000 p2020rdb_camp_core0.dtb
  		=> bootm 1000000 2000000 c00000
  
  Please note only core0 will run u-boot, core1 starts kernel directly
  after "cpu release" command is issued.