CONFIG_ARM=y
  CONFIG_ARCH_ZYNQ=y
  CONFIG_SYS_TEXT_BASE=0x4000000
  CONFIG_SPL=y
  CONFIG_DEBUG_UART_BASE=0xe0001000
  CONFIG_DEBUG_UART_CLOCK=50000000
  CONFIG_IDENT_STRING=" Xilinx Zynq DLC20 Rev1.0"
  CONFIG_SPL_STACK_R_ADDR=0x200000
  CONFIG_DEBUG_UART=y
  CONFIG_DISTRO_DEFAULTS=y
  CONFIG_FIT=y
  CONFIG_FIT_SIGNATURE=y
  CONFIG_FIT_VERBOSE=y
  CONFIG_IMAGE_FORMAT_LEGACY=y

  CONFIG_BOARD_EARLY_INIT_F=y
  CONFIG_SPL_STACK_R=y
  CONFIG_SPL_OS_BOOT=y
  CONFIG_SPL_SPI_LOAD=y
  CONFIG_SYS_PROMPT="Zynq> "
  CONFIG_CMD_THOR_DOWNLOAD=y

  CONFIG_CMD_DFU=y
  # CONFIG_CMD_FLASH is not set
  CONFIG_CMD_FPGA_LOADBP=y
  CONFIG_CMD_FPGA_LOADFS=y
  CONFIG_CMD_FPGA_LOADMK=y
  CONFIG_CMD_FPGA_LOADP=y
  CONFIG_CMD_GPIO=y
  CONFIG_CMD_I2C=y
  CONFIG_CMD_MMC=y
  CONFIG_CMD_SF=y
  CONFIG_CMD_USB=y
  # CONFIG_CMD_SETEXPR is not set
  CONFIG_CMD_TFTPPUT=y
  CONFIG_CMD_CACHE=y
  CONFIG_CMD_EXT4_WRITE=y

  CONFIG_DEFAULT_DEVICE_TREE="zynq-dlc20-rev1.0"
  CONFIG_ENV_IS_IN_SPI_FLASH=y
  CONFIG_NET_RANDOM_ETHADDR=y
  CONFIG_SPL_DM_SEQ_ALIAS=y
  CONFIG_DFU_MMC=y
  CONFIG_DFU_RAM=y
  CONFIG_FPGA_XILINX=y
  CONFIG_FPGA_ZYNQPL=y
  CONFIG_DM_GPIO=y

  CONFIG_DM_I2C=y
  CONFIG_SYS_I2C_CADENCE=y
  CONFIG_MISC=y
  CONFIG_I2C_EEPROM=y
  CONFIG_SYS_I2C_EEPROM_ADDR=0x0
  CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0

  CONFIG_MMC_SDHCI=y
  CONFIG_MMC_SDHCI_ZYNQ=y
  CONFIG_SPI_FLASH=y

  CONFIG_SF_DEFAULT_SPEED=30000000

  CONFIG_SPI_FLASH_STMICRO=y
  CONFIG_SPI_FLASH_WINBOND=y
  CONFIG_PHY_REALTEK=y
  CONFIG_MII=y
  CONFIG_ZYNQ_GEM=y
  CONFIG_DEBUG_UART_ZYNQ=y
  CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ZYNQ_SERIAL=y
  CONFIG_ZYNQ_QSPI=y
  CONFIG_USB=y
  CONFIG_USB_EHCI_HCD=y
  CONFIG_USB_ULPI_VIEWPORT=y
  CONFIG_USB_ULPI=y

  CONFIG_USB_GADGET=y
  CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
  CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
  CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
  CONFIG_CI_UDC=y
  CONFIG_USB_GADGET_DOWNLOAD=y
  CONFIG_USB_FUNCTION_THOR=y