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arch/arm/dts/imx6qdl-logicpd.dtsi
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d41ce506b Initial Release, ... |
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/* * Copyright 2016 Logic PD * This file is adapted from imx6qdl-sabresd.dtsi. * Copyright 2012 Freescale Semiconductor, Inc. * Copyright 2011 Linaro Ltd. * * The code contained herein is licensed under the GNU General Public * License. You may obtain a copy of the GNU General Public License * Version 2 or later at the following locations: * * http://www.opensource.org/licenses/gpl-license.html * http://www.gnu.org/copyleft/gpl.html */ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include "imx6q.dtsi" / { chosen { stdout-path = &uart1; }; memory { reg = <0x10000000 0x80000000>; }; }; /* Reroute power feeding the CPU to come from the external PMIC */ ®_arm { vin-supply = <&sw1a_reg>; }; ®_soc { vin-supply = <&sw1c_reg>; }; &clks { assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>; assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, <&clks IMX6QDL_CLK_PLL3_USB_OTG>; }; &i2c3 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; pmic: pfuze100@08 { compatible = "fsl,pfuze100"; reg = <0x08>; regulators { sw1a_reg: sw1ab { regulator-min-microvolt = <725000>; regulator-max-microvolt = <1450000>; regulator-name = "vddcore"; regulator-boot-on; regulator-always-on; regulator-ramp-delay = <6250>; }; sw1c_reg: sw1c { regulator-min-microvolt = <725000>; regulator-max-microvolt = <1450000>; regulator-name = "vddsoc"; regulator-boot-on; regulator-always-on; regulator-ramp-delay = <6250>; }; sw2_reg: sw2 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-name = "gen_3v3"; regulator-boot-on; regulator-always-on; }; sw3a_reg: sw3a { regulator-min-microvolt = <400000>; regulator-max-microvolt = <1975000>; regulator-name = "sw3a_vddr"; regulator-boot-on; regulator-always-on; }; sw3b_reg: sw3b { regulator-min-microvolt = <400000>; regulator-max-microvolt = <1975000>; regulator-name = "sw3b_vddr"; regulator-boot-on; regulator-always-on; }; sw4_reg: sw4 { regulator-min-microvolt = <800000>; regulator-max-microvolt = <3300000>; regulator-name = "gen_rgmii"; }; swbst_reg: swbst { regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5150000>; regulator-name = "gen_5v0"; }; snvs_reg: vsnvs { regulator-min-microvolt = <1000000>; regulator-max-microvolt = <3000000>; regulator-name = "gen_vsns"; regulator-boot-on; regulator-always-on; }; vref_reg: vrefddr { regulator-boot-on; regulator-always-on; }; vgen1_reg: vgen1 { regulator-min-microvolt = <1500000>; regulator-max-microvolt = <1500000>; regulator-name = "gen_1v5"; }; vgen2_reg: vgen2 { regulator-name = "vgen2"; regulator-min-microvolt = <800000>; regulator-max-microvolt = <1550000>; }; vgen3_reg: vgen3 { regulator-name = "gen_vadj_0"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; }; vgen4_reg: vgen4 { regulator-name = "gen_1v8"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; vgen5_reg: vgen5 { regulator-name = "gen_adj_1"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; vgen6_reg: vgen6 { regulator-name = "gen_2v5"; regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; regulator-always-on; }; }; }; mfg_eeprom: at24@51 { compatible = "atmel,24c64"; pagesize = <32>; read-only; reg = <0x51>; }; user_eeprom: at24@52 { compatible = "atmel,24c64"; pagesize = <32>; reg = <0x52>; }; }; &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; pinctrl_hog: hoggrp { fsl,pins = < MX6QDL_PAD_CSI0_MCLK__ARM_TRACE_CTL 0x1b0b0 MX6QDL_PAD_CSI0_DATA_EN__ARM_TRACE_CLK 0x1b0b0 MX6QDL_PAD_CSI0_VSYNC__ARM_TRACE00 0x1b0b0 MX6QDL_PAD_CSI0_DAT4__ARM_TRACE01 0x1b0b0 MX6QDL_PAD_CSI0_DAT5__ARM_TRACE02 0x1b0b0 MX6QDL_PAD_CSI0_DAT6__ARM_TRACE03 0x1b0b0 MX6QDL_PAD_CSI0_DAT7__ARM_TRACE04 0x1b0b0 MX6QDL_PAD_CSI0_DAT8__ARM_TRACE05 0x1b0b0 MX6QDL_PAD_CSI0_DAT9__ARM_TRACE06 0x1b0b0 MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x1b0b0 MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08 0x1b0b0 MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09 0x1b0b0 MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10 0x1b0b0 MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11 0x1b0b0 MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12 0x1b0b0 MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13 0x1b0b0 MX6QDL_PAD_CSI0_DAT17__ARM_TRACE14 0x1b0b0 MX6QDL_PAD_CSI0_DAT18__ARM_TRACE15 0x1b0b0 MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05 0x1b0b0 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x80000000 MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x80000000 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x80000000 MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x80000000 MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000 MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000 MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x80000000 MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x80000000 MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000 MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000 MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x80000000 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x80000000 MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x80000000 MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x80000000 MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x80000000 MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x80000000 MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x80000000 MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x80000000 MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x80000000 MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x80000000 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000 MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x80000000 MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x80000000 MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x80000000 MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x80000000 MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x80000000 MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x80000000 MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x80000000 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000 MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x80000000 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x80000000 MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x80000000 MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x80000000 MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x80000000 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x80000000 MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x80000000 MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x80000000 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x80000000 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x80000000 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x80000000 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x80000000 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x80000000 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000 MX6QDL_PAD_RGMII_TD0__GPIO6_IO20 0x80000000 MX6QDL_PAD_RGMII_TD1__GPIO6_IO21 0x80000000 MX6QDL_PAD_RGMII_TD2__GPIO6_IO22 0x80000000 MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x80000000 MX6QDL_PAD_RGMII_RD0__GPIO6_IO25 0x80000000 MX6QDL_PAD_RGMII_RD1__GPIO6_IO27 0x80000000 MX6QDL_PAD_RGMII_RD2__GPIO6_IO28 0x80000000 MX6QDL_PAD_RGMII_RD3__GPIO6_IO29 0x80000000 MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x80000000 MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x80000000 >; }; pinctrl_i2c3: i2c3grp { fsl,pins = < MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 >; }; pinctrl_uart1: uart1grp { fsl,pins = < MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 >; }; pinctrl_uart2: uart2grp { fsl,pins = < MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 >; }; pinctrl_usdhc1: usdhc1grp { fsl,pins = < MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 >; }; pinctrl_usdhc3: usdhc3grp { fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WL_IRQ */ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1f0b0 /* WLAN_EN */ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1f0b0 /* BT_EN */ >; }; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; status = "okay"; }; &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; status = "okay"; }; &usdhc1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1>; cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>; keep-power-in-suspend; enable-sdio-wakeup; status = "okay"; }; &usdhc3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc3>; non-removable; keep-power-in-suspend; enable-sdio-wakeup; vmmc-supply = <&sw2_reg>; status = "okay"; #address-cells = <1>; #size-cells = <0>; wlcore: wlcore@0 { compatible = "ti,wl1837"; reg = <2>; interrupt-parent = <&gpio7>; interrupts = <1 GPIO_ACTIVE_HIGH>; }; }; |