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include/configs/cobra5272.h
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/* * Configuation settings for the Sentec Cobra Board. * * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> * |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ /* --- |
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* Version: U-Boot 1.0.0 - initial release for Sentec COBRA5272 board |
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* Date: 2004-03-29 * Author: Florian Schlote * * For a description of configuration options please refer also to the * general u-boot-1.x.x/README file * --- */ /* --- * board/config.h - configuration options, board specific * --- */ #ifndef _CONFIG_COBRA5272_H #define _CONFIG_COBRA5272_H /* --- |
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* Defines processor clock - important for correct timings concerning serial * interface etc. |
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* --- */ |
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#define CONFIG_SYS_CLK 66000000 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ |
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/* --- * Enable use of Ethernet * --- */ |
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#define CONFIG_MCFFEC |
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/* Enable Dma Timer */ #define CONFIG_MCFTMR |
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/* --- * Define baudrate for UART1 (console output, tftp, ...) * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud |
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* CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command |
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* interface * --- */ |
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#define CONFIG_MCFUART |
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#define CONFIG_SYS_UART_PORT (0) |
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/* --- * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change * timeout acc. to your needs * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000 * for 10 sec * --- */ #if 0 #define CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */ #endif /* --- * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different * bootloader residing in flash ('chainloading'); if you want to use * chainloading or want to compile a u-boot binary that can be loaded into * RAM via BDM set |
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* "#if 0" to "#if 1" |
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* You will need a first stage bootloader then, e. g. colilo or a working BDM * cable (Background Debug Mode) * * Setting #if 0: u-boot will start from flash and relocate itself to RAM * |
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* Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE |
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* in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000) * * --- */ #if 0 #define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */ #endif /* --- * Configuration for environment * Environment is embedded in u-boot in the second sector of the flash * --- */ #ifndef CONFIG_MONITOR_IS_IN_RAM |
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#define CONFIG_ENV_OFFSET 0x4000 #define CONFIG_ENV_SECT_SIZE 0x2000 |
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#else |
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#define CONFIG_ENV_ADDR 0xffe04000 #define CONFIG_ENV_SECT_SIZE 0x2000 |
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#endif |
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#define LDS_BOARD_TEXT \ |
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. = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text); |
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/* |
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* BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE |
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/* |
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* Command line configuration. |
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*/ |
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#ifdef CONFIG_MCFFEC |
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# define CONFIG_MII 1 |
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# define CONFIG_MII_INIT 1 |
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# define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
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# define CONFIG_SYS_FEC0_PINMUX 0 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE |
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# define MCFFEC_TOUT_LOOP 50000 |
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/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY |
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# define FECDUPLEX FULL # define FECSPEED _100BASET # else |
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# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
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# endif |
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# endif /* CONFIG_SYS_DISCOVER_PHY */ |
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#endif |
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/* *----------------------------------------------------------------------------- * Define user parameters that have to be customized most likely *----------------------------------------------------------------------------- */ /*AUTOBOOT settings - booting images automatically by u-boot after power on*/ |
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/* The following settings will be contained in the environment block ; if you want to use a neutral environment all those settings can be manually set in u-boot: 'set' command */ #if 0 #define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please enter a valid image address in flash */ |
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/* User network settings */ |
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#define CONFIG_IPADDR 192.168.100.2 /* default board IP address */ #define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */ #endif |
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#define CONFIG_SYS_LOAD_ADDR 0x20000 /*Defines default RAM address |
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from which user programs will be started */ /*---*/ |
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/* *----------------------------------------------------------------------------- * End of user parameters to be customized *----------------------------------------------------------------------------- */ /* --- * Defines memory range for test * --- */ |
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#define CONFIG_SYS_MEMTEST_START 0x400 #define CONFIG_SYS_MEMTEST_END 0x380000 |
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/* --- * Low Level Configuration Settings * (address mappings, register initial values, etc.) * You should know what you are doing if you make changes here. * --- */ /* --- * Base register address * --- */ |
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#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */ |
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/* --- * System Conf. Reg. & System Protection Reg. * --- */ |
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#define CONFIG_SYS_SCR 0x0003 #define CONFIG_SYS_SPR 0xffff |
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/* --- * Ethernet settings * --- */ |
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#define CONFIG_SYS_DISCOVER_PHY #define CONFIG_SYS_ENET_BD_BASE 0x780000 |
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/*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in internal SRAM) */ |
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#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 |
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#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ |
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
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#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
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/*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) |
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* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 |
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*/ |
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#define CONFIG_SYS_SDRAM_BASE 0x00000000 |
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/* *------------------------------------------------------------------------- * RAM SIZE (is defined above) *----------------------------------------------------------------------- */ |
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/* #define CONFIG_SYS_SDRAM_SIZE 16 */ |
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/* *----------------------------------------------------------------------- */ |
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#define CONFIG_SYS_FLASH_BASE 0xffe00000 |
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#ifdef CONFIG_MONITOR_IS_IN_RAM |
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#define CONFIG_SYS_MONITOR_BASE 0x20000 |
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#else |
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#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) |
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#endif |
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#define CONFIG_SYS_MONITOR_LEN 0x20000 #define CONFIG_SYS_MALLOC_LEN (256 << 10) #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 |
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/* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ |
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#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
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/*----------------------------------------------------------------------- * FLASH organization */ |
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */ #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 /* flash timeout */ |
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/*----------------------------------------------------------------------- * Cache Configuration */ |
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#define CONFIG_SYS_CACHELINE_SIZE 16 |
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#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ |
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CONFIG_SYS_INIT_RAM_SIZE - 8) |
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#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ |
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#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ CF_CACR_DISD | CF_CACR_INVI | \ CF_CACR_CEIB | CF_CACR_DCM | \ CF_CACR_EUSP) |
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/*----------------------------------------------------------------------- * Memory bank definitions * * Please refer also to Motorola Coldfire user manual - Chapter XXX * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf> */ |
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#define CONFIG_SYS_BR0_PRELIM 0xFFE00201 #define CONFIG_SYS_OR0_PRELIM 0xFFE00014 |
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#define CONFIG_SYS_BR1_PRELIM 0 #define CONFIG_SYS_OR1_PRELIM 0 |
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#define CONFIG_SYS_BR2_PRELIM 0 #define CONFIG_SYS_OR2_PRELIM 0 |
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#define CONFIG_SYS_BR3_PRELIM 0 #define CONFIG_SYS_OR3_PRELIM 0 |
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#define CONFIG_SYS_BR4_PRELIM 0 #define CONFIG_SYS_OR4_PRELIM 0 |
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#define CONFIG_SYS_BR5_PRELIM 0 #define CONFIG_SYS_OR5_PRELIM 0 |
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#define CONFIG_SYS_BR6_PRELIM 0 #define CONFIG_SYS_OR6_PRELIM 0 |
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#define CONFIG_SYS_BR7_PRELIM 0x00000701 #define CONFIG_SYS_OR7_PRELIM 0xFF00007C |
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/*----------------------------------------------------------------------- * LED config */ #define LED_STAT_0 0xffff /*all LEDs off*/ #define LED_STAT_1 0xfffe #define LED_STAT_2 0xfffd #define LED_STAT_3 0xfffb #define LED_STAT_4 0xfff7 #define LED_STAT_5 0xffef #define LED_STAT_6 0xffdf #define LED_STAT_7 0xff00 /*all LEDs on*/ /*----------------------------------------------------------------------- * Port configuration (GPIO) */ |
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#define CONFIG_SYS_PACNT 0x00000000 /* PortA control reg.: All pins are external |
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GPIO*/ |
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#define CONFIG_SYS_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs |
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(1^=output, 0^=input) */ |
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#define CONFIG_SYS_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */ #define CONFIG_SYS_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART |
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configuration */ |
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#define CONFIG_SYS_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */ #define CONFIG_SYS_PBDAT 0x0000 /* PortB value reg. */ #define CONFIG_SYS_PDCNT 0x00000000 /* PortD control reg. */ |
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#endif /* _CONFIG_COBRA5272_H */ |