Eric Lee / smarc-uboot

Blame view

configs/chromebook_bob_defconfig 2.48 KB
edit raw normal view history
9e92116bc   Simon Glass   rockchip: Add sup... 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
 
  CONFIG_ARM=y
  CONFIG_ARCH_ROCKCHIP=y
  CONFIG_SYS_TEXT_BASE=0x00200000
  CONFIG_SPL_GPIO_SUPPORT=y
  CONFIG_SPL_LIBCOMMON_SUPPORT=y
  CONFIG_SPL_LIBGENERIC_SUPPORT=y
  CONFIG_SYS_MALLOC_F_LEN=0x4000
  CONFIG_ROCKCHIP_RK3399=y
  CONFIG_ROCKCHIP_BOOT_MODE_REG=0
  CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
  # CONFIG_SPL_MMC_SUPPORT is not set
  CONFIG_TARGET_CHROMEBOOK_BOB=y
  CONFIG_DEBUG_UART_BASE=0xff1a0000
  CONFIG_DEBUG_UART_CLOCK=24000000
  CONFIG_SPL_STACK_R_ADDR=0x80000
  CONFIG_SPL_SPI_FLASH_SUPPORT=y
  CONFIG_SPL_SPI_SUPPORT=y
  CONFIG_DEBUG_UART=y
  CONFIG_NR_DRAM_BANKS=1
  CONFIG_FIT=y
  CONFIG_SPL_LOAD_FIT=y
  CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
9e92116bc   Simon Glass   rockchip: Add sup... 
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
 
  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
  # CONFIG_DISPLAY_CPUINFO is not set
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  CONFIG_SPL_STACK_R=y
  CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
  CONFIG_SPL_SPI_LOAD=y
  CONFIG_SPL_ATF=y
  CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
  CONFIG_CMD_BOOTZ=y
  CONFIG_CMD_GPIO=y
  CONFIG_CMD_GPT=y
  CONFIG_CMD_I2C=y
  CONFIG_CMD_MMC=y
  CONFIG_CMD_SF=y
  CONFIG_CMD_SF_TEST=y
  CONFIG_CMD_SPI=y
  CONFIG_CMD_USB=y
  # CONFIG_CMD_SETEXPR is not set
  CONFIG_CMD_TIME=y
  CONFIG_CMD_PMIC=y
  CONFIG_CMD_REGULATOR=y
  CONFIG_CMD_LOG=y
  CONFIG_SPL_OF_CONTROL=y
  CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-bob"
  CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
  CONFIG_ENV_IS_IN_MMC=y
  CONFIG_REGMAP=y
  CONFIG_SPL_REGMAP=y
  CONFIG_SYSCON=y
  CONFIG_SPL_SYSCON=y
  CONFIG_CLK=y
  CONFIG_SPL_CLK=y
  CONFIG_ROCKCHIP_GPIO=y
  CONFIG_I2C_CROS_EC_TUNNEL=y
  CONFIG_SYS_I2C_ROCKCHIP=y
  CONFIG_I2C_MUX=y
  CONFIG_DM_KEYBOARD=y
  CONFIG_CROS_EC_KEYB=y
  CONFIG_CROS_EC=y
  CONFIG_CROS_EC_SPI=y
  CONFIG_PWRSEQ=y
  CONFIG_MMC_DW=y
  CONFIG_MMC_DW_ROCKCHIP=y
  CONFIG_MMC_SDHCI=y
  CONFIG_MMC_SDHCI_ROCKCHIP=y
  CONFIG_SPI_FLASH=y
14453fbfa   Patrick Delaunay   Convert CONFIG_SF... 
69
 
  CONFIG_SF_DEFAULT_SPEED=20000000
9e92116bc   Simon Glass   rockchip: Add sup... 
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
 
  CONFIG_SPI_FLASH_GIGADEVICE=y
  CONFIG_DM_ETH=y
  CONFIG_ETH_DESIGNWARE=y
  CONFIG_GMAC_ROCKCHIP=y
  CONFIG_PINCTRL=y
  CONFIG_SPL_PINCTRL=y
  CONFIG_DM_PMIC=y
  CONFIG_PMIC_RK8XX=y
  CONFIG_REGULATOR_PWM=y
  CONFIG_DM_REGULATOR_FIXED=y
  CONFIG_REGULATOR_RK8XX=y
  CONFIG_PWM_ROCKCHIP=y
  CONFIG_RAM=y
  CONFIG_SPL_RAM=y
  CONFIG_DEBUG_UART_SHIFT=2
  CONFIG_ROCKCHIP_SPI=y
  CONFIG_SYSRESET=y
  CONFIG_USB=y
  CONFIG_USB_XHCI_HCD=y
  CONFIG_USB_XHCI_DWC3=y
  CONFIG_USB_EHCI_HCD=y
  CONFIG_USB_EHCI_GENERIC=y
  CONFIG_USB_HOST_ETHER=y
  CONFIG_USB_ETHER_ASIX=y
  CONFIG_USB_ETHER_ASIX88179=y
  CONFIG_USB_ETHER_MCS7830=y
  CONFIG_USB_ETHER_RTL8152=y
  CONFIG_USB_ETHER_SMSC95XX=y
  CONFIG_USE_TINY_PRINTF=y
  CONFIG_CMD_DHRYSTONE=y
  CONFIG_ERRNO_STR=y