Blame view

drivers/net/ep93xx_eth.h 2.31 KB
d41ce506b   Eric Lee   Initial Release, ...
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
  /*
   * Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
   *
   * Copyright (C) 2004, 2005
   * Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com>
   *
   * SPDX-License-Identifier:	GPL-2.0+
   */
  
  #ifndef _EP93XX_ETH_H
  #define _EP93XX_ETH_H
  
  #include <net.h>
  
  /**
   * #define this to dump device status and queue info during initialization and
   * following errors.
   */
  #undef EP93XX_MAC_DEBUG
  
  /**
   * Number of descriptor and status entries in our RX queues.
   * It must be power of 2 !
   */
  #define NUMRXDESC		PKTBUFSRX
  
  /**
   * Number of descriptor and status entries in our TX queues.
   */
  #define NUMTXDESC		1
  
  /**
   * 944 = (1024 - 64) - 16, Fifo size - Minframesize - 16 (Chip FACT)
   */
  #define TXSTARTMAX		944
  
  /**
   * Receive descriptor queue entry
   */
  struct rx_descriptor {
  	uint32_t word1;
  	uint32_t word2;
  };
  
  /**
   * Receive status queue entry
   */
  struct rx_status {
  	uint32_t word1;
  	uint32_t word2;
  };
  
  #define RX_STATUS_RWE(rx_status) ((rx_status->word1 >> 30) & 0x01)
  #define RX_STATUS_RFP(rx_status) ((rx_status->word1 >> 31) & 0x01)
  #define RX_STATUS_FRAME_LEN(rx_status) (rx_status->word2 & 0xFFFF)
  
  /**
   * Transmit descriptor queue entry
   */
  struct tx_descriptor {
  	uint32_t word1;
  	uint32_t word2;
  };
  
  #define TX_DESC_EOF (1 << 31)
  
  /**
   * Transmit status queue entry
   */
  struct tx_status {
  	uint32_t word1;
  };
  
  #define TX_STATUS_TXWE(tx_status) (((tx_status)->word1 >> 30) & 0x01)
  #define TX_STATUS_TXFP(tx_status) (((tx_status)->word1 >> 31) & 0x01)
  
  /**
   * Transmit descriptor queue
   */
  struct tx_descriptor_queue {
  	struct tx_descriptor *base;
  	struct tx_descriptor *current;
  	struct tx_descriptor *end;
  };
  
  /**
   * Transmit status queue
   */
  struct tx_status_queue {
  	struct tx_status *base;
  	volatile struct tx_status *current;
  	struct tx_status *end;
  };
  
  /**
   * Receive descriptor queue
   */
  struct rx_descriptor_queue {
  	struct rx_descriptor *base;
  	struct rx_descriptor *current;
  	struct rx_descriptor *end;
  };
  
  /**
   * Receive status queue
   */
  struct rx_status_queue {
  	struct rx_status *base;
  	volatile struct rx_status *current;
  	struct rx_status *end;
  };
  
  /**
   * EP93xx MAC private data structure
   */
  struct ep93xx_priv {
  	struct rx_descriptor_queue	rx_dq;
  	struct rx_status_queue		rx_sq;
  	void				*rx_buffer[NUMRXDESC];
  
  	struct tx_descriptor_queue	tx_dq;
  	struct tx_status_queue		tx_sq;
  
  	struct mac_regs			*regs;
  };
  
  #endif