Blame view
configs/xilinx_zynqmp_r5_defconfig
497 Bytes
1d6c54ecb arm: zynqmp: Add ... |
1 2 3 |
CONFIG_ARM=y CONFIG_ARCH_ZYNQMP_R5=y CONFIG_SYS_TEXT_BASE=0x10000000 |
dcd8a102c xilinx: Sync symb... |
4 5 |
CONFIG_DEBUG_UART_BASE=0xff010000 CONFIG_DEBUG_UART_CLOCK=100000000 |
1d6c54ecb arm: zynqmp: Add ... |
6 |
CONFIG_DEBUG_UART=y |
86cf1c828 configs: Migrate ... |
7 |
CONFIG_NR_DRAM_BANKS=1 |
56c0e646c timer: cadence: I... |
8 |
CONFIG_BOOTSTAGE=y |
1d6c54ecb arm: zynqmp: Add ... |
9 10 11 12 |
# CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="ZynqMP r5> " # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set |
56c0e646c timer: cadence: I... |
13 |
CONFIG_CMD_BOOTSTAGE=y |
1d6c54ecb arm: zynqmp: Add ... |
14 |
CONFIG_OF_EMBED=y |
8c5cad05c configs: Resync w... |
15 |
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-r5" |
1d6c54ecb arm: zynqmp: Add ... |
16 |
CONFIG_DEBUG_UART_ZYNQ=y |
1d6c54ecb arm: zynqmp: Add ... |
17 18 19 |
CONFIG_ZYNQ_SERIAL=y CONFIG_TIMER=y CONFIG_CADENCE_TTC_TIMER=y |