Blame view
drivers/i2c/i2c_core.c
7.84 KB
385c9ef5a i2c: add i2c_core... |
1 2 3 4 5 6 7 8 |
/* * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net> * * (C) Copyright 2012 * Heiko Schocher, DENX Software Engineering, hs@denx.de. * * Multibus/multiadapter I2C core functions (wrappers) * |
8dde4ca90 drivers/i2c: Upda... |
9 |
* SPDX-License-Identifier: GPL-2.0+ |
385c9ef5a i2c: add i2c_core... |
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 |
*/ #include <common.h> #include <i2c.h> struct i2c_adapter *i2c_get_adapter(int index) { struct i2c_adapter *i2c_adap_p = ll_entry_start(struct i2c_adapter, i2c); int max = ll_entry_count(struct i2c_adapter, i2c); int i; if (index >= max) { printf("Error, wrong i2c adapter %d max %d possible ", index, max); return i2c_adap_p; } if (index == 0) return i2c_adap_p; for (i = 0; i < index; i++) i2c_adap_p++; return i2c_adap_p; } #if !defined(CONFIG_SYS_I2C_DIRECT_BUS) struct i2c_bus_hose i2c_bus[CONFIG_SYS_NUM_I2C_BUSES] = CONFIG_SYS_I2C_BUSES; #endif DECLARE_GLOBAL_DATA_PTR; |
385c9ef5a i2c: add i2c_core... |
42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 |
#ifndef CONFIG_SYS_I2C_DIRECT_BUS /* * i2c_mux_set() * ------------- * * This turns on the given channel on I2C multiplexer chip connected to * a given I2C adapter directly or via other multiplexers. In the latter * case the entire multiplexer chain must be initialized first starting * with the one connected directly to the adapter. When disabling a chain * muxes must be programmed in reverse order, starting with the one * farthest from the adapter. * * mux_id is the multiplexer chip type from defined in i2c.h. So far only * NXP (Philips) PCA954x multiplexers are supported. Switches are NOT * supported (anybody uses them?) */ static int i2c_mux_set(struct i2c_adapter *adap, int mux_id, int chip, int channel) { uint8_t buf; int ret; /* channel < 0 - turn off the mux */ if (channel < 0) { buf = 0; ret = adap->write(adap, chip, 0, 0, &buf, 1); if (ret) printf("%s: Could not turn off the mux. ", __func__); return ret; } switch (mux_id) { case I2C_MUX_PCA9540_ID: case I2C_MUX_PCA9542_ID: if (channel > 1) return -1; buf = (uint8_t)((channel & 0x01) | (1 << 2)); break; case I2C_MUX_PCA9544_ID: if (channel > 3) return -1; buf = (uint8_t)((channel & 0x03) | (1 << 2)); break; |
89054a546 U-Boot v2018.03 s... |
87 88 89 90 91 |
case I2C_MUX_PCA9546_ID: if (channel > 4) return -1; buf = (uint8_t)((channel & 0x04) | (1 << 3)); break; |
385c9ef5a i2c: add i2c_core... |
92 93 94 95 96 |
case I2C_MUX_PCA9547_ID: if (channel > 7) return -1; buf = (uint8_t)((channel & 0x07) | (1 << 3)); break; |
e66587495 i2c: Zynq: Suppor... |
97 98 99 100 101 |
case I2C_MUX_PCA9548_ID: if (channel > 7) return -1; buf = (uint8_t)(0x01 << channel); break; |
385c9ef5a i2c: add i2c_core... |
102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 |
default: printf("%s: wrong mux id: %d ", __func__, mux_id); return -1; } ret = adap->write(adap, chip, 0, 0, &buf, 1); if (ret) printf("%s: could not set mux: id: %d chip: %x channel: %d ", __func__, mux_id, chip, channel); return ret; } static int i2c_mux_set_all(void) { struct i2c_bus_hose *i2c_bus_tmp = &i2c_bus[I2C_BUS]; int i; /* Connect requested bus if behind muxes */ if (i2c_bus_tmp->next_hop[0].chip != 0) { /* Set all muxes along the path to that bus */ for (i = 0; i < CONFIG_SYS_I2C_MAX_HOPS; i++) { int ret; if (i2c_bus_tmp->next_hop[i].chip == 0) break; ret = i2c_mux_set(I2C_ADAP, i2c_bus_tmp->next_hop[i].mux.id, i2c_bus_tmp->next_hop[i].chip, i2c_bus_tmp->next_hop[i].channel); if (ret != 0) return ret; } } return 0; } |
f4ed36964 i2c: Correct spel... |
140 |
static int i2c_mux_disconnect_all(void) |
385c9ef5a i2c: add i2c_core... |
141 142 143 |
{ struct i2c_bus_hose *i2c_bus_tmp = &i2c_bus[I2C_BUS]; int i; |
2fe50ef40 i2c: Fix deselect... |
144 |
uint8_t buf = 0; |
385c9ef5a i2c: add i2c_core... |
145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 |
if (I2C_ADAP->init_done == 0) return 0; /* Disconnect current bus (turn off muxes if any) */ if ((i2c_bus_tmp->next_hop[0].chip != 0) && (I2C_ADAP->init_done != 0)) { i = CONFIG_SYS_I2C_MAX_HOPS; do { uint8_t chip; int ret; chip = i2c_bus_tmp->next_hop[--i].chip; if (chip == 0) continue; ret = I2C_ADAP->write(I2C_ADAP, chip, 0, 0, &buf, 1); if (ret != 0) { |
f4ed36964 i2c: Correct spel... |
163 164 |
printf("i2c: mux disconnect error "); |
385c9ef5a i2c: add i2c_core... |
165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 |
return ret; } } while (i > 0); } return 0; } #endif /* * i2c_init_bus(): * --------------- * * Initializes one bus. Will initialize the parent adapter. No current bus * changes, no mux (if any) setup. */ static void i2c_init_bus(unsigned int bus_no, int speed, int slaveaddr) { if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) return; I2C_ADAP->init(I2C_ADAP, speed, slaveaddr); if (gd->flags & GD_FLG_RELOC) { I2C_ADAP->init_done = 1; I2C_ADAP->speed = speed; I2C_ADAP->slaveaddr = slaveaddr; } } /* implement possible board specific board init */ |
13a8b7ae7 i2c: use __weak |
196 |
__weak void i2c_init_board(void) |
385c9ef5a i2c: add i2c_core... |
197 198 |
{ } |
385c9ef5a i2c: add i2c_core... |
199 |
|
9d10c2d3f drivers: i2c: mxc... |
200 201 202 203 |
/* implement possible for i2c specific early i2c init */ __weak void i2c_early_init_f(void) { } |
385c9ef5a i2c: add i2c_core... |
204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 |
/* * i2c_init_all(): * * not longer needed, will deleted. Actual init the SPD_BUS * for compatibility. * i2c_adap[] must be initialized beforehead with function pointers and * data, including speed and slaveaddr. */ void i2c_init_all(void) { i2c_init_board(); i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM); return; } /* * i2c_get_bus_num(): * ------------------ * * Returns index of currently active I2C bus. Zero-based. */ unsigned int i2c_get_bus_num(void) { return gd->cur_i2c_bus; } /* * i2c_set_bus_num(): * ------------------ * * Change the active I2C bus. Subsequent read/write calls will * go to this one. Sets all of the muxes in a proper condition * if that bus is behind muxes. * If previously selected bus is behind the muxes turns off all the * muxes along the path to that bus. * * bus - bus index, zero based * * Returns: 0 on success, not 0 on failure */ int i2c_set_bus_num(unsigned int bus) { |
13c2433cc i2c, core: optimz... |
246 247 248 249 |
int max; if ((bus == I2C_BUS) && (I2C_ADAP->init_done > 0)) return 0; |
385c9ef5a i2c: add i2c_core... |
250 |
|
385c9ef5a i2c: add i2c_core... |
251 252 253 254 |
#ifndef CONFIG_SYS_I2C_DIRECT_BUS if (bus >= CONFIG_SYS_NUM_I2C_BUSES) return -1; #endif |
13c2433cc i2c, core: optimz... |
255 256 257 258 259 260 261 |
max = ll_entry_count(struct i2c_adapter, i2c); if (I2C_ADAPTER(bus) >= max) { printf("Error, wrong i2c adapter %d max %d possible ", I2C_ADAPTER(bus), max); return -2; } |
385c9ef5a i2c: add i2c_core... |
262 263 |
#ifndef CONFIG_SYS_I2C_DIRECT_BUS |
f4ed36964 i2c: Correct spel... |
264 |
i2c_mux_disconnect_all(); |
385c9ef5a i2c: add i2c_core... |
265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 |
#endif gd->cur_i2c_bus = bus; if (I2C_ADAP->init_done == 0) i2c_init_bus(bus, I2C_ADAP->speed, I2C_ADAP->slaveaddr); #ifndef CONFIG_SYS_I2C_DIRECT_BUS i2c_mux_set_all(); #endif return 0; } /* * Probe the given I2C chip address. Returns 0 if a chip responded, * not 0 on failure. */ int i2c_probe(uint8_t chip) { return I2C_ADAP->probe(I2C_ADAP, chip); } /* * Read/Write interface: * chip: I2C chip address, range 0..127 * addr: Memory (register) address within the chip * alen: Number of bytes to use for addr (typically 1, 2 for larger * memories, 0 for register type devices with only one * register) * buffer: Where to read/write the data * len: How many bytes to read/write * * Returns: 0 on success, not 0 on failure */ int i2c_read(uint8_t chip, unsigned int addr, int alen, uint8_t *buffer, int len) { return I2C_ADAP->read(I2C_ADAP, chip, addr, alen, buffer, len); } int i2c_write(uint8_t chip, unsigned int addr, int alen, uint8_t *buffer, int len) { return I2C_ADAP->write(I2C_ADAP, chip, addr, alen, buffer, len); } unsigned int i2c_set_bus_speed(unsigned int speed) { unsigned int ret; if (I2C_ADAP->set_bus_speed == NULL) return 0; ret = I2C_ADAP->set_bus_speed(I2C_ADAP, speed); if (gd->flags & GD_FLG_RELOC) |
7cc1b02f8 i2c: Fix i2c spee... |
318 |
I2C_ADAP->speed = (ret == 0) ? speed : 0; |
385c9ef5a i2c: add i2c_core... |
319 320 321 322 323 324 325 326 327 328 329 330 331 |
return ret; } unsigned int i2c_get_bus_speed(void) { struct i2c_adapter *cur = I2C_ADAP; return cur->speed; } uint8_t i2c_reg_read(uint8_t addr, uint8_t reg) { uint8_t buf; |
385c9ef5a i2c: add i2c_core... |
332 333 334 335 336 337 338 339 340 341 342 343 344 |
i2c_read(addr, reg, 1, &buf, 1); #ifdef DEBUG printf("%s: bus=%d addr=0x%02x, reg=0x%02x, val=0x%02x ", __func__, i2c_get_bus_num(), addr, reg, buf); #endif return buf; } void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val) { |
385c9ef5a i2c: add i2c_core... |
345 346 347 348 349 350 351 352 |
#ifdef DEBUG printf("%s: bus=%d addr=0x%02x, reg=0x%02x, val=0x%02x ", __func__, i2c_get_bus_num(), addr, reg, val); #endif i2c_write(addr, reg, 1, &val, 1); } |
13a8b7ae7 i2c: use __weak |
353 |
__weak void i2c_init(int speed, int slaveaddr) |
385c9ef5a i2c: add i2c_core... |
354 355 356 |
{ i2c_init_bus(i2c_get_bus_num(), speed, slaveaddr); } |