Blame view
drivers/clk/clk_fixed_rate.c
1.19 KB
b21e20b25 clk: add fixed ra... |
1 2 3 4 5 6 7 |
/* * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> |
135aa9500 clk: convert API ... |
8 |
#include <clk-uclass.h> |
b21e20b25 clk: add fixed ra... |
9 10 11 12 13 14 15 16 17 |
#include <dm/device.h> DECLARE_GLOBAL_DATA_PTR; struct clk_fixed_rate { unsigned long fixed_rate; }; #define to_clk_fixed_rate(dev) ((struct clk_fixed_rate *)dev_get_platdata(dev)) |
135aa9500 clk: convert API ... |
18 |
static ulong clk_fixed_rate_get_rate(struct clk *clk) |
b21e20b25 clk: add fixed ra... |
19 |
{ |
135aa9500 clk: convert API ... |
20 21 |
if (clk->id != 0) return -EINVAL; |
b21e20b25 clk: add fixed ra... |
22 |
|
135aa9500 clk: convert API ... |
23 |
return to_clk_fixed_rate(clk->dev)->fixed_rate; |
b21e20b25 clk: add fixed ra... |
24 25 26 27 |
} const struct clk_ops clk_fixed_rate_ops = { .get_rate = clk_fixed_rate_get_rate, |
b21e20b25 clk: add fixed ra... |
28 29 30 31 |
}; static int clk_fixed_rate_ofdata_to_platdata(struct udevice *dev) { |
7423daa60 dm: clk: Add supp... |
32 |
#if !CONFIG_IS_ENABLED(OF_PLATDATA) |
b21e20b25 clk: add fixed ra... |
33 34 35 |
to_clk_fixed_rate(dev)->fixed_rate = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "clock-frequency", 0); |
7423daa60 dm: clk: Add supp... |
36 |
#endif |
b21e20b25 clk: add fixed ra... |
37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 |
return 0; } static const struct udevice_id clk_fixed_rate_match[] = { { .compatible = "fixed-clock", }, { /* sentinel */ } }; U_BOOT_DRIVER(clk_fixed_rate) = { .name = "fixed_rate_clock", .id = UCLASS_CLK, .of_match = clk_fixed_rate_match, .ofdata_to_platdata = clk_fixed_rate_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct clk_fixed_rate), .ops = &clk_fixed_rate_ops, }; |