Commit 0f27307122e4d22b4dca37fd95cf495e74e410a1
1 parent
7b055443be
Exists in
smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga
and in
4 other branches
update memory config to the latest release
Showing 3 changed files with 33 additions and 3 deletions Side-by-side Diff
board/embedian/smarcfimx7/ddr3l/mx7d_2x_k4b4g1646q.cfg
... | ... | @@ -21,8 +21,12 @@ |
21 | 21 | * spi/sd/nand/onenand, qspi/nor |
22 | 22 | */ |
23 | 23 | |
24 | -BOOT_FROM spi | |
24 | +BOOT_FROM sd | |
25 | 25 | |
26 | +#ifdef CONFIG_USE_IMXIMG_PLUGIN | |
27 | +/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/ | |
28 | +PLUGIN board/freescale/mx7dsabresd/plugin.bin 0x00910000 | |
29 | +#else | |
26 | 30 | /* |
27 | 31 | * Secure boot support |
28 | 32 | */ |
... | ... | @@ -42,6 +46,10 @@ |
42 | 46 | * value value to be stored in the register |
43 | 47 | */ |
44 | 48 | |
49 | +#ifdef CONFIG_IMX_OPTEE | |
50 | +DATA 4 0x30340024 0x1 | |
51 | +CHECK_BITS_SET 4 0x30340024 0x1 | |
52 | +#endif | |
45 | 53 | /* IOMUXC_GPR_GPR1 */ |
46 | 54 | DATA 4 0x30340004 0x4F400005 |
47 | 55 | /* Clear then set bit30 to ensure exit from DDR retention */ |
... | ... | @@ -152,4 +160,6 @@ |
152 | 160 | |
153 | 161 | /* DDRC_STAT */ |
154 | 162 | CHECK_BITS_SET 4 0x307a0004 0x1 |
163 | + | |
164 | +#endif |
board/embedian/smarcfimx7/ddr3l/mx7d_2x_mt41k512m16ha.cfg
... | ... | @@ -21,8 +21,12 @@ |
21 | 21 | * spi/sd/nand/onenand, qspi/nor |
22 | 22 | */ |
23 | 23 | |
24 | -BOOT_FROM spi | |
24 | +BOOT_FROM sd | |
25 | 25 | |
26 | +#ifdef CONFIG_USE_IMXIMG_PLUGIN | |
27 | +/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/ | |
28 | +PLUGIN board/freescale/mx7dsabresd/plugin.bin 0x00910000 | |
29 | +#else | |
26 | 30 | /* |
27 | 31 | * Secure boot support |
28 | 32 | */ |
... | ... | @@ -42,6 +46,10 @@ |
42 | 46 | * value value to be stored in the register |
43 | 47 | */ |
44 | 48 | |
49 | +#ifdef CONFIG_IMX_OPTEE | |
50 | +DATA 4 0x30340024 0x1 | |
51 | +CHECK_BITS_SET 4 0x30340024 0x1 | |
52 | +#endif | |
45 | 53 | /* IOMUXC_GPR_GPR1 */ |
46 | 54 | DATA 4 0x30340004 0x4F400005 |
47 | 55 | /* Clear then set bit30 to ensure exit from DDR retention */ |
... | ... | @@ -152,4 +160,6 @@ |
152 | 160 | |
153 | 161 | /* DDRC_STAT */ |
154 | 162 | CHECK_BITS_SET 4 0x307a0004 0x1 |
163 | + | |
164 | +#endif |
board/embedian/smarcfimx7/ddr3l/mx7s_2x_k4b2g1646q.cfg
... | ... | @@ -21,8 +21,12 @@ |
21 | 21 | * spi/sd/nand/onenand, qspi/nor |
22 | 22 | */ |
23 | 23 | |
24 | -BOOT_FROM spi | |
24 | +BOOT_FROM sd | |
25 | 25 | |
26 | +#ifdef CONFIG_USE_IMXIMG_PLUGIN | |
27 | +/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/ | |
28 | +PLUGIN board/freescale/mx7dsabresd/plugin.bin 0x00910000 | |
29 | +#else | |
26 | 30 | /* |
27 | 31 | * Secure boot support |
28 | 32 | */ |
... | ... | @@ -42,6 +46,10 @@ |
42 | 46 | * value value to be stored in the register |
43 | 47 | */ |
44 | 48 | |
49 | +#ifdef CONFIG_IMX_OPTEE | |
50 | +DATA 4 0x30340024 0x1 | |
51 | +CHECK_BITS_SET 4 0x30340024 0x1 | |
52 | +#endif | |
45 | 53 | /* IOMUXC_GPR_GPR1 */ |
46 | 54 | DATA 4 0x30340004 0x4F400005 |
47 | 55 | /* Clear then set bit30 to ensure exit from DDR retention */ |
... | ... | @@ -152,4 +160,6 @@ |
152 | 160 | |
153 | 161 | /* DDRC_STAT */ |
154 | 162 | CHECK_BITS_SET 4 0x307a0004 0x1 |
163 | + | |
164 | +#endif |