From 11ea97fb3c67f71ba7d9cb05bf10a9035f1d3cc4 Mon Sep 17 00:00:00 2001 From: Ye Li Date: Thu, 28 May 2020 03:29:17 -0700 Subject: [PATCH] MLK-24192-2 DTS: imx8qm/qxp/dxl: Update PCIE clocks Update PCIE clocks to align with latest v5.4 kernel, otherwise we may miss some LPCG clocks in u-boot and have potential problem if they have been disabled in kernel during partition reboot. Signed-off-by: Ye Li Reviewed-by: Peng Fan (cherry picked from commit 76ebe2016c2ab7199cb6a6b83f8bc97fe0140549) --- arch/arm/dts/fsl-imx8dx.dtsi | 8 +++++--- arch/arm/dts/fsl-imx8dxl.dtsi | 8 +++++--- arch/arm/dts/fsl-imx8qm-device.dtsi | 18 ++++++++++++------ 3 files changed, 22 insertions(+), 12 deletions(-) diff --git a/arch/arm/dts/fsl-imx8dx.dtsi b/arch/arm/dts/fsl-imx8dx.dtsi index 82ec2cf..9b25acb 100644 --- a/arch/arm/dts/fsl-imx8dx.dtsi +++ b/arch/arm/dts/fsl-imx8dx.dtsi @@ -3382,9 +3382,11 @@ <&clk IMX8QXP_HSIO_PCIE_SLV_AXI_CLK>, <&clk IMX8QXP_HSIO_PHY_X1_PCLK>, <&clk IMX8QXP_HSIO_PCIE_X1_PER_CLK>, - <&clk IMX8QXP_HSIO_PCIE_DBI_AXI_CLK>; - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pcie_inbound_axi"; - + <&clk IMX8QXP_HSIO_PCIE_DBI_AXI_CLK>, + <&clk IMX8QXP_HSIO_PHY_X1_PER_CLK>, + <&clk IMX8QXP_HSIO_MISC_PER_CLK>; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pcie_inbound_axi", + "phy_per", "misc_per"; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &gic 0 105 4>, <0 0 0 2 &gic 0 106 4>, diff --git a/arch/arm/dts/fsl-imx8dxl.dtsi b/arch/arm/dts/fsl-imx8dxl.dtsi index 0c33ec0..98cf1bd 100644 --- a/arch/arm/dts/fsl-imx8dxl.dtsi +++ b/arch/arm/dts/fsl-imx8dxl.dtsi @@ -1796,9 +1796,11 @@ <&clk IMX8QXP_HSIO_PCIE_SLV_AXI_CLK>, <&clk IMX8QXP_HSIO_PHY_X1_PCLK>, <&clk IMX8QXP_HSIO_PCIE_X1_PER_CLK>, - <&clk IMX8QXP_HSIO_PCIE_DBI_AXI_CLK>; - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pcie_inbound_axi"; - + <&clk IMX8QXP_HSIO_PCIE_DBI_AXI_CLK>, + <&clk IMX8QXP_HSIO_PHY_X1_PER_CLK>, + <&clk IMX8QXP_HSIO_MISC_PER_CLK>; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pcie_inbound_axi", + "phy_per", "misc_per"; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &gic 0 105 4>, <0 0 0 2 &gic 0 106 4>, diff --git a/arch/arm/dts/fsl-imx8qm-device.dtsi b/arch/arm/dts/fsl-imx8qm-device.dtsi index 531707d..2f5929b 100644 --- a/arch/arm/dts/fsl-imx8qm-device.dtsi +++ b/arch/arm/dts/fsl-imx8qm-device.dtsi @@ -2188,9 +2188,11 @@ <&clk IMX8QM_HSIO_PCIE_A_SLV_AXI_CLK>, <&clk IMX8QM_HSIO_PHY_X2_PCLK_0>, <&clk IMX8QM_HSIO_PCIE_X2_PER_CLK>, - <&clk IMX8QM_HSIO_PCIE_A_DBI_AXI_CLK>; - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pcie_inbound_axi"; - + <&clk IMX8QM_HSIO_PCIE_A_DBI_AXI_CLK>, + <&clk IMX8QM_HSIO_PHY_X2_PER_CLK>, + <&clk IMX8QM_HSIO_MISC_PER_CLK>; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pcie_inbound_axi", + "phy_per", "misc_per"; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &gic 0 73 4>, <0 0 0 2 &gic 0 74 4>, @@ -2231,9 +2233,13 @@ <&clk IMX8QM_HSIO_PCIE_B_SLV_AXI_CLK>, <&clk IMX8QM_HSIO_PHY_X2_PCLK_1>, <&clk IMX8QM_HSIO_PCIE_X1_PER_CLK>, - <&clk IMX8QM_HSIO_PCIE_B_DBI_AXI_CLK>; - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pcie_inbound_axi"; - + <&clk IMX8QM_HSIO_PCIE_B_DBI_AXI_CLK>, + <&clk IMX8QM_HSIO_PCIE_X2_PER_CLK>, + <&clk IMX8QM_HSIO_PHY_X2_PCLK_0>, + <&clk IMX8QM_HSIO_PHY_X2_PER_CLK>, + <&clk IMX8QM_HSIO_MISC_PER_CLK>; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pcie_inbound_axi", + "pciex2_per", "pcie_phy_pclk", "phy_per", "misc_per"; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &gic 0 105 4>, <0 0 0 2 &gic 0 106 4>, -- 1.9.1