Commit 3818b677641038d27b2663fbd6771ad38c932f86
Committed by
Wolfgang Denk
1 parent
b4746d8bf9
Exists in
master
and in
55 other branches
fpga: Fix Spartan II FPGA booting
This patch does some minor fixing of the Xilinx Spartan II FPGA boot code: - Fixed call order of post configuration callback and success message printing (result of copy-paste?) - relocate post configuration callback only when it is implemented - remove obsolete comment - minor coding style cleanup Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Showing 1 changed file with 11 additions and 21 deletions Side-by-side Diff
drivers/fpga/spartan2.c
... | ... | @@ -260,8 +260,6 @@ |
260 | 260 | ts = get_timer (0); /* get current time */ |
261 | 261 | ret_val = FPGA_SUCCESS; |
262 | 262 | while ((*fn->done) (cookie) == FPGA_FAIL) { |
263 | - /* XXX - we should have a check in here somewhere to | |
264 | - * make sure we aren't busy forever... */ | |
265 | 263 | |
266 | 264 | CONFIG_FPGA_DELAY (); |
267 | 265 | (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */ |
268 | 266 | |
269 | 267 | |
270 | 268 | |
271 | 269 | |
272 | 270 | |
... | ... | @@ -276,23 +274,18 @@ |
276 | 274 | } |
277 | 275 | } |
278 | 276 | |
279 | - if (ret_val == FPGA_SUCCESS) { | |
280 | -#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK | |
281 | - puts ("Done.\n"); | |
282 | -#endif | |
283 | - } | |
284 | 277 | /* |
285 | 278 | * Run the post configuration function if there is one. |
286 | 279 | */ |
287 | - if (*fn->post) { | |
280 | + if (*fn->post) | |
288 | 281 | (*fn->post) (cookie); |
289 | - } | |
290 | 282 | |
291 | - else { | |
292 | 283 | #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK |
284 | + if (ret_val == FPGA_SUCCESS) | |
285 | + puts ("Done.\n"); | |
286 | + else | |
293 | 287 | puts ("Fail.\n"); |
294 | 288 | #endif |
295 | - } | |
296 | 289 | |
297 | 290 | } else { |
298 | 291 | printf ("%s: NULL Interface function table!\n", __FUNCTION__); |
... | ... | @@ -412,8 +405,10 @@ |
412 | 405 | addr = (ulong) (fn->abort) + reloc_offset; |
413 | 406 | fn_r->abort = (Xilinx_abort_fn) addr; |
414 | 407 | |
415 | - addr = (ulong) (fn->post) + reloc_offset; | |
416 | - fn_r->post = (Xilinx_post_fn) addr; | |
408 | + if (fn->post) { | |
409 | + addr = (ulong) (fn->post) + reloc_offset; | |
410 | + fn_r->post = (Xilinx_post_fn) addr; | |
411 | + } | |
417 | 412 | |
418 | 413 | fn_r->relocated = TRUE; |
419 | 414 | |
... | ... | @@ -541,8 +536,6 @@ |
541 | 536 | (*fn->wr) (TRUE, TRUE, cookie); |
542 | 537 | |
543 | 538 | while (! (*fn->done) (cookie)) { |
544 | - /* XXX - we should have a check in here somewhere to | |
545 | - * make sure we aren't busy forever... */ | |
546 | 539 | |
547 | 540 | CONFIG_FPGA_DELAY (); |
548 | 541 | (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */ |
549 | 542 | |
550 | 543 | |
551 | 544 | |
552 | 545 | |
... | ... | @@ -562,17 +555,14 @@ |
562 | 555 | /* |
563 | 556 | * Run the post configuration function if there is one. |
564 | 557 | */ |
565 | - if (*fn->post) { | |
558 | + if (*fn->post) | |
566 | 559 | (*fn->post) (cookie); |
567 | - } | |
568 | 560 | |
569 | 561 | #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK |
570 | - if (ret_val == FPGA_SUCCESS) { | |
562 | + if (ret_val == FPGA_SUCCESS) | |
571 | 563 | puts ("Done.\n"); |
572 | - } | |
573 | - else { | |
564 | + else | |
574 | 565 | puts ("Fail.\n"); |
575 | - } | |
576 | 566 | #endif |
577 | 567 | |
578 | 568 | } else { |