Commit 3f74d2934ffabab54e83ef0afcdb9dfb0a31a3da
1 parent
312ec620f3
Exists in
smarc_8mq_lf_v2020.04
Make changes to hardware revision 00F0: Replace Ethernet PHY by RTL8211FD-CG
Showing 18 changed files with 18 additions and 18 deletions Inline Diff
- arch/arm/dts/imx8mq-smarc.dts
- configs/smarcimx8mq_2g_ser0_android_defconfig
- configs/smarcimx8mq_2g_ser0_defconfig
- configs/smarcimx8mq_2g_ser1_android_defconfig
- configs/smarcimx8mq_2g_ser1_defconfig
- configs/smarcimx8mq_2g_ser2_android_defconfig
- configs/smarcimx8mq_2g_ser2_defconfig
- configs/smarcimx8mq_2g_ser3_android_defconfig
- configs/smarcimx8mq_2g_ser3_defconfig
- configs/smarcimx8mq_4g_ser0_android_defconfig
- configs/smarcimx8mq_4g_ser0_defconfig
- configs/smarcimx8mq_4g_ser1_android_defconfig
- configs/smarcimx8mq_4g_ser1_defconfig
- configs/smarcimx8mq_4g_ser2_android_defconfig
- configs/smarcimx8mq_4g_ser2_defconfig
- configs/smarcimx8mq_4g_ser3_android_defconfig
- configs/smarcimx8mq_4g_ser3_defconfig
- include/configs/smarcimx8mq.h
arch/arm/dts/imx8mq-smarc.dts
1 | // SPDX-License-Identifier: (GPL-2.0 OR MIT) | 1 | // SPDX-License-Identifier: (GPL-2.0 OR MIT) |
2 | /* | 2 | /* |
3 | * Copyright 2017 NXP | 3 | * Copyright 2017 NXP |
4 | * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de> | 4 | * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de> |
5 | */ | 5 | */ |
6 | 6 | ||
7 | /dts-v1/; | 7 | /dts-v1/; |
8 | 8 | ||
9 | #include "imx8mq.dtsi" | 9 | #include "imx8mq.dtsi" |
10 | 10 | ||
11 | / { | 11 | / { |
12 | model = "Embedian SMARC-iMX8M Computer on Module"; | 12 | model = "Embedian SMARC-iMX8M Computer on Module"; |
13 | compatible = "embedian,imx8mq-smarcimx8m", "fsl,imx8mq"; | 13 | compatible = "embedian,imx8mq-smarcimx8m", "fsl,imx8mq"; |
14 | 14 | ||
15 | firmware { | 15 | firmware { |
16 | optee { | 16 | optee { |
17 | compatible = "linaro,optee-tz"; | 17 | compatible = "linaro,optee-tz"; |
18 | method = "smc"; | 18 | method = "smc"; |
19 | }; | 19 | }; |
20 | }; | 20 | }; |
21 | 21 | ||
22 | memory@40000000 { | 22 | memory@40000000 { |
23 | device_type = "memory"; | 23 | device_type = "memory"; |
24 | reg = <0x00000000 0x40000000 0 0xc0000000>; | 24 | reg = <0x00000000 0x40000000 0 0xc0000000>; |
25 | }; | 25 | }; |
26 | 26 | ||
27 | reg_usdhc2_vmmc: regulator-vsd-3v3 { | 27 | reg_usdhc2_vmmc: regulator-vsd-3v3 { |
28 | pinctrl-names = "default"; | 28 | pinctrl-names = "default"; |
29 | pinctrl-0 = <&pinctrl_reg_usdhc2>; | 29 | pinctrl-0 = <&pinctrl_reg_usdhc2>; |
30 | compatible = "regulator-fixed"; | 30 | compatible = "regulator-fixed"; |
31 | regulator-name = "VSD_3V3"; | 31 | regulator-name = "VSD_3V3"; |
32 | regulator-min-microvolt = <3300000>; | 32 | regulator-min-microvolt = <3300000>; |
33 | regulator-max-microvolt = <3300000>; | 33 | regulator-max-microvolt = <3300000>; |
34 | gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; | 34 | gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; |
35 | off-on-delay-us = <20000>; | 35 | off-on-delay-us = <20000>; |
36 | enable-active-high; | 36 | enable-active-high; |
37 | }; | 37 | }; |
38 | 38 | ||
39 | buck2_reg: regulator-buck2 { | 39 | buck2_reg: regulator-buck2 { |
40 | pinctrl-names = "default"; | 40 | pinctrl-names = "default"; |
41 | pinctrl-0 = <&pinctrl_buck2>; | 41 | pinctrl-0 = <&pinctrl_buck2>; |
42 | compatible = "regulator-gpio"; | 42 | compatible = "regulator-gpio"; |
43 | regulator-name = "vdd_arm"; | 43 | regulator-name = "vdd_arm"; |
44 | regulator-min-microvolt = <900000>; | 44 | regulator-min-microvolt = <900000>; |
45 | regulator-max-microvolt = <1000000>; | 45 | regulator-max-microvolt = <1000000>; |
46 | gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; | 46 | gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; |
47 | states = <1000000 0x0 | 47 | states = <1000000 0x0 |
48 | 900000 0x1>; | 48 | 900000 0x1>; |
49 | }; | 49 | }; |
50 | 50 | ||
51 | backlight: backlight { | 51 | backlight: backlight { |
52 | compatible = "pwm-backlight"; | 52 | compatible = "pwm-backlight"; |
53 | pwms = <&pwm1 0 1000000 0>; | 53 | pwms = <&pwm1 0 1000000 0>; |
54 | brightness-levels = < 0 1 2 3 4 5 6 7 8 9 | 54 | brightness-levels = < 0 1 2 3 4 5 6 7 8 9 |
55 | 10 11 12 13 14 15 16 17 18 19 | 55 | 10 11 12 13 14 15 16 17 18 19 |
56 | 20 21 22 23 24 25 26 27 28 29 | 56 | 20 21 22 23 24 25 26 27 28 29 |
57 | 30 31 32 33 34 35 36 37 38 39 | 57 | 30 31 32 33 34 35 36 37 38 39 |
58 | 40 41 42 43 44 45 46 47 48 49 | 58 | 40 41 42 43 44 45 46 47 48 49 |
59 | 50 51 52 53 54 55 56 57 58 59 | 59 | 50 51 52 53 54 55 56 57 58 59 |
60 | 60 61 62 63 64 65 66 67 68 69 | 60 | 60 61 62 63 64 65 66 67 68 69 |
61 | 70 71 72 73 74 75 76 77 78 79 | 61 | 70 71 72 73 74 75 76 77 78 79 |
62 | 80 81 82 83 84 85 86 87 88 89 | 62 | 80 81 82 83 84 85 86 87 88 89 |
63 | 90 91 92 93 94 95 96 97 98 99 | 63 | 90 91 92 93 94 95 96 97 98 99 |
64 | 100>; | 64 | 100>; |
65 | default-brightness-level = <80>; | 65 | default-brightness-level = <80>; |
66 | status = "disabled"; | 66 | status = "disabled"; |
67 | }; | 67 | }; |
68 | 68 | ||
69 | reg_3p3v: 3p3v { | 69 | reg_3p3v: 3p3v { |
70 | compatible = "regulator-fixed"; | 70 | compatible = "regulator-fixed"; |
71 | regulator-name = "3P3V"; | 71 | regulator-name = "3P3V"; |
72 | regulator-min-microvolt = <3300000>; | 72 | regulator-min-microvolt = <3300000>; |
73 | regulator-max-microvolt = <3300000>; | 73 | regulator-max-microvolt = <3300000>; |
74 | regulator-always-on; | 74 | regulator-always-on; |
75 | }; | 75 | }; |
76 | 76 | ||
77 | reg_5p0v: 5p0v { | 77 | reg_5p0v: 5p0v { |
78 | compatible = "regulator-fixed"; | 78 | compatible = "regulator-fixed"; |
79 | regulator-name = "5P0V"; | 79 | regulator-name = "5P0V"; |
80 | regulator-min-microvolt = <5000000>; | 80 | regulator-min-microvolt = <5000000>; |
81 | regulator-max-microvolt = <5000000>; | 81 | regulator-max-microvolt = <5000000>; |
82 | regulator-always-on; | 82 | regulator-always-on; |
83 | }; | 83 | }; |
84 | 84 | ||
85 | /* external oscillator of mcp2515 on SPI1.0 and SPI1.1 */ | 85 | /* external oscillator of mcp2515 on SPI1.0 and SPI1.1 */ |
86 | clk25m: clock-25m { | 86 | clk25m: clock-25m { |
87 | compatible = "fixed-clock"; | 87 | compatible = "fixed-clock"; |
88 | #clock-cells = <0>; | 88 | #clock-cells = <0>; |
89 | clock-frequency = <25000000>; | 89 | clock-frequency = <25000000>; |
90 | clock-output-names = "clk25m"; | 90 | clock-output-names = "clk25m"; |
91 | }; | 91 | }; |
92 | }; | 92 | }; |
93 | 93 | ||
94 | &A53_0 { | 94 | &A53_0 { |
95 | cpu-supply = <&buck2_reg>; | 95 | cpu-supply = <&buck2_reg>; |
96 | }; | 96 | }; |
97 | 97 | ||
98 | &A53_1 { | 98 | &A53_1 { |
99 | cpu-supply = <&buck2_reg>; | 99 | cpu-supply = <&buck2_reg>; |
100 | }; | 100 | }; |
101 | 101 | ||
102 | &A53_2 { | 102 | &A53_2 { |
103 | cpu-supply = <&buck2_reg>; | 103 | cpu-supply = <&buck2_reg>; |
104 | }; | 104 | }; |
105 | 105 | ||
106 | &A53_3 { | 106 | &A53_3 { |
107 | cpu-supply = <&buck2_reg>; | 107 | cpu-supply = <&buck2_reg>; |
108 | }; | 108 | }; |
109 | 109 | ||
110 | &fec1 { | 110 | &fec1 { |
111 | pinctrl-names = "default"; | 111 | pinctrl-names = "default"; |
112 | pinctrl-0 = <&pinctrl_fec1>; | 112 | pinctrl-0 = <&pinctrl_fec1>; |
113 | phy-mode = "rgmii-id"; | 113 | phy-mode = "rgmii-id"; |
114 | phy-handle = <ðphy0>; | 114 | phy-handle = <ðphy0>; |
115 | fsl,magic-packet; | 115 | fsl,magic-packet; |
116 | interrupt-parent = <&gpio1>; | 116 | interrupt-parent = <&gpio1>; |
117 | interrupts = <11 IRQ_TYPE_EDGE_FALLING>; | 117 | interrupts = <11 IRQ_TYPE_EDGE_FALLING>; |
118 | status = "okay"; | 118 | status = "okay"; |
119 | 119 | ||
120 | mdio { | 120 | mdio { |
121 | #address-cells = <1>; | 121 | #address-cells = <1>; |
122 | #size-cells = <0>; | 122 | #size-cells = <0>; |
123 | 123 | ||
124 | ethphy0: ethernet-phy@0 { | 124 | ethphy0: ethernet-phy@0 { |
125 | compatible = "ethernet-phy-ieee802.3-c22"; | 125 | compatible = "ethernet-phy-ieee802.3-c22"; |
126 | reg = <6>; | 126 | reg = <1>; |
127 | at803x,eee-disabled; | 127 | at803x,eee-disabled; |
128 | }; | 128 | }; |
129 | }; | 129 | }; |
130 | }; | 130 | }; |
131 | 131 | ||
132 | &i2c1 { | 132 | &i2c1 { |
133 | clock-frequency = <100000>; | 133 | clock-frequency = <100000>; |
134 | pinctrl-names = "default", "gpio"; | 134 | pinctrl-names = "default", "gpio"; |
135 | pinctrl-0 = <&pinctrl_i2c1>; | 135 | pinctrl-0 = <&pinctrl_i2c1>; |
136 | pinctrl-1 = <&pinctrl_i2c1_gpio>; | 136 | pinctrl-1 = <&pinctrl_i2c1_gpio>; |
137 | scl-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>; | 137 | scl-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>; |
138 | sda-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>; | 138 | sda-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>; |
139 | status = "okay"; | 139 | status = "okay"; |
140 | 140 | ||
141 | pmic@8 { | 141 | pmic@8 { |
142 | compatible = "fsl,pfuze100"; | 142 | compatible = "fsl,pfuze100"; |
143 | fsl,pfuze-support-disable-sw; | 143 | fsl,pfuze-support-disable-sw; |
144 | reg = <0x8>; | 144 | reg = <0x8>; |
145 | 145 | ||
146 | regulators { | 146 | regulators { |
147 | sw1a_reg: sw1ab { | 147 | sw1a_reg: sw1ab { |
148 | regulator-min-microvolt = <825000>; | 148 | regulator-min-microvolt = <825000>; |
149 | regulator-max-microvolt = <1100000>; | 149 | regulator-max-microvolt = <1100000>; |
150 | }; | 150 | }; |
151 | 151 | ||
152 | sw1c_reg: sw1c { | 152 | sw1c_reg: sw1c { |
153 | regulator-min-microvolt = <825000>; | 153 | regulator-min-microvolt = <825000>; |
154 | regulator-max-microvolt = <1100000>; | 154 | regulator-max-microvolt = <1100000>; |
155 | }; | 155 | }; |
156 | 156 | ||
157 | sw2_reg: sw2 { | 157 | sw2_reg: sw2 { |
158 | regulator-min-microvolt = <1100000>; | 158 | regulator-min-microvolt = <1100000>; |
159 | regulator-max-microvolt = <1100000>; | 159 | regulator-max-microvolt = <1100000>; |
160 | regulator-always-on; | 160 | regulator-always-on; |
161 | }; | 161 | }; |
162 | 162 | ||
163 | sw3a_reg: sw3ab { | 163 | sw3a_reg: sw3ab { |
164 | regulator-min-microvolt = <825000>; | 164 | regulator-min-microvolt = <825000>; |
165 | regulator-max-microvolt = <1100000>; | 165 | regulator-max-microvolt = <1100000>; |
166 | regulator-always-on; | 166 | regulator-always-on; |
167 | }; | 167 | }; |
168 | 168 | ||
169 | sw4_reg: sw4 { | 169 | sw4_reg: sw4 { |
170 | regulator-min-microvolt = <1800000>; | 170 | regulator-min-microvolt = <1800000>; |
171 | regulator-max-microvolt = <1800000>; | 171 | regulator-max-microvolt = <1800000>; |
172 | regulator-always-on; | 172 | regulator-always-on; |
173 | }; | 173 | }; |
174 | 174 | ||
175 | swbst_reg: swbst { | 175 | swbst_reg: swbst { |
176 | regulator-min-microvolt = <5000000>; | 176 | regulator-min-microvolt = <5000000>; |
177 | regulator-max-microvolt = <5150000>; | 177 | regulator-max-microvolt = <5150000>; |
178 | }; | 178 | }; |
179 | 179 | ||
180 | snvs_reg: vsnvs { | 180 | snvs_reg: vsnvs { |
181 | regulator-min-microvolt = <1000000>; | 181 | regulator-min-microvolt = <1000000>; |
182 | regulator-max-microvolt = <3000000>; | 182 | regulator-max-microvolt = <3000000>; |
183 | regulator-always-on; | 183 | regulator-always-on; |
184 | }; | 184 | }; |
185 | 185 | ||
186 | vref_reg: vrefddr { | 186 | vref_reg: vrefddr { |
187 | regulator-always-on; | 187 | regulator-always-on; |
188 | }; | 188 | }; |
189 | 189 | ||
190 | vgen1_reg: vgen1 { | 190 | vgen1_reg: vgen1 { |
191 | regulator-min-microvolt = <800000>; | 191 | regulator-min-microvolt = <800000>; |
192 | regulator-max-microvolt = <1550000>; | 192 | regulator-max-microvolt = <1550000>; |
193 | }; | 193 | }; |
194 | 194 | ||
195 | vgen2_reg: vgen2 { | 195 | vgen2_reg: vgen2 { |
196 | regulator-min-microvolt = <850000>; | 196 | regulator-min-microvolt = <850000>; |
197 | regulator-max-microvolt = <975000>; | 197 | regulator-max-microvolt = <975000>; |
198 | regulator-always-on; | 198 | regulator-always-on; |
199 | }; | 199 | }; |
200 | 200 | ||
201 | vgen3_reg: vgen3 { | 201 | vgen3_reg: vgen3 { |
202 | regulator-min-microvolt = <1675000>; | 202 | regulator-min-microvolt = <1675000>; |
203 | regulator-max-microvolt = <1975000>; | 203 | regulator-max-microvolt = <1975000>; |
204 | regulator-always-on; | 204 | regulator-always-on; |
205 | }; | 205 | }; |
206 | 206 | ||
207 | vgen4_reg: vgen4 { | 207 | vgen4_reg: vgen4 { |
208 | regulator-min-microvolt = <1625000>; | 208 | regulator-min-microvolt = <1625000>; |
209 | regulator-max-microvolt = <1875000>; | 209 | regulator-max-microvolt = <1875000>; |
210 | regulator-always-on; | 210 | regulator-always-on; |
211 | }; | 211 | }; |
212 | 212 | ||
213 | vgen5_reg: vgen5 { | 213 | vgen5_reg: vgen5 { |
214 | regulator-min-microvolt = <3075000>; | 214 | regulator-min-microvolt = <3075000>; |
215 | regulator-max-microvolt = <3625000>; | 215 | regulator-max-microvolt = <3625000>; |
216 | regulator-always-on; | 216 | regulator-always-on; |
217 | }; | 217 | }; |
218 | 218 | ||
219 | vgen6_reg: vgen6 { | 219 | vgen6_reg: vgen6 { |
220 | regulator-min-microvolt = <1800000>; | 220 | regulator-min-microvolt = <1800000>; |
221 | regulator-max-microvolt = <3300000>; | 221 | regulator-max-microvolt = <3300000>; |
222 | }; | 222 | }; |
223 | }; | 223 | }; |
224 | }; | 224 | }; |
225 | 225 | ||
226 | s35390a: s35390a@30 { | 226 | s35390a: s35390a@30 { |
227 | compatible = "sii,s35390a"; | 227 | compatible = "sii,s35390a"; |
228 | reg = <0x30>; | 228 | reg = <0x30>; |
229 | }; | 229 | }; |
230 | 230 | ||
231 | cape_eeprom0: cape_eeprom@57 { | 231 | cape_eeprom0: cape_eeprom@57 { |
232 | compatible = "at,24c256"; | 232 | compatible = "at,24c256"; |
233 | reg = <0x57>; | 233 | reg = <0x57>; |
234 | }; | 234 | }; |
235 | }; | 235 | }; |
236 | 236 | ||
237 | 237 | ||
238 | &i2c2 { | 238 | &i2c2 { |
239 | clock-frequency = <100000>; | 239 | clock-frequency = <100000>; |
240 | pinctrl-names = "default", "gpio"; | 240 | pinctrl-names = "default", "gpio"; |
241 | pinctrl-0 = <&pinctrl_i2c2>; | 241 | pinctrl-0 = <&pinctrl_i2c2>; |
242 | pinctrl-1 = <&pinctrl_i2c2_gpio>; | 242 | pinctrl-1 = <&pinctrl_i2c2_gpio>; |
243 | scl-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; | 243 | scl-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; |
244 | sda-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; | 244 | sda-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; |
245 | status = "okay"; | 245 | status = "okay"; |
246 | 246 | ||
247 | baseboard_eeprom: baseboard_eeprom@50 { | 247 | baseboard_eeprom: baseboard_eeprom@50 { |
248 | compatible = "at,24c256"; | 248 | compatible = "at,24c256"; |
249 | reg = <0x50>; | 249 | reg = <0x50>; |
250 | }; | 250 | }; |
251 | 251 | ||
252 | dsi_lvds_bridge: sn65dsi84@2c { | 252 | dsi_lvds_bridge: sn65dsi84@2c { |
253 | status = "disabled"; | 253 | status = "disabled"; |
254 | reg = <0x2c>; | 254 | reg = <0x2c>; |
255 | compatible = "ti,sn65dsi84"; | 255 | compatible = "ti,sn65dsi84"; |
256 | enable-gpios = <&gpio4 2 GPIO_ACTIVE_HIGH>; | 256 | enable-gpios = <&gpio4 2 GPIO_ACTIVE_HIGH>; |
257 | interrupt-parent = <&gpio4>; | 257 | interrupt-parent = <&gpio4>; |
258 | interrupts = <4 IRQ_TYPE_EDGE_FALLING>; | 258 | interrupts = <4 IRQ_TYPE_EDGE_FALLING>; |
259 | 259 | ||
260 | /* AUO G070VW01 7-inch 800x480 LVDS Display */ | 260 | /* AUO G070VW01 7-inch 800x480 LVDS Display */ |
261 | sn65dsi84,addresses = < 0x09 0x0A 0x0B 0x0D 0x10 0x11 0x12 0x13 | 261 | sn65dsi84,addresses = < 0x09 0x0A 0x0B 0x0D 0x10 0x11 0x12 0x13 |
262 | 0x18 0x19 0x1A 0x1B 0x20 0x21 0x22 0x23 | 262 | 0x18 0x19 0x1A 0x1B 0x20 0x21 0x22 0x23 |
263 | 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B | 263 | 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B |
264 | 0x2C 0x2D 0x2E 0x2F 0x30 0x31 0x32 0x33 | 264 | 0x2C 0x2D 0x2E 0x2F 0x30 0x31 0x32 0x33 |
265 | 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B | 265 | 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B |
266 | 0x3C 0x3D 0x3E 0xE0 0x0D>; | 266 | 0x3C 0x3D 0x3E 0xE0 0x0D>; |
267 | 267 | ||
268 | sn65dsi84,values = < 0x00 0x01 0x10 0x00 0x26 0x00 0x13 0x00 | 268 | sn65dsi84,values = < 0x00 0x01 0x10 0x00 0x26 0x00 0x13 0x00 |
269 | 0x78 0x00 0x03 0x00 0x20 0x03 0x00 0x00 | 269 | 0x78 0x00 0x03 0x00 0x20 0x03 0x00 0x00 |
270 | 0x00 0x00 0x00 0x00 0x21 0x00 0x00 0x00 | 270 | 0x00 0x00 0x00 0x00 0x21 0x00 0x00 0x00 |
271 | 0x80 0x00 0x00 0x00 0x0e 0x00 0x00 0x00 | 271 | 0x80 0x00 0x00 0x00 0x0e 0x00 0x00 0x00 |
272 | 0x40 0x00 0x00 0x00 0x00 0x00 0x00 0x00 | 272 | 0x40 0x00 0x00 0x00 0x00 0x00 0x00 0x00 |
273 | 0x00 0x00 0x00 0x01 0x01>; | 273 | 0x00 0x00 0x00 0x01 0x01>; |
274 | 274 | ||
275 | /* AUO G185XW01 18.5-inch 1366x768 LVDS Display */ | 275 | /* AUO G185XW01 18.5-inch 1366x768 LVDS Display */ |
276 | /*sn65dsi84,addresses = < 0x09 0x0A 0x0B 0x0D 0x10 0x11 0x12 0x13 | 276 | /*sn65dsi84,addresses = < 0x09 0x0A 0x0B 0x0D 0x10 0x11 0x12 0x13 |
277 | 0x18 0x19 0x1A 0x1B 0x20 0x21 0x22 0x23 | 277 | 0x18 0x19 0x1A 0x1B 0x20 0x21 0x22 0x23 |
278 | 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B | 278 | 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B |
279 | 0x2C 0x2D 0x2E 0x2F 0x30 0x31 0x32 0x33 | 279 | 0x2C 0x2D 0x2E 0x2F 0x30 0x31 0x32 0x33 |
280 | 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B | 280 | 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B |
281 | 0x3C 0x3D 0x3E 0xE0 0x0D>; | 281 | 0x3C 0x3D 0x3E 0xE0 0x0D>; |
282 | 282 | ||
283 | sn65dsi84,values = < 0x00 0x05 0x10 0x00 0x26 0x00 0x2E 0x00 | 283 | sn65dsi84,values = < 0x00 0x05 0x10 0x00 0x26 0x00 0x2E 0x00 |
284 | 0x78 0x00 0x03 0x00 0x56 0x05 0x00 0x00 | 284 | 0x78 0x00 0x03 0x00 0x56 0x05 0x00 0x00 |
285 | 0x00 0x00 0x00 0x00 0x21 0x00 0x00 0x00 | 285 | 0x00 0x00 0x00 0x00 0x21 0x00 0x00 0x00 |
286 | 0x78 0x00 0x00 0x00 0x12 0x00 0x00 0x00 | 286 | 0x78 0x00 0x00 0x00 0x12 0x00 0x00 0x00 |
287 | 0x3C 0x00 0x00 0x00 0x00 0x00 0x00 0x00 | 287 | 0x3C 0x00 0x00 0x00 0x00 0x00 0x00 0x00 |
288 | 0x00 0x00 0x00 0x01 0x01>;*/ | 288 | 0x00 0x00 0x00 0x01 0x01>;*/ |
289 | 289 | ||
290 | /* AUO G240HW01 V0 24-inch 1920x1080 LVDS Display */ | 290 | /* AUO G240HW01 V0 24-inch 1920x1080 LVDS Display */ |
291 | /*sn65dsi84,addresses = < 0x09 0x0A 0x0B 0x0D 0x10 0x11 0x12 0x13 | 291 | /*sn65dsi84,addresses = < 0x09 0x0A 0x0B 0x0D 0x10 0x11 0x12 0x13 |
292 | 0x18 0x19 0x1A 0x1B 0x20 0x21 0x22 0x23 | 292 | 0x18 0x19 0x1A 0x1B 0x20 0x21 0x22 0x23 |
293 | 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B | 293 | 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B |
294 | 0x2C 0x2D 0x2E 0x2F 0x30 0x31 0x32 0x33 | 294 | 0x2C 0x2D 0x2E 0x2F 0x30 0x31 0x32 0x33 |
295 | 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B | 295 | 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B |
296 | 0x3C 0x3D 0x3E 0xE0 0x0D>; | 296 | 0x3C 0x3D 0x3E 0xE0 0x0D>; |
297 | 297 | ||
298 | sn65dsi84,values = < 0x00 0x05 0x20 0x00 0x26 0x00 0x4E 0x00 | 298 | sn65dsi84,values = < 0x00 0x05 0x20 0x00 0x26 0x00 0x4E 0x00 |
299 | 0x6C 0x00 0x03 0x00 0x80 0x07 0x00 0x00 | 299 | 0x6C 0x00 0x03 0x00 0x80 0x07 0x00 0x00 |
300 | 0x00 0x00 0x00 0x00 0xC3 0x00 0x00 0x00 | 300 | 0x00 0x00 0x00 0x00 0xC3 0x00 0x00 0x00 |
301 | 0x32 0x00 0x00 0x00 0x14 0x00 0x00 0x00 | 301 | 0x32 0x00 0x00 0x00 0x14 0x00 0x00 0x00 |
302 | 0x19 0x00 0x00 0x00 0x00 0x00 0x00 0x00 | 302 | 0x19 0x00 0x00 0x00 0x00 0x00 0x00 0x00 |
303 | 0x00 0x00 0x00 0x01 0x01>;*/ | 303 | 0x00 0x00 0x00 0x01 0x01>;*/ |
304 | }; | 304 | }; |
305 | }; | 305 | }; |
306 | 306 | ||
307 | &i2c3 { | 307 | &i2c3 { |
308 | clock-frequency = <100000>; | 308 | clock-frequency = <100000>; |
309 | pinctrl-names = "default", "gpio"; | 309 | pinctrl-names = "default", "gpio"; |
310 | pinctrl-0 = <&pinctrl_i2c3>; | 310 | pinctrl-0 = <&pinctrl_i2c3>; |
311 | pinctrl-1 = <&pinctrl_i2c3_gpio>; | 311 | pinctrl-1 = <&pinctrl_i2c3_gpio>; |
312 | scl-gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>; | 312 | scl-gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>; |
313 | sda-gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>; | 313 | sda-gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>; |
314 | status = "okay"; | 314 | status = "okay"; |
315 | }; | 315 | }; |
316 | 316 | ||
317 | &i2c4 { | 317 | &i2c4 { |
318 | clock-frequency = <100000>; | 318 | clock-frequency = <100000>; |
319 | pinctrl-names = "default", "gpio"; | 319 | pinctrl-names = "default", "gpio"; |
320 | pinctrl-0 = <&pinctrl_i2c4>; | 320 | pinctrl-0 = <&pinctrl_i2c4>; |
321 | pinctrl-1 = <&pinctrl_i2c4_gpio>; | 321 | pinctrl-1 = <&pinctrl_i2c4_gpio>; |
322 | scl-gpios = <&gpio5 20 GPIO_ACTIVE_HIGH>; | 322 | scl-gpios = <&gpio5 20 GPIO_ACTIVE_HIGH>; |
323 | sda-gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; | 323 | sda-gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; |
324 | status = "okay"; | 324 | status = "okay"; |
325 | }; | 325 | }; |
326 | 326 | ||
327 | &pcie0 { | 327 | &pcie0 { |
328 | pinctrl-names = "default"; | 328 | pinctrl-names = "default"; |
329 | pinctrl-0 = <&pinctrl_pcie0>; | 329 | pinctrl-0 = <&pinctrl_pcie0>; |
330 | reset-gpio = <&gpio3 3 GPIO_ACTIVE_LOW>; | 330 | reset-gpio = <&gpio3 3 GPIO_ACTIVE_LOW>; |
331 | ext_osc= <1>; | 331 | ext_osc= <1>; |
332 | status = "okay"; | 332 | status = "okay"; |
333 | }; | 333 | }; |
334 | 334 | ||
335 | &pcie1 { | 335 | &pcie1 { |
336 | pinctrl-names = "default"; | 336 | pinctrl-names = "default"; |
337 | pinctrl-0 = <&pinctrl_pcie1>; | 337 | pinctrl-0 = <&pinctrl_pcie1>; |
338 | reset-gpio = <&gpio3 4 GPIO_ACTIVE_LOW>; | 338 | reset-gpio = <&gpio3 4 GPIO_ACTIVE_LOW>; |
339 | ext_osc = <1>; | 339 | ext_osc = <1>; |
340 | status = "okay"; | 340 | status = "okay"; |
341 | }; | 341 | }; |
342 | 342 | ||
343 | &pwm1 { | 343 | &pwm1 { |
344 | pinctrl-names = "default"; | 344 | pinctrl-names = "default"; |
345 | pinctrl-0 = <&pinctrl_pwm1>; | 345 | pinctrl-0 = <&pinctrl_pwm1>; |
346 | status = "okay"; | 346 | status = "okay"; |
347 | }; | 347 | }; |
348 | 348 | ||
349 | &pgc_gpu { | 349 | &pgc_gpu { |
350 | power-supply = <&sw1a_reg>; | 350 | power-supply = <&sw1a_reg>; |
351 | }; | 351 | }; |
352 | 352 | ||
353 | &snvs_pwrkey { | 353 | &snvs_pwrkey { |
354 | status = "okay"; | 354 | status = "okay"; |
355 | }; | 355 | }; |
356 | 356 | ||
357 | &qspi0 { | 357 | &qspi0 { |
358 | pinctrl-names = "default"; | 358 | pinctrl-names = "default"; |
359 | pinctrl-0 = <&pinctrl_qspi>; | 359 | pinctrl-0 = <&pinctrl_qspi>; |
360 | status = "okay"; | 360 | status = "okay"; |
361 | }; | 361 | }; |
362 | 362 | ||
363 | &uart1 { | 363 | &uart1 { |
364 | pinctrl-names = "default"; | 364 | pinctrl-names = "default"; |
365 | pinctrl-0 = <&pinctrl_uart1>; | 365 | pinctrl-0 = <&pinctrl_uart1>; |
366 | assigned-clocks = <&clk IMX8MQ_CLK_UART1>; | 366 | assigned-clocks = <&clk IMX8MQ_CLK_UART1>; |
367 | assigned-clock-parents = <&clk IMX8MQ_CLK_25M>; | 367 | assigned-clock-parents = <&clk IMX8MQ_CLK_25M>; |
368 | status = "okay"; | 368 | status = "okay"; |
369 | }; | 369 | }; |
370 | 370 | ||
371 | &uart2 { | 371 | &uart2 { |
372 | pinctrl-names = "default"; | 372 | pinctrl-names = "default"; |
373 | pinctrl-0 = <&pinctrl_uart2>; | 373 | pinctrl-0 = <&pinctrl_uart2>; |
374 | assigned-clocks = <&clk IMX8MQ_CLK_UART2>; | 374 | assigned-clocks = <&clk IMX8MQ_CLK_UART2>; |
375 | assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>; | 375 | assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>; |
376 | fsl,uart-has-rtscts; | 376 | fsl,uart-has-rtscts; |
377 | status = "okay"; | 377 | status = "okay"; |
378 | }; | 378 | }; |
379 | 379 | ||
380 | &uart3 { | 380 | &uart3 { |
381 | pinctrl-names = "default"; | 381 | pinctrl-names = "default"; |
382 | pinctrl-0 = <&pinctrl_uart3>; | 382 | pinctrl-0 = <&pinctrl_uart3>; |
383 | assigned-clocks = <&clk IMX8MQ_CLK_UART3>; | 383 | assigned-clocks = <&clk IMX8MQ_CLK_UART3>; |
384 | assigned-clock-parents = <&clk IMX8MQ_CLK_25M>; | 384 | assigned-clock-parents = <&clk IMX8MQ_CLK_25M>; |
385 | status = "okay"; | 385 | status = "okay"; |
386 | }; | 386 | }; |
387 | 387 | ||
388 | &uart4 { | 388 | &uart4 { |
389 | pinctrl-names = "default"; | 389 | pinctrl-names = "default"; |
390 | pinctrl-0 = <&pinctrl_uart4>; | 390 | pinctrl-0 = <&pinctrl_uart4>; |
391 | assigned-clocks = <&clk IMX8MQ_CLK_UART4>; | 391 | assigned-clocks = <&clk IMX8MQ_CLK_UART4>; |
392 | assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>; | 392 | assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>; |
393 | fsl,uart-has-rtscts; | 393 | fsl,uart-has-rtscts; |
394 | status = "okay"; | 394 | status = "okay"; |
395 | }; | 395 | }; |
396 | 396 | ||
397 | &usb3_phy0 { | 397 | &usb3_phy0 { |
398 | status = "okay"; | 398 | status = "okay"; |
399 | }; | 399 | }; |
400 | 400 | ||
401 | &usb_dwc3_0 { | 401 | &usb_dwc3_0 { |
402 | dr_mode = "peripheral"; | 402 | dr_mode = "peripheral"; |
403 | hnp-disable; | 403 | hnp-disable; |
404 | srp-disable; | 404 | srp-disable; |
405 | adp-disable; | 405 | adp-disable; |
406 | usb-role-switch; | 406 | usb-role-switch; |
407 | snps,dis-u1-entry-quirk; | 407 | snps,dis-u1-entry-quirk; |
408 | snps,dis-u2-entry-quirk; | 408 | snps,dis-u2-entry-quirk; |
409 | status = "okay"; | 409 | status = "okay"; |
410 | }; | 410 | }; |
411 | 411 | ||
412 | &usb3_phy1 { | 412 | &usb3_phy1 { |
413 | status = "okay"; | 413 | status = "okay"; |
414 | }; | 414 | }; |
415 | 415 | ||
416 | &usb_dwc3_1 { | 416 | &usb_dwc3_1 { |
417 | dr_mode = "host"; | 417 | dr_mode = "host"; |
418 | status = "okay"; | 418 | status = "okay"; |
419 | }; | 419 | }; |
420 | 420 | ||
421 | &usdhc1 { | 421 | &usdhc1 { |
422 | pinctrl-names = "default", "state_100mhz", "state_200mhz"; | 422 | pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
423 | pinctrl-0 = <&pinctrl_usdhc1>; | 423 | pinctrl-0 = <&pinctrl_usdhc1>; |
424 | pinctrl-1 = <&pinctrl_usdhc1_100mhz>; | 424 | pinctrl-1 = <&pinctrl_usdhc1_100mhz>; |
425 | pinctrl-2 = <&pinctrl_usdhc1_200mhz>; | 425 | pinctrl-2 = <&pinctrl_usdhc1_200mhz>; |
426 | vqmmc-supply = <&sw4_reg>; | 426 | vqmmc-supply = <&sw4_reg>; |
427 | bus-width = <8>; | 427 | bus-width = <8>; |
428 | non-removable; | 428 | non-removable; |
429 | no-sd; | 429 | no-sd; |
430 | no-sdio; | 430 | no-sdio; |
431 | mmc-hs400-1_8v; | 431 | mmc-hs400-1_8v; |
432 | status = "okay"; | 432 | status = "okay"; |
433 | }; | 433 | }; |
434 | 434 | ||
435 | &usdhc2 { | 435 | &usdhc2 { |
436 | pinctrl-names = "default", "state_100mhz", "state_200mhz"; | 436 | pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
437 | pinctrl-0 = <&pinctrl_usdhc2>; | 437 | pinctrl-0 = <&pinctrl_usdhc2>; |
438 | pinctrl-1 = <&pinctrl_usdhc2_100mhz>; | 438 | pinctrl-1 = <&pinctrl_usdhc2_100mhz>; |
439 | pinctrl-2 = <&pinctrl_usdhc2_200mhz>; | 439 | pinctrl-2 = <&pinctrl_usdhc2_200mhz>; |
440 | cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; | 440 | cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; |
441 | vmmc-supply = <®_usdhc2_vmmc>; | 441 | vmmc-supply = <®_usdhc2_vmmc>; |
442 | sd-uhs-sdr104; | 442 | sd-uhs-sdr104; |
443 | sd-uhs-ddr50; | 443 | sd-uhs-ddr50; |
444 | status = "okay"; | 444 | status = "okay"; |
445 | }; | 445 | }; |
446 | 446 | ||
447 | &ecspi1 { | 447 | &ecspi1 { |
448 | #address-cells = <1>; | 448 | #address-cells = <1>; |
449 | #size-cells = <0>; | 449 | #size-cells = <0>; |
450 | fsl,spi-num-chipselects = <4>; | 450 | fsl,spi-num-chipselects = <4>; |
451 | pinctrl-names = "default"; | 451 | pinctrl-names = "default"; |
452 | pinctrl-0 = <&pinctrl_ecspi1>; | 452 | pinctrl-0 = <&pinctrl_ecspi1>; |
453 | cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>, | 453 | cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>, |
454 | <&gpio1 0 GPIO_ACTIVE_LOW>, | 454 | <&gpio1 0 GPIO_ACTIVE_LOW>, |
455 | <&gpio3 15 GPIO_ACTIVE_LOW>, | 455 | <&gpio3 15 GPIO_ACTIVE_LOW>, |
456 | <&gpio3 17 GPIO_ACTIVE_LOW>; | 456 | <&gpio3 17 GPIO_ACTIVE_LOW>; |
457 | fsl,spi-num-chipselects = <4>; | 457 | fsl,spi-num-chipselects = <4>; |
458 | /*dmas = <&sdma2 10 24 0>, <&sdma2 11 24 0>; | 458 | /*dmas = <&sdma2 10 24 0>, <&sdma2 11 24 0>; |
459 | dma-names = "rx", "tx";*/ | 459 | dma-names = "rx", "tx";*/ |
460 | status = "okay"; | 460 | status = "okay"; |
461 | 461 | ||
462 | spidev@0 { | 462 | spidev@0 { |
463 | compatible = "rohm,dh2228fv"; | 463 | compatible = "rohm,dh2228fv"; |
464 | reg = <0>; | 464 | reg = <0>; |
465 | spi-max-frequency = <24000000>; | 465 | spi-max-frequency = <24000000>; |
466 | }; | 466 | }; |
467 | 467 | ||
468 | spidev@1 { | 468 | spidev@1 { |
469 | compatible = "rohm,dh2228fv"; | 469 | compatible = "rohm,dh2228fv"; |
470 | reg = <1>; | 470 | reg = <1>; |
471 | spi-max-frequency = <24000000>; | 471 | spi-max-frequency = <24000000>; |
472 | }; | 472 | }; |
473 | 473 | ||
474 | can1: can@2 { | 474 | can1: can@2 { |
475 | compatible = "microchip,mcp2515"; | 475 | compatible = "microchip,mcp2515"; |
476 | reg = <2>; | 476 | reg = <2>; |
477 | interrupt-parent = <&gpio3>; | 477 | interrupt-parent = <&gpio3>; |
478 | interrupts = <18 IRQ_TYPE_EDGE_FALLING>; | 478 | interrupts = <18 IRQ_TYPE_EDGE_FALLING>; |
479 | spi-max-frequency = <10000000>; | 479 | spi-max-frequency = <10000000>; |
480 | clocks = <&clk25m>; | 480 | clocks = <&clk25m>; |
481 | vdd-supply = <®_3p3v>; | 481 | vdd-supply = <®_3p3v>; |
482 | xceiver-supply = <®_5p0v>; | 482 | xceiver-supply = <®_5p0v>; |
483 | status = "okay"; | 483 | status = "okay"; |
484 | }; | 484 | }; |
485 | 485 | ||
486 | can2: can@3 { | 486 | can2: can@3 { |
487 | compatible = "microchip,mcp2515"; | 487 | compatible = "microchip,mcp2515"; |
488 | reg = <3>; | 488 | reg = <3>; |
489 | interrupt-parent = <&gpio3>; | 489 | interrupt-parent = <&gpio3>; |
490 | interrupts = <16 IRQ_TYPE_EDGE_FALLING>; | 490 | interrupts = <16 IRQ_TYPE_EDGE_FALLING>; |
491 | spi-max-frequency = <10000000>; | 491 | spi-max-frequency = <10000000>; |
492 | clocks = <&clk25m>; | 492 | clocks = <&clk25m>; |
493 | vdd-supply = <®_3p3v>; | 493 | vdd-supply = <®_3p3v>; |
494 | xceiver-supply = <®_5p0v>; | 494 | xceiver-supply = <®_5p0v>; |
495 | status = "okay"; | 495 | status = "okay"; |
496 | }; | 496 | }; |
497 | }; | 497 | }; |
498 | 498 | ||
499 | &wdog1 { | 499 | &wdog1 { |
500 | pinctrl-names = "default"; | 500 | pinctrl-names = "default"; |
501 | pinctrl-0 = <&pinctrl_wdog>; | 501 | pinctrl-0 = <&pinctrl_wdog>; |
502 | fsl,ext-reset-output; | 502 | fsl,ext-reset-output; |
503 | status = "okay"; | 503 | status = "okay"; |
504 | }; | 504 | }; |
505 | 505 | ||
506 | &dcss { | 506 | &dcss { |
507 | status = "okay"; | 507 | status = "okay"; |
508 | port@0 { | 508 | port@0 { |
509 | dcss_out: endpoint { | 509 | dcss_out: endpoint { |
510 | remote-endpoint = <&hdmi_in>; | 510 | remote-endpoint = <&hdmi_in>; |
511 | }; | 511 | }; |
512 | }; | 512 | }; |
513 | }; | 513 | }; |
514 | 514 | ||
515 | &hdmi { | 515 | &hdmi { |
516 | compatible = "fsl,imx8mq-hdmi"; | 516 | compatible = "fsl,imx8mq-hdmi"; |
517 | status = "okay"; | 517 | status = "okay"; |
518 | 518 | ||
519 | display-timings { | 519 | display-timings { |
520 | native-mode = <&timing1>; | 520 | native-mode = <&timing1>; |
521 | 521 | ||
522 | timing1: timing1 { | 522 | timing1: timing1 { |
523 | clock-frequency = <74250000>; | 523 | clock-frequency = <74250000>; |
524 | hactive = <1280>; | 524 | hactive = <1280>; |
525 | vactive = <720>; | 525 | vactive = <720>; |
526 | hfront-porch = <220>; | 526 | hfront-porch = <220>; |
527 | hback-porch = <110>; | 527 | hback-porch = <110>; |
528 | hsync-len = <40>; | 528 | hsync-len = <40>; |
529 | vback-porch = <5>; | 529 | vback-porch = <5>; |
530 | vfront-porch = <20>; | 530 | vfront-porch = <20>; |
531 | vsync-len = <5>; | 531 | vsync-len = <5>; |
532 | }; | 532 | }; |
533 | }; | 533 | }; |
534 | 534 | ||
535 | port@0 { | 535 | port@0 { |
536 | hdmi_in: endpoint { | 536 | hdmi_in: endpoint { |
537 | remote-endpoint = <&dcss_out>; | 537 | remote-endpoint = <&dcss_out>; |
538 | }; | 538 | }; |
539 | }; | 539 | }; |
540 | }; | 540 | }; |
541 | 541 | ||
542 | &iomuxc { | 542 | &iomuxc { |
543 | pinctrl-names = "default"; | 543 | pinctrl-names = "default"; |
544 | 544 | ||
545 | pinctrl_buck2: vddarmgrp { | 545 | pinctrl_buck2: vddarmgrp { |
546 | fsl,pins = < | 546 | fsl,pins = < |
547 | MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x19 | 547 | MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x19 |
548 | >; | 548 | >; |
549 | 549 | ||
550 | }; | 550 | }; |
551 | 551 | ||
552 | pinctrl_fec1: fec1grp { | 552 | pinctrl_fec1: fec1grp { |
553 | fsl,pins = < | 553 | fsl,pins = < |
554 | MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3 | 554 | MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3 |
555 | MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO 0x23 | 555 | MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO 0x23 |
556 | MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f | 556 | MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f |
557 | MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f | 557 | MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f |
558 | MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f | 558 | MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f |
559 | MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f | 559 | MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f |
560 | MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 | 560 | MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 |
561 | MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 | 561 | MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 |
562 | MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 | 562 | MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 |
563 | MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 | 563 | MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 |
564 | MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f | 564 | MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f |
565 | MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 | 565 | MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 |
566 | MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 | 566 | MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 |
567 | MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f | 567 | MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f |
568 | >; | 568 | >; |
569 | }; | 569 | }; |
570 | 570 | ||
571 | pinctrl_i2c1: i2c1grp { | 571 | pinctrl_i2c1: i2c1grp { |
572 | fsl,pins = < | 572 | fsl,pins = < |
573 | MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x4000007f | 573 | MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x4000007f |
574 | MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x4000007f | 574 | MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x4000007f |
575 | >; | 575 | >; |
576 | }; | 576 | }; |
577 | 577 | ||
578 | pinctrl_i2c2: i2c2grp { | 578 | pinctrl_i2c2: i2c2grp { |
579 | fsl,pins = < | 579 | fsl,pins = < |
580 | MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x4000007f | 580 | MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x4000007f |
581 | MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x4000007f | 581 | MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x4000007f |
582 | >; | 582 | >; |
583 | }; | 583 | }; |
584 | 584 | ||
585 | pinctrl_i2c3: i2c3grp { | 585 | pinctrl_i2c3: i2c3grp { |
586 | fsl,pins = < | 586 | fsl,pins = < |
587 | MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000007f | 587 | MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000007f |
588 | MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x4000007f | 588 | MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x4000007f |
589 | >; | 589 | >; |
590 | }; | 590 | }; |
591 | 591 | ||
592 | pinctrl_i2c4: i2c4grp { | 592 | pinctrl_i2c4: i2c4grp { |
593 | fsl,pins = < | 593 | fsl,pins = < |
594 | MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL 0x4000007f | 594 | MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL 0x4000007f |
595 | MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA 0x4000007f | 595 | MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA 0x4000007f |
596 | >; | 596 | >; |
597 | }; | 597 | }; |
598 | 598 | ||
599 | pinctrl_i2c1_gpio: i2c1grp-gpio { | 599 | pinctrl_i2c1_gpio: i2c1grp-gpio { |
600 | fsl,pins = < | 600 | fsl,pins = < |
601 | MX8MQ_IOMUXC_I2C1_SCL_GPIO5_IO14 0x7f | 601 | MX8MQ_IOMUXC_I2C1_SCL_GPIO5_IO14 0x7f |
602 | MX8MQ_IOMUXC_I2C1_SDA_GPIO5_IO15 0x7f | 602 | MX8MQ_IOMUXC_I2C1_SDA_GPIO5_IO15 0x7f |
603 | >; | 603 | >; |
604 | }; | 604 | }; |
605 | 605 | ||
606 | pinctrl_i2c2_gpio: i2c2grp-gpio { | 606 | pinctrl_i2c2_gpio: i2c2grp-gpio { |
607 | fsl,pins = < | 607 | fsl,pins = < |
608 | MX8MQ_IOMUXC_I2C2_SCL_GPIO5_IO16 0x7f | 608 | MX8MQ_IOMUXC_I2C2_SCL_GPIO5_IO16 0x7f |
609 | MX8MQ_IOMUXC_I2C2_SDA_GPIO5_IO17 0x7f | 609 | MX8MQ_IOMUXC_I2C2_SDA_GPIO5_IO17 0x7f |
610 | >; | 610 | >; |
611 | }; | 611 | }; |
612 | 612 | ||
613 | pinctrl_i2c3_gpio: i2c3grp-gpio { | 613 | pinctrl_i2c3_gpio: i2c3grp-gpio { |
614 | fsl,pins = < | 614 | fsl,pins = < |
615 | MX8MQ_IOMUXC_I2C3_SCL_GPIO5_IO18 0x7f | 615 | MX8MQ_IOMUXC_I2C3_SCL_GPIO5_IO18 0x7f |
616 | MX8MQ_IOMUXC_I2C3_SDA_GPIO5_IO19 0x7f | 616 | MX8MQ_IOMUXC_I2C3_SDA_GPIO5_IO19 0x7f |
617 | >; | 617 | >; |
618 | }; | 618 | }; |
619 | 619 | ||
620 | pinctrl_i2c4_gpio: i2c4grp-gpio { | 620 | pinctrl_i2c4_gpio: i2c4grp-gpio { |
621 | fsl,pins = < | 621 | fsl,pins = < |
622 | MX8MQ_IOMUXC_I2C4_SCL_GPIO5_IO20 0x7f | 622 | MX8MQ_IOMUXC_I2C4_SCL_GPIO5_IO20 0x7f |
623 | MX8MQ_IOMUXC_I2C4_SDA_GPIO5_IO21 0x7f | 623 | MX8MQ_IOMUXC_I2C4_SDA_GPIO5_IO21 0x7f |
624 | >; | 624 | >; |
625 | }; | 625 | }; |
626 | 626 | ||
627 | pinctrl_pcie0: pcie0grp { | 627 | pinctrl_pcie0: pcie0grp { |
628 | fsl,pins = < | 628 | fsl,pins = < |
629 | MX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3 0x16 | 629 | MX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3 0x16 |
630 | >; | 630 | >; |
631 | }; | 631 | }; |
632 | 632 | ||
633 | pinctrl_pcie1: pcie1grp { | 633 | pinctrl_pcie1: pcie1grp { |
634 | fsl,pins = < | 634 | fsl,pins = < |
635 | MX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x16 | 635 | MX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x16 |
636 | >; | 636 | >; |
637 | }; | 637 | }; |
638 | 638 | ||
639 | pinctrl_pwm1: pwm1grp { | 639 | pinctrl_pwm1: pwm1grp { |
640 | fsl,pins = < | 640 | fsl,pins = < |
641 | MX8MQ_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT 0x16 | 641 | MX8MQ_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT 0x16 |
642 | >; | 642 | >; |
643 | }; | 643 | }; |
644 | 644 | ||
645 | pinctrl_qspi: qspigrp { | 645 | pinctrl_qspi: qspigrp { |
646 | fsl,pins = < | 646 | fsl,pins = < |
647 | MX8MQ_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x82 | 647 | MX8MQ_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x82 |
648 | MX8MQ_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82 | 648 | MX8MQ_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82 |
649 | MX8MQ_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82 | 649 | MX8MQ_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82 |
650 | MX8MQ_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82 | 650 | MX8MQ_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82 |
651 | MX8MQ_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82 | 651 | MX8MQ_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82 |
652 | MX8MQ_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82 | 652 | MX8MQ_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82 |
653 | 653 | ||
654 | >; | 654 | >; |
655 | }; | 655 | }; |
656 | 656 | ||
657 | pinctrl_uart1: uart1grp { | 657 | pinctrl_uart1: uart1grp { |
658 | fsl,pins = < | 658 | fsl,pins = < |
659 | MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49 | 659 | MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49 |
660 | MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49 | 660 | MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49 |
661 | >; | 661 | >; |
662 | }; | 662 | }; |
663 | 663 | ||
664 | pinctrl_uart2: uart2grp { | 664 | pinctrl_uart2: uart2grp { |
665 | fsl,pins = < | 665 | fsl,pins = < |
666 | MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x79 | 666 | MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x79 |
667 | MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x79 | 667 | MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x79 |
668 | MX8MQ_IOMUXC_UART4_TXD_UART2_DCE_RTS_B 0x79 /* RTS */ | 668 | MX8MQ_IOMUXC_UART4_TXD_UART2_DCE_RTS_B 0x79 /* RTS */ |
669 | MX8MQ_IOMUXC_UART4_RXD_UART2_DCE_CTS_B 0x79 /* CTS */ | 669 | MX8MQ_IOMUXC_UART4_RXD_UART2_DCE_CTS_B 0x79 /* CTS */ |
670 | >; | 670 | >; |
671 | }; | 671 | }; |
672 | 672 | ||
673 | pinctrl_uart3: uart3grp { | 673 | pinctrl_uart3: uart3grp { |
674 | fsl,pins = < | 674 | fsl,pins = < |
675 | MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x79 | 675 | MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x79 |
676 | MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX 0x79 | 676 | MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX 0x79 |
677 | >; | 677 | >; |
678 | }; | 678 | }; |
679 | 679 | ||
680 | pinctrl_uart4: uart4grp { | 680 | pinctrl_uart4: uart4grp { |
681 | fsl,pins = < | 681 | fsl,pins = < |
682 | MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x79 | 682 | MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x79 |
683 | MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x79 | 683 | MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x79 |
684 | MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x79 /* RTS */ | 684 | MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x79 /* RTS */ |
685 | MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x79 /* CTS */ | 685 | MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x79 /* CTS */ |
686 | >; | 686 | >; |
687 | }; | 687 | }; |
688 | 688 | ||
689 | pinctrl_reg_usdhc2: regusdhc2grpgpio { | 689 | pinctrl_reg_usdhc2: regusdhc2grpgpio { |
690 | fsl,pins = < | 690 | fsl,pins = < |
691 | MX8MQ_IOMUXC_SD2_WP_GPIO2_IO20 0x41 | 691 | MX8MQ_IOMUXC_SD2_WP_GPIO2_IO20 0x41 |
692 | MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41 | 692 | MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41 |
693 | MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 | 693 | MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 |
694 | >; | 694 | >; |
695 | }; | 695 | }; |
696 | 696 | ||
697 | pinctrl_sai2: sai2grp { | 697 | pinctrl_sai2: sai2grp { |
698 | fsl,pins = < | 698 | fsl,pins = < |
699 | MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6 | 699 | MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6 |
700 | MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6 | 700 | MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6 |
701 | MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK 0xd6 | 701 | MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK 0xd6 |
702 | MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6 | 702 | MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6 |
703 | MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8 0xd6 | 703 | MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8 0xd6 |
704 | >; | 704 | >; |
705 | }; | 705 | }; |
706 | 706 | ||
707 | pinctrl_ss_sel: usb3ssgrp{ | 707 | pinctrl_ss_sel: usb3ssgrp{ |
708 | fsl,pins = < | 708 | fsl,pins = < |
709 | MX8MQ_IOMUXC_NAND_RE_B_GPIO3_IO15 0x16 | 709 | MX8MQ_IOMUXC_NAND_RE_B_GPIO3_IO15 0x16 |
710 | >; | 710 | >; |
711 | }; | 711 | }; |
712 | 712 | ||
713 | pinctrl_typec: typecgrp { | 713 | pinctrl_typec: typecgrp { |
714 | fsl,pins = < | 714 | fsl,pins = < |
715 | MX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3 0x17059 | 715 | MX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3 0x17059 |
716 | >; | 716 | >; |
717 | }; | 717 | }; |
718 | 718 | ||
719 | pinctrl_usdhc1: usdhc1grp { | 719 | pinctrl_usdhc1: usdhc1grp { |
720 | fsl,pins = < | 720 | fsl,pins = < |
721 | MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83 | 721 | MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83 |
722 | MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3 | 722 | MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3 |
723 | MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3 | 723 | MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3 |
724 | MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3 | 724 | MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3 |
725 | MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3 | 725 | MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3 |
726 | MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3 | 726 | MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3 |
727 | MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3 | 727 | MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3 |
728 | MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3 | 728 | MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3 |
729 | MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3 | 729 | MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3 |
730 | MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3 | 730 | MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3 |
731 | MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x83 | 731 | MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x83 |
732 | MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 | 732 | MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 |
733 | >; | 733 | >; |
734 | }; | 734 | }; |
735 | 735 | ||
736 | pinctrl_usdhc1_100mhz: usdhc1-100grp { | 736 | pinctrl_usdhc1_100mhz: usdhc1-100grp { |
737 | fsl,pins = < | 737 | fsl,pins = < |
738 | MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d | 738 | MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d |
739 | MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd | 739 | MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd |
740 | MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xcd | 740 | MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xcd |
741 | MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xcd | 741 | MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xcd |
742 | MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xcd | 742 | MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xcd |
743 | MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xcd | 743 | MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xcd |
744 | MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xcd | 744 | MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xcd |
745 | MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xcd | 745 | MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xcd |
746 | MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xcd | 746 | MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xcd |
747 | MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xcd | 747 | MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xcd |
748 | MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x8d | 748 | MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x8d |
749 | MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 | 749 | MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 |
750 | >; | 750 | >; |
751 | }; | 751 | }; |
752 | 752 | ||
753 | pinctrl_usdhc1_200mhz: usdhc1-200grp { | 753 | pinctrl_usdhc1_200mhz: usdhc1-200grp { |
754 | fsl,pins = < | 754 | fsl,pins = < |
755 | MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f | 755 | MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f |
756 | MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf | 756 | MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf |
757 | MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xdf | 757 | MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xdf |
758 | MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xdf | 758 | MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xdf |
759 | MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xdf | 759 | MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xdf |
760 | MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xdf | 760 | MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xdf |
761 | MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xdf | 761 | MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xdf |
762 | MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xdf | 762 | MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xdf |
763 | MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xdf | 763 | MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xdf |
764 | MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xdf | 764 | MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xdf |
765 | MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x9f | 765 | MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x9f |
766 | MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 | 766 | MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 |
767 | >; | 767 | >; |
768 | }; | 768 | }; |
769 | 769 | ||
770 | pinctrl_usdhc2: usdhc2grp { | 770 | pinctrl_usdhc2: usdhc2grp { |
771 | fsl,pins = < | 771 | fsl,pins = < |
772 | MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83 | 772 | MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83 |
773 | MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3 | 773 | MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3 |
774 | MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3 | 774 | MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3 |
775 | MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3 | 775 | MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3 |
776 | MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3 | 776 | MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3 |
777 | MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3 | 777 | MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3 |
778 | MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 | 778 | MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 |
779 | >; | 779 | >; |
780 | }; | 780 | }; |
781 | 781 | ||
782 | pinctrl_usdhc2_100mhz: usdhc2-100grp { | 782 | pinctrl_usdhc2_100mhz: usdhc2-100grp { |
783 | fsl,pins = < | 783 | fsl,pins = < |
784 | MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x85 | 784 | MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x85 |
785 | MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc5 | 785 | MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc5 |
786 | MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc5 | 786 | MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc5 |
787 | MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc5 | 787 | MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc5 |
788 | MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc5 | 788 | MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc5 |
789 | MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc5 | 789 | MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc5 |
790 | MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 | 790 | MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 |
791 | >; | 791 | >; |
792 | }; | 792 | }; |
793 | 793 | ||
794 | pinctrl_usdhc2_200mhz: usdhc2-200grp { | 794 | pinctrl_usdhc2_200mhz: usdhc2-200grp { |
795 | fsl,pins = < | 795 | fsl,pins = < |
796 | MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x87 | 796 | MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x87 |
797 | MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc7 | 797 | MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc7 |
798 | MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc7 | 798 | MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc7 |
799 | MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc7 | 799 | MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc7 |
800 | MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc7 | 800 | MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc7 |
801 | MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc7 | 801 | MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc7 |
802 | MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 | 802 | MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 |
803 | >; | 803 | >; |
804 | }; | 804 | }; |
805 | 805 | ||
806 | pinctrl_wdog: wdog1grp { | 806 | pinctrl_wdog: wdog1grp { |
807 | fsl,pins = < | 807 | fsl,pins = < |
808 | MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 | 808 | MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 |
809 | >; | 809 | >; |
810 | }; | 810 | }; |
811 | 811 | ||
812 | pinctrl_ecspi1: ecspi1grp { | 812 | pinctrl_ecspi1: ecspi1grp { |
813 | fsl,pins = < | 813 | fsl,pins = < |
814 | MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82 | 814 | MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82 |
815 | MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82 | 815 | MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82 |
816 | MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82 | 816 | MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82 |
817 | MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19 | 817 | MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19 |
818 | MX8MQ_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x19 | 818 | MX8MQ_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x19 |
819 | MX8MQ_IOMUXC_NAND_RE_B_GPIO3_IO15 0x19 | 819 | MX8MQ_IOMUXC_NAND_RE_B_GPIO3_IO15 0x19 |
820 | MX8MQ_IOMUXC_NAND_WE_B_GPIO3_IO17 0x19 | 820 | MX8MQ_IOMUXC_NAND_WE_B_GPIO3_IO17 0x19 |
821 | >; | 821 | >; |
822 | }; | 822 | }; |
823 | 823 | ||
824 | pinctrl_wifi_reset: wifiresetgrp { | 824 | pinctrl_wifi_reset: wifiresetgrp { |
825 | fsl,pins = < | 825 | fsl,pins = < |
826 | MX8MQ_IOMUXC_UART4_TXD_GPIO5_IO29 0x16 | 826 | MX8MQ_IOMUXC_UART4_TXD_GPIO5_IO29 0x16 |
827 | >; | 827 | >; |
828 | }; | 828 | }; |
829 | }; | 829 | }; |
830 | 830 |
configs/smarcimx8mq_2g_ser0_android_defconfig
1 | CONFIG_ARM=y | 1 | CONFIG_ARM=y |
2 | CONFIG_SPL_SYS_ICACHE_OFF=y | 2 | CONFIG_SPL_SYS_ICACHE_OFF=y |
3 | CONFIG_SPL_SYS_DCACHE_OFF=y | 3 | CONFIG_SPL_SYS_DCACHE_OFF=y |
4 | CONFIG_ARCH_IMX8M=y | 4 | CONFIG_ARCH_IMX8M=y |
5 | CONFIG_SYS_TEXT_BASE=0x40200000 | 5 | CONFIG_SYS_TEXT_BASE=0x40200000 |
6 | CONFIG_SPL_GPIO_SUPPORT=y | 6 | CONFIG_SPL_GPIO_SUPPORT=y |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | 9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
10 | CONFIG_SYS_I2C_MXC_I2C1=y | 10 | CONFIG_SYS_I2C_MXC_I2C1=y |
11 | CONFIG_SYS_I2C_MXC_I2C2=y | 11 | CONFIG_SYS_I2C_MXC_I2C2=y |
12 | CONFIG_SYS_I2C_MXC_I2C3=y | 12 | CONFIG_SYS_I2C_MXC_I2C3=y |
13 | CONFIG_SYS_I2C_MXC_I2C4=y | 13 | CONFIG_SYS_I2C_MXC_I2C4=y |
14 | CONFIG_ENV_SIZE=0x1000 | 14 | CONFIG_ENV_SIZE=0x1000 |
15 | CONFIG_ENV_OFFSET=0x400000 | 15 | CONFIG_ENV_OFFSET=0x400000 |
16 | CONFIG_DM_GPIO=y | 16 | CONFIG_DM_GPIO=y |
17 | CONFIG_BOOTDELAY=1 | 17 | CONFIG_BOOTDELAY=1 |
18 | CONFIG_TARGET_SMARCIMX8MQ=y | 18 | CONFIG_TARGET_SMARCIMX8MQ=y |
19 | CONFIG_ARCH_MISC_INIT=y | 19 | CONFIG_ARCH_MISC_INIT=y |
20 | CONFIG_SPL_MMC_SUPPORT=y | 20 | CONFIG_SPL_MMC_SUPPORT=y |
21 | CONFIG_SPL_SERIAL_SUPPORT=y | 21 | CONFIG_SPL_SERIAL_SUPPORT=y |
22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y | 22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y |
23 | CONFIG_SPL=y | 23 | CONFIG_SPL=y |
24 | CONFIG_CSF_SIZE=0x2000 | 24 | CONFIG_CSF_SIZE=0x2000 |
25 | CONFIG_SPL_TEXT_BASE=0x7E1000 | 25 | CONFIG_SPL_TEXT_BASE=0x7E1000 |
26 | CONFIG_FIT=y | 26 | CONFIG_FIT=y |
27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | 27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
28 | CONFIG_SPL_LOAD_FIT=y | 28 | CONFIG_SPL_LOAD_FIT=y |
29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" | 29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" |
30 | CONFIG_OF_SYSTEM_SETUP=y | 30 | CONFIG_OF_SYSTEM_SETUP=y |
31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,2GB_LPDDR4,ANDROID_SUPPORT" | 31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,2GB_LPDDR4,ANDROID_SUPPORT" |
32 | CONFIG_CONSOLE_SER0=y | 32 | CONFIG_CONSOLE_SER0=y |
33 | CONFIG_BOARD_LATE_INIT=y | 33 | CONFIG_BOARD_LATE_INIT=y |
34 | CONFIG_BOARD_EARLY_INIT_F=y | 34 | CONFIG_BOARD_EARLY_INIT_F=y |
35 | CONFIG_SPL_BOARD_INIT=y | 35 | CONFIG_SPL_BOARD_INIT=y |
36 | CONFIG_SPL_SEPARATE_BSS=y | 36 | CONFIG_SPL_SEPARATE_BSS=y |
37 | CONFIG_SPL_I2C_SUPPORT=y | 37 | CONFIG_SPL_I2C_SUPPORT=y |
38 | CONFIG_SPL_POWER_SUPPORT=y | 38 | CONFIG_SPL_POWER_SUPPORT=y |
39 | CONFIG_HUSH_PARSER=y | 39 | CONFIG_HUSH_PARSER=y |
40 | CONFIG_SYS_PROMPT="u-boot$ " | 40 | CONFIG_SYS_PROMPT="u-boot$ " |
41 | # CONFIG_CMD_EXPORTENV is not set | 41 | # CONFIG_CMD_EXPORTENV is not set |
42 | CONFIG_CMD_IMPORTENV=y | 42 | CONFIG_CMD_IMPORTENV=y |
43 | # CONFIG_CMD_CRC32 is not set | 43 | # CONFIG_CMD_CRC32 is not set |
44 | # CONFIG_BOOTM_NETBSD is not set | 44 | # CONFIG_BOOTM_NETBSD is not set |
45 | CONFIG_CMD_FUSE=y | 45 | CONFIG_CMD_FUSE=y |
46 | CONFIG_CMD_GPIO=y | 46 | CONFIG_CMD_GPIO=y |
47 | CONFIG_CMD_I2C=y | 47 | CONFIG_CMD_I2C=y |
48 | CONFIG_CMD_MMC=y | 48 | CONFIG_CMD_MMC=y |
49 | CONFIG_CMD_DHCP=y | 49 | CONFIG_CMD_DHCP=y |
50 | CONFIG_CMD_MII=y | 50 | CONFIG_CMD_MII=y |
51 | CONFIG_CMD_PING=y | 51 | CONFIG_CMD_PING=y |
52 | CONFIG_CMD_CACHE=y | 52 | CONFIG_CMD_CACHE=y |
53 | CONFIG_CMD_REGULATOR=y | 53 | CONFIG_CMD_REGULATOR=y |
54 | CONFIG_CMD_MEMTEST=y | 54 | CONFIG_CMD_MEMTEST=y |
55 | CONFIG_CMD_EXT2=y | 55 | CONFIG_CMD_EXT2=y |
56 | CONFIG_CMD_EXT4=y | 56 | CONFIG_CMD_EXT4=y |
57 | CONFIG_CMD_EXT4_WRITE=y | 57 | CONFIG_CMD_EXT4_WRITE=y |
58 | CONFIG_CMD_FAT=y | 58 | CONFIG_CMD_FAT=y |
59 | CONFIG_CMD_SF=y | 59 | CONFIG_CMD_SF=y |
60 | CONFIG_OF_CONTROL=y | 60 | CONFIG_OF_CONTROL=y |
61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" | 61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" |
62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" | 62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" |
63 | CONFIG_ENV_IS_IN_MMC=y | 63 | CONFIG_ENV_IS_IN_MMC=y |
64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 | 64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 |
65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | 65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | 66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
67 | CONFIG_MXC_GPIO=y | 67 | CONFIG_MXC_GPIO=y |
68 | CONFIG_DM_I2C=y | 68 | CONFIG_DM_I2C=y |
69 | CONFIG_CMD_GPT=y | 69 | CONFIG_CMD_GPT=y |
70 | CONFIG_CMD_TIME=y | 70 | CONFIG_CMD_TIME=y |
71 | CONFIG_SYS_I2C_MXC=y | 71 | CONFIG_SYS_I2C_MXC=y |
72 | CONFIG_DM_MMC=y | 72 | CONFIG_DM_MMC=y |
73 | CONFIG_SUPPORT_EMMC_BOOT=y | 73 | CONFIG_SUPPORT_EMMC_BOOT=y |
74 | CONFIG_FSL_USDHC=y | 74 | CONFIG_FSL_USDHC=y |
75 | CONFIG_DM_SPI_FLASH=y | 75 | CONFIG_DM_SPI_FLASH=y |
76 | CONFIG_DM_SPI=y | 76 | CONFIG_DM_SPI=y |
77 | CONFIG_FSL_QSPI=y | 77 | CONFIG_FSL_QSPI=y |
78 | CONFIG_SPI=y | 78 | CONFIG_SPI=y |
79 | CONFIG_SPI_FLASH=y | 79 | CONFIG_SPI_FLASH=y |
80 | CONFIG_SPI_FLASH_BAR=y | 80 | CONFIG_SPI_FLASH_BAR=y |
81 | CONFIG_SPI_FLASH_MACRONIX=y | 81 | CONFIG_SPI_FLASH_MACRONIX=y |
82 | CONFIG_SF_DEFAULT_BUS=0 | 82 | CONFIG_SF_DEFAULT_BUS=0 |
83 | CONFIG_SF_DEFAULT_CS=0 | 83 | CONFIG_SF_DEFAULT_CS=0 |
84 | CONFIG_SF_DEFAULT_SPEED=40000000 | 84 | CONFIG_SF_DEFAULT_SPEED=40000000 |
85 | CONFIG_SF_DEFAULT_MODE=0 | 85 | CONFIG_SF_DEFAULT_MODE=0 |
86 | 86 | ||
87 | CONFIG_PHYLIB=y | 87 | CONFIG_PHYLIB=y |
88 | CONFIG_PHY_ATHEROS=y | 88 | CONFIG_PHY_REALTEK=y |
89 | #CONFIG_MMC_IO_VOLTAGE=y | 89 | #CONFIG_MMC_IO_VOLTAGE=y |
90 | #CONFIG_MMC_UHS_SUPPORT=y | 90 | #CONFIG_MMC_UHS_SUPPORT=y |
91 | #CONFIG_MMC_HS400_SUPPORT=y | 91 | #CONFIG_MMC_HS400_SUPPORT=y |
92 | CONFIG_DM_ETH=y | 92 | CONFIG_DM_ETH=y |
93 | CONFIG_PHY_GIGE=y | 93 | CONFIG_PHY_GIGE=y |
94 | CONFIG_FEC_MXC=y | 94 | CONFIG_FEC_MXC=y |
95 | CONFIG_MII=y | 95 | CONFIG_MII=y |
96 | CONFIG_PINCTRL=y | 96 | CONFIG_PINCTRL=y |
97 | CONFIG_PINCTRL_IMX8M=y | 97 | CONFIG_PINCTRL_IMX8M=y |
98 | CONFIG_POWER_DOMAIN=y | 98 | CONFIG_POWER_DOMAIN=y |
99 | CONFIG_IMX8M_POWER_DOMAIN=y | 99 | CONFIG_IMX8M_POWER_DOMAIN=y |
100 | CONFIG_DM_REGULATOR=y | 100 | CONFIG_DM_REGULATOR=y |
101 | CONFIG_DM_REGULATOR_FIXED=y | 101 | CONFIG_DM_REGULATOR_FIXED=y |
102 | CONFIG_DM_REGULATOR_GPIO=y | 102 | CONFIG_DM_REGULATOR_GPIO=y |
103 | CONFIG_MXC_UART=y | 103 | CONFIG_MXC_UART=y |
104 | CONFIG_SYSRESET=y | 104 | CONFIG_SYSRESET=y |
105 | CONFIG_SYSRESET_PSCI=y | 105 | CONFIG_SYSRESET_PSCI=y |
106 | CONFIG_DM_THERMAL=y | 106 | CONFIG_DM_THERMAL=y |
107 | CONFIG_NXP_TMU=y | 107 | CONFIG_NXP_TMU=y |
108 | CONFIG_USB=y | 108 | CONFIG_USB=y |
109 | CONFIG_DM_USB=y | 109 | CONFIG_DM_USB=y |
110 | CONFIG_USB_GADGET=y | 110 | CONFIG_USB_GADGET=y |
111 | CONFIG_FASTBOOT=y | 111 | CONFIG_FASTBOOT=y |
112 | CONFIG_USB_FUNCTION_FASTBOOT=y | 112 | CONFIG_USB_FUNCTION_FASTBOOT=y |
113 | CONFIG_CMD_FASTBOOT=y | 113 | CONFIG_CMD_FASTBOOT=y |
114 | CONFIG_ANDROID_BOOT_IMAGE=y | 114 | CONFIG_ANDROID_BOOT_IMAGE=y |
115 | CONFIG_FASTBOOT_UUU_SUPPORT=n | 115 | CONFIG_FASTBOOT_UUU_SUPPORT=n |
116 | CONFIG_FASTBOOT_BUF_ADDR=0x44800000 | 116 | CONFIG_FASTBOOT_BUF_ADDR=0x44800000 |
117 | CONFIG_FASTBOOT_BUF_SIZE=0x19000000 | 117 | CONFIG_FASTBOOT_BUF_SIZE=0x19000000 |
118 | CONFIG_FASTBOOT_FLASH=y | 118 | CONFIG_FASTBOOT_FLASH=y |
119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | 119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 |
120 | CONFIG_EFI_PARTITION=y | 120 | CONFIG_EFI_PARTITION=y |
121 | CONFIG_SDP_LOADADDR=0x40400000 | 121 | CONFIG_SDP_LOADADDR=0x40400000 |
122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 | 122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 |
123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 | 123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 |
124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" | 124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" |
125 | CONFIG_USB_GADGET_DOWNLOAD=y | 125 | CONFIG_USB_GADGET_DOWNLOAD=y |
126 | CONFIG_SPL_USB_GADGET=y | 126 | CONFIG_SPL_USB_GADGET=y |
127 | CONFIG_SPL_USB_SDP_SUPPORT=y | 127 | CONFIG_SPL_USB_SDP_SUPPORT=y |
128 | CONFIG_USB_XHCI_HCD=y | 128 | CONFIG_USB_XHCI_HCD=y |
129 | CONFIG_USB_XHCI_IMX8M=y | 129 | CONFIG_USB_XHCI_IMX8M=y |
130 | CONFIG_USB_XHCI_DWC3=y | 130 | CONFIG_USB_XHCI_DWC3=y |
131 | CONFIG_USB_DWC3=y | 131 | CONFIG_USB_DWC3=y |
132 | CONFIG_USB_DWC3_GADGET=y | 132 | CONFIG_USB_DWC3_GADGET=y |
133 | CONFIG_OF_LIBFDT_OVERLAY=y | 133 | CONFIG_OF_LIBFDT_OVERLAY=y |
134 | 134 | ||
135 | CONFIG_VIDEO_IMX8M_DCSS=y | 135 | CONFIG_VIDEO_IMX8M_DCSS=y |
136 | CONFIG_VIDEO_IMX8M_HDMI=y | 136 | CONFIG_VIDEO_IMX8M_HDMI=y |
137 | CONFIG_DM_VIDEO=y | 137 | CONFIG_DM_VIDEO=y |
138 | CONFIG_SYS_WHITE_ON_BLACK=y | 138 | CONFIG_SYS_WHITE_ON_BLACK=y |
139 | 139 | ||
140 | CONFIG_LZ4=y | 140 | CONFIG_LZ4=y |
141 | CONFIG_BCB_SUPPORT=y | 141 | CONFIG_BCB_SUPPORT=y |
142 | CONFIG_ANDROID_RECOVERY=y | 142 | CONFIG_ANDROID_RECOVERY=y |
143 | CONFIG_SUPPORT_RAW_INITRD=y | 143 | CONFIG_SUPPORT_RAW_INITRD=y |
144 | CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y | 144 | CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y |
145 | CONFIG_FSL_FASTBOOT=y | 145 | CONFIG_FSL_FASTBOOT=y |
146 | CONFIG_FASTBOOT_LOCK=y | 146 | CONFIG_FASTBOOT_LOCK=y |
147 | CONFIG_CMD_BOOTA=y | 147 | CONFIG_CMD_BOOTA=y |
148 | CONFIG_LIBAVB=y | 148 | CONFIG_LIBAVB=y |
149 | CONFIG_AVB_SUPPORT=y | 149 | CONFIG_AVB_SUPPORT=y |
150 | CONFIG_APPEND_BOOTARGS=y | 150 | CONFIG_APPEND_BOOTARGS=y |
151 | CONFIG_AVB_WARNING_LOGO=y | 151 | CONFIG_AVB_WARNING_LOGO=y |
152 | CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 | 152 | CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 |
153 | CONFIG_AVB_WARNING_LOGO_ROWS=0x60 | 153 | CONFIG_AVB_WARNING_LOGO_ROWS=0x60 |
154 | 154 |
configs/smarcimx8mq_2g_ser0_defconfig
1 | CONFIG_ARM=y | 1 | CONFIG_ARM=y |
2 | CONFIG_SPL_SYS_ICACHE_OFF=y | 2 | CONFIG_SPL_SYS_ICACHE_OFF=y |
3 | CONFIG_SPL_SYS_DCACHE_OFF=y | 3 | CONFIG_SPL_SYS_DCACHE_OFF=y |
4 | CONFIG_ARCH_IMX8M=y | 4 | CONFIG_ARCH_IMX8M=y |
5 | CONFIG_SYS_TEXT_BASE=0x40200000 | 5 | CONFIG_SYS_TEXT_BASE=0x40200000 |
6 | CONFIG_SPL_GPIO_SUPPORT=y | 6 | CONFIG_SPL_GPIO_SUPPORT=y |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | 9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
10 | CONFIG_SYS_I2C_MXC_I2C1=y | 10 | CONFIG_SYS_I2C_MXC_I2C1=y |
11 | CONFIG_SYS_I2C_MXC_I2C2=y | 11 | CONFIG_SYS_I2C_MXC_I2C2=y |
12 | CONFIG_SYS_I2C_MXC_I2C3=y | 12 | CONFIG_SYS_I2C_MXC_I2C3=y |
13 | CONFIG_SYS_I2C_MXC_I2C4=y | 13 | CONFIG_SYS_I2C_MXC_I2C4=y |
14 | CONFIG_ENV_SIZE=0x1000 | 14 | CONFIG_ENV_SIZE=0x1000 |
15 | CONFIG_ENV_OFFSET=0x400000 | 15 | CONFIG_ENV_OFFSET=0x400000 |
16 | CONFIG_DM_GPIO=y | 16 | CONFIG_DM_GPIO=y |
17 | CONFIG_BOOTDELAY=1 | 17 | CONFIG_BOOTDELAY=1 |
18 | CONFIG_TARGET_SMARCIMX8MQ=y | 18 | CONFIG_TARGET_SMARCIMX8MQ=y |
19 | CONFIG_ARCH_MISC_INIT=y | 19 | CONFIG_ARCH_MISC_INIT=y |
20 | CONFIG_SPL_MMC_SUPPORT=y | 20 | CONFIG_SPL_MMC_SUPPORT=y |
21 | CONFIG_SPL_SERIAL_SUPPORT=y | 21 | CONFIG_SPL_SERIAL_SUPPORT=y |
22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y | 22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y |
23 | CONFIG_SPL=y | 23 | CONFIG_SPL=y |
24 | CONFIG_CSF_SIZE=0x2000 | 24 | CONFIG_CSF_SIZE=0x2000 |
25 | CONFIG_SPL_TEXT_BASE=0x7E1000 | 25 | CONFIG_SPL_TEXT_BASE=0x7E1000 |
26 | CONFIG_FIT=y | 26 | CONFIG_FIT=y |
27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | 27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
28 | CONFIG_SPL_LOAD_FIT=y | 28 | CONFIG_SPL_LOAD_FIT=y |
29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" | 29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" |
30 | CONFIG_OF_SYSTEM_SETUP=y | 30 | CONFIG_OF_SYSTEM_SETUP=y |
31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,2GB_LPDDR4" | 31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,2GB_LPDDR4" |
32 | CONFIG_CONSOLE_SER0=y | 32 | CONFIG_CONSOLE_SER0=y |
33 | CONFIG_BOARD_LATE_INIT=y | 33 | CONFIG_BOARD_LATE_INIT=y |
34 | CONFIG_BOARD_EARLY_INIT_F=y | 34 | CONFIG_BOARD_EARLY_INIT_F=y |
35 | CONFIG_SPL_BOARD_INIT=y | 35 | CONFIG_SPL_BOARD_INIT=y |
36 | CONFIG_SPL_SEPARATE_BSS=y | 36 | CONFIG_SPL_SEPARATE_BSS=y |
37 | CONFIG_SPL_I2C_SUPPORT=y | 37 | CONFIG_SPL_I2C_SUPPORT=y |
38 | CONFIG_SPL_POWER_SUPPORT=y | 38 | CONFIG_SPL_POWER_SUPPORT=y |
39 | CONFIG_HUSH_PARSER=y | 39 | CONFIG_HUSH_PARSER=y |
40 | CONFIG_SYS_PROMPT="u-boot$ " | 40 | CONFIG_SYS_PROMPT="u-boot$ " |
41 | # CONFIG_CMD_EXPORTENV is not set | 41 | # CONFIG_CMD_EXPORTENV is not set |
42 | CONFIG_CMD_IMPORTENV=y | 42 | CONFIG_CMD_IMPORTENV=y |
43 | # CONFIG_CMD_CRC32 is not set | 43 | # CONFIG_CMD_CRC32 is not set |
44 | # CONFIG_BOOTM_NETBSD is not set | 44 | # CONFIG_BOOTM_NETBSD is not set |
45 | CONFIG_CMD_FUSE=y | 45 | CONFIG_CMD_FUSE=y |
46 | CONFIG_CMD_GPIO=y | 46 | CONFIG_CMD_GPIO=y |
47 | CONFIG_CMD_I2C=y | 47 | CONFIG_CMD_I2C=y |
48 | CONFIG_CMD_MMC=y | 48 | CONFIG_CMD_MMC=y |
49 | CONFIG_CMD_DHCP=y | 49 | CONFIG_CMD_DHCP=y |
50 | CONFIG_CMD_MII=y | 50 | CONFIG_CMD_MII=y |
51 | CONFIG_CMD_PING=y | 51 | CONFIG_CMD_PING=y |
52 | CONFIG_CMD_CACHE=y | 52 | CONFIG_CMD_CACHE=y |
53 | CONFIG_CMD_REGULATOR=y | 53 | CONFIG_CMD_REGULATOR=y |
54 | CONFIG_CMD_MEMTEST=y | 54 | CONFIG_CMD_MEMTEST=y |
55 | CONFIG_CMD_EXT2=y | 55 | CONFIG_CMD_EXT2=y |
56 | CONFIG_CMD_EXT4=y | 56 | CONFIG_CMD_EXT4=y |
57 | CONFIG_CMD_EXT4_WRITE=y | 57 | CONFIG_CMD_EXT4_WRITE=y |
58 | CONFIG_CMD_FAT=y | 58 | CONFIG_CMD_FAT=y |
59 | CONFIG_CMD_SF=y | 59 | CONFIG_CMD_SF=y |
60 | CONFIG_OF_CONTROL=y | 60 | CONFIG_OF_CONTROL=y |
61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" | 61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" |
62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" | 62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" |
63 | CONFIG_ENV_IS_IN_MMC=y | 63 | CONFIG_ENV_IS_IN_MMC=y |
64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 | 64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 |
65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | 65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | 66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
67 | CONFIG_MXC_GPIO=y | 67 | CONFIG_MXC_GPIO=y |
68 | CONFIG_DM_I2C=y | 68 | CONFIG_DM_I2C=y |
69 | CONFIG_CMD_GPT=y | 69 | CONFIG_CMD_GPT=y |
70 | CONFIG_CMD_TIME=y | 70 | CONFIG_CMD_TIME=y |
71 | CONFIG_SYS_I2C_MXC=y | 71 | CONFIG_SYS_I2C_MXC=y |
72 | CONFIG_DM_MMC=y | 72 | CONFIG_DM_MMC=y |
73 | CONFIG_SUPPORT_EMMC_BOOT=y | 73 | CONFIG_SUPPORT_EMMC_BOOT=y |
74 | CONFIG_FSL_USDHC=y | 74 | CONFIG_FSL_USDHC=y |
75 | CONFIG_DM_SPI_FLASH=y | 75 | CONFIG_DM_SPI_FLASH=y |
76 | CONFIG_DM_SPI=y | 76 | CONFIG_DM_SPI=y |
77 | CONFIG_FSL_QSPI=y | 77 | CONFIG_FSL_QSPI=y |
78 | CONFIG_SPI=y | 78 | CONFIG_SPI=y |
79 | CONFIG_SPI_FLASH=y | 79 | CONFIG_SPI_FLASH=y |
80 | CONFIG_SPI_FLASH_BAR=y | 80 | CONFIG_SPI_FLASH_BAR=y |
81 | CONFIG_SPI_FLASH_MACRONIX=y | 81 | CONFIG_SPI_FLASH_MACRONIX=y |
82 | CONFIG_SF_DEFAULT_BUS=0 | 82 | CONFIG_SF_DEFAULT_BUS=0 |
83 | CONFIG_SF_DEFAULT_CS=0 | 83 | CONFIG_SF_DEFAULT_CS=0 |
84 | CONFIG_SF_DEFAULT_SPEED=40000000 | 84 | CONFIG_SF_DEFAULT_SPEED=40000000 |
85 | CONFIG_SF_DEFAULT_MODE=0 | 85 | CONFIG_SF_DEFAULT_MODE=0 |
86 | 86 | ||
87 | CONFIG_PHYLIB=y | 87 | CONFIG_PHYLIB=y |
88 | CONFIG_PHY_ATHEROS=y | 88 | CONFIG_PHY_REALTEK=y |
89 | #CONFIG_MMC_IO_VOLTAGE=y | 89 | #CONFIG_MMC_IO_VOLTAGE=y |
90 | #CONFIG_MMC_UHS_SUPPORT=y | 90 | #CONFIG_MMC_UHS_SUPPORT=y |
91 | #CONFIG_MMC_HS400_SUPPORT=y | 91 | #CONFIG_MMC_HS400_SUPPORT=y |
92 | CONFIG_DM_ETH=y | 92 | CONFIG_DM_ETH=y |
93 | CONFIG_PHY_GIGE=y | 93 | CONFIG_PHY_GIGE=y |
94 | CONFIG_FEC_MXC=y | 94 | CONFIG_FEC_MXC=y |
95 | CONFIG_MII=y | 95 | CONFIG_MII=y |
96 | CONFIG_PINCTRL=y | 96 | CONFIG_PINCTRL=y |
97 | CONFIG_PINCTRL_IMX8M=y | 97 | CONFIG_PINCTRL_IMX8M=y |
98 | CONFIG_POWER_DOMAIN=y | 98 | CONFIG_POWER_DOMAIN=y |
99 | CONFIG_IMX8M_POWER_DOMAIN=y | 99 | CONFIG_IMX8M_POWER_DOMAIN=y |
100 | CONFIG_DM_REGULATOR=y | 100 | CONFIG_DM_REGULATOR=y |
101 | CONFIG_DM_REGULATOR_FIXED=y | 101 | CONFIG_DM_REGULATOR_FIXED=y |
102 | CONFIG_DM_REGULATOR_GPIO=y | 102 | CONFIG_DM_REGULATOR_GPIO=y |
103 | CONFIG_MXC_UART=y | 103 | CONFIG_MXC_UART=y |
104 | CONFIG_SYSRESET=y | 104 | CONFIG_SYSRESET=y |
105 | CONFIG_SYSRESET_PSCI=y | 105 | CONFIG_SYSRESET_PSCI=y |
106 | CONFIG_DM_THERMAL=y | 106 | CONFIG_DM_THERMAL=y |
107 | CONFIG_NXP_TMU=y | 107 | CONFIG_NXP_TMU=y |
108 | CONFIG_USB=y | 108 | CONFIG_USB=y |
109 | CONFIG_DM_USB=y | 109 | CONFIG_DM_USB=y |
110 | CONFIG_USB_GADGET=y | 110 | CONFIG_USB_GADGET=y |
111 | CONFIG_FASTBOOT=y | 111 | CONFIG_FASTBOOT=y |
112 | CONFIG_USB_FUNCTION_FASTBOOT=y | 112 | CONFIG_USB_FUNCTION_FASTBOOT=y |
113 | CONFIG_CMD_FASTBOOT=y | 113 | CONFIG_CMD_FASTBOOT=y |
114 | CONFIG_ANDROID_BOOT_IMAGE=y | 114 | CONFIG_ANDROID_BOOT_IMAGE=y |
115 | CONFIG_FASTBOOT_UUU_SUPPORT=y | 115 | CONFIG_FASTBOOT_UUU_SUPPORT=y |
116 | CONFIG_FASTBOOT_BUF_ADDR=0x42800000 | 116 | CONFIG_FASTBOOT_BUF_ADDR=0x42800000 |
117 | CONFIG_FASTBOOT_BUF_SIZE=0x40000000 | 117 | CONFIG_FASTBOOT_BUF_SIZE=0x40000000 |
118 | CONFIG_FASTBOOT_FLASH=y | 118 | CONFIG_FASTBOOT_FLASH=y |
119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | 119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 |
120 | CONFIG_EFI_PARTITION=y | 120 | CONFIG_EFI_PARTITION=y |
121 | CONFIG_SDP_LOADADDR=0x40400000 | 121 | CONFIG_SDP_LOADADDR=0x40400000 |
122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 | 122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 |
123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 | 123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 |
124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" | 124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" |
125 | CONFIG_USB_GADGET_DOWNLOAD=y | 125 | CONFIG_USB_GADGET_DOWNLOAD=y |
126 | CONFIG_SPL_USB_GADGET=y | 126 | CONFIG_SPL_USB_GADGET=y |
127 | CONFIG_SPL_USB_SDP_SUPPORT=y | 127 | CONFIG_SPL_USB_SDP_SUPPORT=y |
128 | CONFIG_USB_XHCI_HCD=y | 128 | CONFIG_USB_XHCI_HCD=y |
129 | CONFIG_USB_XHCI_IMX8M=y | 129 | CONFIG_USB_XHCI_IMX8M=y |
130 | CONFIG_USB_XHCI_DWC3=y | 130 | CONFIG_USB_XHCI_DWC3=y |
131 | CONFIG_USB_DWC3=y | 131 | CONFIG_USB_DWC3=y |
132 | CONFIG_USB_DWC3_GADGET=y | 132 | CONFIG_USB_DWC3_GADGET=y |
133 | CONFIG_OF_LIBFDT_OVERLAY=y | 133 | CONFIG_OF_LIBFDT_OVERLAY=y |
134 | 134 | ||
135 | CONFIG_VIDEO_IMX8M_DCSS=y | 135 | CONFIG_VIDEO_IMX8M_DCSS=y |
136 | CONFIG_VIDEO_IMX8M_HDMI=y | 136 | CONFIG_VIDEO_IMX8M_HDMI=y |
137 | CONFIG_DM_VIDEO=y | 137 | CONFIG_DM_VIDEO=y |
138 | CONFIG_SYS_WHITE_ON_BLACK=y | 138 | CONFIG_SYS_WHITE_ON_BLACK=y |
139 | 139 |
configs/smarcimx8mq_2g_ser1_android_defconfig
1 | CONFIG_ARM=y | 1 | CONFIG_ARM=y |
2 | CONFIG_SPL_SYS_ICACHE_OFF=y | 2 | CONFIG_SPL_SYS_ICACHE_OFF=y |
3 | CONFIG_SPL_SYS_DCACHE_OFF=y | 3 | CONFIG_SPL_SYS_DCACHE_OFF=y |
4 | CONFIG_ARCH_IMX8M=y | 4 | CONFIG_ARCH_IMX8M=y |
5 | CONFIG_SYS_TEXT_BASE=0x40200000 | 5 | CONFIG_SYS_TEXT_BASE=0x40200000 |
6 | CONFIG_SPL_GPIO_SUPPORT=y | 6 | CONFIG_SPL_GPIO_SUPPORT=y |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | 9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
10 | CONFIG_SYS_I2C_MXC_I2C1=y | 10 | CONFIG_SYS_I2C_MXC_I2C1=y |
11 | CONFIG_SYS_I2C_MXC_I2C2=y | 11 | CONFIG_SYS_I2C_MXC_I2C2=y |
12 | CONFIG_SYS_I2C_MXC_I2C3=y | 12 | CONFIG_SYS_I2C_MXC_I2C3=y |
13 | CONFIG_SYS_I2C_MXC_I2C4=y | 13 | CONFIG_SYS_I2C_MXC_I2C4=y |
14 | CONFIG_ENV_SIZE=0x1000 | 14 | CONFIG_ENV_SIZE=0x1000 |
15 | CONFIG_ENV_OFFSET=0x400000 | 15 | CONFIG_ENV_OFFSET=0x400000 |
16 | CONFIG_DM_GPIO=y | 16 | CONFIG_DM_GPIO=y |
17 | CONFIG_BOOTDELAY=1 | 17 | CONFIG_BOOTDELAY=1 |
18 | CONFIG_TARGET_SMARCIMX8MQ=y | 18 | CONFIG_TARGET_SMARCIMX8MQ=y |
19 | CONFIG_ARCH_MISC_INIT=y | 19 | CONFIG_ARCH_MISC_INIT=y |
20 | CONFIG_SPL_MMC_SUPPORT=y | 20 | CONFIG_SPL_MMC_SUPPORT=y |
21 | CONFIG_SPL_SERIAL_SUPPORT=y | 21 | CONFIG_SPL_SERIAL_SUPPORT=y |
22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y | 22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y |
23 | CONFIG_SPL=y | 23 | CONFIG_SPL=y |
24 | CONFIG_CSF_SIZE=0x2000 | 24 | CONFIG_CSF_SIZE=0x2000 |
25 | CONFIG_SPL_TEXT_BASE=0x7E1000 | 25 | CONFIG_SPL_TEXT_BASE=0x7E1000 |
26 | CONFIG_FIT=y | 26 | CONFIG_FIT=y |
27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | 27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
28 | CONFIG_SPL_LOAD_FIT=y | 28 | CONFIG_SPL_LOAD_FIT=y |
29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" | 29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" |
30 | CONFIG_OF_SYSTEM_SETUP=y | 30 | CONFIG_OF_SYSTEM_SETUP=y |
31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,2GB_LPDDR4,ANDROID_SUPPORT" | 31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,2GB_LPDDR4,ANDROID_SUPPORT" |
32 | CONFIG_CONSOLE_SER1=y | 32 | CONFIG_CONSOLE_SER1=y |
33 | CONFIG_BOARD_LATE_INIT=y | 33 | CONFIG_BOARD_LATE_INIT=y |
34 | CONFIG_BOARD_EARLY_INIT_F=y | 34 | CONFIG_BOARD_EARLY_INIT_F=y |
35 | CONFIG_SPL_BOARD_INIT=y | 35 | CONFIG_SPL_BOARD_INIT=y |
36 | CONFIG_SPL_SEPARATE_BSS=y | 36 | CONFIG_SPL_SEPARATE_BSS=y |
37 | CONFIG_SPL_I2C_SUPPORT=y | 37 | CONFIG_SPL_I2C_SUPPORT=y |
38 | CONFIG_SPL_POWER_SUPPORT=y | 38 | CONFIG_SPL_POWER_SUPPORT=y |
39 | CONFIG_HUSH_PARSER=y | 39 | CONFIG_HUSH_PARSER=y |
40 | CONFIG_SYS_PROMPT="u-boot$ " | 40 | CONFIG_SYS_PROMPT="u-boot$ " |
41 | # CONFIG_CMD_EXPORTENV is not set | 41 | # CONFIG_CMD_EXPORTENV is not set |
42 | CONFIG_CMD_IMPORTENV=y | 42 | CONFIG_CMD_IMPORTENV=y |
43 | # CONFIG_CMD_CRC32 is not set | 43 | # CONFIG_CMD_CRC32 is not set |
44 | # CONFIG_BOOTM_NETBSD is not set | 44 | # CONFIG_BOOTM_NETBSD is not set |
45 | CONFIG_CMD_FUSE=y | 45 | CONFIG_CMD_FUSE=y |
46 | CONFIG_CMD_GPIO=y | 46 | CONFIG_CMD_GPIO=y |
47 | CONFIG_CMD_I2C=y | 47 | CONFIG_CMD_I2C=y |
48 | CONFIG_CMD_MMC=y | 48 | CONFIG_CMD_MMC=y |
49 | CONFIG_CMD_DHCP=y | 49 | CONFIG_CMD_DHCP=y |
50 | CONFIG_CMD_MII=y | 50 | CONFIG_CMD_MII=y |
51 | CONFIG_CMD_PING=y | 51 | CONFIG_CMD_PING=y |
52 | CONFIG_CMD_CACHE=y | 52 | CONFIG_CMD_CACHE=y |
53 | CONFIG_CMD_REGULATOR=y | 53 | CONFIG_CMD_REGULATOR=y |
54 | CONFIG_CMD_MEMTEST=y | 54 | CONFIG_CMD_MEMTEST=y |
55 | CONFIG_CMD_EXT2=y | 55 | CONFIG_CMD_EXT2=y |
56 | CONFIG_CMD_EXT4=y | 56 | CONFIG_CMD_EXT4=y |
57 | CONFIG_CMD_EXT4_WRITE=y | 57 | CONFIG_CMD_EXT4_WRITE=y |
58 | CONFIG_CMD_FAT=y | 58 | CONFIG_CMD_FAT=y |
59 | CONFIG_CMD_SF=y | 59 | CONFIG_CMD_SF=y |
60 | CONFIG_OF_CONTROL=y | 60 | CONFIG_OF_CONTROL=y |
61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" | 61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" |
62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" | 62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" |
63 | CONFIG_ENV_IS_IN_MMC=y | 63 | CONFIG_ENV_IS_IN_MMC=y |
64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 | 64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 |
65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | 65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | 66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
67 | CONFIG_MXC_GPIO=y | 67 | CONFIG_MXC_GPIO=y |
68 | CONFIG_DM_I2C=y | 68 | CONFIG_DM_I2C=y |
69 | CONFIG_CMD_GPT=y | 69 | CONFIG_CMD_GPT=y |
70 | CONFIG_CMD_TIME=y | 70 | CONFIG_CMD_TIME=y |
71 | CONFIG_SYS_I2C_MXC=y | 71 | CONFIG_SYS_I2C_MXC=y |
72 | CONFIG_DM_MMC=y | 72 | CONFIG_DM_MMC=y |
73 | CONFIG_SUPPORT_EMMC_BOOT=y | 73 | CONFIG_SUPPORT_EMMC_BOOT=y |
74 | CONFIG_FSL_USDHC=y | 74 | CONFIG_FSL_USDHC=y |
75 | CONFIG_DM_SPI_FLASH=y | 75 | CONFIG_DM_SPI_FLASH=y |
76 | CONFIG_DM_SPI=y | 76 | CONFIG_DM_SPI=y |
77 | CONFIG_FSL_QSPI=y | 77 | CONFIG_FSL_QSPI=y |
78 | CONFIG_SPI=y | 78 | CONFIG_SPI=y |
79 | CONFIG_SPI_FLASH=y | 79 | CONFIG_SPI_FLASH=y |
80 | CONFIG_SPI_FLASH_BAR=y | 80 | CONFIG_SPI_FLASH_BAR=y |
81 | CONFIG_SPI_FLASH_MACRONIX=y | 81 | CONFIG_SPI_FLASH_MACRONIX=y |
82 | CONFIG_SF_DEFAULT_BUS=0 | 82 | CONFIG_SF_DEFAULT_BUS=0 |
83 | CONFIG_SF_DEFAULT_CS=0 | 83 | CONFIG_SF_DEFAULT_CS=0 |
84 | CONFIG_SF_DEFAULT_SPEED=40000000 | 84 | CONFIG_SF_DEFAULT_SPEED=40000000 |
85 | CONFIG_SF_DEFAULT_MODE=0 | 85 | CONFIG_SF_DEFAULT_MODE=0 |
86 | 86 | ||
87 | CONFIG_PHYLIB=y | 87 | CONFIG_PHYLIB=y |
88 | CONFIG_PHY_ATHEROS=y | 88 | CONFIG_PHY_REALTEK=y |
89 | #CONFIG_MMC_IO_VOLTAGE=y | 89 | #CONFIG_MMC_IO_VOLTAGE=y |
90 | #CONFIG_MMC_UHS_SUPPORT=y | 90 | #CONFIG_MMC_UHS_SUPPORT=y |
91 | #CONFIG_MMC_HS400_SUPPORT=y | 91 | #CONFIG_MMC_HS400_SUPPORT=y |
92 | CONFIG_DM_ETH=y | 92 | CONFIG_DM_ETH=y |
93 | CONFIG_PHY_GIGE=y | 93 | CONFIG_PHY_GIGE=y |
94 | CONFIG_FEC_MXC=y | 94 | CONFIG_FEC_MXC=y |
95 | CONFIG_MII=y | 95 | CONFIG_MII=y |
96 | CONFIG_PINCTRL=y | 96 | CONFIG_PINCTRL=y |
97 | CONFIG_PINCTRL_IMX8M=y | 97 | CONFIG_PINCTRL_IMX8M=y |
98 | CONFIG_POWER_DOMAIN=y | 98 | CONFIG_POWER_DOMAIN=y |
99 | CONFIG_IMX8M_POWER_DOMAIN=y | 99 | CONFIG_IMX8M_POWER_DOMAIN=y |
100 | CONFIG_DM_REGULATOR=y | 100 | CONFIG_DM_REGULATOR=y |
101 | CONFIG_DM_REGULATOR_FIXED=y | 101 | CONFIG_DM_REGULATOR_FIXED=y |
102 | CONFIG_DM_REGULATOR_GPIO=y | 102 | CONFIG_DM_REGULATOR_GPIO=y |
103 | CONFIG_MXC_UART=y | 103 | CONFIG_MXC_UART=y |
104 | CONFIG_SYSRESET=y | 104 | CONFIG_SYSRESET=y |
105 | CONFIG_SYSRESET_PSCI=y | 105 | CONFIG_SYSRESET_PSCI=y |
106 | CONFIG_DM_THERMAL=y | 106 | CONFIG_DM_THERMAL=y |
107 | CONFIG_NXP_TMU=y | 107 | CONFIG_NXP_TMU=y |
108 | CONFIG_USB=y | 108 | CONFIG_USB=y |
109 | CONFIG_DM_USB=y | 109 | CONFIG_DM_USB=y |
110 | CONFIG_USB_GADGET=y | 110 | CONFIG_USB_GADGET=y |
111 | CONFIG_FASTBOOT=y | 111 | CONFIG_FASTBOOT=y |
112 | CONFIG_USB_FUNCTION_FASTBOOT=y | 112 | CONFIG_USB_FUNCTION_FASTBOOT=y |
113 | CONFIG_CMD_FASTBOOT=y | 113 | CONFIG_CMD_FASTBOOT=y |
114 | CONFIG_ANDROID_BOOT_IMAGE=y | 114 | CONFIG_ANDROID_BOOT_IMAGE=y |
115 | CONFIG_FASTBOOT_UUU_SUPPORT=n | 115 | CONFIG_FASTBOOT_UUU_SUPPORT=n |
116 | CONFIG_FASTBOOT_BUF_ADDR=0x44800000 | 116 | CONFIG_FASTBOOT_BUF_ADDR=0x44800000 |
117 | CONFIG_FASTBOOT_BUF_SIZE=0x19000000 | 117 | CONFIG_FASTBOOT_BUF_SIZE=0x19000000 |
118 | CONFIG_FASTBOOT_FLASH=y | 118 | CONFIG_FASTBOOT_FLASH=y |
119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | 119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 |
120 | CONFIG_EFI_PARTITION=y | 120 | CONFIG_EFI_PARTITION=y |
121 | CONFIG_SDP_LOADADDR=0x40400000 | 121 | CONFIG_SDP_LOADADDR=0x40400000 |
122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 | 122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 |
123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 | 123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 |
124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" | 124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" |
125 | CONFIG_USB_GADGET_DOWNLOAD=y | 125 | CONFIG_USB_GADGET_DOWNLOAD=y |
126 | CONFIG_SPL_USB_GADGET=y | 126 | CONFIG_SPL_USB_GADGET=y |
127 | CONFIG_SPL_USB_SDP_SUPPORT=y | 127 | CONFIG_SPL_USB_SDP_SUPPORT=y |
128 | CONFIG_USB_XHCI_HCD=y | 128 | CONFIG_USB_XHCI_HCD=y |
129 | CONFIG_USB_XHCI_IMX8M=y | 129 | CONFIG_USB_XHCI_IMX8M=y |
130 | CONFIG_USB_XHCI_DWC3=y | 130 | CONFIG_USB_XHCI_DWC3=y |
131 | CONFIG_USB_DWC3=y | 131 | CONFIG_USB_DWC3=y |
132 | CONFIG_USB_DWC3_GADGET=y | 132 | CONFIG_USB_DWC3_GADGET=y |
133 | CONFIG_OF_LIBFDT_OVERLAY=y | 133 | CONFIG_OF_LIBFDT_OVERLAY=y |
134 | 134 | ||
135 | CONFIG_VIDEO_IMX8M_DCSS=y | 135 | CONFIG_VIDEO_IMX8M_DCSS=y |
136 | CONFIG_VIDEO_IMX8M_HDMI=y | 136 | CONFIG_VIDEO_IMX8M_HDMI=y |
137 | CONFIG_DM_VIDEO=y | 137 | CONFIG_DM_VIDEO=y |
138 | CONFIG_SYS_WHITE_ON_BLACK=y | 138 | CONFIG_SYS_WHITE_ON_BLACK=y |
139 | 139 | ||
140 | CONFIG_LZ4=y | 140 | CONFIG_LZ4=y |
141 | CONFIG_BCB_SUPPORT=y | 141 | CONFIG_BCB_SUPPORT=y |
142 | CONFIG_ANDROID_RECOVERY=y | 142 | CONFIG_ANDROID_RECOVERY=y |
143 | CONFIG_SUPPORT_RAW_INITRD=y | 143 | CONFIG_SUPPORT_RAW_INITRD=y |
144 | CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y | 144 | CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y |
145 | CONFIG_FSL_FASTBOOT=y | 145 | CONFIG_FSL_FASTBOOT=y |
146 | CONFIG_FASTBOOT_LOCK=y | 146 | CONFIG_FASTBOOT_LOCK=y |
147 | CONFIG_CMD_BOOTA=y | 147 | CONFIG_CMD_BOOTA=y |
148 | CONFIG_LIBAVB=y | 148 | CONFIG_LIBAVB=y |
149 | CONFIG_AVB_SUPPORT=y | 149 | CONFIG_AVB_SUPPORT=y |
150 | CONFIG_APPEND_BOOTARGS=y | 150 | CONFIG_APPEND_BOOTARGS=y |
151 | CONFIG_AVB_WARNING_LOGO=y | 151 | CONFIG_AVB_WARNING_LOGO=y |
152 | CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 | 152 | CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 |
153 | CONFIG_AVB_WARNING_LOGO_ROWS=0x60 | 153 | CONFIG_AVB_WARNING_LOGO_ROWS=0x60 |
154 | 154 |
configs/smarcimx8mq_2g_ser1_defconfig
1 | CONFIG_ARM=y | 1 | CONFIG_ARM=y |
2 | CONFIG_SPL_SYS_ICACHE_OFF=y | 2 | CONFIG_SPL_SYS_ICACHE_OFF=y |
3 | CONFIG_SPL_SYS_DCACHE_OFF=y | 3 | CONFIG_SPL_SYS_DCACHE_OFF=y |
4 | CONFIG_ARCH_IMX8M=y | 4 | CONFIG_ARCH_IMX8M=y |
5 | CONFIG_SYS_TEXT_BASE=0x40200000 | 5 | CONFIG_SYS_TEXT_BASE=0x40200000 |
6 | CONFIG_SPL_GPIO_SUPPORT=y | 6 | CONFIG_SPL_GPIO_SUPPORT=y |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | 9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
10 | CONFIG_SYS_I2C_MXC_I2C1=y | 10 | CONFIG_SYS_I2C_MXC_I2C1=y |
11 | CONFIG_SYS_I2C_MXC_I2C2=y | 11 | CONFIG_SYS_I2C_MXC_I2C2=y |
12 | CONFIG_SYS_I2C_MXC_I2C3=y | 12 | CONFIG_SYS_I2C_MXC_I2C3=y |
13 | CONFIG_SYS_I2C_MXC_I2C4=y | 13 | CONFIG_SYS_I2C_MXC_I2C4=y |
14 | CONFIG_ENV_SIZE=0x1000 | 14 | CONFIG_ENV_SIZE=0x1000 |
15 | CONFIG_ENV_OFFSET=0x400000 | 15 | CONFIG_ENV_OFFSET=0x400000 |
16 | CONFIG_DM_GPIO=y | 16 | CONFIG_DM_GPIO=y |
17 | CONFIG_BOOTDELAY=1 | 17 | CONFIG_BOOTDELAY=1 |
18 | CONFIG_TARGET_SMARCIMX8MQ=y | 18 | CONFIG_TARGET_SMARCIMX8MQ=y |
19 | CONFIG_ARCH_MISC_INIT=y | 19 | CONFIG_ARCH_MISC_INIT=y |
20 | CONFIG_SPL_MMC_SUPPORT=y | 20 | CONFIG_SPL_MMC_SUPPORT=y |
21 | CONFIG_SPL_SERIAL_SUPPORT=y | 21 | CONFIG_SPL_SERIAL_SUPPORT=y |
22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y | 22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y |
23 | CONFIG_SPL=y | 23 | CONFIG_SPL=y |
24 | CONFIG_CSF_SIZE=0x2000 | 24 | CONFIG_CSF_SIZE=0x2000 |
25 | CONFIG_SPL_TEXT_BASE=0x7E1000 | 25 | CONFIG_SPL_TEXT_BASE=0x7E1000 |
26 | CONFIG_FIT=y | 26 | CONFIG_FIT=y |
27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | 27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
28 | CONFIG_SPL_LOAD_FIT=y | 28 | CONFIG_SPL_LOAD_FIT=y |
29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" | 29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" |
30 | CONFIG_OF_SYSTEM_SETUP=y | 30 | CONFIG_OF_SYSTEM_SETUP=y |
31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,2GB_LPDDR4" | 31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,2GB_LPDDR4" |
32 | CONFIG_CONSOLE_SER1=y | 32 | CONFIG_CONSOLE_SER1=y |
33 | CONFIG_BOARD_LATE_INIT=y | 33 | CONFIG_BOARD_LATE_INIT=y |
34 | CONFIG_BOARD_EARLY_INIT_F=y | 34 | CONFIG_BOARD_EARLY_INIT_F=y |
35 | CONFIG_SPL_BOARD_INIT=y | 35 | CONFIG_SPL_BOARD_INIT=y |
36 | CONFIG_SPL_SEPARATE_BSS=y | 36 | CONFIG_SPL_SEPARATE_BSS=y |
37 | CONFIG_SPL_I2C_SUPPORT=y | 37 | CONFIG_SPL_I2C_SUPPORT=y |
38 | CONFIG_SPL_POWER_SUPPORT=y | 38 | CONFIG_SPL_POWER_SUPPORT=y |
39 | CONFIG_HUSH_PARSER=y | 39 | CONFIG_HUSH_PARSER=y |
40 | CONFIG_SYS_PROMPT="u-boot$ " | 40 | CONFIG_SYS_PROMPT="u-boot$ " |
41 | # CONFIG_CMD_EXPORTENV is not set | 41 | # CONFIG_CMD_EXPORTENV is not set |
42 | CONFIG_CMD_IMPORTENV=y | 42 | CONFIG_CMD_IMPORTENV=y |
43 | # CONFIG_CMD_CRC32 is not set | 43 | # CONFIG_CMD_CRC32 is not set |
44 | # CONFIG_BOOTM_NETBSD is not set | 44 | # CONFIG_BOOTM_NETBSD is not set |
45 | CONFIG_CMD_FUSE=y | 45 | CONFIG_CMD_FUSE=y |
46 | CONFIG_CMD_GPIO=y | 46 | CONFIG_CMD_GPIO=y |
47 | CONFIG_CMD_I2C=y | 47 | CONFIG_CMD_I2C=y |
48 | CONFIG_CMD_MMC=y | 48 | CONFIG_CMD_MMC=y |
49 | CONFIG_CMD_DHCP=y | 49 | CONFIG_CMD_DHCP=y |
50 | CONFIG_CMD_MII=y | 50 | CONFIG_CMD_MII=y |
51 | CONFIG_CMD_PING=y | 51 | CONFIG_CMD_PING=y |
52 | CONFIG_CMD_CACHE=y | 52 | CONFIG_CMD_CACHE=y |
53 | CONFIG_CMD_REGULATOR=y | 53 | CONFIG_CMD_REGULATOR=y |
54 | CONFIG_CMD_MEMTEST=y | 54 | CONFIG_CMD_MEMTEST=y |
55 | CONFIG_CMD_EXT2=y | 55 | CONFIG_CMD_EXT2=y |
56 | CONFIG_CMD_EXT4=y | 56 | CONFIG_CMD_EXT4=y |
57 | CONFIG_CMD_EXT4_WRITE=y | 57 | CONFIG_CMD_EXT4_WRITE=y |
58 | CONFIG_CMD_FAT=y | 58 | CONFIG_CMD_FAT=y |
59 | CONFIG_CMD_SF=y | 59 | CONFIG_CMD_SF=y |
60 | CONFIG_OF_CONTROL=y | 60 | CONFIG_OF_CONTROL=y |
61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" | 61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" |
62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" | 62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" |
63 | CONFIG_ENV_IS_IN_MMC=y | 63 | CONFIG_ENV_IS_IN_MMC=y |
64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 | 64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 |
65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | 65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | 66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
67 | CONFIG_MXC_GPIO=y | 67 | CONFIG_MXC_GPIO=y |
68 | CONFIG_DM_I2C=y | 68 | CONFIG_DM_I2C=y |
69 | CONFIG_CMD_GPT=y | 69 | CONFIG_CMD_GPT=y |
70 | CONFIG_CMD_TIME=y | 70 | CONFIG_CMD_TIME=y |
71 | CONFIG_SYS_I2C_MXC=y | 71 | CONFIG_SYS_I2C_MXC=y |
72 | CONFIG_DM_MMC=y | 72 | CONFIG_DM_MMC=y |
73 | CONFIG_SUPPORT_EMMC_BOOT=y | 73 | CONFIG_SUPPORT_EMMC_BOOT=y |
74 | CONFIG_FSL_USDHC=y | 74 | CONFIG_FSL_USDHC=y |
75 | CONFIG_DM_SPI_FLASH=y | 75 | CONFIG_DM_SPI_FLASH=y |
76 | CONFIG_DM_SPI=y | 76 | CONFIG_DM_SPI=y |
77 | CONFIG_FSL_QSPI=y | 77 | CONFIG_FSL_QSPI=y |
78 | CONFIG_SPI=y | 78 | CONFIG_SPI=y |
79 | CONFIG_SPI_FLASH=y | 79 | CONFIG_SPI_FLASH=y |
80 | CONFIG_SPI_FLASH_BAR=y | 80 | CONFIG_SPI_FLASH_BAR=y |
81 | CONFIG_SPI_FLASH_MACRONIX=y | 81 | CONFIG_SPI_FLASH_MACRONIX=y |
82 | CONFIG_SF_DEFAULT_BUS=0 | 82 | CONFIG_SF_DEFAULT_BUS=0 |
83 | CONFIG_SF_DEFAULT_CS=0 | 83 | CONFIG_SF_DEFAULT_CS=0 |
84 | CONFIG_SF_DEFAULT_SPEED=40000000 | 84 | CONFIG_SF_DEFAULT_SPEED=40000000 |
85 | CONFIG_SF_DEFAULT_MODE=0 | 85 | CONFIG_SF_DEFAULT_MODE=0 |
86 | 86 | ||
87 | CONFIG_PHYLIB=y | 87 | CONFIG_PHYLIB=y |
88 | CONFIG_PHY_ATHEROS=y | 88 | CONFIG_PHY_REALTEK=y |
89 | #CONFIG_MMC_IO_VOLTAGE=y | 89 | #CONFIG_MMC_IO_VOLTAGE=y |
90 | #CONFIG_MMC_UHS_SUPPORT=y | 90 | #CONFIG_MMC_UHS_SUPPORT=y |
91 | #CONFIG_MMC_HS400_SUPPORT=y | 91 | #CONFIG_MMC_HS400_SUPPORT=y |
92 | CONFIG_DM_ETH=y | 92 | CONFIG_DM_ETH=y |
93 | CONFIG_PHY_GIGE=y | 93 | CONFIG_PHY_GIGE=y |
94 | CONFIG_FEC_MXC=y | 94 | CONFIG_FEC_MXC=y |
95 | CONFIG_MII=y | 95 | CONFIG_MII=y |
96 | CONFIG_PINCTRL=y | 96 | CONFIG_PINCTRL=y |
97 | CONFIG_PINCTRL_IMX8M=y | 97 | CONFIG_PINCTRL_IMX8M=y |
98 | CONFIG_POWER_DOMAIN=y | 98 | CONFIG_POWER_DOMAIN=y |
99 | CONFIG_IMX8M_POWER_DOMAIN=y | 99 | CONFIG_IMX8M_POWER_DOMAIN=y |
100 | CONFIG_DM_REGULATOR=y | 100 | CONFIG_DM_REGULATOR=y |
101 | CONFIG_DM_REGULATOR_FIXED=y | 101 | CONFIG_DM_REGULATOR_FIXED=y |
102 | CONFIG_DM_REGULATOR_GPIO=y | 102 | CONFIG_DM_REGULATOR_GPIO=y |
103 | CONFIG_MXC_UART=y | 103 | CONFIG_MXC_UART=y |
104 | CONFIG_SYSRESET=y | 104 | CONFIG_SYSRESET=y |
105 | CONFIG_SYSRESET_PSCI=y | 105 | CONFIG_SYSRESET_PSCI=y |
106 | CONFIG_DM_THERMAL=y | 106 | CONFIG_DM_THERMAL=y |
107 | CONFIG_NXP_TMU=y | 107 | CONFIG_NXP_TMU=y |
108 | CONFIG_USB=y | 108 | CONFIG_USB=y |
109 | CONFIG_DM_USB=y | 109 | CONFIG_DM_USB=y |
110 | CONFIG_USB_GADGET=y | 110 | CONFIG_USB_GADGET=y |
111 | CONFIG_FASTBOOT=y | 111 | CONFIG_FASTBOOT=y |
112 | CONFIG_USB_FUNCTION_FASTBOOT=y | 112 | CONFIG_USB_FUNCTION_FASTBOOT=y |
113 | CONFIG_CMD_FASTBOOT=y | 113 | CONFIG_CMD_FASTBOOT=y |
114 | CONFIG_ANDROID_BOOT_IMAGE=y | 114 | CONFIG_ANDROID_BOOT_IMAGE=y |
115 | CONFIG_FASTBOOT_UUU_SUPPORT=y | 115 | CONFIG_FASTBOOT_UUU_SUPPORT=y |
116 | CONFIG_FASTBOOT_BUF_ADDR=0x42800000 | 116 | CONFIG_FASTBOOT_BUF_ADDR=0x42800000 |
117 | CONFIG_FASTBOOT_BUF_SIZE=0x40000000 | 117 | CONFIG_FASTBOOT_BUF_SIZE=0x40000000 |
118 | CONFIG_FASTBOOT_FLASH=y | 118 | CONFIG_FASTBOOT_FLASH=y |
119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | 119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 |
120 | CONFIG_EFI_PARTITION=y | 120 | CONFIG_EFI_PARTITION=y |
121 | CONFIG_SDP_LOADADDR=0x40400000 | 121 | CONFIG_SDP_LOADADDR=0x40400000 |
122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 | 122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 |
123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 | 123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 |
124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" | 124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" |
125 | CONFIG_USB_GADGET_DOWNLOAD=y | 125 | CONFIG_USB_GADGET_DOWNLOAD=y |
126 | CONFIG_SPL_USB_GADGET=y | 126 | CONFIG_SPL_USB_GADGET=y |
127 | CONFIG_SPL_USB_SDP_SUPPORT=y | 127 | CONFIG_SPL_USB_SDP_SUPPORT=y |
128 | CONFIG_USB_XHCI_HCD=y | 128 | CONFIG_USB_XHCI_HCD=y |
129 | CONFIG_USB_XHCI_IMX8M=y | 129 | CONFIG_USB_XHCI_IMX8M=y |
130 | CONFIG_USB_XHCI_DWC3=y | 130 | CONFIG_USB_XHCI_DWC3=y |
131 | CONFIG_USB_DWC3=y | 131 | CONFIG_USB_DWC3=y |
132 | CONFIG_USB_DWC3_GADGET=y | 132 | CONFIG_USB_DWC3_GADGET=y |
133 | CONFIG_OF_LIBFDT_OVERLAY=y | 133 | CONFIG_OF_LIBFDT_OVERLAY=y |
134 | 134 | ||
135 | CONFIG_VIDEO_IMX8M_DCSS=y | 135 | CONFIG_VIDEO_IMX8M_DCSS=y |
136 | CONFIG_VIDEO_IMX8M_HDMI=y | 136 | CONFIG_VIDEO_IMX8M_HDMI=y |
137 | CONFIG_DM_VIDEO=y | 137 | CONFIG_DM_VIDEO=y |
138 | CONFIG_SYS_WHITE_ON_BLACK=y | 138 | CONFIG_SYS_WHITE_ON_BLACK=y |
139 | 139 |
configs/smarcimx8mq_2g_ser2_android_defconfig
1 | CONFIG_ARM=y | 1 | CONFIG_ARM=y |
2 | CONFIG_SPL_SYS_ICACHE_OFF=y | 2 | CONFIG_SPL_SYS_ICACHE_OFF=y |
3 | CONFIG_SPL_SYS_DCACHE_OFF=y | 3 | CONFIG_SPL_SYS_DCACHE_OFF=y |
4 | CONFIG_ARCH_IMX8M=y | 4 | CONFIG_ARCH_IMX8M=y |
5 | CONFIG_SYS_TEXT_BASE=0x40200000 | 5 | CONFIG_SYS_TEXT_BASE=0x40200000 |
6 | CONFIG_SPL_GPIO_SUPPORT=y | 6 | CONFIG_SPL_GPIO_SUPPORT=y |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | 9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
10 | CONFIG_SYS_I2C_MXC_I2C1=y | 10 | CONFIG_SYS_I2C_MXC_I2C1=y |
11 | CONFIG_SYS_I2C_MXC_I2C2=y | 11 | CONFIG_SYS_I2C_MXC_I2C2=y |
12 | CONFIG_SYS_I2C_MXC_I2C3=y | 12 | CONFIG_SYS_I2C_MXC_I2C3=y |
13 | CONFIG_SYS_I2C_MXC_I2C4=y | 13 | CONFIG_SYS_I2C_MXC_I2C4=y |
14 | CONFIG_ENV_SIZE=0x1000 | 14 | CONFIG_ENV_SIZE=0x1000 |
15 | CONFIG_ENV_OFFSET=0x400000 | 15 | CONFIG_ENV_OFFSET=0x400000 |
16 | CONFIG_DM_GPIO=y | 16 | CONFIG_DM_GPIO=y |
17 | CONFIG_BOOTDELAY=1 | 17 | CONFIG_BOOTDELAY=1 |
18 | CONFIG_TARGET_SMARCIMX8MQ=y | 18 | CONFIG_TARGET_SMARCIMX8MQ=y |
19 | CONFIG_ARCH_MISC_INIT=y | 19 | CONFIG_ARCH_MISC_INIT=y |
20 | CONFIG_SPL_MMC_SUPPORT=y | 20 | CONFIG_SPL_MMC_SUPPORT=y |
21 | CONFIG_SPL_SERIAL_SUPPORT=y | 21 | CONFIG_SPL_SERIAL_SUPPORT=y |
22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y | 22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y |
23 | CONFIG_SPL=y | 23 | CONFIG_SPL=y |
24 | CONFIG_CSF_SIZE=0x2000 | 24 | CONFIG_CSF_SIZE=0x2000 |
25 | CONFIG_SPL_TEXT_BASE=0x7E1000 | 25 | CONFIG_SPL_TEXT_BASE=0x7E1000 |
26 | CONFIG_FIT=y | 26 | CONFIG_FIT=y |
27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | 27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
28 | CONFIG_SPL_LOAD_FIT=y | 28 | CONFIG_SPL_LOAD_FIT=y |
29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" | 29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" |
30 | CONFIG_OF_SYSTEM_SETUP=y | 30 | CONFIG_OF_SYSTEM_SETUP=y |
31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,2GB_LPDDR4,ANDROID_SUPPORT" | 31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,2GB_LPDDR4,ANDROID_SUPPORT" |
32 | CONFIG_CONSOLE_SER2=y | 32 | CONFIG_CONSOLE_SER2=y |
33 | CONFIG_BOARD_LATE_INIT=y | 33 | CONFIG_BOARD_LATE_INIT=y |
34 | CONFIG_BOARD_EARLY_INIT_F=y | 34 | CONFIG_BOARD_EARLY_INIT_F=y |
35 | CONFIG_SPL_BOARD_INIT=y | 35 | CONFIG_SPL_BOARD_INIT=y |
36 | CONFIG_SPL_SEPARATE_BSS=y | 36 | CONFIG_SPL_SEPARATE_BSS=y |
37 | CONFIG_SPL_I2C_SUPPORT=y | 37 | CONFIG_SPL_I2C_SUPPORT=y |
38 | CONFIG_SPL_POWER_SUPPORT=y | 38 | CONFIG_SPL_POWER_SUPPORT=y |
39 | CONFIG_HUSH_PARSER=y | 39 | CONFIG_HUSH_PARSER=y |
40 | CONFIG_SYS_PROMPT="u-boot$ " | 40 | CONFIG_SYS_PROMPT="u-boot$ " |
41 | # CONFIG_CMD_EXPORTENV is not set | 41 | # CONFIG_CMD_EXPORTENV is not set |
42 | CONFIG_CMD_IMPORTENV=y | 42 | CONFIG_CMD_IMPORTENV=y |
43 | # CONFIG_CMD_CRC32 is not set | 43 | # CONFIG_CMD_CRC32 is not set |
44 | # CONFIG_BOOTM_NETBSD is not set | 44 | # CONFIG_BOOTM_NETBSD is not set |
45 | CONFIG_CMD_FUSE=y | 45 | CONFIG_CMD_FUSE=y |
46 | CONFIG_CMD_GPIO=y | 46 | CONFIG_CMD_GPIO=y |
47 | CONFIG_CMD_I2C=y | 47 | CONFIG_CMD_I2C=y |
48 | CONFIG_CMD_MMC=y | 48 | CONFIG_CMD_MMC=y |
49 | CONFIG_CMD_DHCP=y | 49 | CONFIG_CMD_DHCP=y |
50 | CONFIG_CMD_MII=y | 50 | CONFIG_CMD_MII=y |
51 | CONFIG_CMD_PING=y | 51 | CONFIG_CMD_PING=y |
52 | CONFIG_CMD_CACHE=y | 52 | CONFIG_CMD_CACHE=y |
53 | CONFIG_CMD_REGULATOR=y | 53 | CONFIG_CMD_REGULATOR=y |
54 | CONFIG_CMD_MEMTEST=y | 54 | CONFIG_CMD_MEMTEST=y |
55 | CONFIG_CMD_EXT2=y | 55 | CONFIG_CMD_EXT2=y |
56 | CONFIG_CMD_EXT4=y | 56 | CONFIG_CMD_EXT4=y |
57 | CONFIG_CMD_EXT4_WRITE=y | 57 | CONFIG_CMD_EXT4_WRITE=y |
58 | CONFIG_CMD_FAT=y | 58 | CONFIG_CMD_FAT=y |
59 | CONFIG_CMD_SF=y | 59 | CONFIG_CMD_SF=y |
60 | CONFIG_OF_CONTROL=y | 60 | CONFIG_OF_CONTROL=y |
61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" | 61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" |
62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" | 62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" |
63 | CONFIG_ENV_IS_IN_MMC=y | 63 | CONFIG_ENV_IS_IN_MMC=y |
64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 | 64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 |
65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | 65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | 66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
67 | CONFIG_MXC_GPIO=y | 67 | CONFIG_MXC_GPIO=y |
68 | CONFIG_DM_I2C=y | 68 | CONFIG_DM_I2C=y |
69 | CONFIG_CMD_GPT=y | 69 | CONFIG_CMD_GPT=y |
70 | CONFIG_CMD_TIME=y | 70 | CONFIG_CMD_TIME=y |
71 | CONFIG_SYS_I2C_MXC=y | 71 | CONFIG_SYS_I2C_MXC=y |
72 | CONFIG_DM_MMC=y | 72 | CONFIG_DM_MMC=y |
73 | CONFIG_SUPPORT_EMMC_BOOT=y | 73 | CONFIG_SUPPORT_EMMC_BOOT=y |
74 | CONFIG_FSL_USDHC=y | 74 | CONFIG_FSL_USDHC=y |
75 | CONFIG_DM_SPI_FLASH=y | 75 | CONFIG_DM_SPI_FLASH=y |
76 | CONFIG_DM_SPI=y | 76 | CONFIG_DM_SPI=y |
77 | CONFIG_FSL_QSPI=y | 77 | CONFIG_FSL_QSPI=y |
78 | CONFIG_SPI=y | 78 | CONFIG_SPI=y |
79 | CONFIG_SPI_FLASH=y | 79 | CONFIG_SPI_FLASH=y |
80 | CONFIG_SPI_FLASH_BAR=y | 80 | CONFIG_SPI_FLASH_BAR=y |
81 | CONFIG_SPI_FLASH_MACRONIX=y | 81 | CONFIG_SPI_FLASH_MACRONIX=y |
82 | CONFIG_SF_DEFAULT_BUS=0 | 82 | CONFIG_SF_DEFAULT_BUS=0 |
83 | CONFIG_SF_DEFAULT_CS=0 | 83 | CONFIG_SF_DEFAULT_CS=0 |
84 | CONFIG_SF_DEFAULT_SPEED=40000000 | 84 | CONFIG_SF_DEFAULT_SPEED=40000000 |
85 | CONFIG_SF_DEFAULT_MODE=0 | 85 | CONFIG_SF_DEFAULT_MODE=0 |
86 | 86 | ||
87 | CONFIG_PHYLIB=y | 87 | CONFIG_PHYLIB=y |
88 | CONFIG_PHY_ATHEROS=y | 88 | CONFIG_PHY_REALTEK=y |
89 | #CONFIG_MMC_IO_VOLTAGE=y | 89 | #CONFIG_MMC_IO_VOLTAGE=y |
90 | #CONFIG_MMC_UHS_SUPPORT=y | 90 | #CONFIG_MMC_UHS_SUPPORT=y |
91 | #CONFIG_MMC_HS400_SUPPORT=y | 91 | #CONFIG_MMC_HS400_SUPPORT=y |
92 | CONFIG_DM_ETH=y | 92 | CONFIG_DM_ETH=y |
93 | CONFIG_PHY_GIGE=y | 93 | CONFIG_PHY_GIGE=y |
94 | CONFIG_FEC_MXC=y | 94 | CONFIG_FEC_MXC=y |
95 | CONFIG_MII=y | 95 | CONFIG_MII=y |
96 | CONFIG_PINCTRL=y | 96 | CONFIG_PINCTRL=y |
97 | CONFIG_PINCTRL_IMX8M=y | 97 | CONFIG_PINCTRL_IMX8M=y |
98 | CONFIG_POWER_DOMAIN=y | 98 | CONFIG_POWER_DOMAIN=y |
99 | CONFIG_IMX8M_POWER_DOMAIN=y | 99 | CONFIG_IMX8M_POWER_DOMAIN=y |
100 | CONFIG_DM_REGULATOR=y | 100 | CONFIG_DM_REGULATOR=y |
101 | CONFIG_DM_REGULATOR_FIXED=y | 101 | CONFIG_DM_REGULATOR_FIXED=y |
102 | CONFIG_DM_REGULATOR_GPIO=y | 102 | CONFIG_DM_REGULATOR_GPIO=y |
103 | CONFIG_MXC_UART=y | 103 | CONFIG_MXC_UART=y |
104 | CONFIG_SYSRESET=y | 104 | CONFIG_SYSRESET=y |
105 | CONFIG_SYSRESET_PSCI=y | 105 | CONFIG_SYSRESET_PSCI=y |
106 | CONFIG_DM_THERMAL=y | 106 | CONFIG_DM_THERMAL=y |
107 | CONFIG_NXP_TMU=y | 107 | CONFIG_NXP_TMU=y |
108 | CONFIG_USB=y | 108 | CONFIG_USB=y |
109 | CONFIG_DM_USB=y | 109 | CONFIG_DM_USB=y |
110 | CONFIG_USB_GADGET=y | 110 | CONFIG_USB_GADGET=y |
111 | CONFIG_FASTBOOT=y | 111 | CONFIG_FASTBOOT=y |
112 | CONFIG_USB_FUNCTION_FASTBOOT=y | 112 | CONFIG_USB_FUNCTION_FASTBOOT=y |
113 | CONFIG_CMD_FASTBOOT=y | 113 | CONFIG_CMD_FASTBOOT=y |
114 | CONFIG_ANDROID_BOOT_IMAGE=y | 114 | CONFIG_ANDROID_BOOT_IMAGE=y |
115 | CONFIG_FASTBOOT_UUU_SUPPORT=n | 115 | CONFIG_FASTBOOT_UUU_SUPPORT=n |
116 | CONFIG_FASTBOOT_BUF_ADDR=0x44800000 | 116 | CONFIG_FASTBOOT_BUF_ADDR=0x44800000 |
117 | CONFIG_FASTBOOT_BUF_SIZE=0x19000000 | 117 | CONFIG_FASTBOOT_BUF_SIZE=0x19000000 |
118 | CONFIG_FASTBOOT_FLASH=y | 118 | CONFIG_FASTBOOT_FLASH=y |
119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | 119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 |
120 | CONFIG_EFI_PARTITION=y | 120 | CONFIG_EFI_PARTITION=y |
121 | CONFIG_SDP_LOADADDR=0x40400000 | 121 | CONFIG_SDP_LOADADDR=0x40400000 |
122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 | 122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 |
123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 | 123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 |
124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" | 124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" |
125 | CONFIG_USB_GADGET_DOWNLOAD=y | 125 | CONFIG_USB_GADGET_DOWNLOAD=y |
126 | CONFIG_SPL_USB_GADGET=y | 126 | CONFIG_SPL_USB_GADGET=y |
127 | CONFIG_SPL_USB_SDP_SUPPORT=y | 127 | CONFIG_SPL_USB_SDP_SUPPORT=y |
128 | CONFIG_USB_XHCI_HCD=y | 128 | CONFIG_USB_XHCI_HCD=y |
129 | CONFIG_USB_XHCI_IMX8M=y | 129 | CONFIG_USB_XHCI_IMX8M=y |
130 | CONFIG_USB_XHCI_DWC3=y | 130 | CONFIG_USB_XHCI_DWC3=y |
131 | CONFIG_USB_DWC3=y | 131 | CONFIG_USB_DWC3=y |
132 | CONFIG_USB_DWC3_GADGET=y | 132 | CONFIG_USB_DWC3_GADGET=y |
133 | CONFIG_OF_LIBFDT_OVERLAY=y | 133 | CONFIG_OF_LIBFDT_OVERLAY=y |
134 | 134 | ||
135 | CONFIG_VIDEO_IMX8M_DCSS=y | 135 | CONFIG_VIDEO_IMX8M_DCSS=y |
136 | CONFIG_VIDEO_IMX8M_HDMI=y | 136 | CONFIG_VIDEO_IMX8M_HDMI=y |
137 | CONFIG_DM_VIDEO=y | 137 | CONFIG_DM_VIDEO=y |
138 | CONFIG_SYS_WHITE_ON_BLACK=y | 138 | CONFIG_SYS_WHITE_ON_BLACK=y |
139 | 139 | ||
140 | CONFIG_LZ4=y | 140 | CONFIG_LZ4=y |
141 | CONFIG_BCB_SUPPORT=y | 141 | CONFIG_BCB_SUPPORT=y |
142 | CONFIG_ANDROID_RECOVERY=y | 142 | CONFIG_ANDROID_RECOVERY=y |
143 | CONFIG_SUPPORT_RAW_INITRD=y | 143 | CONFIG_SUPPORT_RAW_INITRD=y |
144 | CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y | 144 | CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y |
145 | CONFIG_FSL_FASTBOOT=y | 145 | CONFIG_FSL_FASTBOOT=y |
146 | CONFIG_FASTBOOT_LOCK=y | 146 | CONFIG_FASTBOOT_LOCK=y |
147 | CONFIG_CMD_BOOTA=y | 147 | CONFIG_CMD_BOOTA=y |
148 | CONFIG_LIBAVB=y | 148 | CONFIG_LIBAVB=y |
149 | CONFIG_AVB_SUPPORT=y | 149 | CONFIG_AVB_SUPPORT=y |
150 | CONFIG_APPEND_BOOTARGS=y | 150 | CONFIG_APPEND_BOOTARGS=y |
151 | CONFIG_AVB_WARNING_LOGO=y | 151 | CONFIG_AVB_WARNING_LOGO=y |
152 | CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 | 152 | CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 |
153 | CONFIG_AVB_WARNING_LOGO_ROWS=0x60 | 153 | CONFIG_AVB_WARNING_LOGO_ROWS=0x60 |
154 | 154 |
configs/smarcimx8mq_2g_ser2_defconfig
1 | CONFIG_ARM=y | 1 | CONFIG_ARM=y |
2 | CONFIG_SPL_SYS_ICACHE_OFF=y | 2 | CONFIG_SPL_SYS_ICACHE_OFF=y |
3 | CONFIG_SPL_SYS_DCACHE_OFF=y | 3 | CONFIG_SPL_SYS_DCACHE_OFF=y |
4 | CONFIG_ARCH_IMX8M=y | 4 | CONFIG_ARCH_IMX8M=y |
5 | CONFIG_SYS_TEXT_BASE=0x40200000 | 5 | CONFIG_SYS_TEXT_BASE=0x40200000 |
6 | CONFIG_SPL_GPIO_SUPPORT=y | 6 | CONFIG_SPL_GPIO_SUPPORT=y |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | 9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
10 | CONFIG_SYS_I2C_MXC_I2C1=y | 10 | CONFIG_SYS_I2C_MXC_I2C1=y |
11 | CONFIG_SYS_I2C_MXC_I2C2=y | 11 | CONFIG_SYS_I2C_MXC_I2C2=y |
12 | CONFIG_SYS_I2C_MXC_I2C3=y | 12 | CONFIG_SYS_I2C_MXC_I2C3=y |
13 | CONFIG_SYS_I2C_MXC_I2C4=y | 13 | CONFIG_SYS_I2C_MXC_I2C4=y |
14 | CONFIG_ENV_SIZE=0x1000 | 14 | CONFIG_ENV_SIZE=0x1000 |
15 | CONFIG_ENV_OFFSET=0x400000 | 15 | CONFIG_ENV_OFFSET=0x400000 |
16 | CONFIG_DM_GPIO=y | 16 | CONFIG_DM_GPIO=y |
17 | CONFIG_BOOTDELAY=1 | 17 | CONFIG_BOOTDELAY=1 |
18 | CONFIG_TARGET_SMARCIMX8MQ=y | 18 | CONFIG_TARGET_SMARCIMX8MQ=y |
19 | CONFIG_ARCH_MISC_INIT=y | 19 | CONFIG_ARCH_MISC_INIT=y |
20 | CONFIG_SPL_MMC_SUPPORT=y | 20 | CONFIG_SPL_MMC_SUPPORT=y |
21 | CONFIG_SPL_SERIAL_SUPPORT=y | 21 | CONFIG_SPL_SERIAL_SUPPORT=y |
22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y | 22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y |
23 | CONFIG_SPL=y | 23 | CONFIG_SPL=y |
24 | CONFIG_CSF_SIZE=0x2000 | 24 | CONFIG_CSF_SIZE=0x2000 |
25 | CONFIG_SPL_TEXT_BASE=0x7E1000 | 25 | CONFIG_SPL_TEXT_BASE=0x7E1000 |
26 | CONFIG_FIT=y | 26 | CONFIG_FIT=y |
27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | 27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
28 | CONFIG_SPL_LOAD_FIT=y | 28 | CONFIG_SPL_LOAD_FIT=y |
29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" | 29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" |
30 | CONFIG_OF_SYSTEM_SETUP=y | 30 | CONFIG_OF_SYSTEM_SETUP=y |
31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,2GB_LPDDR4" | 31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,2GB_LPDDR4" |
32 | CONFIG_CONSOLE_SER2=y | 32 | CONFIG_CONSOLE_SER2=y |
33 | CONFIG_BOARD_LATE_INIT=y | 33 | CONFIG_BOARD_LATE_INIT=y |
34 | CONFIG_BOARD_EARLY_INIT_F=y | 34 | CONFIG_BOARD_EARLY_INIT_F=y |
35 | CONFIG_SPL_BOARD_INIT=y | 35 | CONFIG_SPL_BOARD_INIT=y |
36 | CONFIG_SPL_SEPARATE_BSS=y | 36 | CONFIG_SPL_SEPARATE_BSS=y |
37 | CONFIG_SPL_I2C_SUPPORT=y | 37 | CONFIG_SPL_I2C_SUPPORT=y |
38 | CONFIG_SPL_POWER_SUPPORT=y | 38 | CONFIG_SPL_POWER_SUPPORT=y |
39 | CONFIG_HUSH_PARSER=y | 39 | CONFIG_HUSH_PARSER=y |
40 | CONFIG_SYS_PROMPT="u-boot$ " | 40 | CONFIG_SYS_PROMPT="u-boot$ " |
41 | # CONFIG_CMD_EXPORTENV is not set | 41 | # CONFIG_CMD_EXPORTENV is not set |
42 | CONFIG_CMD_IMPORTENV=y | 42 | CONFIG_CMD_IMPORTENV=y |
43 | # CONFIG_CMD_CRC32 is not set | 43 | # CONFIG_CMD_CRC32 is not set |
44 | # CONFIG_BOOTM_NETBSD is not set | 44 | # CONFIG_BOOTM_NETBSD is not set |
45 | CONFIG_CMD_FUSE=y | 45 | CONFIG_CMD_FUSE=y |
46 | CONFIG_CMD_GPIO=y | 46 | CONFIG_CMD_GPIO=y |
47 | CONFIG_CMD_I2C=y | 47 | CONFIG_CMD_I2C=y |
48 | CONFIG_CMD_MMC=y | 48 | CONFIG_CMD_MMC=y |
49 | CONFIG_CMD_DHCP=y | 49 | CONFIG_CMD_DHCP=y |
50 | CONFIG_CMD_MII=y | 50 | CONFIG_CMD_MII=y |
51 | CONFIG_CMD_PING=y | 51 | CONFIG_CMD_PING=y |
52 | CONFIG_CMD_CACHE=y | 52 | CONFIG_CMD_CACHE=y |
53 | CONFIG_CMD_REGULATOR=y | 53 | CONFIG_CMD_REGULATOR=y |
54 | CONFIG_CMD_MEMTEST=y | 54 | CONFIG_CMD_MEMTEST=y |
55 | CONFIG_CMD_EXT2=y | 55 | CONFIG_CMD_EXT2=y |
56 | CONFIG_CMD_EXT4=y | 56 | CONFIG_CMD_EXT4=y |
57 | CONFIG_CMD_EXT4_WRITE=y | 57 | CONFIG_CMD_EXT4_WRITE=y |
58 | CONFIG_CMD_FAT=y | 58 | CONFIG_CMD_FAT=y |
59 | CONFIG_CMD_SF=y | 59 | CONFIG_CMD_SF=y |
60 | CONFIG_OF_CONTROL=y | 60 | CONFIG_OF_CONTROL=y |
61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" | 61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" |
62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" | 62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" |
63 | CONFIG_ENV_IS_IN_MMC=y | 63 | CONFIG_ENV_IS_IN_MMC=y |
64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 | 64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 |
65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | 65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | 66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
67 | CONFIG_MXC_GPIO=y | 67 | CONFIG_MXC_GPIO=y |
68 | CONFIG_DM_I2C=y | 68 | CONFIG_DM_I2C=y |
69 | CONFIG_CMD_GPT=y | 69 | CONFIG_CMD_GPT=y |
70 | CONFIG_CMD_TIME=y | 70 | CONFIG_CMD_TIME=y |
71 | CONFIG_SYS_I2C_MXC=y | 71 | CONFIG_SYS_I2C_MXC=y |
72 | CONFIG_DM_MMC=y | 72 | CONFIG_DM_MMC=y |
73 | CONFIG_SUPPORT_EMMC_BOOT=y | 73 | CONFIG_SUPPORT_EMMC_BOOT=y |
74 | CONFIG_FSL_USDHC=y | 74 | CONFIG_FSL_USDHC=y |
75 | CONFIG_DM_SPI_FLASH=y | 75 | CONFIG_DM_SPI_FLASH=y |
76 | CONFIG_DM_SPI=y | 76 | CONFIG_DM_SPI=y |
77 | CONFIG_FSL_QSPI=y | 77 | CONFIG_FSL_QSPI=y |
78 | CONFIG_SPI=y | 78 | CONFIG_SPI=y |
79 | CONFIG_SPI_FLASH=y | 79 | CONFIG_SPI_FLASH=y |
80 | CONFIG_SPI_FLASH_BAR=y | 80 | CONFIG_SPI_FLASH_BAR=y |
81 | CONFIG_SPI_FLASH_MACRONIX=y | 81 | CONFIG_SPI_FLASH_MACRONIX=y |
82 | CONFIG_SF_DEFAULT_BUS=0 | 82 | CONFIG_SF_DEFAULT_BUS=0 |
83 | CONFIG_SF_DEFAULT_CS=0 | 83 | CONFIG_SF_DEFAULT_CS=0 |
84 | CONFIG_SF_DEFAULT_SPEED=40000000 | 84 | CONFIG_SF_DEFAULT_SPEED=40000000 |
85 | CONFIG_SF_DEFAULT_MODE=0 | 85 | CONFIG_SF_DEFAULT_MODE=0 |
86 | 86 | ||
87 | CONFIG_PHYLIB=y | 87 | CONFIG_PHYLIB=y |
88 | CONFIG_PHY_ATHEROS=y | 88 | CONFIG_PHY_REALTEK=y |
89 | #CONFIG_MMC_IO_VOLTAGE=y | 89 | #CONFIG_MMC_IO_VOLTAGE=y |
90 | #CONFIG_MMC_UHS_SUPPORT=y | 90 | #CONFIG_MMC_UHS_SUPPORT=y |
91 | #CONFIG_MMC_HS400_SUPPORT=y | 91 | #CONFIG_MMC_HS400_SUPPORT=y |
92 | CONFIG_DM_ETH=y | 92 | CONFIG_DM_ETH=y |
93 | CONFIG_PHY_GIGE=y | 93 | CONFIG_PHY_GIGE=y |
94 | CONFIG_FEC_MXC=y | 94 | CONFIG_FEC_MXC=y |
95 | CONFIG_MII=y | 95 | CONFIG_MII=y |
96 | CONFIG_PINCTRL=y | 96 | CONFIG_PINCTRL=y |
97 | CONFIG_PINCTRL_IMX8M=y | 97 | CONFIG_PINCTRL_IMX8M=y |
98 | CONFIG_POWER_DOMAIN=y | 98 | CONFIG_POWER_DOMAIN=y |
99 | CONFIG_IMX8M_POWER_DOMAIN=y | 99 | CONFIG_IMX8M_POWER_DOMAIN=y |
100 | CONFIG_DM_REGULATOR=y | 100 | CONFIG_DM_REGULATOR=y |
101 | CONFIG_DM_REGULATOR_FIXED=y | 101 | CONFIG_DM_REGULATOR_FIXED=y |
102 | CONFIG_DM_REGULATOR_GPIO=y | 102 | CONFIG_DM_REGULATOR_GPIO=y |
103 | CONFIG_MXC_UART=y | 103 | CONFIG_MXC_UART=y |
104 | CONFIG_SYSRESET=y | 104 | CONFIG_SYSRESET=y |
105 | CONFIG_SYSRESET_PSCI=y | 105 | CONFIG_SYSRESET_PSCI=y |
106 | CONFIG_DM_THERMAL=y | 106 | CONFIG_DM_THERMAL=y |
107 | CONFIG_NXP_TMU=y | 107 | CONFIG_NXP_TMU=y |
108 | CONFIG_USB=y | 108 | CONFIG_USB=y |
109 | CONFIG_DM_USB=y | 109 | CONFIG_DM_USB=y |
110 | CONFIG_USB_GADGET=y | 110 | CONFIG_USB_GADGET=y |
111 | CONFIG_FASTBOOT=y | 111 | CONFIG_FASTBOOT=y |
112 | CONFIG_USB_FUNCTION_FASTBOOT=y | 112 | CONFIG_USB_FUNCTION_FASTBOOT=y |
113 | CONFIG_CMD_FASTBOOT=y | 113 | CONFIG_CMD_FASTBOOT=y |
114 | CONFIG_ANDROID_BOOT_IMAGE=y | 114 | CONFIG_ANDROID_BOOT_IMAGE=y |
115 | CONFIG_FASTBOOT_UUU_SUPPORT=y | 115 | CONFIG_FASTBOOT_UUU_SUPPORT=y |
116 | CONFIG_FASTBOOT_BUF_ADDR=0x42800000 | 116 | CONFIG_FASTBOOT_BUF_ADDR=0x42800000 |
117 | CONFIG_FASTBOOT_BUF_SIZE=0x40000000 | 117 | CONFIG_FASTBOOT_BUF_SIZE=0x40000000 |
118 | CONFIG_FASTBOOT_FLASH=y | 118 | CONFIG_FASTBOOT_FLASH=y |
119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | 119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 |
120 | CONFIG_EFI_PARTITION=y | 120 | CONFIG_EFI_PARTITION=y |
121 | CONFIG_SDP_LOADADDR=0x40400000 | 121 | CONFIG_SDP_LOADADDR=0x40400000 |
122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 | 122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 |
123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 | 123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 |
124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" | 124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" |
125 | CONFIG_USB_GADGET_DOWNLOAD=y | 125 | CONFIG_USB_GADGET_DOWNLOAD=y |
126 | CONFIG_SPL_USB_GADGET=y | 126 | CONFIG_SPL_USB_GADGET=y |
127 | CONFIG_SPL_USB_SDP_SUPPORT=y | 127 | CONFIG_SPL_USB_SDP_SUPPORT=y |
128 | CONFIG_USB_XHCI_HCD=y | 128 | CONFIG_USB_XHCI_HCD=y |
129 | CONFIG_USB_XHCI_IMX8M=y | 129 | CONFIG_USB_XHCI_IMX8M=y |
130 | CONFIG_USB_XHCI_DWC3=y | 130 | CONFIG_USB_XHCI_DWC3=y |
131 | CONFIG_USB_DWC3=y | 131 | CONFIG_USB_DWC3=y |
132 | CONFIG_USB_DWC3_GADGET=y | 132 | CONFIG_USB_DWC3_GADGET=y |
133 | CONFIG_OF_LIBFDT_OVERLAY=y | 133 | CONFIG_OF_LIBFDT_OVERLAY=y |
134 | 134 | ||
135 | CONFIG_VIDEO_IMX8M_DCSS=y | 135 | CONFIG_VIDEO_IMX8M_DCSS=y |
136 | CONFIG_VIDEO_IMX8M_HDMI=y | 136 | CONFIG_VIDEO_IMX8M_HDMI=y |
137 | CONFIG_DM_VIDEO=y | 137 | CONFIG_DM_VIDEO=y |
138 | CONFIG_SYS_WHITE_ON_BLACK=y | 138 | CONFIG_SYS_WHITE_ON_BLACK=y |
139 | 139 |
configs/smarcimx8mq_2g_ser3_android_defconfig
1 | CONFIG_ARM=y | 1 | CONFIG_ARM=y |
2 | CONFIG_SPL_SYS_ICACHE_OFF=y | 2 | CONFIG_SPL_SYS_ICACHE_OFF=y |
3 | CONFIG_SPL_SYS_DCACHE_OFF=y | 3 | CONFIG_SPL_SYS_DCACHE_OFF=y |
4 | CONFIG_ARCH_IMX8M=y | 4 | CONFIG_ARCH_IMX8M=y |
5 | CONFIG_SYS_TEXT_BASE=0x40200000 | 5 | CONFIG_SYS_TEXT_BASE=0x40200000 |
6 | CONFIG_SPL_GPIO_SUPPORT=y | 6 | CONFIG_SPL_GPIO_SUPPORT=y |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | 9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
10 | CONFIG_SYS_I2C_MXC_I2C1=y | 10 | CONFIG_SYS_I2C_MXC_I2C1=y |
11 | CONFIG_SYS_I2C_MXC_I2C2=y | 11 | CONFIG_SYS_I2C_MXC_I2C2=y |
12 | CONFIG_SYS_I2C_MXC_I2C3=y | 12 | CONFIG_SYS_I2C_MXC_I2C3=y |
13 | CONFIG_SYS_I2C_MXC_I2C4=y | 13 | CONFIG_SYS_I2C_MXC_I2C4=y |
14 | CONFIG_ENV_SIZE=0x1000 | 14 | CONFIG_ENV_SIZE=0x1000 |
15 | CONFIG_ENV_OFFSET=0x400000 | 15 | CONFIG_ENV_OFFSET=0x400000 |
16 | CONFIG_DM_GPIO=y | 16 | CONFIG_DM_GPIO=y |
17 | CONFIG_BOOTDELAY=1 | 17 | CONFIG_BOOTDELAY=1 |
18 | CONFIG_TARGET_SMARCIMX8MQ=y | 18 | CONFIG_TARGET_SMARCIMX8MQ=y |
19 | CONFIG_ARCH_MISC_INIT=y | 19 | CONFIG_ARCH_MISC_INIT=y |
20 | CONFIG_SPL_MMC_SUPPORT=y | 20 | CONFIG_SPL_MMC_SUPPORT=y |
21 | CONFIG_SPL_SERIAL_SUPPORT=y | 21 | CONFIG_SPL_SERIAL_SUPPORT=y |
22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y | 22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y |
23 | CONFIG_SPL=y | 23 | CONFIG_SPL=y |
24 | CONFIG_CSF_SIZE=0x2000 | 24 | CONFIG_CSF_SIZE=0x2000 |
25 | CONFIG_SPL_TEXT_BASE=0x7E1000 | 25 | CONFIG_SPL_TEXT_BASE=0x7E1000 |
26 | CONFIG_FIT=y | 26 | CONFIG_FIT=y |
27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | 27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
28 | CONFIG_SPL_LOAD_FIT=y | 28 | CONFIG_SPL_LOAD_FIT=y |
29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" | 29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" |
30 | CONFIG_OF_SYSTEM_SETUP=y | 30 | CONFIG_OF_SYSTEM_SETUP=y |
31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,2GB_LPDDR4,ANDROID_SUPPORT" | 31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,2GB_LPDDR4,ANDROID_SUPPORT" |
32 | CONFIG_CONSOLE_SER3=y | 32 | CONFIG_CONSOLE_SER3=y |
33 | CONFIG_BOARD_LATE_INIT=y | 33 | CONFIG_BOARD_LATE_INIT=y |
34 | CONFIG_BOARD_EARLY_INIT_F=y | 34 | CONFIG_BOARD_EARLY_INIT_F=y |
35 | CONFIG_SPL_BOARD_INIT=y | 35 | CONFIG_SPL_BOARD_INIT=y |
36 | CONFIG_SPL_SEPARATE_BSS=y | 36 | CONFIG_SPL_SEPARATE_BSS=y |
37 | CONFIG_SPL_I2C_SUPPORT=y | 37 | CONFIG_SPL_I2C_SUPPORT=y |
38 | CONFIG_SPL_POWER_SUPPORT=y | 38 | CONFIG_SPL_POWER_SUPPORT=y |
39 | CONFIG_HUSH_PARSER=y | 39 | CONFIG_HUSH_PARSER=y |
40 | CONFIG_SYS_PROMPT="u-boot$ " | 40 | CONFIG_SYS_PROMPT="u-boot$ " |
41 | # CONFIG_CMD_EXPORTENV is not set | 41 | # CONFIG_CMD_EXPORTENV is not set |
42 | CONFIG_CMD_IMPORTENV=y | 42 | CONFIG_CMD_IMPORTENV=y |
43 | # CONFIG_CMD_CRC32 is not set | 43 | # CONFIG_CMD_CRC32 is not set |
44 | # CONFIG_BOOTM_NETBSD is not set | 44 | # CONFIG_BOOTM_NETBSD is not set |
45 | CONFIG_CMD_FUSE=y | 45 | CONFIG_CMD_FUSE=y |
46 | CONFIG_CMD_GPIO=y | 46 | CONFIG_CMD_GPIO=y |
47 | CONFIG_CMD_I2C=y | 47 | CONFIG_CMD_I2C=y |
48 | CONFIG_CMD_MMC=y | 48 | CONFIG_CMD_MMC=y |
49 | CONFIG_CMD_DHCP=y | 49 | CONFIG_CMD_DHCP=y |
50 | CONFIG_CMD_MII=y | 50 | CONFIG_CMD_MII=y |
51 | CONFIG_CMD_PING=y | 51 | CONFIG_CMD_PING=y |
52 | CONFIG_CMD_CACHE=y | 52 | CONFIG_CMD_CACHE=y |
53 | CONFIG_CMD_REGULATOR=y | 53 | CONFIG_CMD_REGULATOR=y |
54 | CONFIG_CMD_MEMTEST=y | 54 | CONFIG_CMD_MEMTEST=y |
55 | CONFIG_CMD_EXT2=y | 55 | CONFIG_CMD_EXT2=y |
56 | CONFIG_CMD_EXT4=y | 56 | CONFIG_CMD_EXT4=y |
57 | CONFIG_CMD_EXT4_WRITE=y | 57 | CONFIG_CMD_EXT4_WRITE=y |
58 | CONFIG_CMD_FAT=y | 58 | CONFIG_CMD_FAT=y |
59 | CONFIG_CMD_SF=y | 59 | CONFIG_CMD_SF=y |
60 | CONFIG_OF_CONTROL=y | 60 | CONFIG_OF_CONTROL=y |
61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" | 61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" |
62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" | 62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" |
63 | CONFIG_ENV_IS_IN_MMC=y | 63 | CONFIG_ENV_IS_IN_MMC=y |
64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 | 64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 |
65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | 65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | 66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
67 | CONFIG_MXC_GPIO=y | 67 | CONFIG_MXC_GPIO=y |
68 | CONFIG_DM_I2C=y | 68 | CONFIG_DM_I2C=y |
69 | CONFIG_CMD_GPT=y | 69 | CONFIG_CMD_GPT=y |
70 | CONFIG_CMD_TIME=y | 70 | CONFIG_CMD_TIME=y |
71 | CONFIG_SYS_I2C_MXC=y | 71 | CONFIG_SYS_I2C_MXC=y |
72 | CONFIG_DM_MMC=y | 72 | CONFIG_DM_MMC=y |
73 | CONFIG_SUPPORT_EMMC_BOOT=y | 73 | CONFIG_SUPPORT_EMMC_BOOT=y |
74 | CONFIG_FSL_USDHC=y | 74 | CONFIG_FSL_USDHC=y |
75 | CONFIG_DM_SPI_FLASH=y | 75 | CONFIG_DM_SPI_FLASH=y |
76 | CONFIG_DM_SPI=y | 76 | CONFIG_DM_SPI=y |
77 | CONFIG_FSL_QSPI=y | 77 | CONFIG_FSL_QSPI=y |
78 | CONFIG_SPI=y | 78 | CONFIG_SPI=y |
79 | CONFIG_SPI_FLASH=y | 79 | CONFIG_SPI_FLASH=y |
80 | CONFIG_SPI_FLASH_BAR=y | 80 | CONFIG_SPI_FLASH_BAR=y |
81 | CONFIG_SPI_FLASH_MACRONIX=y | 81 | CONFIG_SPI_FLASH_MACRONIX=y |
82 | CONFIG_SF_DEFAULT_BUS=0 | 82 | CONFIG_SF_DEFAULT_BUS=0 |
83 | CONFIG_SF_DEFAULT_CS=0 | 83 | CONFIG_SF_DEFAULT_CS=0 |
84 | CONFIG_SF_DEFAULT_SPEED=40000000 | 84 | CONFIG_SF_DEFAULT_SPEED=40000000 |
85 | CONFIG_SF_DEFAULT_MODE=0 | 85 | CONFIG_SF_DEFAULT_MODE=0 |
86 | 86 | ||
87 | CONFIG_PHYLIB=y | 87 | CONFIG_PHYLIB=y |
88 | CONFIG_PHY_ATHEROS=y | 88 | CONFIG_PHY_REALTEK=y |
89 | #CONFIG_MMC_IO_VOLTAGE=y | 89 | #CONFIG_MMC_IO_VOLTAGE=y |
90 | #CONFIG_MMC_UHS_SUPPORT=y | 90 | #CONFIG_MMC_UHS_SUPPORT=y |
91 | #CONFIG_MMC_HS400_SUPPORT=y | 91 | #CONFIG_MMC_HS400_SUPPORT=y |
92 | CONFIG_DM_ETH=y | 92 | CONFIG_DM_ETH=y |
93 | CONFIG_PHY_GIGE=y | 93 | CONFIG_PHY_GIGE=y |
94 | CONFIG_FEC_MXC=y | 94 | CONFIG_FEC_MXC=y |
95 | CONFIG_MII=y | 95 | CONFIG_MII=y |
96 | CONFIG_PINCTRL=y | 96 | CONFIG_PINCTRL=y |
97 | CONFIG_PINCTRL_IMX8M=y | 97 | CONFIG_PINCTRL_IMX8M=y |
98 | CONFIG_POWER_DOMAIN=y | 98 | CONFIG_POWER_DOMAIN=y |
99 | CONFIG_IMX8M_POWER_DOMAIN=y | 99 | CONFIG_IMX8M_POWER_DOMAIN=y |
100 | CONFIG_DM_REGULATOR=y | 100 | CONFIG_DM_REGULATOR=y |
101 | CONFIG_DM_REGULATOR_FIXED=y | 101 | CONFIG_DM_REGULATOR_FIXED=y |
102 | CONFIG_DM_REGULATOR_GPIO=y | 102 | CONFIG_DM_REGULATOR_GPIO=y |
103 | CONFIG_MXC_UART=y | 103 | CONFIG_MXC_UART=y |
104 | CONFIG_SYSRESET=y | 104 | CONFIG_SYSRESET=y |
105 | CONFIG_SYSRESET_PSCI=y | 105 | CONFIG_SYSRESET_PSCI=y |
106 | CONFIG_DM_THERMAL=y | 106 | CONFIG_DM_THERMAL=y |
107 | CONFIG_NXP_TMU=y | 107 | CONFIG_NXP_TMU=y |
108 | CONFIG_USB=y | 108 | CONFIG_USB=y |
109 | CONFIG_DM_USB=y | 109 | CONFIG_DM_USB=y |
110 | CONFIG_USB_GADGET=y | 110 | CONFIG_USB_GADGET=y |
111 | CONFIG_FASTBOOT=y | 111 | CONFIG_FASTBOOT=y |
112 | CONFIG_USB_FUNCTION_FASTBOOT=y | 112 | CONFIG_USB_FUNCTION_FASTBOOT=y |
113 | CONFIG_CMD_FASTBOOT=y | 113 | CONFIG_CMD_FASTBOOT=y |
114 | CONFIG_ANDROID_BOOT_IMAGE=y | 114 | CONFIG_ANDROID_BOOT_IMAGE=y |
115 | CONFIG_FASTBOOT_UUU_SUPPORT=n | 115 | CONFIG_FASTBOOT_UUU_SUPPORT=n |
116 | CONFIG_FASTBOOT_BUF_ADDR=0x44800000 | 116 | CONFIG_FASTBOOT_BUF_ADDR=0x44800000 |
117 | CONFIG_FASTBOOT_BUF_SIZE=0x19000000 | 117 | CONFIG_FASTBOOT_BUF_SIZE=0x19000000 |
118 | CONFIG_FASTBOOT_FLASH=y | 118 | CONFIG_FASTBOOT_FLASH=y |
119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | 119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 |
120 | CONFIG_EFI_PARTITION=y | 120 | CONFIG_EFI_PARTITION=y |
121 | CONFIG_SDP_LOADADDR=0x40400000 | 121 | CONFIG_SDP_LOADADDR=0x40400000 |
122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 | 122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 |
123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 | 123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 |
124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" | 124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" |
125 | CONFIG_USB_GADGET_DOWNLOAD=y | 125 | CONFIG_USB_GADGET_DOWNLOAD=y |
126 | CONFIG_SPL_USB_GADGET=y | 126 | CONFIG_SPL_USB_GADGET=y |
127 | CONFIG_SPL_USB_SDP_SUPPORT=y | 127 | CONFIG_SPL_USB_SDP_SUPPORT=y |
128 | CONFIG_USB_XHCI_HCD=y | 128 | CONFIG_USB_XHCI_HCD=y |
129 | CONFIG_USB_XHCI_IMX8M=y | 129 | CONFIG_USB_XHCI_IMX8M=y |
130 | CONFIG_USB_XHCI_DWC3=y | 130 | CONFIG_USB_XHCI_DWC3=y |
131 | CONFIG_USB_DWC3=y | 131 | CONFIG_USB_DWC3=y |
132 | CONFIG_USB_DWC3_GADGET=y | 132 | CONFIG_USB_DWC3_GADGET=y |
133 | CONFIG_OF_LIBFDT_OVERLAY=y | 133 | CONFIG_OF_LIBFDT_OVERLAY=y |
134 | 134 | ||
135 | CONFIG_VIDEO_IMX8M_DCSS=y | 135 | CONFIG_VIDEO_IMX8M_DCSS=y |
136 | CONFIG_VIDEO_IMX8M_HDMI=y | 136 | CONFIG_VIDEO_IMX8M_HDMI=y |
137 | CONFIG_DM_VIDEO=y | 137 | CONFIG_DM_VIDEO=y |
138 | CONFIG_SYS_WHITE_ON_BLACK=y | 138 | CONFIG_SYS_WHITE_ON_BLACK=y |
139 | 139 | ||
140 | CONFIG_LZ4=y | 140 | CONFIG_LZ4=y |
141 | CONFIG_BCB_SUPPORT=y | 141 | CONFIG_BCB_SUPPORT=y |
142 | CONFIG_ANDROID_RECOVERY=y | 142 | CONFIG_ANDROID_RECOVERY=y |
143 | CONFIG_SUPPORT_RAW_INITRD=y | 143 | CONFIG_SUPPORT_RAW_INITRD=y |
144 | CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y | 144 | CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y |
145 | CONFIG_FSL_FASTBOOT=y | 145 | CONFIG_FSL_FASTBOOT=y |
146 | CONFIG_FASTBOOT_LOCK=y | 146 | CONFIG_FASTBOOT_LOCK=y |
147 | CONFIG_CMD_BOOTA=y | 147 | CONFIG_CMD_BOOTA=y |
148 | CONFIG_LIBAVB=y | 148 | CONFIG_LIBAVB=y |
149 | CONFIG_AVB_SUPPORT=y | 149 | CONFIG_AVB_SUPPORT=y |
150 | CONFIG_APPEND_BOOTARGS=y | 150 | CONFIG_APPEND_BOOTARGS=y |
151 | CONFIG_AVB_WARNING_LOGO=y | 151 | CONFIG_AVB_WARNING_LOGO=y |
152 | CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 | 152 | CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 |
153 | CONFIG_AVB_WARNING_LOGO_ROWS=0x60 | 153 | CONFIG_AVB_WARNING_LOGO_ROWS=0x60 |
154 | 154 |
configs/smarcimx8mq_2g_ser3_defconfig
1 | CONFIG_ARM=y | 1 | CONFIG_ARM=y |
2 | CONFIG_SPL_SYS_ICACHE_OFF=y | 2 | CONFIG_SPL_SYS_ICACHE_OFF=y |
3 | CONFIG_SPL_SYS_DCACHE_OFF=y | 3 | CONFIG_SPL_SYS_DCACHE_OFF=y |
4 | CONFIG_ARCH_IMX8M=y | 4 | CONFIG_ARCH_IMX8M=y |
5 | CONFIG_SYS_TEXT_BASE=0x40200000 | 5 | CONFIG_SYS_TEXT_BASE=0x40200000 |
6 | CONFIG_SPL_GPIO_SUPPORT=y | 6 | CONFIG_SPL_GPIO_SUPPORT=y |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | 9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
10 | CONFIG_SYS_I2C_MXC_I2C1=y | 10 | CONFIG_SYS_I2C_MXC_I2C1=y |
11 | CONFIG_SYS_I2C_MXC_I2C2=y | 11 | CONFIG_SYS_I2C_MXC_I2C2=y |
12 | CONFIG_SYS_I2C_MXC_I2C3=y | 12 | CONFIG_SYS_I2C_MXC_I2C3=y |
13 | CONFIG_SYS_I2C_MXC_I2C4=y | 13 | CONFIG_SYS_I2C_MXC_I2C4=y |
14 | CONFIG_ENV_SIZE=0x1000 | 14 | CONFIG_ENV_SIZE=0x1000 |
15 | CONFIG_ENV_OFFSET=0x400000 | 15 | CONFIG_ENV_OFFSET=0x400000 |
16 | CONFIG_DM_GPIO=y | 16 | CONFIG_DM_GPIO=y |
17 | CONFIG_BOOTDELAY=1 | 17 | CONFIG_BOOTDELAY=1 |
18 | CONFIG_TARGET_SMARCIMX8MQ=y | 18 | CONFIG_TARGET_SMARCIMX8MQ=y |
19 | CONFIG_ARCH_MISC_INIT=y | 19 | CONFIG_ARCH_MISC_INIT=y |
20 | CONFIG_SPL_MMC_SUPPORT=y | 20 | CONFIG_SPL_MMC_SUPPORT=y |
21 | CONFIG_SPL_SERIAL_SUPPORT=y | 21 | CONFIG_SPL_SERIAL_SUPPORT=y |
22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y | 22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y |
23 | CONFIG_SPL=y | 23 | CONFIG_SPL=y |
24 | CONFIG_CSF_SIZE=0x2000 | 24 | CONFIG_CSF_SIZE=0x2000 |
25 | CONFIG_SPL_TEXT_BASE=0x7E1000 | 25 | CONFIG_SPL_TEXT_BASE=0x7E1000 |
26 | CONFIG_FIT=y | 26 | CONFIG_FIT=y |
27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | 27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
28 | CONFIG_SPL_LOAD_FIT=y | 28 | CONFIG_SPL_LOAD_FIT=y |
29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" | 29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" |
30 | CONFIG_OF_SYSTEM_SETUP=y | 30 | CONFIG_OF_SYSTEM_SETUP=y |
31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,2GB_LPDDR4" | 31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,2GB_LPDDR4" |
32 | CONFIG_CONSOLE_SER3=y | 32 | CONFIG_CONSOLE_SER3=y |
33 | CONFIG_BOARD_LATE_INIT=y | 33 | CONFIG_BOARD_LATE_INIT=y |
34 | CONFIG_BOARD_EARLY_INIT_F=y | 34 | CONFIG_BOARD_EARLY_INIT_F=y |
35 | CONFIG_SPL_BOARD_INIT=y | 35 | CONFIG_SPL_BOARD_INIT=y |
36 | CONFIG_SPL_SEPARATE_BSS=y | 36 | CONFIG_SPL_SEPARATE_BSS=y |
37 | CONFIG_SPL_I2C_SUPPORT=y | 37 | CONFIG_SPL_I2C_SUPPORT=y |
38 | CONFIG_SPL_POWER_SUPPORT=y | 38 | CONFIG_SPL_POWER_SUPPORT=y |
39 | CONFIG_HUSH_PARSER=y | 39 | CONFIG_HUSH_PARSER=y |
40 | CONFIG_SYS_PROMPT="u-boot$ " | 40 | CONFIG_SYS_PROMPT="u-boot$ " |
41 | # CONFIG_CMD_EXPORTENV is not set | 41 | # CONFIG_CMD_EXPORTENV is not set |
42 | CONFIG_CMD_IMPORTENV=y | 42 | CONFIG_CMD_IMPORTENV=y |
43 | # CONFIG_CMD_CRC32 is not set | 43 | # CONFIG_CMD_CRC32 is not set |
44 | # CONFIG_BOOTM_NETBSD is not set | 44 | # CONFIG_BOOTM_NETBSD is not set |
45 | CONFIG_CMD_FUSE=y | 45 | CONFIG_CMD_FUSE=y |
46 | CONFIG_CMD_GPIO=y | 46 | CONFIG_CMD_GPIO=y |
47 | CONFIG_CMD_I2C=y | 47 | CONFIG_CMD_I2C=y |
48 | CONFIG_CMD_MMC=y | 48 | CONFIG_CMD_MMC=y |
49 | CONFIG_CMD_DHCP=y | 49 | CONFIG_CMD_DHCP=y |
50 | CONFIG_CMD_MII=y | 50 | CONFIG_CMD_MII=y |
51 | CONFIG_CMD_PING=y | 51 | CONFIG_CMD_PING=y |
52 | CONFIG_CMD_CACHE=y | 52 | CONFIG_CMD_CACHE=y |
53 | CONFIG_CMD_REGULATOR=y | 53 | CONFIG_CMD_REGULATOR=y |
54 | CONFIG_CMD_MEMTEST=y | 54 | CONFIG_CMD_MEMTEST=y |
55 | CONFIG_CMD_EXT2=y | 55 | CONFIG_CMD_EXT2=y |
56 | CONFIG_CMD_EXT4=y | 56 | CONFIG_CMD_EXT4=y |
57 | CONFIG_CMD_EXT4_WRITE=y | 57 | CONFIG_CMD_EXT4_WRITE=y |
58 | CONFIG_CMD_FAT=y | 58 | CONFIG_CMD_FAT=y |
59 | CONFIG_CMD_SF=y | 59 | CONFIG_CMD_SF=y |
60 | CONFIG_OF_CONTROL=y | 60 | CONFIG_OF_CONTROL=y |
61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" | 61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" |
62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" | 62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" |
63 | CONFIG_ENV_IS_IN_MMC=y | 63 | CONFIG_ENV_IS_IN_MMC=y |
64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 | 64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 |
65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | 65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | 66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
67 | CONFIG_MXC_GPIO=y | 67 | CONFIG_MXC_GPIO=y |
68 | CONFIG_DM_I2C=y | 68 | CONFIG_DM_I2C=y |
69 | CONFIG_CMD_GPT=y | 69 | CONFIG_CMD_GPT=y |
70 | CONFIG_CMD_TIME=y | 70 | CONFIG_CMD_TIME=y |
71 | CONFIG_SYS_I2C_MXC=y | 71 | CONFIG_SYS_I2C_MXC=y |
72 | CONFIG_DM_MMC=y | 72 | CONFIG_DM_MMC=y |
73 | CONFIG_SUPPORT_EMMC_BOOT=y | 73 | CONFIG_SUPPORT_EMMC_BOOT=y |
74 | CONFIG_FSL_USDHC=y | 74 | CONFIG_FSL_USDHC=y |
75 | CONFIG_DM_SPI_FLASH=y | 75 | CONFIG_DM_SPI_FLASH=y |
76 | CONFIG_DM_SPI=y | 76 | CONFIG_DM_SPI=y |
77 | CONFIG_FSL_QSPI=y | 77 | CONFIG_FSL_QSPI=y |
78 | CONFIG_SPI=y | 78 | CONFIG_SPI=y |
79 | CONFIG_SPI_FLASH=y | 79 | CONFIG_SPI_FLASH=y |
80 | CONFIG_SPI_FLASH_BAR=y | 80 | CONFIG_SPI_FLASH_BAR=y |
81 | CONFIG_SPI_FLASH_MACRONIX=y | 81 | CONFIG_SPI_FLASH_MACRONIX=y |
82 | CONFIG_SF_DEFAULT_BUS=0 | 82 | CONFIG_SF_DEFAULT_BUS=0 |
83 | CONFIG_SF_DEFAULT_CS=0 | 83 | CONFIG_SF_DEFAULT_CS=0 |
84 | CONFIG_SF_DEFAULT_SPEED=40000000 | 84 | CONFIG_SF_DEFAULT_SPEED=40000000 |
85 | CONFIG_SF_DEFAULT_MODE=0 | 85 | CONFIG_SF_DEFAULT_MODE=0 |
86 | 86 | ||
87 | CONFIG_PHYLIB=y | 87 | CONFIG_PHYLIB=y |
88 | CONFIG_PHY_ATHEROS=y | 88 | CONFIG_PHY_REALTEK=y |
89 | #CONFIG_MMC_IO_VOLTAGE=y | 89 | #CONFIG_MMC_IO_VOLTAGE=y |
90 | #CONFIG_MMC_UHS_SUPPORT=y | 90 | #CONFIG_MMC_UHS_SUPPORT=y |
91 | #CONFIG_MMC_HS400_SUPPORT=y | 91 | #CONFIG_MMC_HS400_SUPPORT=y |
92 | CONFIG_DM_ETH=y | 92 | CONFIG_DM_ETH=y |
93 | CONFIG_PHY_GIGE=y | 93 | CONFIG_PHY_GIGE=y |
94 | CONFIG_FEC_MXC=y | 94 | CONFIG_FEC_MXC=y |
95 | CONFIG_MII=y | 95 | CONFIG_MII=y |
96 | CONFIG_PINCTRL=y | 96 | CONFIG_PINCTRL=y |
97 | CONFIG_PINCTRL_IMX8M=y | 97 | CONFIG_PINCTRL_IMX8M=y |
98 | CONFIG_POWER_DOMAIN=y | 98 | CONFIG_POWER_DOMAIN=y |
99 | CONFIG_IMX8M_POWER_DOMAIN=y | 99 | CONFIG_IMX8M_POWER_DOMAIN=y |
100 | CONFIG_DM_REGULATOR=y | 100 | CONFIG_DM_REGULATOR=y |
101 | CONFIG_DM_REGULATOR_FIXED=y | 101 | CONFIG_DM_REGULATOR_FIXED=y |
102 | CONFIG_DM_REGULATOR_GPIO=y | 102 | CONFIG_DM_REGULATOR_GPIO=y |
103 | CONFIG_MXC_UART=y | 103 | CONFIG_MXC_UART=y |
104 | CONFIG_SYSRESET=y | 104 | CONFIG_SYSRESET=y |
105 | CONFIG_SYSRESET_PSCI=y | 105 | CONFIG_SYSRESET_PSCI=y |
106 | CONFIG_DM_THERMAL=y | 106 | CONFIG_DM_THERMAL=y |
107 | CONFIG_NXP_TMU=y | 107 | CONFIG_NXP_TMU=y |
108 | CONFIG_USB=y | 108 | CONFIG_USB=y |
109 | CONFIG_DM_USB=y | 109 | CONFIG_DM_USB=y |
110 | CONFIG_USB_GADGET=y | 110 | CONFIG_USB_GADGET=y |
111 | CONFIG_FASTBOOT=y | 111 | CONFIG_FASTBOOT=y |
112 | CONFIG_USB_FUNCTION_FASTBOOT=y | 112 | CONFIG_USB_FUNCTION_FASTBOOT=y |
113 | CONFIG_CMD_FASTBOOT=y | 113 | CONFIG_CMD_FASTBOOT=y |
114 | CONFIG_ANDROID_BOOT_IMAGE=y | 114 | CONFIG_ANDROID_BOOT_IMAGE=y |
115 | CONFIG_FASTBOOT_UUU_SUPPORT=y | 115 | CONFIG_FASTBOOT_UUU_SUPPORT=y |
116 | CONFIG_FASTBOOT_BUF_ADDR=0x42800000 | 116 | CONFIG_FASTBOOT_BUF_ADDR=0x42800000 |
117 | CONFIG_FASTBOOT_BUF_SIZE=0x40000000 | 117 | CONFIG_FASTBOOT_BUF_SIZE=0x40000000 |
118 | CONFIG_FASTBOOT_FLASH=y | 118 | CONFIG_FASTBOOT_FLASH=y |
119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | 119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 |
120 | CONFIG_EFI_PARTITION=y | 120 | CONFIG_EFI_PARTITION=y |
121 | CONFIG_SDP_LOADADDR=0x40400000 | 121 | CONFIG_SDP_LOADADDR=0x40400000 |
122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 | 122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 |
123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 | 123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 |
124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" | 124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" |
125 | CONFIG_USB_GADGET_DOWNLOAD=y | 125 | CONFIG_USB_GADGET_DOWNLOAD=y |
126 | CONFIG_SPL_USB_GADGET=y | 126 | CONFIG_SPL_USB_GADGET=y |
127 | CONFIG_SPL_USB_SDP_SUPPORT=y | 127 | CONFIG_SPL_USB_SDP_SUPPORT=y |
128 | CONFIG_USB_XHCI_HCD=y | 128 | CONFIG_USB_XHCI_HCD=y |
129 | CONFIG_USB_XHCI_IMX8M=y | 129 | CONFIG_USB_XHCI_IMX8M=y |
130 | CONFIG_USB_XHCI_DWC3=y | 130 | CONFIG_USB_XHCI_DWC3=y |
131 | CONFIG_USB_DWC3=y | 131 | CONFIG_USB_DWC3=y |
132 | CONFIG_USB_DWC3_GADGET=y | 132 | CONFIG_USB_DWC3_GADGET=y |
133 | CONFIG_OF_LIBFDT_OVERLAY=y | 133 | CONFIG_OF_LIBFDT_OVERLAY=y |
134 | 134 | ||
135 | CONFIG_VIDEO_IMX8M_DCSS=y | 135 | CONFIG_VIDEO_IMX8M_DCSS=y |
136 | CONFIG_VIDEO_IMX8M_HDMI=y | 136 | CONFIG_VIDEO_IMX8M_HDMI=y |
137 | CONFIG_DM_VIDEO=y | 137 | CONFIG_DM_VIDEO=y |
138 | CONFIG_SYS_WHITE_ON_BLACK=y | 138 | CONFIG_SYS_WHITE_ON_BLACK=y |
139 | 139 |
configs/smarcimx8mq_4g_ser0_android_defconfig
1 | CONFIG_ARM=y | 1 | CONFIG_ARM=y |
2 | CONFIG_SPL_SYS_ICACHE_OFF=y | 2 | CONFIG_SPL_SYS_ICACHE_OFF=y |
3 | CONFIG_SPL_SYS_DCACHE_OFF=y | 3 | CONFIG_SPL_SYS_DCACHE_OFF=y |
4 | CONFIG_ARCH_IMX8M=y | 4 | CONFIG_ARCH_IMX8M=y |
5 | CONFIG_SYS_TEXT_BASE=0x40200000 | 5 | CONFIG_SYS_TEXT_BASE=0x40200000 |
6 | CONFIG_SPL_GPIO_SUPPORT=y | 6 | CONFIG_SPL_GPIO_SUPPORT=y |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | 9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
10 | CONFIG_SYS_I2C_MXC_I2C1=y | 10 | CONFIG_SYS_I2C_MXC_I2C1=y |
11 | CONFIG_SYS_I2C_MXC_I2C2=y | 11 | CONFIG_SYS_I2C_MXC_I2C2=y |
12 | CONFIG_SYS_I2C_MXC_I2C3=y | 12 | CONFIG_SYS_I2C_MXC_I2C3=y |
13 | CONFIG_SYS_I2C_MXC_I2C4=y | 13 | CONFIG_SYS_I2C_MXC_I2C4=y |
14 | CONFIG_ENV_SIZE=0x1000 | 14 | CONFIG_ENV_SIZE=0x1000 |
15 | CONFIG_ENV_OFFSET=0x400000 | 15 | CONFIG_ENV_OFFSET=0x400000 |
16 | CONFIG_DM_GPIO=y | 16 | CONFIG_DM_GPIO=y |
17 | CONFIG_BOOTDELAY=1 | 17 | CONFIG_BOOTDELAY=1 |
18 | CONFIG_TARGET_SMARCIMX8MQ=y | 18 | CONFIG_TARGET_SMARCIMX8MQ=y |
19 | CONFIG_ARCH_MISC_INIT=y | 19 | CONFIG_ARCH_MISC_INIT=y |
20 | CONFIG_SPL_MMC_SUPPORT=y | 20 | CONFIG_SPL_MMC_SUPPORT=y |
21 | CONFIG_SPL_SERIAL_SUPPORT=y | 21 | CONFIG_SPL_SERIAL_SUPPORT=y |
22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y | 22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y |
23 | CONFIG_SPL=y | 23 | CONFIG_SPL=y |
24 | CONFIG_CSF_SIZE=0x2000 | 24 | CONFIG_CSF_SIZE=0x2000 |
25 | CONFIG_SPL_TEXT_BASE=0x7E1000 | 25 | CONFIG_SPL_TEXT_BASE=0x7E1000 |
26 | CONFIG_FIT=y | 26 | CONFIG_FIT=y |
27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | 27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
28 | CONFIG_SPL_LOAD_FIT=y | 28 | CONFIG_SPL_LOAD_FIT=y |
29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" | 29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" |
30 | CONFIG_OF_SYSTEM_SETUP=y | 30 | CONFIG_OF_SYSTEM_SETUP=y |
31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,4GB_LPDDR4,ANDROID_SUPPORT" | 31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,4GB_LPDDR4,ANDROID_SUPPORT" |
32 | CONFIG_CONSOLE_SER0=y | 32 | CONFIG_CONSOLE_SER0=y |
33 | CONFIG_BOARD_LATE_INIT=y | 33 | CONFIG_BOARD_LATE_INIT=y |
34 | CONFIG_BOARD_EARLY_INIT_F=y | 34 | CONFIG_BOARD_EARLY_INIT_F=y |
35 | CONFIG_SPL_BOARD_INIT=y | 35 | CONFIG_SPL_BOARD_INIT=y |
36 | CONFIG_SPL_SEPARATE_BSS=y | 36 | CONFIG_SPL_SEPARATE_BSS=y |
37 | CONFIG_SPL_I2C_SUPPORT=y | 37 | CONFIG_SPL_I2C_SUPPORT=y |
38 | CONFIG_SPL_POWER_SUPPORT=y | 38 | CONFIG_SPL_POWER_SUPPORT=y |
39 | CONFIG_HUSH_PARSER=y | 39 | CONFIG_HUSH_PARSER=y |
40 | CONFIG_SYS_PROMPT="u-boot$ " | 40 | CONFIG_SYS_PROMPT="u-boot$ " |
41 | # CONFIG_CMD_EXPORTENV is not set | 41 | # CONFIG_CMD_EXPORTENV is not set |
42 | CONFIG_CMD_IMPORTENV=y | 42 | CONFIG_CMD_IMPORTENV=y |
43 | # CONFIG_CMD_CRC32 is not set | 43 | # CONFIG_CMD_CRC32 is not set |
44 | # CONFIG_BOOTM_NETBSD is not set | 44 | # CONFIG_BOOTM_NETBSD is not set |
45 | CONFIG_CMD_FUSE=y | 45 | CONFIG_CMD_FUSE=y |
46 | CONFIG_CMD_GPIO=y | 46 | CONFIG_CMD_GPIO=y |
47 | CONFIG_CMD_I2C=y | 47 | CONFIG_CMD_I2C=y |
48 | CONFIG_CMD_MMC=y | 48 | CONFIG_CMD_MMC=y |
49 | CONFIG_CMD_DHCP=y | 49 | CONFIG_CMD_DHCP=y |
50 | CONFIG_CMD_MII=y | 50 | CONFIG_CMD_MII=y |
51 | CONFIG_CMD_PING=y | 51 | CONFIG_CMD_PING=y |
52 | CONFIG_CMD_CACHE=y | 52 | CONFIG_CMD_CACHE=y |
53 | CONFIG_CMD_REGULATOR=y | 53 | CONFIG_CMD_REGULATOR=y |
54 | CONFIG_CMD_MEMTEST=y | 54 | CONFIG_CMD_MEMTEST=y |
55 | CONFIG_CMD_EXT2=y | 55 | CONFIG_CMD_EXT2=y |
56 | CONFIG_CMD_EXT4=y | 56 | CONFIG_CMD_EXT4=y |
57 | CONFIG_CMD_EXT4_WRITE=y | 57 | CONFIG_CMD_EXT4_WRITE=y |
58 | CONFIG_CMD_FAT=y | 58 | CONFIG_CMD_FAT=y |
59 | CONFIG_CMD_SF=y | 59 | CONFIG_CMD_SF=y |
60 | CONFIG_OF_CONTROL=y | 60 | CONFIG_OF_CONTROL=y |
61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" | 61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" |
62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" | 62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" |
63 | CONFIG_ENV_IS_IN_MMC=y | 63 | CONFIG_ENV_IS_IN_MMC=y |
64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 | 64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 |
65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | 65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | 66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
67 | CONFIG_MXC_GPIO=y | 67 | CONFIG_MXC_GPIO=y |
68 | CONFIG_DM_I2C=y | 68 | CONFIG_DM_I2C=y |
69 | CONFIG_CMD_GPT=y | 69 | CONFIG_CMD_GPT=y |
70 | CONFIG_CMD_TIME=y | 70 | CONFIG_CMD_TIME=y |
71 | CONFIG_SYS_I2C_MXC=y | 71 | CONFIG_SYS_I2C_MXC=y |
72 | CONFIG_DM_MMC=y | 72 | CONFIG_DM_MMC=y |
73 | CONFIG_SUPPORT_EMMC_BOOT=y | 73 | CONFIG_SUPPORT_EMMC_BOOT=y |
74 | CONFIG_FSL_USDHC=y | 74 | CONFIG_FSL_USDHC=y |
75 | CONFIG_DM_SPI_FLASH=y | 75 | CONFIG_DM_SPI_FLASH=y |
76 | CONFIG_DM_SPI=y | 76 | CONFIG_DM_SPI=y |
77 | CONFIG_FSL_QSPI=y | 77 | CONFIG_FSL_QSPI=y |
78 | CONFIG_SPI=y | 78 | CONFIG_SPI=y |
79 | CONFIG_SPI_FLASH=y | 79 | CONFIG_SPI_FLASH=y |
80 | CONFIG_SPI_FLASH_BAR=y | 80 | CONFIG_SPI_FLASH_BAR=y |
81 | CONFIG_SPI_FLASH_MACRONIX=y | 81 | CONFIG_SPI_FLASH_MACRONIX=y |
82 | CONFIG_SF_DEFAULT_BUS=0 | 82 | CONFIG_SF_DEFAULT_BUS=0 |
83 | CONFIG_SF_DEFAULT_CS=0 | 83 | CONFIG_SF_DEFAULT_CS=0 |
84 | CONFIG_SF_DEFAULT_SPEED=40000000 | 84 | CONFIG_SF_DEFAULT_SPEED=40000000 |
85 | CONFIG_SF_DEFAULT_MODE=0 | 85 | CONFIG_SF_DEFAULT_MODE=0 |
86 | 86 | ||
87 | CONFIG_PHYLIB=y | 87 | CONFIG_PHYLIB=y |
88 | CONFIG_PHY_ATHEROS=y | 88 | CONFIG_PHY_REALTEK=y |
89 | #CONFIG_MMC_IO_VOLTAGE=y | 89 | #CONFIG_MMC_IO_VOLTAGE=y |
90 | #CONFIG_MMC_UHS_SUPPORT=y | 90 | #CONFIG_MMC_UHS_SUPPORT=y |
91 | #CONFIG_MMC_HS400_SUPPORT=y | 91 | #CONFIG_MMC_HS400_SUPPORT=y |
92 | CONFIG_DM_ETH=y | 92 | CONFIG_DM_ETH=y |
93 | CONFIG_PHY_GIGE=y | 93 | CONFIG_PHY_GIGE=y |
94 | CONFIG_FEC_MXC=y | 94 | CONFIG_FEC_MXC=y |
95 | CONFIG_MII=y | 95 | CONFIG_MII=y |
96 | CONFIG_PINCTRL=y | 96 | CONFIG_PINCTRL=y |
97 | CONFIG_PINCTRL_IMX8M=y | 97 | CONFIG_PINCTRL_IMX8M=y |
98 | CONFIG_POWER_DOMAIN=y | 98 | CONFIG_POWER_DOMAIN=y |
99 | CONFIG_IMX8M_POWER_DOMAIN=y | 99 | CONFIG_IMX8M_POWER_DOMAIN=y |
100 | CONFIG_DM_REGULATOR=y | 100 | CONFIG_DM_REGULATOR=y |
101 | CONFIG_DM_REGULATOR_FIXED=y | 101 | CONFIG_DM_REGULATOR_FIXED=y |
102 | CONFIG_DM_REGULATOR_GPIO=y | 102 | CONFIG_DM_REGULATOR_GPIO=y |
103 | CONFIG_MXC_UART=y | 103 | CONFIG_MXC_UART=y |
104 | CONFIG_SYSRESET=y | 104 | CONFIG_SYSRESET=y |
105 | CONFIG_SYSRESET_PSCI=y | 105 | CONFIG_SYSRESET_PSCI=y |
106 | CONFIG_DM_THERMAL=y | 106 | CONFIG_DM_THERMAL=y |
107 | CONFIG_NXP_TMU=y | 107 | CONFIG_NXP_TMU=y |
108 | CONFIG_USB=y | 108 | CONFIG_USB=y |
109 | CONFIG_DM_USB=y | 109 | CONFIG_DM_USB=y |
110 | CONFIG_USB_GADGET=y | 110 | CONFIG_USB_GADGET=y |
111 | CONFIG_FASTBOOT=y | 111 | CONFIG_FASTBOOT=y |
112 | CONFIG_USB_FUNCTION_FASTBOOT=y | 112 | CONFIG_USB_FUNCTION_FASTBOOT=y |
113 | CONFIG_CMD_FASTBOOT=y | 113 | CONFIG_CMD_FASTBOOT=y |
114 | CONFIG_ANDROID_BOOT_IMAGE=y | 114 | CONFIG_ANDROID_BOOT_IMAGE=y |
115 | CONFIG_FASTBOOT_UUU_SUPPORT=n | 115 | CONFIG_FASTBOOT_UUU_SUPPORT=n |
116 | CONFIG_FASTBOOT_BUF_ADDR=0x44800000 | 116 | CONFIG_FASTBOOT_BUF_ADDR=0x44800000 |
117 | CONFIG_FASTBOOT_BUF_SIZE=0x19000000 | 117 | CONFIG_FASTBOOT_BUF_SIZE=0x19000000 |
118 | CONFIG_FASTBOOT_FLASH=y | 118 | CONFIG_FASTBOOT_FLASH=y |
119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | 119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 |
120 | CONFIG_EFI_PARTITION=y | 120 | CONFIG_EFI_PARTITION=y |
121 | CONFIG_SDP_LOADADDR=0x40400000 | 121 | CONFIG_SDP_LOADADDR=0x40400000 |
122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 | 122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 |
123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 | 123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 |
124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" | 124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" |
125 | CONFIG_USB_GADGET_DOWNLOAD=y | 125 | CONFIG_USB_GADGET_DOWNLOAD=y |
126 | CONFIG_SPL_USB_GADGET=y | 126 | CONFIG_SPL_USB_GADGET=y |
127 | CONFIG_SPL_USB_SDP_SUPPORT=y | 127 | CONFIG_SPL_USB_SDP_SUPPORT=y |
128 | CONFIG_USB_XHCI_HCD=y | 128 | CONFIG_USB_XHCI_HCD=y |
129 | CONFIG_USB_XHCI_IMX8M=y | 129 | CONFIG_USB_XHCI_IMX8M=y |
130 | CONFIG_USB_XHCI_DWC3=y | 130 | CONFIG_USB_XHCI_DWC3=y |
131 | CONFIG_USB_DWC3=y | 131 | CONFIG_USB_DWC3=y |
132 | CONFIG_USB_DWC3_GADGET=y | 132 | CONFIG_USB_DWC3_GADGET=y |
133 | CONFIG_OF_LIBFDT_OVERLAY=y | 133 | CONFIG_OF_LIBFDT_OVERLAY=y |
134 | 134 | ||
135 | CONFIG_VIDEO_IMX8M_DCSS=y | 135 | CONFIG_VIDEO_IMX8M_DCSS=y |
136 | CONFIG_VIDEO_IMX8M_HDMI=y | 136 | CONFIG_VIDEO_IMX8M_HDMI=y |
137 | CONFIG_DM_VIDEO=y | 137 | CONFIG_DM_VIDEO=y |
138 | CONFIG_SYS_WHITE_ON_BLACK=y | 138 | CONFIG_SYS_WHITE_ON_BLACK=y |
139 | 139 | ||
140 | CONFIG_LZ4=y | 140 | CONFIG_LZ4=y |
141 | CONFIG_BCB_SUPPORT=y | 141 | CONFIG_BCB_SUPPORT=y |
142 | CONFIG_ANDROID_RECOVERY=y | 142 | CONFIG_ANDROID_RECOVERY=y |
143 | CONFIG_SUPPORT_RAW_INITRD=y | 143 | CONFIG_SUPPORT_RAW_INITRD=y |
144 | CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y | 144 | CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y |
145 | CONFIG_FSL_FASTBOOT=y | 145 | CONFIG_FSL_FASTBOOT=y |
146 | CONFIG_FASTBOOT_LOCK=y | 146 | CONFIG_FASTBOOT_LOCK=y |
147 | CONFIG_CMD_BOOTA=y | 147 | CONFIG_CMD_BOOTA=y |
148 | CONFIG_LIBAVB=y | 148 | CONFIG_LIBAVB=y |
149 | CONFIG_AVB_SUPPORT=y | 149 | CONFIG_AVB_SUPPORT=y |
150 | CONFIG_APPEND_BOOTARGS=y | 150 | CONFIG_APPEND_BOOTARGS=y |
151 | CONFIG_AVB_WARNING_LOGO=y | 151 | CONFIG_AVB_WARNING_LOGO=y |
152 | CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 | 152 | CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 |
153 | CONFIG_AVB_WARNING_LOGO_ROWS=0x60 | 153 | CONFIG_AVB_WARNING_LOGO_ROWS=0x60 |
154 | 154 |
configs/smarcimx8mq_4g_ser0_defconfig
1 | CONFIG_ARM=y | 1 | CONFIG_ARM=y |
2 | CONFIG_SPL_SYS_ICACHE_OFF=y | 2 | CONFIG_SPL_SYS_ICACHE_OFF=y |
3 | CONFIG_SPL_SYS_DCACHE_OFF=y | 3 | CONFIG_SPL_SYS_DCACHE_OFF=y |
4 | CONFIG_ARCH_IMX8M=y | 4 | CONFIG_ARCH_IMX8M=y |
5 | CONFIG_SYS_TEXT_BASE=0x40200000 | 5 | CONFIG_SYS_TEXT_BASE=0x40200000 |
6 | CONFIG_SPL_GPIO_SUPPORT=y | 6 | CONFIG_SPL_GPIO_SUPPORT=y |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | 9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
10 | CONFIG_SYS_I2C_MXC_I2C1=y | 10 | CONFIG_SYS_I2C_MXC_I2C1=y |
11 | CONFIG_SYS_I2C_MXC_I2C2=y | 11 | CONFIG_SYS_I2C_MXC_I2C2=y |
12 | CONFIG_SYS_I2C_MXC_I2C3=y | 12 | CONFIG_SYS_I2C_MXC_I2C3=y |
13 | CONFIG_SYS_I2C_MXC_I2C4=y | 13 | CONFIG_SYS_I2C_MXC_I2C4=y |
14 | CONFIG_ENV_SIZE=0x1000 | 14 | CONFIG_ENV_SIZE=0x1000 |
15 | CONFIG_ENV_OFFSET=0x400000 | 15 | CONFIG_ENV_OFFSET=0x400000 |
16 | CONFIG_DM_GPIO=y | 16 | CONFIG_DM_GPIO=y |
17 | CONFIG_BOOTDELAY=1 | 17 | CONFIG_BOOTDELAY=1 |
18 | CONFIG_TARGET_SMARCIMX8MQ=y | 18 | CONFIG_TARGET_SMARCIMX8MQ=y |
19 | CONFIG_ARCH_MISC_INIT=y | 19 | CONFIG_ARCH_MISC_INIT=y |
20 | CONFIG_SPL_MMC_SUPPORT=y | 20 | CONFIG_SPL_MMC_SUPPORT=y |
21 | CONFIG_SPL_SERIAL_SUPPORT=y | 21 | CONFIG_SPL_SERIAL_SUPPORT=y |
22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y | 22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y |
23 | CONFIG_SPL=y | 23 | CONFIG_SPL=y |
24 | CONFIG_CSF_SIZE=0x2000 | 24 | CONFIG_CSF_SIZE=0x2000 |
25 | CONFIG_SPL_TEXT_BASE=0x7E1000 | 25 | CONFIG_SPL_TEXT_BASE=0x7E1000 |
26 | CONFIG_FIT=y | 26 | CONFIG_FIT=y |
27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | 27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
28 | CONFIG_SPL_LOAD_FIT=y | 28 | CONFIG_SPL_LOAD_FIT=y |
29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" | 29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" |
30 | CONFIG_OF_SYSTEM_SETUP=y | 30 | CONFIG_OF_SYSTEM_SETUP=y |
31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,4GB_LPDDR4" | 31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,4GB_LPDDR4" |
32 | CONFIG_CONSOLE_SER0=y | 32 | CONFIG_CONSOLE_SER0=y |
33 | CONFIG_BOARD_LATE_INIT=y | 33 | CONFIG_BOARD_LATE_INIT=y |
34 | CONFIG_BOARD_EARLY_INIT_F=y | 34 | CONFIG_BOARD_EARLY_INIT_F=y |
35 | CONFIG_SPL_BOARD_INIT=y | 35 | CONFIG_SPL_BOARD_INIT=y |
36 | CONFIG_SPL_SEPARATE_BSS=y | 36 | CONFIG_SPL_SEPARATE_BSS=y |
37 | CONFIG_SPL_I2C_SUPPORT=y | 37 | CONFIG_SPL_I2C_SUPPORT=y |
38 | CONFIG_SPL_POWER_SUPPORT=y | 38 | CONFIG_SPL_POWER_SUPPORT=y |
39 | CONFIG_HUSH_PARSER=y | 39 | CONFIG_HUSH_PARSER=y |
40 | CONFIG_SYS_PROMPT="u-boot$ " | 40 | CONFIG_SYS_PROMPT="u-boot$ " |
41 | # CONFIG_CMD_EXPORTENV is not set | 41 | # CONFIG_CMD_EXPORTENV is not set |
42 | CONFIG_CMD_IMPORTENV=y | 42 | CONFIG_CMD_IMPORTENV=y |
43 | # CONFIG_CMD_CRC32 is not set | 43 | # CONFIG_CMD_CRC32 is not set |
44 | # CONFIG_BOOTM_NETBSD is not set | 44 | # CONFIG_BOOTM_NETBSD is not set |
45 | CONFIG_CMD_FUSE=y | 45 | CONFIG_CMD_FUSE=y |
46 | CONFIG_CMD_GPIO=y | 46 | CONFIG_CMD_GPIO=y |
47 | CONFIG_CMD_I2C=y | 47 | CONFIG_CMD_I2C=y |
48 | CONFIG_CMD_MMC=y | 48 | CONFIG_CMD_MMC=y |
49 | CONFIG_CMD_DHCP=y | 49 | CONFIG_CMD_DHCP=y |
50 | CONFIG_CMD_MII=y | 50 | CONFIG_CMD_MII=y |
51 | CONFIG_CMD_PING=y | 51 | CONFIG_CMD_PING=y |
52 | CONFIG_CMD_CACHE=y | 52 | CONFIG_CMD_CACHE=y |
53 | CONFIG_CMD_REGULATOR=y | 53 | CONFIG_CMD_REGULATOR=y |
54 | CONFIG_CMD_MEMTEST=y | 54 | CONFIG_CMD_MEMTEST=y |
55 | CONFIG_CMD_EXT2=y | 55 | CONFIG_CMD_EXT2=y |
56 | CONFIG_CMD_EXT4=y | 56 | CONFIG_CMD_EXT4=y |
57 | CONFIG_CMD_EXT4_WRITE=y | 57 | CONFIG_CMD_EXT4_WRITE=y |
58 | CONFIG_CMD_FAT=y | 58 | CONFIG_CMD_FAT=y |
59 | CONFIG_CMD_SF=y | 59 | CONFIG_CMD_SF=y |
60 | CONFIG_OF_CONTROL=y | 60 | CONFIG_OF_CONTROL=y |
61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" | 61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" |
62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" | 62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" |
63 | CONFIG_ENV_IS_IN_MMC=y | 63 | CONFIG_ENV_IS_IN_MMC=y |
64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 | 64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 |
65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | 65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | 66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
67 | CONFIG_MXC_GPIO=y | 67 | CONFIG_MXC_GPIO=y |
68 | CONFIG_DM_I2C=y | 68 | CONFIG_DM_I2C=y |
69 | CONFIG_CMD_GPT=y | 69 | CONFIG_CMD_GPT=y |
70 | CONFIG_CMD_TIME=y | 70 | CONFIG_CMD_TIME=y |
71 | CONFIG_SYS_I2C_MXC=y | 71 | CONFIG_SYS_I2C_MXC=y |
72 | CONFIG_DM_MMC=y | 72 | CONFIG_DM_MMC=y |
73 | CONFIG_SUPPORT_EMMC_BOOT=y | 73 | CONFIG_SUPPORT_EMMC_BOOT=y |
74 | CONFIG_FSL_USDHC=y | 74 | CONFIG_FSL_USDHC=y |
75 | CONFIG_DM_SPI_FLASH=y | 75 | CONFIG_DM_SPI_FLASH=y |
76 | CONFIG_DM_SPI=y | 76 | CONFIG_DM_SPI=y |
77 | CONFIG_FSL_QSPI=y | 77 | CONFIG_FSL_QSPI=y |
78 | CONFIG_SPI=y | 78 | CONFIG_SPI=y |
79 | CONFIG_SPI_FLASH=y | 79 | CONFIG_SPI_FLASH=y |
80 | CONFIG_SPI_FLASH_BAR=y | 80 | CONFIG_SPI_FLASH_BAR=y |
81 | CONFIG_SPI_FLASH_MACRONIX=y | 81 | CONFIG_SPI_FLASH_MACRONIX=y |
82 | CONFIG_SF_DEFAULT_BUS=0 | 82 | CONFIG_SF_DEFAULT_BUS=0 |
83 | CONFIG_SF_DEFAULT_CS=0 | 83 | CONFIG_SF_DEFAULT_CS=0 |
84 | CONFIG_SF_DEFAULT_SPEED=40000000 | 84 | CONFIG_SF_DEFAULT_SPEED=40000000 |
85 | CONFIG_SF_DEFAULT_MODE=0 | 85 | CONFIG_SF_DEFAULT_MODE=0 |
86 | 86 | ||
87 | CONFIG_PHYLIB=y | 87 | CONFIG_PHYLIB=y |
88 | CONFIG_PHY_ATHEROS=y | 88 | CONFIG_PHY_REALTEK=y |
89 | #CONFIG_MMC_IO_VOLTAGE=y | 89 | #CONFIG_MMC_IO_VOLTAGE=y |
90 | #CONFIG_MMC_UHS_SUPPORT=y | 90 | #CONFIG_MMC_UHS_SUPPORT=y |
91 | #CONFIG_MMC_HS400_SUPPORT=y | 91 | #CONFIG_MMC_HS400_SUPPORT=y |
92 | CONFIG_DM_ETH=y | 92 | CONFIG_DM_ETH=y |
93 | CONFIG_PHY_GIGE=y | 93 | CONFIG_PHY_GIGE=y |
94 | CONFIG_FEC_MXC=y | 94 | CONFIG_FEC_MXC=y |
95 | CONFIG_MII=y | 95 | CONFIG_MII=y |
96 | CONFIG_PINCTRL=y | 96 | CONFIG_PINCTRL=y |
97 | CONFIG_PINCTRL_IMX8M=y | 97 | CONFIG_PINCTRL_IMX8M=y |
98 | CONFIG_POWER_DOMAIN=y | 98 | CONFIG_POWER_DOMAIN=y |
99 | CONFIG_IMX8M_POWER_DOMAIN=y | 99 | CONFIG_IMX8M_POWER_DOMAIN=y |
100 | CONFIG_DM_REGULATOR=y | 100 | CONFIG_DM_REGULATOR=y |
101 | CONFIG_DM_REGULATOR_FIXED=y | 101 | CONFIG_DM_REGULATOR_FIXED=y |
102 | CONFIG_DM_REGULATOR_GPIO=y | 102 | CONFIG_DM_REGULATOR_GPIO=y |
103 | CONFIG_MXC_UART=y | 103 | CONFIG_MXC_UART=y |
104 | CONFIG_SYSRESET=y | 104 | CONFIG_SYSRESET=y |
105 | CONFIG_SYSRESET_PSCI=y | 105 | CONFIG_SYSRESET_PSCI=y |
106 | CONFIG_DM_THERMAL=y | 106 | CONFIG_DM_THERMAL=y |
107 | CONFIG_NXP_TMU=y | 107 | CONFIG_NXP_TMU=y |
108 | CONFIG_USB=y | 108 | CONFIG_USB=y |
109 | CONFIG_DM_USB=y | 109 | CONFIG_DM_USB=y |
110 | CONFIG_USB_GADGET=y | 110 | CONFIG_USB_GADGET=y |
111 | CONFIG_FASTBOOT=y | 111 | CONFIG_FASTBOOT=y |
112 | CONFIG_USB_FUNCTION_FASTBOOT=y | 112 | CONFIG_USB_FUNCTION_FASTBOOT=y |
113 | CONFIG_CMD_FASTBOOT=y | 113 | CONFIG_CMD_FASTBOOT=y |
114 | CONFIG_ANDROID_BOOT_IMAGE=y | 114 | CONFIG_ANDROID_BOOT_IMAGE=y |
115 | CONFIG_FASTBOOT_UUU_SUPPORT=y | 115 | CONFIG_FASTBOOT_UUU_SUPPORT=y |
116 | CONFIG_FASTBOOT_BUF_ADDR=0x42800000 | 116 | CONFIG_FASTBOOT_BUF_ADDR=0x42800000 |
117 | CONFIG_FASTBOOT_BUF_SIZE=0x40000000 | 117 | CONFIG_FASTBOOT_BUF_SIZE=0x40000000 |
118 | CONFIG_FASTBOOT_FLASH=y | 118 | CONFIG_FASTBOOT_FLASH=y |
119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | 119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 |
120 | CONFIG_EFI_PARTITION=y | 120 | CONFIG_EFI_PARTITION=y |
121 | CONFIG_SDP_LOADADDR=0x40400000 | 121 | CONFIG_SDP_LOADADDR=0x40400000 |
122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 | 122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 |
123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 | 123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 |
124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" | 124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" |
125 | CONFIG_USB_GADGET_DOWNLOAD=y | 125 | CONFIG_USB_GADGET_DOWNLOAD=y |
126 | CONFIG_SPL_USB_GADGET=y | 126 | CONFIG_SPL_USB_GADGET=y |
127 | CONFIG_SPL_USB_SDP_SUPPORT=y | 127 | CONFIG_SPL_USB_SDP_SUPPORT=y |
128 | CONFIG_USB_XHCI_HCD=y | 128 | CONFIG_USB_XHCI_HCD=y |
129 | CONFIG_USB_XHCI_IMX8M=y | 129 | CONFIG_USB_XHCI_IMX8M=y |
130 | CONFIG_USB_XHCI_DWC3=y | 130 | CONFIG_USB_XHCI_DWC3=y |
131 | CONFIG_USB_DWC3=y | 131 | CONFIG_USB_DWC3=y |
132 | CONFIG_USB_DWC3_GADGET=y | 132 | CONFIG_USB_DWC3_GADGET=y |
133 | CONFIG_OF_LIBFDT_OVERLAY=y | 133 | CONFIG_OF_LIBFDT_OVERLAY=y |
134 | 134 | ||
135 | CONFIG_VIDEO_IMX8M_DCSS=y | 135 | CONFIG_VIDEO_IMX8M_DCSS=y |
136 | CONFIG_VIDEO_IMX8M_HDMI=y | 136 | CONFIG_VIDEO_IMX8M_HDMI=y |
137 | CONFIG_DM_VIDEO=y | 137 | CONFIG_DM_VIDEO=y |
138 | CONFIG_SYS_WHITE_ON_BLACK=y | 138 | CONFIG_SYS_WHITE_ON_BLACK=y |
139 | 139 |
configs/smarcimx8mq_4g_ser1_android_defconfig
1 | CONFIG_ARM=y | 1 | CONFIG_ARM=y |
2 | CONFIG_SPL_SYS_ICACHE_OFF=y | 2 | CONFIG_SPL_SYS_ICACHE_OFF=y |
3 | CONFIG_SPL_SYS_DCACHE_OFF=y | 3 | CONFIG_SPL_SYS_DCACHE_OFF=y |
4 | CONFIG_ARCH_IMX8M=y | 4 | CONFIG_ARCH_IMX8M=y |
5 | CONFIG_SYS_TEXT_BASE=0x40200000 | 5 | CONFIG_SYS_TEXT_BASE=0x40200000 |
6 | CONFIG_SPL_GPIO_SUPPORT=y | 6 | CONFIG_SPL_GPIO_SUPPORT=y |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | 9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
10 | CONFIG_SYS_I2C_MXC_I2C1=y | 10 | CONFIG_SYS_I2C_MXC_I2C1=y |
11 | CONFIG_SYS_I2C_MXC_I2C2=y | 11 | CONFIG_SYS_I2C_MXC_I2C2=y |
12 | CONFIG_SYS_I2C_MXC_I2C3=y | 12 | CONFIG_SYS_I2C_MXC_I2C3=y |
13 | CONFIG_SYS_I2C_MXC_I2C4=y | 13 | CONFIG_SYS_I2C_MXC_I2C4=y |
14 | CONFIG_ENV_SIZE=0x1000 | 14 | CONFIG_ENV_SIZE=0x1000 |
15 | CONFIG_ENV_OFFSET=0x400000 | 15 | CONFIG_ENV_OFFSET=0x400000 |
16 | CONFIG_DM_GPIO=y | 16 | CONFIG_DM_GPIO=y |
17 | CONFIG_BOOTDELAY=1 | 17 | CONFIG_BOOTDELAY=1 |
18 | CONFIG_TARGET_SMARCIMX8MQ=y | 18 | CONFIG_TARGET_SMARCIMX8MQ=y |
19 | CONFIG_ARCH_MISC_INIT=y | 19 | CONFIG_ARCH_MISC_INIT=y |
20 | CONFIG_SPL_MMC_SUPPORT=y | 20 | CONFIG_SPL_MMC_SUPPORT=y |
21 | CONFIG_SPL_SERIAL_SUPPORT=y | 21 | CONFIG_SPL_SERIAL_SUPPORT=y |
22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y | 22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y |
23 | CONFIG_SPL=y | 23 | CONFIG_SPL=y |
24 | CONFIG_CSF_SIZE=0x2000 | 24 | CONFIG_CSF_SIZE=0x2000 |
25 | CONFIG_SPL_TEXT_BASE=0x7E1000 | 25 | CONFIG_SPL_TEXT_BASE=0x7E1000 |
26 | CONFIG_FIT=y | 26 | CONFIG_FIT=y |
27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | 27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
28 | CONFIG_SPL_LOAD_FIT=y | 28 | CONFIG_SPL_LOAD_FIT=y |
29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" | 29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" |
30 | CONFIG_OF_SYSTEM_SETUP=y | 30 | CONFIG_OF_SYSTEM_SETUP=y |
31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,4GB_LPDDR4,ANDROID_SUPPORT" | 31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,4GB_LPDDR4,ANDROID_SUPPORT" |
32 | CONFIG_CONSOLE_SER1=y | 32 | CONFIG_CONSOLE_SER1=y |
33 | CONFIG_BOARD_LATE_INIT=y | 33 | CONFIG_BOARD_LATE_INIT=y |
34 | CONFIG_BOARD_EARLY_INIT_F=y | 34 | CONFIG_BOARD_EARLY_INIT_F=y |
35 | CONFIG_SPL_BOARD_INIT=y | 35 | CONFIG_SPL_BOARD_INIT=y |
36 | CONFIG_SPL_SEPARATE_BSS=y | 36 | CONFIG_SPL_SEPARATE_BSS=y |
37 | CONFIG_SPL_I2C_SUPPORT=y | 37 | CONFIG_SPL_I2C_SUPPORT=y |
38 | CONFIG_SPL_POWER_SUPPORT=y | 38 | CONFIG_SPL_POWER_SUPPORT=y |
39 | CONFIG_HUSH_PARSER=y | 39 | CONFIG_HUSH_PARSER=y |
40 | CONFIG_SYS_PROMPT="u-boot$ " | 40 | CONFIG_SYS_PROMPT="u-boot$ " |
41 | # CONFIG_CMD_EXPORTENV is not set | 41 | # CONFIG_CMD_EXPORTENV is not set |
42 | CONFIG_CMD_IMPORTENV=y | 42 | CONFIG_CMD_IMPORTENV=y |
43 | # CONFIG_CMD_CRC32 is not set | 43 | # CONFIG_CMD_CRC32 is not set |
44 | # CONFIG_BOOTM_NETBSD is not set | 44 | # CONFIG_BOOTM_NETBSD is not set |
45 | CONFIG_CMD_FUSE=y | 45 | CONFIG_CMD_FUSE=y |
46 | CONFIG_CMD_GPIO=y | 46 | CONFIG_CMD_GPIO=y |
47 | CONFIG_CMD_I2C=y | 47 | CONFIG_CMD_I2C=y |
48 | CONFIG_CMD_MMC=y | 48 | CONFIG_CMD_MMC=y |
49 | CONFIG_CMD_DHCP=y | 49 | CONFIG_CMD_DHCP=y |
50 | CONFIG_CMD_MII=y | 50 | CONFIG_CMD_MII=y |
51 | CONFIG_CMD_PING=y | 51 | CONFIG_CMD_PING=y |
52 | CONFIG_CMD_CACHE=y | 52 | CONFIG_CMD_CACHE=y |
53 | CONFIG_CMD_REGULATOR=y | 53 | CONFIG_CMD_REGULATOR=y |
54 | CONFIG_CMD_MEMTEST=y | 54 | CONFIG_CMD_MEMTEST=y |
55 | CONFIG_CMD_EXT2=y | 55 | CONFIG_CMD_EXT2=y |
56 | CONFIG_CMD_EXT4=y | 56 | CONFIG_CMD_EXT4=y |
57 | CONFIG_CMD_EXT4_WRITE=y | 57 | CONFIG_CMD_EXT4_WRITE=y |
58 | CONFIG_CMD_FAT=y | 58 | CONFIG_CMD_FAT=y |
59 | CONFIG_CMD_SF=y | 59 | CONFIG_CMD_SF=y |
60 | CONFIG_OF_CONTROL=y | 60 | CONFIG_OF_CONTROL=y |
61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" | 61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" |
62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" | 62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" |
63 | CONFIG_ENV_IS_IN_MMC=y | 63 | CONFIG_ENV_IS_IN_MMC=y |
64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 | 64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 |
65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | 65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | 66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
67 | CONFIG_MXC_GPIO=y | 67 | CONFIG_MXC_GPIO=y |
68 | CONFIG_DM_I2C=y | 68 | CONFIG_DM_I2C=y |
69 | CONFIG_CMD_GPT=y | 69 | CONFIG_CMD_GPT=y |
70 | CONFIG_CMD_TIME=y | 70 | CONFIG_CMD_TIME=y |
71 | CONFIG_SYS_I2C_MXC=y | 71 | CONFIG_SYS_I2C_MXC=y |
72 | CONFIG_DM_MMC=y | 72 | CONFIG_DM_MMC=y |
73 | CONFIG_SUPPORT_EMMC_BOOT=y | 73 | CONFIG_SUPPORT_EMMC_BOOT=y |
74 | CONFIG_FSL_USDHC=y | 74 | CONFIG_FSL_USDHC=y |
75 | CONFIG_DM_SPI_FLASH=y | 75 | CONFIG_DM_SPI_FLASH=y |
76 | CONFIG_DM_SPI=y | 76 | CONFIG_DM_SPI=y |
77 | CONFIG_FSL_QSPI=y | 77 | CONFIG_FSL_QSPI=y |
78 | CONFIG_SPI=y | 78 | CONFIG_SPI=y |
79 | CONFIG_SPI_FLASH=y | 79 | CONFIG_SPI_FLASH=y |
80 | CONFIG_SPI_FLASH_BAR=y | 80 | CONFIG_SPI_FLASH_BAR=y |
81 | CONFIG_SPI_FLASH_MACRONIX=y | 81 | CONFIG_SPI_FLASH_MACRONIX=y |
82 | CONFIG_SF_DEFAULT_BUS=0 | 82 | CONFIG_SF_DEFAULT_BUS=0 |
83 | CONFIG_SF_DEFAULT_CS=0 | 83 | CONFIG_SF_DEFAULT_CS=0 |
84 | CONFIG_SF_DEFAULT_SPEED=40000000 | 84 | CONFIG_SF_DEFAULT_SPEED=40000000 |
85 | CONFIG_SF_DEFAULT_MODE=0 | 85 | CONFIG_SF_DEFAULT_MODE=0 |
86 | 86 | ||
87 | CONFIG_PHYLIB=y | 87 | CONFIG_PHYLIB=y |
88 | CONFIG_PHY_ATHEROS=y | 88 | CONFIG_PHY_REALTEK=y |
89 | #CONFIG_MMC_IO_VOLTAGE=y | 89 | #CONFIG_MMC_IO_VOLTAGE=y |
90 | #CONFIG_MMC_UHS_SUPPORT=y | 90 | #CONFIG_MMC_UHS_SUPPORT=y |
91 | #CONFIG_MMC_HS400_SUPPORT=y | 91 | #CONFIG_MMC_HS400_SUPPORT=y |
92 | CONFIG_DM_ETH=y | 92 | CONFIG_DM_ETH=y |
93 | CONFIG_PHY_GIGE=y | 93 | CONFIG_PHY_GIGE=y |
94 | CONFIG_FEC_MXC=y | 94 | CONFIG_FEC_MXC=y |
95 | CONFIG_MII=y | 95 | CONFIG_MII=y |
96 | CONFIG_PINCTRL=y | 96 | CONFIG_PINCTRL=y |
97 | CONFIG_PINCTRL_IMX8M=y | 97 | CONFIG_PINCTRL_IMX8M=y |
98 | CONFIG_POWER_DOMAIN=y | 98 | CONFIG_POWER_DOMAIN=y |
99 | CONFIG_IMX8M_POWER_DOMAIN=y | 99 | CONFIG_IMX8M_POWER_DOMAIN=y |
100 | CONFIG_DM_REGULATOR=y | 100 | CONFIG_DM_REGULATOR=y |
101 | CONFIG_DM_REGULATOR_FIXED=y | 101 | CONFIG_DM_REGULATOR_FIXED=y |
102 | CONFIG_DM_REGULATOR_GPIO=y | 102 | CONFIG_DM_REGULATOR_GPIO=y |
103 | CONFIG_MXC_UART=y | 103 | CONFIG_MXC_UART=y |
104 | CONFIG_SYSRESET=y | 104 | CONFIG_SYSRESET=y |
105 | CONFIG_SYSRESET_PSCI=y | 105 | CONFIG_SYSRESET_PSCI=y |
106 | CONFIG_DM_THERMAL=y | 106 | CONFIG_DM_THERMAL=y |
107 | CONFIG_NXP_TMU=y | 107 | CONFIG_NXP_TMU=y |
108 | CONFIG_USB=y | 108 | CONFIG_USB=y |
109 | CONFIG_DM_USB=y | 109 | CONFIG_DM_USB=y |
110 | CONFIG_USB_GADGET=y | 110 | CONFIG_USB_GADGET=y |
111 | CONFIG_FASTBOOT=y | 111 | CONFIG_FASTBOOT=y |
112 | CONFIG_USB_FUNCTION_FASTBOOT=y | 112 | CONFIG_USB_FUNCTION_FASTBOOT=y |
113 | CONFIG_CMD_FASTBOOT=y | 113 | CONFIG_CMD_FASTBOOT=y |
114 | CONFIG_ANDROID_BOOT_IMAGE=y | 114 | CONFIG_ANDROID_BOOT_IMAGE=y |
115 | CONFIG_FASTBOOT_UUU_SUPPORT=n | 115 | CONFIG_FASTBOOT_UUU_SUPPORT=n |
116 | CONFIG_FASTBOOT_BUF_ADDR=0x44800000 | 116 | CONFIG_FASTBOOT_BUF_ADDR=0x44800000 |
117 | CONFIG_FASTBOOT_BUF_SIZE=0x19000000 | 117 | CONFIG_FASTBOOT_BUF_SIZE=0x19000000 |
118 | CONFIG_FASTBOOT_FLASH=y | 118 | CONFIG_FASTBOOT_FLASH=y |
119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | 119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 |
120 | CONFIG_EFI_PARTITION=y | 120 | CONFIG_EFI_PARTITION=y |
121 | CONFIG_SDP_LOADADDR=0x40400000 | 121 | CONFIG_SDP_LOADADDR=0x40400000 |
122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 | 122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 |
123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 | 123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 |
124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" | 124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" |
125 | CONFIG_USB_GADGET_DOWNLOAD=y | 125 | CONFIG_USB_GADGET_DOWNLOAD=y |
126 | CONFIG_SPL_USB_GADGET=y | 126 | CONFIG_SPL_USB_GADGET=y |
127 | CONFIG_SPL_USB_SDP_SUPPORT=y | 127 | CONFIG_SPL_USB_SDP_SUPPORT=y |
128 | CONFIG_USB_XHCI_HCD=y | 128 | CONFIG_USB_XHCI_HCD=y |
129 | CONFIG_USB_XHCI_IMX8M=y | 129 | CONFIG_USB_XHCI_IMX8M=y |
130 | CONFIG_USB_XHCI_DWC3=y | 130 | CONFIG_USB_XHCI_DWC3=y |
131 | CONFIG_USB_DWC3=y | 131 | CONFIG_USB_DWC3=y |
132 | CONFIG_USB_DWC3_GADGET=y | 132 | CONFIG_USB_DWC3_GADGET=y |
133 | CONFIG_OF_LIBFDT_OVERLAY=y | 133 | CONFIG_OF_LIBFDT_OVERLAY=y |
134 | 134 | ||
135 | CONFIG_VIDEO_IMX8M_DCSS=y | 135 | CONFIG_VIDEO_IMX8M_DCSS=y |
136 | CONFIG_VIDEO_IMX8M_HDMI=y | 136 | CONFIG_VIDEO_IMX8M_HDMI=y |
137 | CONFIG_DM_VIDEO=y | 137 | CONFIG_DM_VIDEO=y |
138 | CONFIG_SYS_WHITE_ON_BLACK=y | 138 | CONFIG_SYS_WHITE_ON_BLACK=y |
139 | 139 | ||
140 | CONFIG_LZ4=y | 140 | CONFIG_LZ4=y |
141 | CONFIG_BCB_SUPPORT=y | 141 | CONFIG_BCB_SUPPORT=y |
142 | CONFIG_ANDROID_RECOVERY=y | 142 | CONFIG_ANDROID_RECOVERY=y |
143 | CONFIG_SUPPORT_RAW_INITRD=y | 143 | CONFIG_SUPPORT_RAW_INITRD=y |
144 | CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y | 144 | CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y |
145 | CONFIG_FSL_FASTBOOT=y | 145 | CONFIG_FSL_FASTBOOT=y |
146 | CONFIG_FASTBOOT_LOCK=y | 146 | CONFIG_FASTBOOT_LOCK=y |
147 | CONFIG_CMD_BOOTA=y | 147 | CONFIG_CMD_BOOTA=y |
148 | CONFIG_LIBAVB=y | 148 | CONFIG_LIBAVB=y |
149 | CONFIG_AVB_SUPPORT=y | 149 | CONFIG_AVB_SUPPORT=y |
150 | CONFIG_APPEND_BOOTARGS=y | 150 | CONFIG_APPEND_BOOTARGS=y |
151 | CONFIG_AVB_WARNING_LOGO=y | 151 | CONFIG_AVB_WARNING_LOGO=y |
152 | CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 | 152 | CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 |
153 | CONFIG_AVB_WARNING_LOGO_ROWS=0x60 | 153 | CONFIG_AVB_WARNING_LOGO_ROWS=0x60 |
154 | 154 |
configs/smarcimx8mq_4g_ser1_defconfig
1 | CONFIG_ARM=y | 1 | CONFIG_ARM=y |
2 | CONFIG_SPL_SYS_ICACHE_OFF=y | 2 | CONFIG_SPL_SYS_ICACHE_OFF=y |
3 | CONFIG_SPL_SYS_DCACHE_OFF=y | 3 | CONFIG_SPL_SYS_DCACHE_OFF=y |
4 | CONFIG_ARCH_IMX8M=y | 4 | CONFIG_ARCH_IMX8M=y |
5 | CONFIG_SYS_TEXT_BASE=0x40200000 | 5 | CONFIG_SYS_TEXT_BASE=0x40200000 |
6 | CONFIG_SPL_GPIO_SUPPORT=y | 6 | CONFIG_SPL_GPIO_SUPPORT=y |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | 9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
10 | CONFIG_SYS_I2C_MXC_I2C1=y | 10 | CONFIG_SYS_I2C_MXC_I2C1=y |
11 | CONFIG_SYS_I2C_MXC_I2C2=y | 11 | CONFIG_SYS_I2C_MXC_I2C2=y |
12 | CONFIG_SYS_I2C_MXC_I2C3=y | 12 | CONFIG_SYS_I2C_MXC_I2C3=y |
13 | CONFIG_SYS_I2C_MXC_I2C4=y | 13 | CONFIG_SYS_I2C_MXC_I2C4=y |
14 | CONFIG_ENV_SIZE=0x1000 | 14 | CONFIG_ENV_SIZE=0x1000 |
15 | CONFIG_ENV_OFFSET=0x400000 | 15 | CONFIG_ENV_OFFSET=0x400000 |
16 | CONFIG_DM_GPIO=y | 16 | CONFIG_DM_GPIO=y |
17 | CONFIG_BOOTDELAY=1 | 17 | CONFIG_BOOTDELAY=1 |
18 | CONFIG_TARGET_SMARCIMX8MQ=y | 18 | CONFIG_TARGET_SMARCIMX8MQ=y |
19 | CONFIG_ARCH_MISC_INIT=y | 19 | CONFIG_ARCH_MISC_INIT=y |
20 | CONFIG_SPL_MMC_SUPPORT=y | 20 | CONFIG_SPL_MMC_SUPPORT=y |
21 | CONFIG_SPL_SERIAL_SUPPORT=y | 21 | CONFIG_SPL_SERIAL_SUPPORT=y |
22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y | 22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y |
23 | CONFIG_SPL=y | 23 | CONFIG_SPL=y |
24 | CONFIG_CSF_SIZE=0x2000 | 24 | CONFIG_CSF_SIZE=0x2000 |
25 | CONFIG_SPL_TEXT_BASE=0x7E1000 | 25 | CONFIG_SPL_TEXT_BASE=0x7E1000 |
26 | CONFIG_FIT=y | 26 | CONFIG_FIT=y |
27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | 27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
28 | CONFIG_SPL_LOAD_FIT=y | 28 | CONFIG_SPL_LOAD_FIT=y |
29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" | 29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" |
30 | CONFIG_OF_SYSTEM_SETUP=y | 30 | CONFIG_OF_SYSTEM_SETUP=y |
31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,4GB_LPDDR4" | 31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,4GB_LPDDR4" |
32 | CONFIG_CONSOLE_SER1=y | 32 | CONFIG_CONSOLE_SER1=y |
33 | CONFIG_BOARD_LATE_INIT=y | 33 | CONFIG_BOARD_LATE_INIT=y |
34 | CONFIG_BOARD_EARLY_INIT_F=y | 34 | CONFIG_BOARD_EARLY_INIT_F=y |
35 | CONFIG_SPL_BOARD_INIT=y | 35 | CONFIG_SPL_BOARD_INIT=y |
36 | CONFIG_SPL_SEPARATE_BSS=y | 36 | CONFIG_SPL_SEPARATE_BSS=y |
37 | CONFIG_SPL_I2C_SUPPORT=y | 37 | CONFIG_SPL_I2C_SUPPORT=y |
38 | CONFIG_SPL_POWER_SUPPORT=y | 38 | CONFIG_SPL_POWER_SUPPORT=y |
39 | CONFIG_HUSH_PARSER=y | 39 | CONFIG_HUSH_PARSER=y |
40 | CONFIG_SYS_PROMPT="u-boot$ " | 40 | CONFIG_SYS_PROMPT="u-boot$ " |
41 | # CONFIG_CMD_EXPORTENV is not set | 41 | # CONFIG_CMD_EXPORTENV is not set |
42 | CONFIG_CMD_IMPORTENV=y | 42 | CONFIG_CMD_IMPORTENV=y |
43 | # CONFIG_CMD_CRC32 is not set | 43 | # CONFIG_CMD_CRC32 is not set |
44 | # CONFIG_BOOTM_NETBSD is not set | 44 | # CONFIG_BOOTM_NETBSD is not set |
45 | CONFIG_CMD_FUSE=y | 45 | CONFIG_CMD_FUSE=y |
46 | CONFIG_CMD_GPIO=y | 46 | CONFIG_CMD_GPIO=y |
47 | CONFIG_CMD_I2C=y | 47 | CONFIG_CMD_I2C=y |
48 | CONFIG_CMD_MMC=y | 48 | CONFIG_CMD_MMC=y |
49 | CONFIG_CMD_DHCP=y | 49 | CONFIG_CMD_DHCP=y |
50 | CONFIG_CMD_MII=y | 50 | CONFIG_CMD_MII=y |
51 | CONFIG_CMD_PING=y | 51 | CONFIG_CMD_PING=y |
52 | CONFIG_CMD_CACHE=y | 52 | CONFIG_CMD_CACHE=y |
53 | CONFIG_CMD_REGULATOR=y | 53 | CONFIG_CMD_REGULATOR=y |
54 | CONFIG_CMD_MEMTEST=y | 54 | CONFIG_CMD_MEMTEST=y |
55 | CONFIG_CMD_EXT2=y | 55 | CONFIG_CMD_EXT2=y |
56 | CONFIG_CMD_EXT4=y | 56 | CONFIG_CMD_EXT4=y |
57 | CONFIG_CMD_EXT4_WRITE=y | 57 | CONFIG_CMD_EXT4_WRITE=y |
58 | CONFIG_CMD_FAT=y | 58 | CONFIG_CMD_FAT=y |
59 | CONFIG_CMD_SF=y | 59 | CONFIG_CMD_SF=y |
60 | CONFIG_OF_CONTROL=y | 60 | CONFIG_OF_CONTROL=y |
61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" | 61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" |
62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" | 62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" |
63 | CONFIG_ENV_IS_IN_MMC=y | 63 | CONFIG_ENV_IS_IN_MMC=y |
64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 | 64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 |
65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | 65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | 66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
67 | CONFIG_MXC_GPIO=y | 67 | CONFIG_MXC_GPIO=y |
68 | CONFIG_DM_I2C=y | 68 | CONFIG_DM_I2C=y |
69 | CONFIG_CMD_GPT=y | 69 | CONFIG_CMD_GPT=y |
70 | CONFIG_CMD_TIME=y | 70 | CONFIG_CMD_TIME=y |
71 | CONFIG_SYS_I2C_MXC=y | 71 | CONFIG_SYS_I2C_MXC=y |
72 | CONFIG_DM_MMC=y | 72 | CONFIG_DM_MMC=y |
73 | CONFIG_SUPPORT_EMMC_BOOT=y | 73 | CONFIG_SUPPORT_EMMC_BOOT=y |
74 | CONFIG_FSL_USDHC=y | 74 | CONFIG_FSL_USDHC=y |
75 | CONFIG_DM_SPI_FLASH=y | 75 | CONFIG_DM_SPI_FLASH=y |
76 | CONFIG_DM_SPI=y | 76 | CONFIG_DM_SPI=y |
77 | CONFIG_FSL_QSPI=y | 77 | CONFIG_FSL_QSPI=y |
78 | CONFIG_SPI=y | 78 | CONFIG_SPI=y |
79 | CONFIG_SPI_FLASH=y | 79 | CONFIG_SPI_FLASH=y |
80 | CONFIG_SPI_FLASH_BAR=y | 80 | CONFIG_SPI_FLASH_BAR=y |
81 | CONFIG_SPI_FLASH_MACRONIX=y | 81 | CONFIG_SPI_FLASH_MACRONIX=y |
82 | CONFIG_SF_DEFAULT_BUS=0 | 82 | CONFIG_SF_DEFAULT_BUS=0 |
83 | CONFIG_SF_DEFAULT_CS=0 | 83 | CONFIG_SF_DEFAULT_CS=0 |
84 | CONFIG_SF_DEFAULT_SPEED=40000000 | 84 | CONFIG_SF_DEFAULT_SPEED=40000000 |
85 | CONFIG_SF_DEFAULT_MODE=0 | 85 | CONFIG_SF_DEFAULT_MODE=0 |
86 | 86 | ||
87 | CONFIG_PHYLIB=y | 87 | CONFIG_PHYLIB=y |
88 | CONFIG_PHY_ATHEROS=y | 88 | CONFIG_PHY_REALTEK=y |
89 | #CONFIG_MMC_IO_VOLTAGE=y | 89 | #CONFIG_MMC_IO_VOLTAGE=y |
90 | #CONFIG_MMC_UHS_SUPPORT=y | 90 | #CONFIG_MMC_UHS_SUPPORT=y |
91 | #CONFIG_MMC_HS400_SUPPORT=y | 91 | #CONFIG_MMC_HS400_SUPPORT=y |
92 | CONFIG_DM_ETH=y | 92 | CONFIG_DM_ETH=y |
93 | CONFIG_PHY_GIGE=y | 93 | CONFIG_PHY_GIGE=y |
94 | CONFIG_FEC_MXC=y | 94 | CONFIG_FEC_MXC=y |
95 | CONFIG_MII=y | 95 | CONFIG_MII=y |
96 | CONFIG_PINCTRL=y | 96 | CONFIG_PINCTRL=y |
97 | CONFIG_PINCTRL_IMX8M=y | 97 | CONFIG_PINCTRL_IMX8M=y |
98 | CONFIG_POWER_DOMAIN=y | 98 | CONFIG_POWER_DOMAIN=y |
99 | CONFIG_IMX8M_POWER_DOMAIN=y | 99 | CONFIG_IMX8M_POWER_DOMAIN=y |
100 | CONFIG_DM_REGULATOR=y | 100 | CONFIG_DM_REGULATOR=y |
101 | CONFIG_DM_REGULATOR_FIXED=y | 101 | CONFIG_DM_REGULATOR_FIXED=y |
102 | CONFIG_DM_REGULATOR_GPIO=y | 102 | CONFIG_DM_REGULATOR_GPIO=y |
103 | CONFIG_MXC_UART=y | 103 | CONFIG_MXC_UART=y |
104 | CONFIG_SYSRESET=y | 104 | CONFIG_SYSRESET=y |
105 | CONFIG_SYSRESET_PSCI=y | 105 | CONFIG_SYSRESET_PSCI=y |
106 | CONFIG_DM_THERMAL=y | 106 | CONFIG_DM_THERMAL=y |
107 | CONFIG_NXP_TMU=y | 107 | CONFIG_NXP_TMU=y |
108 | CONFIG_USB=y | 108 | CONFIG_USB=y |
109 | CONFIG_DM_USB=y | 109 | CONFIG_DM_USB=y |
110 | CONFIG_USB_GADGET=y | 110 | CONFIG_USB_GADGET=y |
111 | CONFIG_FASTBOOT=y | 111 | CONFIG_FASTBOOT=y |
112 | CONFIG_USB_FUNCTION_FASTBOOT=y | 112 | CONFIG_USB_FUNCTION_FASTBOOT=y |
113 | CONFIG_CMD_FASTBOOT=y | 113 | CONFIG_CMD_FASTBOOT=y |
114 | CONFIG_ANDROID_BOOT_IMAGE=y | 114 | CONFIG_ANDROID_BOOT_IMAGE=y |
115 | CONFIG_FASTBOOT_UUU_SUPPORT=y | 115 | CONFIG_FASTBOOT_UUU_SUPPORT=y |
116 | CONFIG_FASTBOOT_BUF_ADDR=0x42800000 | 116 | CONFIG_FASTBOOT_BUF_ADDR=0x42800000 |
117 | CONFIG_FASTBOOT_BUF_SIZE=0x40000000 | 117 | CONFIG_FASTBOOT_BUF_SIZE=0x40000000 |
118 | CONFIG_FASTBOOT_FLASH=y | 118 | CONFIG_FASTBOOT_FLASH=y |
119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | 119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 |
120 | CONFIG_EFI_PARTITION=y | 120 | CONFIG_EFI_PARTITION=y |
121 | CONFIG_SDP_LOADADDR=0x40400000 | 121 | CONFIG_SDP_LOADADDR=0x40400000 |
122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 | 122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 |
123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 | 123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 |
124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" | 124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" |
125 | CONFIG_USB_GADGET_DOWNLOAD=y | 125 | CONFIG_USB_GADGET_DOWNLOAD=y |
126 | CONFIG_SPL_USB_GADGET=y | 126 | CONFIG_SPL_USB_GADGET=y |
127 | CONFIG_SPL_USB_SDP_SUPPORT=y | 127 | CONFIG_SPL_USB_SDP_SUPPORT=y |
128 | CONFIG_USB_XHCI_HCD=y | 128 | CONFIG_USB_XHCI_HCD=y |
129 | CONFIG_USB_XHCI_IMX8M=y | 129 | CONFIG_USB_XHCI_IMX8M=y |
130 | CONFIG_USB_XHCI_DWC3=y | 130 | CONFIG_USB_XHCI_DWC3=y |
131 | CONFIG_USB_DWC3=y | 131 | CONFIG_USB_DWC3=y |
132 | CONFIG_USB_DWC3_GADGET=y | 132 | CONFIG_USB_DWC3_GADGET=y |
133 | CONFIG_OF_LIBFDT_OVERLAY=y | 133 | CONFIG_OF_LIBFDT_OVERLAY=y |
134 | 134 | ||
135 | CONFIG_VIDEO_IMX8M_DCSS=y | 135 | CONFIG_VIDEO_IMX8M_DCSS=y |
136 | CONFIG_VIDEO_IMX8M_HDMI=y | 136 | CONFIG_VIDEO_IMX8M_HDMI=y |
137 | CONFIG_DM_VIDEO=y | 137 | CONFIG_DM_VIDEO=y |
138 | CONFIG_SYS_WHITE_ON_BLACK=y | 138 | CONFIG_SYS_WHITE_ON_BLACK=y |
139 | 139 |
configs/smarcimx8mq_4g_ser2_android_defconfig
1 | CONFIG_ARM=y | 1 | CONFIG_ARM=y |
2 | CONFIG_SPL_SYS_ICACHE_OFF=y | 2 | CONFIG_SPL_SYS_ICACHE_OFF=y |
3 | CONFIG_SPL_SYS_DCACHE_OFF=y | 3 | CONFIG_SPL_SYS_DCACHE_OFF=y |
4 | CONFIG_ARCH_IMX8M=y | 4 | CONFIG_ARCH_IMX8M=y |
5 | CONFIG_SYS_TEXT_BASE=0x40200000 | 5 | CONFIG_SYS_TEXT_BASE=0x40200000 |
6 | CONFIG_SPL_GPIO_SUPPORT=y | 6 | CONFIG_SPL_GPIO_SUPPORT=y |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | 9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
10 | CONFIG_SYS_I2C_MXC_I2C1=y | 10 | CONFIG_SYS_I2C_MXC_I2C1=y |
11 | CONFIG_SYS_I2C_MXC_I2C2=y | 11 | CONFIG_SYS_I2C_MXC_I2C2=y |
12 | CONFIG_SYS_I2C_MXC_I2C3=y | 12 | CONFIG_SYS_I2C_MXC_I2C3=y |
13 | CONFIG_SYS_I2C_MXC_I2C4=y | 13 | CONFIG_SYS_I2C_MXC_I2C4=y |
14 | CONFIG_ENV_SIZE=0x1000 | 14 | CONFIG_ENV_SIZE=0x1000 |
15 | CONFIG_ENV_OFFSET=0x400000 | 15 | CONFIG_ENV_OFFSET=0x400000 |
16 | CONFIG_DM_GPIO=y | 16 | CONFIG_DM_GPIO=y |
17 | CONFIG_BOOTDELAY=1 | 17 | CONFIG_BOOTDELAY=1 |
18 | CONFIG_TARGET_SMARCIMX8MQ=y | 18 | CONFIG_TARGET_SMARCIMX8MQ=y |
19 | CONFIG_ARCH_MISC_INIT=y | 19 | CONFIG_ARCH_MISC_INIT=y |
20 | CONFIG_SPL_MMC_SUPPORT=y | 20 | CONFIG_SPL_MMC_SUPPORT=y |
21 | CONFIG_SPL_SERIAL_SUPPORT=y | 21 | CONFIG_SPL_SERIAL_SUPPORT=y |
22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y | 22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y |
23 | CONFIG_SPL=y | 23 | CONFIG_SPL=y |
24 | CONFIG_CSF_SIZE=0x2000 | 24 | CONFIG_CSF_SIZE=0x2000 |
25 | CONFIG_SPL_TEXT_BASE=0x7E1000 | 25 | CONFIG_SPL_TEXT_BASE=0x7E1000 |
26 | CONFIG_FIT=y | 26 | CONFIG_FIT=y |
27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | 27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
28 | CONFIG_SPL_LOAD_FIT=y | 28 | CONFIG_SPL_LOAD_FIT=y |
29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" | 29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" |
30 | CONFIG_OF_SYSTEM_SETUP=y | 30 | CONFIG_OF_SYSTEM_SETUP=y |
31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,4GB_LPDDR4,ANDROID_SUPPORT" | 31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,4GB_LPDDR4,ANDROID_SUPPORT" |
32 | CONFIG_CONSOLE_SER2=y | 32 | CONFIG_CONSOLE_SER2=y |
33 | CONFIG_BOARD_LATE_INIT=y | 33 | CONFIG_BOARD_LATE_INIT=y |
34 | CONFIG_BOARD_EARLY_INIT_F=y | 34 | CONFIG_BOARD_EARLY_INIT_F=y |
35 | CONFIG_SPL_BOARD_INIT=y | 35 | CONFIG_SPL_BOARD_INIT=y |
36 | CONFIG_SPL_SEPARATE_BSS=y | 36 | CONFIG_SPL_SEPARATE_BSS=y |
37 | CONFIG_SPL_I2C_SUPPORT=y | 37 | CONFIG_SPL_I2C_SUPPORT=y |
38 | CONFIG_SPL_POWER_SUPPORT=y | 38 | CONFIG_SPL_POWER_SUPPORT=y |
39 | CONFIG_HUSH_PARSER=y | 39 | CONFIG_HUSH_PARSER=y |
40 | CONFIG_SYS_PROMPT="u-boot$ " | 40 | CONFIG_SYS_PROMPT="u-boot$ " |
41 | # CONFIG_CMD_EXPORTENV is not set | 41 | # CONFIG_CMD_EXPORTENV is not set |
42 | CONFIG_CMD_IMPORTENV=y | 42 | CONFIG_CMD_IMPORTENV=y |
43 | # CONFIG_CMD_CRC32 is not set | 43 | # CONFIG_CMD_CRC32 is not set |
44 | # CONFIG_BOOTM_NETBSD is not set | 44 | # CONFIG_BOOTM_NETBSD is not set |
45 | CONFIG_CMD_FUSE=y | 45 | CONFIG_CMD_FUSE=y |
46 | CONFIG_CMD_GPIO=y | 46 | CONFIG_CMD_GPIO=y |
47 | CONFIG_CMD_I2C=y | 47 | CONFIG_CMD_I2C=y |
48 | CONFIG_CMD_MMC=y | 48 | CONFIG_CMD_MMC=y |
49 | CONFIG_CMD_DHCP=y | 49 | CONFIG_CMD_DHCP=y |
50 | CONFIG_CMD_MII=y | 50 | CONFIG_CMD_MII=y |
51 | CONFIG_CMD_PING=y | 51 | CONFIG_CMD_PING=y |
52 | CONFIG_CMD_CACHE=y | 52 | CONFIG_CMD_CACHE=y |
53 | CONFIG_CMD_REGULATOR=y | 53 | CONFIG_CMD_REGULATOR=y |
54 | CONFIG_CMD_MEMTEST=y | 54 | CONFIG_CMD_MEMTEST=y |
55 | CONFIG_CMD_EXT2=y | 55 | CONFIG_CMD_EXT2=y |
56 | CONFIG_CMD_EXT4=y | 56 | CONFIG_CMD_EXT4=y |
57 | CONFIG_CMD_EXT4_WRITE=y | 57 | CONFIG_CMD_EXT4_WRITE=y |
58 | CONFIG_CMD_FAT=y | 58 | CONFIG_CMD_FAT=y |
59 | CONFIG_CMD_SF=y | 59 | CONFIG_CMD_SF=y |
60 | CONFIG_OF_CONTROL=y | 60 | CONFIG_OF_CONTROL=y |
61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" | 61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" |
62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" | 62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" |
63 | CONFIG_ENV_IS_IN_MMC=y | 63 | CONFIG_ENV_IS_IN_MMC=y |
64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 | 64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 |
65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | 65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | 66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
67 | CONFIG_MXC_GPIO=y | 67 | CONFIG_MXC_GPIO=y |
68 | CONFIG_DM_I2C=y | 68 | CONFIG_DM_I2C=y |
69 | CONFIG_CMD_GPT=y | 69 | CONFIG_CMD_GPT=y |
70 | CONFIG_CMD_TIME=y | 70 | CONFIG_CMD_TIME=y |
71 | CONFIG_SYS_I2C_MXC=y | 71 | CONFIG_SYS_I2C_MXC=y |
72 | CONFIG_DM_MMC=y | 72 | CONFIG_DM_MMC=y |
73 | CONFIG_SUPPORT_EMMC_BOOT=y | 73 | CONFIG_SUPPORT_EMMC_BOOT=y |
74 | CONFIG_FSL_USDHC=y | 74 | CONFIG_FSL_USDHC=y |
75 | CONFIG_DM_SPI_FLASH=y | 75 | CONFIG_DM_SPI_FLASH=y |
76 | CONFIG_DM_SPI=y | 76 | CONFIG_DM_SPI=y |
77 | CONFIG_FSL_QSPI=y | 77 | CONFIG_FSL_QSPI=y |
78 | CONFIG_SPI=y | 78 | CONFIG_SPI=y |
79 | CONFIG_SPI_FLASH=y | 79 | CONFIG_SPI_FLASH=y |
80 | CONFIG_SPI_FLASH_BAR=y | 80 | CONFIG_SPI_FLASH_BAR=y |
81 | CONFIG_SPI_FLASH_MACRONIX=y | 81 | CONFIG_SPI_FLASH_MACRONIX=y |
82 | CONFIG_SF_DEFAULT_BUS=0 | 82 | CONFIG_SF_DEFAULT_BUS=0 |
83 | CONFIG_SF_DEFAULT_CS=0 | 83 | CONFIG_SF_DEFAULT_CS=0 |
84 | CONFIG_SF_DEFAULT_SPEED=40000000 | 84 | CONFIG_SF_DEFAULT_SPEED=40000000 |
85 | CONFIG_SF_DEFAULT_MODE=0 | 85 | CONFIG_SF_DEFAULT_MODE=0 |
86 | 86 | ||
87 | CONFIG_PHYLIB=y | 87 | CONFIG_PHYLIB=y |
88 | CONFIG_PHY_ATHEROS=y | 88 | CONFIG_PHY_REALTEK=y |
89 | #CONFIG_MMC_IO_VOLTAGE=y | 89 | #CONFIG_MMC_IO_VOLTAGE=y |
90 | #CONFIG_MMC_UHS_SUPPORT=y | 90 | #CONFIG_MMC_UHS_SUPPORT=y |
91 | #CONFIG_MMC_HS400_SUPPORT=y | 91 | #CONFIG_MMC_HS400_SUPPORT=y |
92 | CONFIG_DM_ETH=y | 92 | CONFIG_DM_ETH=y |
93 | CONFIG_PHY_GIGE=y | 93 | CONFIG_PHY_GIGE=y |
94 | CONFIG_FEC_MXC=y | 94 | CONFIG_FEC_MXC=y |
95 | CONFIG_MII=y | 95 | CONFIG_MII=y |
96 | CONFIG_PINCTRL=y | 96 | CONFIG_PINCTRL=y |
97 | CONFIG_PINCTRL_IMX8M=y | 97 | CONFIG_PINCTRL_IMX8M=y |
98 | CONFIG_POWER_DOMAIN=y | 98 | CONFIG_POWER_DOMAIN=y |
99 | CONFIG_IMX8M_POWER_DOMAIN=y | 99 | CONFIG_IMX8M_POWER_DOMAIN=y |
100 | CONFIG_DM_REGULATOR=y | 100 | CONFIG_DM_REGULATOR=y |
101 | CONFIG_DM_REGULATOR_FIXED=y | 101 | CONFIG_DM_REGULATOR_FIXED=y |
102 | CONFIG_DM_REGULATOR_GPIO=y | 102 | CONFIG_DM_REGULATOR_GPIO=y |
103 | CONFIG_MXC_UART=y | 103 | CONFIG_MXC_UART=y |
104 | CONFIG_SYSRESET=y | 104 | CONFIG_SYSRESET=y |
105 | CONFIG_SYSRESET_PSCI=y | 105 | CONFIG_SYSRESET_PSCI=y |
106 | CONFIG_DM_THERMAL=y | 106 | CONFIG_DM_THERMAL=y |
107 | CONFIG_NXP_TMU=y | 107 | CONFIG_NXP_TMU=y |
108 | CONFIG_USB=y | 108 | CONFIG_USB=y |
109 | CONFIG_DM_USB=y | 109 | CONFIG_DM_USB=y |
110 | CONFIG_USB_GADGET=y | 110 | CONFIG_USB_GADGET=y |
111 | CONFIG_FASTBOOT=y | 111 | CONFIG_FASTBOOT=y |
112 | CONFIG_USB_FUNCTION_FASTBOOT=y | 112 | CONFIG_USB_FUNCTION_FASTBOOT=y |
113 | CONFIG_CMD_FASTBOOT=y | 113 | CONFIG_CMD_FASTBOOT=y |
114 | CONFIG_ANDROID_BOOT_IMAGE=y | 114 | CONFIG_ANDROID_BOOT_IMAGE=y |
115 | CONFIG_FASTBOOT_UUU_SUPPORT=n | 115 | CONFIG_FASTBOOT_UUU_SUPPORT=n |
116 | CONFIG_FASTBOOT_BUF_ADDR=0x44800000 | 116 | CONFIG_FASTBOOT_BUF_ADDR=0x44800000 |
117 | CONFIG_FASTBOOT_BUF_SIZE=0x19000000 | 117 | CONFIG_FASTBOOT_BUF_SIZE=0x19000000 |
118 | CONFIG_FASTBOOT_FLASH=y | 118 | CONFIG_FASTBOOT_FLASH=y |
119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | 119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 |
120 | CONFIG_EFI_PARTITION=y | 120 | CONFIG_EFI_PARTITION=y |
121 | CONFIG_SDP_LOADADDR=0x40400000 | 121 | CONFIG_SDP_LOADADDR=0x40400000 |
122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 | 122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 |
123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 | 123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 |
124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" | 124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" |
125 | CONFIG_USB_GADGET_DOWNLOAD=y | 125 | CONFIG_USB_GADGET_DOWNLOAD=y |
126 | CONFIG_SPL_USB_GADGET=y | 126 | CONFIG_SPL_USB_GADGET=y |
127 | CONFIG_SPL_USB_SDP_SUPPORT=y | 127 | CONFIG_SPL_USB_SDP_SUPPORT=y |
128 | CONFIG_USB_XHCI_HCD=y | 128 | CONFIG_USB_XHCI_HCD=y |
129 | CONFIG_USB_XHCI_IMX8M=y | 129 | CONFIG_USB_XHCI_IMX8M=y |
130 | CONFIG_USB_XHCI_DWC3=y | 130 | CONFIG_USB_XHCI_DWC3=y |
131 | CONFIG_USB_DWC3=y | 131 | CONFIG_USB_DWC3=y |
132 | CONFIG_USB_DWC3_GADGET=y | 132 | CONFIG_USB_DWC3_GADGET=y |
133 | CONFIG_OF_LIBFDT_OVERLAY=y | 133 | CONFIG_OF_LIBFDT_OVERLAY=y |
134 | 134 | ||
135 | CONFIG_VIDEO_IMX8M_DCSS=y | 135 | CONFIG_VIDEO_IMX8M_DCSS=y |
136 | CONFIG_VIDEO_IMX8M_HDMI=y | 136 | CONFIG_VIDEO_IMX8M_HDMI=y |
137 | CONFIG_DM_VIDEO=y | 137 | CONFIG_DM_VIDEO=y |
138 | CONFIG_SYS_WHITE_ON_BLACK=y | 138 | CONFIG_SYS_WHITE_ON_BLACK=y |
139 | 139 | ||
140 | CONFIG_LZ4=y | 140 | CONFIG_LZ4=y |
141 | CONFIG_BCB_SUPPORT=y | 141 | CONFIG_BCB_SUPPORT=y |
142 | CONFIG_ANDROID_RECOVERY=y | 142 | CONFIG_ANDROID_RECOVERY=y |
143 | CONFIG_SUPPORT_RAW_INITRD=y | 143 | CONFIG_SUPPORT_RAW_INITRD=y |
144 | CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y | 144 | CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y |
145 | CONFIG_FSL_FASTBOOT=y | 145 | CONFIG_FSL_FASTBOOT=y |
146 | CONFIG_FASTBOOT_LOCK=y | 146 | CONFIG_FASTBOOT_LOCK=y |
147 | CONFIG_CMD_BOOTA=y | 147 | CONFIG_CMD_BOOTA=y |
148 | CONFIG_LIBAVB=y | 148 | CONFIG_LIBAVB=y |
149 | CONFIG_AVB_SUPPORT=y | 149 | CONFIG_AVB_SUPPORT=y |
150 | CONFIG_APPEND_BOOTARGS=y | 150 | CONFIG_APPEND_BOOTARGS=y |
151 | CONFIG_AVB_WARNING_LOGO=y | 151 | CONFIG_AVB_WARNING_LOGO=y |
152 | CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 | 152 | CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 |
153 | CONFIG_AVB_WARNING_LOGO_ROWS=0x60 | 153 | CONFIG_AVB_WARNING_LOGO_ROWS=0x60 |
154 | 154 |
configs/smarcimx8mq_4g_ser2_defconfig
1 | CONFIG_ARM=y | 1 | CONFIG_ARM=y |
2 | CONFIG_SPL_SYS_ICACHE_OFF=y | 2 | CONFIG_SPL_SYS_ICACHE_OFF=y |
3 | CONFIG_SPL_SYS_DCACHE_OFF=y | 3 | CONFIG_SPL_SYS_DCACHE_OFF=y |
4 | CONFIG_ARCH_IMX8M=y | 4 | CONFIG_ARCH_IMX8M=y |
5 | CONFIG_SYS_TEXT_BASE=0x40200000 | 5 | CONFIG_SYS_TEXT_BASE=0x40200000 |
6 | CONFIG_SPL_GPIO_SUPPORT=y | 6 | CONFIG_SPL_GPIO_SUPPORT=y |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | 9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
10 | CONFIG_SYS_I2C_MXC_I2C1=y | 10 | CONFIG_SYS_I2C_MXC_I2C1=y |
11 | CONFIG_SYS_I2C_MXC_I2C2=y | 11 | CONFIG_SYS_I2C_MXC_I2C2=y |
12 | CONFIG_SYS_I2C_MXC_I2C3=y | 12 | CONFIG_SYS_I2C_MXC_I2C3=y |
13 | CONFIG_SYS_I2C_MXC_I2C4=y | 13 | CONFIG_SYS_I2C_MXC_I2C4=y |
14 | CONFIG_ENV_SIZE=0x1000 | 14 | CONFIG_ENV_SIZE=0x1000 |
15 | CONFIG_ENV_OFFSET=0x400000 | 15 | CONFIG_ENV_OFFSET=0x400000 |
16 | CONFIG_DM_GPIO=y | 16 | CONFIG_DM_GPIO=y |
17 | CONFIG_BOOTDELAY=1 | 17 | CONFIG_BOOTDELAY=1 |
18 | CONFIG_TARGET_SMARCIMX8MQ=y | 18 | CONFIG_TARGET_SMARCIMX8MQ=y |
19 | CONFIG_ARCH_MISC_INIT=y | 19 | CONFIG_ARCH_MISC_INIT=y |
20 | CONFIG_SPL_MMC_SUPPORT=y | 20 | CONFIG_SPL_MMC_SUPPORT=y |
21 | CONFIG_SPL_SERIAL_SUPPORT=y | 21 | CONFIG_SPL_SERIAL_SUPPORT=y |
22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y | 22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y |
23 | CONFIG_SPL=y | 23 | CONFIG_SPL=y |
24 | CONFIG_CSF_SIZE=0x2000 | 24 | CONFIG_CSF_SIZE=0x2000 |
25 | CONFIG_SPL_TEXT_BASE=0x7E1000 | 25 | CONFIG_SPL_TEXT_BASE=0x7E1000 |
26 | CONFIG_FIT=y | 26 | CONFIG_FIT=y |
27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | 27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
28 | CONFIG_SPL_LOAD_FIT=y | 28 | CONFIG_SPL_LOAD_FIT=y |
29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" | 29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" |
30 | CONFIG_OF_SYSTEM_SETUP=y | 30 | CONFIG_OF_SYSTEM_SETUP=y |
31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,4GB_LPDDR4" | 31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,4GB_LPDDR4" |
32 | CONFIG_CONSOLE_SER2=y | 32 | CONFIG_CONSOLE_SER2=y |
33 | CONFIG_BOARD_LATE_INIT=y | 33 | CONFIG_BOARD_LATE_INIT=y |
34 | CONFIG_BOARD_EARLY_INIT_F=y | 34 | CONFIG_BOARD_EARLY_INIT_F=y |
35 | CONFIG_SPL_BOARD_INIT=y | 35 | CONFIG_SPL_BOARD_INIT=y |
36 | CONFIG_SPL_SEPARATE_BSS=y | 36 | CONFIG_SPL_SEPARATE_BSS=y |
37 | CONFIG_SPL_I2C_SUPPORT=y | 37 | CONFIG_SPL_I2C_SUPPORT=y |
38 | CONFIG_SPL_POWER_SUPPORT=y | 38 | CONFIG_SPL_POWER_SUPPORT=y |
39 | CONFIG_HUSH_PARSER=y | 39 | CONFIG_HUSH_PARSER=y |
40 | CONFIG_SYS_PROMPT="u-boot$ " | 40 | CONFIG_SYS_PROMPT="u-boot$ " |
41 | # CONFIG_CMD_EXPORTENV is not set | 41 | # CONFIG_CMD_EXPORTENV is not set |
42 | CONFIG_CMD_IMPORTENV=y | 42 | CONFIG_CMD_IMPORTENV=y |
43 | # CONFIG_CMD_CRC32 is not set | 43 | # CONFIG_CMD_CRC32 is not set |
44 | # CONFIG_BOOTM_NETBSD is not set | 44 | # CONFIG_BOOTM_NETBSD is not set |
45 | CONFIG_CMD_FUSE=y | 45 | CONFIG_CMD_FUSE=y |
46 | CONFIG_CMD_GPIO=y | 46 | CONFIG_CMD_GPIO=y |
47 | CONFIG_CMD_I2C=y | 47 | CONFIG_CMD_I2C=y |
48 | CONFIG_CMD_MMC=y | 48 | CONFIG_CMD_MMC=y |
49 | CONFIG_CMD_DHCP=y | 49 | CONFIG_CMD_DHCP=y |
50 | CONFIG_CMD_MII=y | 50 | CONFIG_CMD_MII=y |
51 | CONFIG_CMD_PING=y | 51 | CONFIG_CMD_PING=y |
52 | CONFIG_CMD_CACHE=y | 52 | CONFIG_CMD_CACHE=y |
53 | CONFIG_CMD_REGULATOR=y | 53 | CONFIG_CMD_REGULATOR=y |
54 | CONFIG_CMD_MEMTEST=y | 54 | CONFIG_CMD_MEMTEST=y |
55 | CONFIG_CMD_EXT2=y | 55 | CONFIG_CMD_EXT2=y |
56 | CONFIG_CMD_EXT4=y | 56 | CONFIG_CMD_EXT4=y |
57 | CONFIG_CMD_EXT4_WRITE=y | 57 | CONFIG_CMD_EXT4_WRITE=y |
58 | CONFIG_CMD_FAT=y | 58 | CONFIG_CMD_FAT=y |
59 | CONFIG_CMD_SF=y | 59 | CONFIG_CMD_SF=y |
60 | CONFIG_OF_CONTROL=y | 60 | CONFIG_OF_CONTROL=y |
61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" | 61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" |
62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" | 62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" |
63 | CONFIG_ENV_IS_IN_MMC=y | 63 | CONFIG_ENV_IS_IN_MMC=y |
64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 | 64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 |
65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | 65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | 66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
67 | CONFIG_MXC_GPIO=y | 67 | CONFIG_MXC_GPIO=y |
68 | CONFIG_DM_I2C=y | 68 | CONFIG_DM_I2C=y |
69 | CONFIG_CMD_GPT=y | 69 | CONFIG_CMD_GPT=y |
70 | CONFIG_CMD_TIME=y | 70 | CONFIG_CMD_TIME=y |
71 | CONFIG_SYS_I2C_MXC=y | 71 | CONFIG_SYS_I2C_MXC=y |
72 | CONFIG_DM_MMC=y | 72 | CONFIG_DM_MMC=y |
73 | CONFIG_SUPPORT_EMMC_BOOT=y | 73 | CONFIG_SUPPORT_EMMC_BOOT=y |
74 | CONFIG_FSL_USDHC=y | 74 | CONFIG_FSL_USDHC=y |
75 | CONFIG_DM_SPI_FLASH=y | 75 | CONFIG_DM_SPI_FLASH=y |
76 | CONFIG_DM_SPI=y | 76 | CONFIG_DM_SPI=y |
77 | CONFIG_FSL_QSPI=y | 77 | CONFIG_FSL_QSPI=y |
78 | CONFIG_SPI=y | 78 | CONFIG_SPI=y |
79 | CONFIG_SPI_FLASH=y | 79 | CONFIG_SPI_FLASH=y |
80 | CONFIG_SPI_FLASH_BAR=y | 80 | CONFIG_SPI_FLASH_BAR=y |
81 | CONFIG_SPI_FLASH_MACRONIX=y | 81 | CONFIG_SPI_FLASH_MACRONIX=y |
82 | CONFIG_SF_DEFAULT_BUS=0 | 82 | CONFIG_SF_DEFAULT_BUS=0 |
83 | CONFIG_SF_DEFAULT_CS=0 | 83 | CONFIG_SF_DEFAULT_CS=0 |
84 | CONFIG_SF_DEFAULT_SPEED=40000000 | 84 | CONFIG_SF_DEFAULT_SPEED=40000000 |
85 | CONFIG_SF_DEFAULT_MODE=0 | 85 | CONFIG_SF_DEFAULT_MODE=0 |
86 | 86 | ||
87 | CONFIG_PHYLIB=y | 87 | CONFIG_PHYLIB=y |
88 | CONFIG_PHY_ATHEROS=y | 88 | CONFIG_PHY_REALTEK=y |
89 | #CONFIG_MMC_IO_VOLTAGE=y | 89 | #CONFIG_MMC_IO_VOLTAGE=y |
90 | #CONFIG_MMC_UHS_SUPPORT=y | 90 | #CONFIG_MMC_UHS_SUPPORT=y |
91 | #CONFIG_MMC_HS400_SUPPORT=y | 91 | #CONFIG_MMC_HS400_SUPPORT=y |
92 | CONFIG_DM_ETH=y | 92 | CONFIG_DM_ETH=y |
93 | CONFIG_PHY_GIGE=y | 93 | CONFIG_PHY_GIGE=y |
94 | CONFIG_FEC_MXC=y | 94 | CONFIG_FEC_MXC=y |
95 | CONFIG_MII=y | 95 | CONFIG_MII=y |
96 | CONFIG_PINCTRL=y | 96 | CONFIG_PINCTRL=y |
97 | CONFIG_PINCTRL_IMX8M=y | 97 | CONFIG_PINCTRL_IMX8M=y |
98 | CONFIG_POWER_DOMAIN=y | 98 | CONFIG_POWER_DOMAIN=y |
99 | CONFIG_IMX8M_POWER_DOMAIN=y | 99 | CONFIG_IMX8M_POWER_DOMAIN=y |
100 | CONFIG_DM_REGULATOR=y | 100 | CONFIG_DM_REGULATOR=y |
101 | CONFIG_DM_REGULATOR_FIXED=y | 101 | CONFIG_DM_REGULATOR_FIXED=y |
102 | CONFIG_DM_REGULATOR_GPIO=y | 102 | CONFIG_DM_REGULATOR_GPIO=y |
103 | CONFIG_MXC_UART=y | 103 | CONFIG_MXC_UART=y |
104 | CONFIG_SYSRESET=y | 104 | CONFIG_SYSRESET=y |
105 | CONFIG_SYSRESET_PSCI=y | 105 | CONFIG_SYSRESET_PSCI=y |
106 | CONFIG_DM_THERMAL=y | 106 | CONFIG_DM_THERMAL=y |
107 | CONFIG_NXP_TMU=y | 107 | CONFIG_NXP_TMU=y |
108 | CONFIG_USB=y | 108 | CONFIG_USB=y |
109 | CONFIG_DM_USB=y | 109 | CONFIG_DM_USB=y |
110 | CONFIG_USB_GADGET=y | 110 | CONFIG_USB_GADGET=y |
111 | CONFIG_FASTBOOT=y | 111 | CONFIG_FASTBOOT=y |
112 | CONFIG_USB_FUNCTION_FASTBOOT=y | 112 | CONFIG_USB_FUNCTION_FASTBOOT=y |
113 | CONFIG_CMD_FASTBOOT=y | 113 | CONFIG_CMD_FASTBOOT=y |
114 | CONFIG_ANDROID_BOOT_IMAGE=y | 114 | CONFIG_ANDROID_BOOT_IMAGE=y |
115 | CONFIG_FASTBOOT_UUU_SUPPORT=y | 115 | CONFIG_FASTBOOT_UUU_SUPPORT=y |
116 | CONFIG_FASTBOOT_BUF_ADDR=0x42800000 | 116 | CONFIG_FASTBOOT_BUF_ADDR=0x42800000 |
117 | CONFIG_FASTBOOT_BUF_SIZE=0x40000000 | 117 | CONFIG_FASTBOOT_BUF_SIZE=0x40000000 |
118 | CONFIG_FASTBOOT_FLASH=y | 118 | CONFIG_FASTBOOT_FLASH=y |
119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | 119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 |
120 | CONFIG_EFI_PARTITION=y | 120 | CONFIG_EFI_PARTITION=y |
121 | CONFIG_SDP_LOADADDR=0x40400000 | 121 | CONFIG_SDP_LOADADDR=0x40400000 |
122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 | 122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 |
123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 | 123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 |
124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" | 124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" |
125 | CONFIG_USB_GADGET_DOWNLOAD=y | 125 | CONFIG_USB_GADGET_DOWNLOAD=y |
126 | CONFIG_SPL_USB_GADGET=y | 126 | CONFIG_SPL_USB_GADGET=y |
127 | CONFIG_SPL_USB_SDP_SUPPORT=y | 127 | CONFIG_SPL_USB_SDP_SUPPORT=y |
128 | CONFIG_USB_XHCI_HCD=y | 128 | CONFIG_USB_XHCI_HCD=y |
129 | CONFIG_USB_XHCI_IMX8M=y | 129 | CONFIG_USB_XHCI_IMX8M=y |
130 | CONFIG_USB_XHCI_DWC3=y | 130 | CONFIG_USB_XHCI_DWC3=y |
131 | CONFIG_USB_DWC3=y | 131 | CONFIG_USB_DWC3=y |
132 | CONFIG_USB_DWC3_GADGET=y | 132 | CONFIG_USB_DWC3_GADGET=y |
133 | CONFIG_OF_LIBFDT_OVERLAY=y | 133 | CONFIG_OF_LIBFDT_OVERLAY=y |
134 | 134 | ||
135 | CONFIG_VIDEO_IMX8M_DCSS=y | 135 | CONFIG_VIDEO_IMX8M_DCSS=y |
136 | CONFIG_VIDEO_IMX8M_HDMI=y | 136 | CONFIG_VIDEO_IMX8M_HDMI=y |
137 | CONFIG_DM_VIDEO=y | 137 | CONFIG_DM_VIDEO=y |
138 | CONFIG_SYS_WHITE_ON_BLACK=y | 138 | CONFIG_SYS_WHITE_ON_BLACK=y |
139 | 139 |
configs/smarcimx8mq_4g_ser3_android_defconfig
1 | CONFIG_ARM=y | 1 | CONFIG_ARM=y |
2 | CONFIG_SPL_SYS_ICACHE_OFF=y | 2 | CONFIG_SPL_SYS_ICACHE_OFF=y |
3 | CONFIG_SPL_SYS_DCACHE_OFF=y | 3 | CONFIG_SPL_SYS_DCACHE_OFF=y |
4 | CONFIG_ARCH_IMX8M=y | 4 | CONFIG_ARCH_IMX8M=y |
5 | CONFIG_SYS_TEXT_BASE=0x40200000 | 5 | CONFIG_SYS_TEXT_BASE=0x40200000 |
6 | CONFIG_SPL_GPIO_SUPPORT=y | 6 | CONFIG_SPL_GPIO_SUPPORT=y |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | 9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
10 | CONFIG_SYS_I2C_MXC_I2C1=y | 10 | CONFIG_SYS_I2C_MXC_I2C1=y |
11 | CONFIG_SYS_I2C_MXC_I2C2=y | 11 | CONFIG_SYS_I2C_MXC_I2C2=y |
12 | CONFIG_SYS_I2C_MXC_I2C3=y | 12 | CONFIG_SYS_I2C_MXC_I2C3=y |
13 | CONFIG_SYS_I2C_MXC_I2C4=y | 13 | CONFIG_SYS_I2C_MXC_I2C4=y |
14 | CONFIG_ENV_SIZE=0x1000 | 14 | CONFIG_ENV_SIZE=0x1000 |
15 | CONFIG_ENV_OFFSET=0x400000 | 15 | CONFIG_ENV_OFFSET=0x400000 |
16 | CONFIG_DM_GPIO=y | 16 | CONFIG_DM_GPIO=y |
17 | CONFIG_BOOTDELAY=1 | 17 | CONFIG_BOOTDELAY=1 |
18 | CONFIG_TARGET_SMARCIMX8MQ=y | 18 | CONFIG_TARGET_SMARCIMX8MQ=y |
19 | CONFIG_ARCH_MISC_INIT=y | 19 | CONFIG_ARCH_MISC_INIT=y |
20 | CONFIG_SPL_MMC_SUPPORT=y | 20 | CONFIG_SPL_MMC_SUPPORT=y |
21 | CONFIG_SPL_SERIAL_SUPPORT=y | 21 | CONFIG_SPL_SERIAL_SUPPORT=y |
22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y | 22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y |
23 | CONFIG_SPL=y | 23 | CONFIG_SPL=y |
24 | CONFIG_CSF_SIZE=0x2000 | 24 | CONFIG_CSF_SIZE=0x2000 |
25 | CONFIG_SPL_TEXT_BASE=0x7E1000 | 25 | CONFIG_SPL_TEXT_BASE=0x7E1000 |
26 | CONFIG_FIT=y | 26 | CONFIG_FIT=y |
27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | 27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
28 | CONFIG_SPL_LOAD_FIT=y | 28 | CONFIG_SPL_LOAD_FIT=y |
29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" | 29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" |
30 | CONFIG_OF_SYSTEM_SETUP=y | 30 | CONFIG_OF_SYSTEM_SETUP=y |
31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,4GB_LPDDR4,ANDROID_SUPPORT" | 31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,4GB_LPDDR4,ANDROID_SUPPORT" |
32 | CONFIG_CONSOLE_SER3=y | 32 | CONFIG_CONSOLE_SER3=y |
33 | CONFIG_BOARD_LATE_INIT=y | 33 | CONFIG_BOARD_LATE_INIT=y |
34 | CONFIG_BOARD_EARLY_INIT_F=y | 34 | CONFIG_BOARD_EARLY_INIT_F=y |
35 | CONFIG_SPL_BOARD_INIT=y | 35 | CONFIG_SPL_BOARD_INIT=y |
36 | CONFIG_SPL_SEPARATE_BSS=y | 36 | CONFIG_SPL_SEPARATE_BSS=y |
37 | CONFIG_SPL_I2C_SUPPORT=y | 37 | CONFIG_SPL_I2C_SUPPORT=y |
38 | CONFIG_SPL_POWER_SUPPORT=y | 38 | CONFIG_SPL_POWER_SUPPORT=y |
39 | CONFIG_HUSH_PARSER=y | 39 | CONFIG_HUSH_PARSER=y |
40 | CONFIG_SYS_PROMPT="u-boot$ " | 40 | CONFIG_SYS_PROMPT="u-boot$ " |
41 | # CONFIG_CMD_EXPORTENV is not set | 41 | # CONFIG_CMD_EXPORTENV is not set |
42 | CONFIG_CMD_IMPORTENV=y | 42 | CONFIG_CMD_IMPORTENV=y |
43 | # CONFIG_CMD_CRC32 is not set | 43 | # CONFIG_CMD_CRC32 is not set |
44 | # CONFIG_BOOTM_NETBSD is not set | 44 | # CONFIG_BOOTM_NETBSD is not set |
45 | CONFIG_CMD_FUSE=y | 45 | CONFIG_CMD_FUSE=y |
46 | CONFIG_CMD_GPIO=y | 46 | CONFIG_CMD_GPIO=y |
47 | CONFIG_CMD_I2C=y | 47 | CONFIG_CMD_I2C=y |
48 | CONFIG_CMD_MMC=y | 48 | CONFIG_CMD_MMC=y |
49 | CONFIG_CMD_DHCP=y | 49 | CONFIG_CMD_DHCP=y |
50 | CONFIG_CMD_MII=y | 50 | CONFIG_CMD_MII=y |
51 | CONFIG_CMD_PING=y | 51 | CONFIG_CMD_PING=y |
52 | CONFIG_CMD_CACHE=y | 52 | CONFIG_CMD_CACHE=y |
53 | CONFIG_CMD_REGULATOR=y | 53 | CONFIG_CMD_REGULATOR=y |
54 | CONFIG_CMD_MEMTEST=y | 54 | CONFIG_CMD_MEMTEST=y |
55 | CONFIG_CMD_EXT2=y | 55 | CONFIG_CMD_EXT2=y |
56 | CONFIG_CMD_EXT4=y | 56 | CONFIG_CMD_EXT4=y |
57 | CONFIG_CMD_EXT4_WRITE=y | 57 | CONFIG_CMD_EXT4_WRITE=y |
58 | CONFIG_CMD_FAT=y | 58 | CONFIG_CMD_FAT=y |
59 | CONFIG_CMD_SF=y | 59 | CONFIG_CMD_SF=y |
60 | CONFIG_OF_CONTROL=y | 60 | CONFIG_OF_CONTROL=y |
61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" | 61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" |
62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" | 62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" |
63 | CONFIG_ENV_IS_IN_MMC=y | 63 | CONFIG_ENV_IS_IN_MMC=y |
64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 | 64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 |
65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | 65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | 66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
67 | CONFIG_MXC_GPIO=y | 67 | CONFIG_MXC_GPIO=y |
68 | CONFIG_DM_I2C=y | 68 | CONFIG_DM_I2C=y |
69 | CONFIG_CMD_GPT=y | 69 | CONFIG_CMD_GPT=y |
70 | CONFIG_CMD_TIME=y | 70 | CONFIG_CMD_TIME=y |
71 | CONFIG_SYS_I2C_MXC=y | 71 | CONFIG_SYS_I2C_MXC=y |
72 | CONFIG_DM_MMC=y | 72 | CONFIG_DM_MMC=y |
73 | CONFIG_SUPPORT_EMMC_BOOT=y | 73 | CONFIG_SUPPORT_EMMC_BOOT=y |
74 | CONFIG_FSL_USDHC=y | 74 | CONFIG_FSL_USDHC=y |
75 | CONFIG_DM_SPI_FLASH=y | 75 | CONFIG_DM_SPI_FLASH=y |
76 | CONFIG_DM_SPI=y | 76 | CONFIG_DM_SPI=y |
77 | CONFIG_FSL_QSPI=y | 77 | CONFIG_FSL_QSPI=y |
78 | CONFIG_SPI=y | 78 | CONFIG_SPI=y |
79 | CONFIG_SPI_FLASH=y | 79 | CONFIG_SPI_FLASH=y |
80 | CONFIG_SPI_FLASH_BAR=y | 80 | CONFIG_SPI_FLASH_BAR=y |
81 | CONFIG_SPI_FLASH_MACRONIX=y | 81 | CONFIG_SPI_FLASH_MACRONIX=y |
82 | CONFIG_SF_DEFAULT_BUS=0 | 82 | CONFIG_SF_DEFAULT_BUS=0 |
83 | CONFIG_SF_DEFAULT_CS=0 | 83 | CONFIG_SF_DEFAULT_CS=0 |
84 | CONFIG_SF_DEFAULT_SPEED=40000000 | 84 | CONFIG_SF_DEFAULT_SPEED=40000000 |
85 | CONFIG_SF_DEFAULT_MODE=0 | 85 | CONFIG_SF_DEFAULT_MODE=0 |
86 | 86 | ||
87 | CONFIG_PHYLIB=y | 87 | CONFIG_PHYLIB=y |
88 | CONFIG_PHY_ATHEROS=y | 88 | CONFIG_PHY_REALTEK=y |
89 | #CONFIG_MMC_IO_VOLTAGE=y | 89 | #CONFIG_MMC_IO_VOLTAGE=y |
90 | #CONFIG_MMC_UHS_SUPPORT=y | 90 | #CONFIG_MMC_UHS_SUPPORT=y |
91 | #CONFIG_MMC_HS400_SUPPORT=y | 91 | #CONFIG_MMC_HS400_SUPPORT=y |
92 | CONFIG_DM_ETH=y | 92 | CONFIG_DM_ETH=y |
93 | CONFIG_PHY_GIGE=y | 93 | CONFIG_PHY_GIGE=y |
94 | CONFIG_FEC_MXC=y | 94 | CONFIG_FEC_MXC=y |
95 | CONFIG_MII=y | 95 | CONFIG_MII=y |
96 | CONFIG_PINCTRL=y | 96 | CONFIG_PINCTRL=y |
97 | CONFIG_PINCTRL_IMX8M=y | 97 | CONFIG_PINCTRL_IMX8M=y |
98 | CONFIG_POWER_DOMAIN=y | 98 | CONFIG_POWER_DOMAIN=y |
99 | CONFIG_IMX8M_POWER_DOMAIN=y | 99 | CONFIG_IMX8M_POWER_DOMAIN=y |
100 | CONFIG_DM_REGULATOR=y | 100 | CONFIG_DM_REGULATOR=y |
101 | CONFIG_DM_REGULATOR_FIXED=y | 101 | CONFIG_DM_REGULATOR_FIXED=y |
102 | CONFIG_DM_REGULATOR_GPIO=y | 102 | CONFIG_DM_REGULATOR_GPIO=y |
103 | CONFIG_MXC_UART=y | 103 | CONFIG_MXC_UART=y |
104 | CONFIG_SYSRESET=y | 104 | CONFIG_SYSRESET=y |
105 | CONFIG_SYSRESET_PSCI=y | 105 | CONFIG_SYSRESET_PSCI=y |
106 | CONFIG_DM_THERMAL=y | 106 | CONFIG_DM_THERMAL=y |
107 | CONFIG_NXP_TMU=y | 107 | CONFIG_NXP_TMU=y |
108 | CONFIG_USB=y | 108 | CONFIG_USB=y |
109 | CONFIG_DM_USB=y | 109 | CONFIG_DM_USB=y |
110 | CONFIG_USB_GADGET=y | 110 | CONFIG_USB_GADGET=y |
111 | CONFIG_FASTBOOT=y | 111 | CONFIG_FASTBOOT=y |
112 | CONFIG_USB_FUNCTION_FASTBOOT=y | 112 | CONFIG_USB_FUNCTION_FASTBOOT=y |
113 | CONFIG_CMD_FASTBOOT=y | 113 | CONFIG_CMD_FASTBOOT=y |
114 | CONFIG_ANDROID_BOOT_IMAGE=y | 114 | CONFIG_ANDROID_BOOT_IMAGE=y |
115 | CONFIG_FASTBOOT_UUU_SUPPORT=n | 115 | CONFIG_FASTBOOT_UUU_SUPPORT=n |
116 | CONFIG_FASTBOOT_BUF_ADDR=0x44800000 | 116 | CONFIG_FASTBOOT_BUF_ADDR=0x44800000 |
117 | CONFIG_FASTBOOT_BUF_SIZE=0x19000000 | 117 | CONFIG_FASTBOOT_BUF_SIZE=0x19000000 |
118 | CONFIG_FASTBOOT_FLASH=y | 118 | CONFIG_FASTBOOT_FLASH=y |
119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | 119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 |
120 | CONFIG_EFI_PARTITION=y | 120 | CONFIG_EFI_PARTITION=y |
121 | CONFIG_SDP_LOADADDR=0x40400000 | 121 | CONFIG_SDP_LOADADDR=0x40400000 |
122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 | 122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 |
123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 | 123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 |
124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" | 124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" |
125 | CONFIG_USB_GADGET_DOWNLOAD=y | 125 | CONFIG_USB_GADGET_DOWNLOAD=y |
126 | CONFIG_SPL_USB_GADGET=y | 126 | CONFIG_SPL_USB_GADGET=y |
127 | CONFIG_SPL_USB_SDP_SUPPORT=y | 127 | CONFIG_SPL_USB_SDP_SUPPORT=y |
128 | CONFIG_USB_XHCI_HCD=y | 128 | CONFIG_USB_XHCI_HCD=y |
129 | CONFIG_USB_XHCI_IMX8M=y | 129 | CONFIG_USB_XHCI_IMX8M=y |
130 | CONFIG_USB_XHCI_DWC3=y | 130 | CONFIG_USB_XHCI_DWC3=y |
131 | CONFIG_USB_DWC3=y | 131 | CONFIG_USB_DWC3=y |
132 | CONFIG_USB_DWC3_GADGET=y | 132 | CONFIG_USB_DWC3_GADGET=y |
133 | CONFIG_OF_LIBFDT_OVERLAY=y | 133 | CONFIG_OF_LIBFDT_OVERLAY=y |
134 | 134 | ||
135 | CONFIG_VIDEO_IMX8M_DCSS=y | 135 | CONFIG_VIDEO_IMX8M_DCSS=y |
136 | CONFIG_VIDEO_IMX8M_HDMI=y | 136 | CONFIG_VIDEO_IMX8M_HDMI=y |
137 | CONFIG_DM_VIDEO=y | 137 | CONFIG_DM_VIDEO=y |
138 | CONFIG_SYS_WHITE_ON_BLACK=y | 138 | CONFIG_SYS_WHITE_ON_BLACK=y |
139 | 139 | ||
140 | CONFIG_LZ4=y | 140 | CONFIG_LZ4=y |
141 | CONFIG_BCB_SUPPORT=y | 141 | CONFIG_BCB_SUPPORT=y |
142 | CONFIG_ANDROID_RECOVERY=y | 142 | CONFIG_ANDROID_RECOVERY=y |
143 | CONFIG_SUPPORT_RAW_INITRD=y | 143 | CONFIG_SUPPORT_RAW_INITRD=y |
144 | CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y | 144 | CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y |
145 | CONFIG_FSL_FASTBOOT=y | 145 | CONFIG_FSL_FASTBOOT=y |
146 | CONFIG_FASTBOOT_LOCK=y | 146 | CONFIG_FASTBOOT_LOCK=y |
147 | CONFIG_CMD_BOOTA=y | 147 | CONFIG_CMD_BOOTA=y |
148 | CONFIG_LIBAVB=y | 148 | CONFIG_LIBAVB=y |
149 | CONFIG_AVB_SUPPORT=y | 149 | CONFIG_AVB_SUPPORT=y |
150 | CONFIG_APPEND_BOOTARGS=y | 150 | CONFIG_APPEND_BOOTARGS=y |
151 | CONFIG_AVB_WARNING_LOGO=y | 151 | CONFIG_AVB_WARNING_LOGO=y |
152 | CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 | 152 | CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 |
153 | CONFIG_AVB_WARNING_LOGO_ROWS=0x60 | 153 | CONFIG_AVB_WARNING_LOGO_ROWS=0x60 |
154 | 154 |
configs/smarcimx8mq_4g_ser3_defconfig
1 | CONFIG_ARM=y | 1 | CONFIG_ARM=y |
2 | CONFIG_SPL_SYS_ICACHE_OFF=y | 2 | CONFIG_SPL_SYS_ICACHE_OFF=y |
3 | CONFIG_SPL_SYS_DCACHE_OFF=y | 3 | CONFIG_SPL_SYS_DCACHE_OFF=y |
4 | CONFIG_ARCH_IMX8M=y | 4 | CONFIG_ARCH_IMX8M=y |
5 | CONFIG_SYS_TEXT_BASE=0x40200000 | 5 | CONFIG_SYS_TEXT_BASE=0x40200000 |
6 | CONFIG_SPL_GPIO_SUPPORT=y | 6 | CONFIG_SPL_GPIO_SUPPORT=y |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | 9 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
10 | CONFIG_SYS_I2C_MXC_I2C1=y | 10 | CONFIG_SYS_I2C_MXC_I2C1=y |
11 | CONFIG_SYS_I2C_MXC_I2C2=y | 11 | CONFIG_SYS_I2C_MXC_I2C2=y |
12 | CONFIG_SYS_I2C_MXC_I2C3=y | 12 | CONFIG_SYS_I2C_MXC_I2C3=y |
13 | CONFIG_SYS_I2C_MXC_I2C4=y | 13 | CONFIG_SYS_I2C_MXC_I2C4=y |
14 | CONFIG_ENV_SIZE=0x1000 | 14 | CONFIG_ENV_SIZE=0x1000 |
15 | CONFIG_ENV_OFFSET=0x400000 | 15 | CONFIG_ENV_OFFSET=0x400000 |
16 | CONFIG_DM_GPIO=y | 16 | CONFIG_DM_GPIO=y |
17 | CONFIG_BOOTDELAY=1 | 17 | CONFIG_BOOTDELAY=1 |
18 | CONFIG_TARGET_SMARCIMX8MQ=y | 18 | CONFIG_TARGET_SMARCIMX8MQ=y |
19 | CONFIG_ARCH_MISC_INIT=y | 19 | CONFIG_ARCH_MISC_INIT=y |
20 | CONFIG_SPL_MMC_SUPPORT=y | 20 | CONFIG_SPL_MMC_SUPPORT=y |
21 | CONFIG_SPL_SERIAL_SUPPORT=y | 21 | CONFIG_SPL_SERIAL_SUPPORT=y |
22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y | 22 | CONFIG_SPL_DRIVERS_MISC_SUPPORT=y |
23 | CONFIG_SPL=y | 23 | CONFIG_SPL=y |
24 | CONFIG_CSF_SIZE=0x2000 | 24 | CONFIG_CSF_SIZE=0x2000 |
25 | CONFIG_SPL_TEXT_BASE=0x7E1000 | 25 | CONFIG_SPL_TEXT_BASE=0x7E1000 |
26 | CONFIG_FIT=y | 26 | CONFIG_FIT=y |
27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | 27 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
28 | CONFIG_SPL_LOAD_FIT=y | 28 | CONFIG_SPL_LOAD_FIT=y |
29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" | 29 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" |
30 | CONFIG_OF_SYSTEM_SETUP=y | 30 | CONFIG_OF_SYSTEM_SETUP=y |
31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,4GB_LPDDR4" | 31 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,4GB_LPDDR4" |
32 | CONFIG_CONSOLE_SER3=y | 32 | CONFIG_CONSOLE_SER3=y |
33 | CONFIG_BOARD_LATE_INIT=y | 33 | CONFIG_BOARD_LATE_INIT=y |
34 | CONFIG_BOARD_EARLY_INIT_F=y | 34 | CONFIG_BOARD_EARLY_INIT_F=y |
35 | CONFIG_SPL_BOARD_INIT=y | 35 | CONFIG_SPL_BOARD_INIT=y |
36 | CONFIG_SPL_SEPARATE_BSS=y | 36 | CONFIG_SPL_SEPARATE_BSS=y |
37 | CONFIG_SPL_I2C_SUPPORT=y | 37 | CONFIG_SPL_I2C_SUPPORT=y |
38 | CONFIG_SPL_POWER_SUPPORT=y | 38 | CONFIG_SPL_POWER_SUPPORT=y |
39 | CONFIG_HUSH_PARSER=y | 39 | CONFIG_HUSH_PARSER=y |
40 | CONFIG_SYS_PROMPT="u-boot$ " | 40 | CONFIG_SYS_PROMPT="u-boot$ " |
41 | # CONFIG_CMD_EXPORTENV is not set | 41 | # CONFIG_CMD_EXPORTENV is not set |
42 | CONFIG_CMD_IMPORTENV=y | 42 | CONFIG_CMD_IMPORTENV=y |
43 | # CONFIG_CMD_CRC32 is not set | 43 | # CONFIG_CMD_CRC32 is not set |
44 | # CONFIG_BOOTM_NETBSD is not set | 44 | # CONFIG_BOOTM_NETBSD is not set |
45 | CONFIG_CMD_FUSE=y | 45 | CONFIG_CMD_FUSE=y |
46 | CONFIG_CMD_GPIO=y | 46 | CONFIG_CMD_GPIO=y |
47 | CONFIG_CMD_I2C=y | 47 | CONFIG_CMD_I2C=y |
48 | CONFIG_CMD_MMC=y | 48 | CONFIG_CMD_MMC=y |
49 | CONFIG_CMD_DHCP=y | 49 | CONFIG_CMD_DHCP=y |
50 | CONFIG_CMD_MII=y | 50 | CONFIG_CMD_MII=y |
51 | CONFIG_CMD_PING=y | 51 | CONFIG_CMD_PING=y |
52 | CONFIG_CMD_CACHE=y | 52 | CONFIG_CMD_CACHE=y |
53 | CONFIG_CMD_REGULATOR=y | 53 | CONFIG_CMD_REGULATOR=y |
54 | CONFIG_CMD_MEMTEST=y | 54 | CONFIG_CMD_MEMTEST=y |
55 | CONFIG_CMD_EXT2=y | 55 | CONFIG_CMD_EXT2=y |
56 | CONFIG_CMD_EXT4=y | 56 | CONFIG_CMD_EXT4=y |
57 | CONFIG_CMD_EXT4_WRITE=y | 57 | CONFIG_CMD_EXT4_WRITE=y |
58 | CONFIG_CMD_FAT=y | 58 | CONFIG_CMD_FAT=y |
59 | CONFIG_CMD_SF=y | 59 | CONFIG_CMD_SF=y |
60 | CONFIG_OF_CONTROL=y | 60 | CONFIG_OF_CONTROL=y |
61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" | 61 | CONFIG_DEFAULT_DEVICE_TREE="imx8mq-smarc" |
62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" | 62 | CONFIG_DEFAULT_FDT_FILE="imx8mq-smarc.dtb" |
63 | CONFIG_ENV_IS_IN_MMC=y | 63 | CONFIG_ENV_IS_IN_MMC=y |
64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 | 64 | CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 |
65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | 65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | 66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
67 | CONFIG_MXC_GPIO=y | 67 | CONFIG_MXC_GPIO=y |
68 | CONFIG_DM_I2C=y | 68 | CONFIG_DM_I2C=y |
69 | CONFIG_CMD_GPT=y | 69 | CONFIG_CMD_GPT=y |
70 | CONFIG_CMD_TIME=y | 70 | CONFIG_CMD_TIME=y |
71 | CONFIG_SYS_I2C_MXC=y | 71 | CONFIG_SYS_I2C_MXC=y |
72 | CONFIG_DM_MMC=y | 72 | CONFIG_DM_MMC=y |
73 | CONFIG_SUPPORT_EMMC_BOOT=y | 73 | CONFIG_SUPPORT_EMMC_BOOT=y |
74 | CONFIG_FSL_USDHC=y | 74 | CONFIG_FSL_USDHC=y |
75 | CONFIG_DM_SPI_FLASH=y | 75 | CONFIG_DM_SPI_FLASH=y |
76 | CONFIG_DM_SPI=y | 76 | CONFIG_DM_SPI=y |
77 | CONFIG_FSL_QSPI=y | 77 | CONFIG_FSL_QSPI=y |
78 | CONFIG_SPI=y | 78 | CONFIG_SPI=y |
79 | CONFIG_SPI_FLASH=y | 79 | CONFIG_SPI_FLASH=y |
80 | CONFIG_SPI_FLASH_BAR=y | 80 | CONFIG_SPI_FLASH_BAR=y |
81 | CONFIG_SPI_FLASH_MACRONIX=y | 81 | CONFIG_SPI_FLASH_MACRONIX=y |
82 | CONFIG_SF_DEFAULT_BUS=0 | 82 | CONFIG_SF_DEFAULT_BUS=0 |
83 | CONFIG_SF_DEFAULT_CS=0 | 83 | CONFIG_SF_DEFAULT_CS=0 |
84 | CONFIG_SF_DEFAULT_SPEED=40000000 | 84 | CONFIG_SF_DEFAULT_SPEED=40000000 |
85 | CONFIG_SF_DEFAULT_MODE=0 | 85 | CONFIG_SF_DEFAULT_MODE=0 |
86 | 86 | ||
87 | CONFIG_PHYLIB=y | 87 | CONFIG_PHYLIB=y |
88 | CONFIG_PHY_ATHEROS=y | 88 | CONFIG_PHY_REALTEK=y |
89 | #CONFIG_MMC_IO_VOLTAGE=y | 89 | #CONFIG_MMC_IO_VOLTAGE=y |
90 | #CONFIG_MMC_UHS_SUPPORT=y | 90 | #CONFIG_MMC_UHS_SUPPORT=y |
91 | #CONFIG_MMC_HS400_SUPPORT=y | 91 | #CONFIG_MMC_HS400_SUPPORT=y |
92 | CONFIG_DM_ETH=y | 92 | CONFIG_DM_ETH=y |
93 | CONFIG_PHY_GIGE=y | 93 | CONFIG_PHY_GIGE=y |
94 | CONFIG_FEC_MXC=y | 94 | CONFIG_FEC_MXC=y |
95 | CONFIG_MII=y | 95 | CONFIG_MII=y |
96 | CONFIG_PINCTRL=y | 96 | CONFIG_PINCTRL=y |
97 | CONFIG_PINCTRL_IMX8M=y | 97 | CONFIG_PINCTRL_IMX8M=y |
98 | CONFIG_POWER_DOMAIN=y | 98 | CONFIG_POWER_DOMAIN=y |
99 | CONFIG_IMX8M_POWER_DOMAIN=y | 99 | CONFIG_IMX8M_POWER_DOMAIN=y |
100 | CONFIG_DM_REGULATOR=y | 100 | CONFIG_DM_REGULATOR=y |
101 | CONFIG_DM_REGULATOR_FIXED=y | 101 | CONFIG_DM_REGULATOR_FIXED=y |
102 | CONFIG_DM_REGULATOR_GPIO=y | 102 | CONFIG_DM_REGULATOR_GPIO=y |
103 | CONFIG_MXC_UART=y | 103 | CONFIG_MXC_UART=y |
104 | CONFIG_SYSRESET=y | 104 | CONFIG_SYSRESET=y |
105 | CONFIG_SYSRESET_PSCI=y | 105 | CONFIG_SYSRESET_PSCI=y |
106 | CONFIG_DM_THERMAL=y | 106 | CONFIG_DM_THERMAL=y |
107 | CONFIG_NXP_TMU=y | 107 | CONFIG_NXP_TMU=y |
108 | CONFIG_USB=y | 108 | CONFIG_USB=y |
109 | CONFIG_DM_USB=y | 109 | CONFIG_DM_USB=y |
110 | CONFIG_USB_GADGET=y | 110 | CONFIG_USB_GADGET=y |
111 | CONFIG_FASTBOOT=y | 111 | CONFIG_FASTBOOT=y |
112 | CONFIG_USB_FUNCTION_FASTBOOT=y | 112 | CONFIG_USB_FUNCTION_FASTBOOT=y |
113 | CONFIG_CMD_FASTBOOT=y | 113 | CONFIG_CMD_FASTBOOT=y |
114 | CONFIG_ANDROID_BOOT_IMAGE=y | 114 | CONFIG_ANDROID_BOOT_IMAGE=y |
115 | CONFIG_FASTBOOT_UUU_SUPPORT=y | 115 | CONFIG_FASTBOOT_UUU_SUPPORT=y |
116 | CONFIG_FASTBOOT_BUF_ADDR=0x42800000 | 116 | CONFIG_FASTBOOT_BUF_ADDR=0x42800000 |
117 | CONFIG_FASTBOOT_BUF_SIZE=0x40000000 | 117 | CONFIG_FASTBOOT_BUF_SIZE=0x40000000 |
118 | CONFIG_FASTBOOT_FLASH=y | 118 | CONFIG_FASTBOOT_FLASH=y |
119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | 119 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 |
120 | CONFIG_EFI_PARTITION=y | 120 | CONFIG_EFI_PARTITION=y |
121 | CONFIG_SDP_LOADADDR=0x40400000 | 121 | CONFIG_SDP_LOADADDR=0x40400000 |
122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 | 122 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 |
123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 | 123 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 |
124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" | 124 | CONFIG_USB_GADGET_MANUFACTURER="FSL" |
125 | CONFIG_USB_GADGET_DOWNLOAD=y | 125 | CONFIG_USB_GADGET_DOWNLOAD=y |
126 | CONFIG_SPL_USB_GADGET=y | 126 | CONFIG_SPL_USB_GADGET=y |
127 | CONFIG_SPL_USB_SDP_SUPPORT=y | 127 | CONFIG_SPL_USB_SDP_SUPPORT=y |
128 | CONFIG_USB_XHCI_HCD=y | 128 | CONFIG_USB_XHCI_HCD=y |
129 | CONFIG_USB_XHCI_IMX8M=y | 129 | CONFIG_USB_XHCI_IMX8M=y |
130 | CONFIG_USB_XHCI_DWC3=y | 130 | CONFIG_USB_XHCI_DWC3=y |
131 | CONFIG_USB_DWC3=y | 131 | CONFIG_USB_DWC3=y |
132 | CONFIG_USB_DWC3_GADGET=y | 132 | CONFIG_USB_DWC3_GADGET=y |
133 | CONFIG_OF_LIBFDT_OVERLAY=y | 133 | CONFIG_OF_LIBFDT_OVERLAY=y |
134 | 134 | ||
135 | CONFIG_VIDEO_IMX8M_DCSS=y | 135 | CONFIG_VIDEO_IMX8M_DCSS=y |
136 | CONFIG_VIDEO_IMX8M_HDMI=y | 136 | CONFIG_VIDEO_IMX8M_HDMI=y |
137 | CONFIG_DM_VIDEO=y | 137 | CONFIG_DM_VIDEO=y |
138 | CONFIG_SYS_WHITE_ON_BLACK=y | 138 | CONFIG_SYS_WHITE_ON_BLACK=y |
139 | 139 |
include/configs/smarcimx8mq.h
1 | /* SPDX-License-Identifier: GPL-2.0+ */ | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* | 2 | /* |
3 | * Copyright 2018 NXP | 3 | * Copyright 2018 NXP |
4 | */ | 4 | */ |
5 | 5 | ||
6 | #ifndef __SMARCIMX8MQ_H | 6 | #ifndef __SMARCIMX8MQ_H |
7 | #define __SMARCIMX8MQ_H | 7 | #define __SMARCIMX8MQ_H |
8 | 8 | ||
9 | #include <linux/sizes.h> | 9 | #include <linux/sizes.h> |
10 | #include <asm/arch/imx-regs.h> | 10 | #include <asm/arch/imx-regs.h> |
11 | #include "imx_env.h" | 11 | #include "imx_env.h" |
12 | 12 | ||
13 | #define CONFIG_SPL_MAX_SIZE (148 * 1024) | 13 | #define CONFIG_SPL_MAX_SIZE (148 * 1024) |
14 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) | 14 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) |
15 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR | 15 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR |
16 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (0x300 + CONFIG_SECONDARY_BOOT_SECTOR_OFFSET) | 16 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (0x300 + CONFIG_SECONDARY_BOOT_SECTOR_OFFSET) |
17 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 | 17 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
18 | 18 | ||
19 | #ifdef CONFIG_SPL_BUILD | 19 | #ifdef CONFIG_SPL_BUILD |
20 | /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ | 20 | /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ |
21 | #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" | 21 | #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" |
22 | #define CONFIG_SPL_STACK 0x187FF0 | 22 | #define CONFIG_SPL_STACK 0x187FF0 |
23 | #define CONFIG_SPL_BSS_START_ADDR 0x00180000 | 23 | #define CONFIG_SPL_BSS_START_ADDR 0x00180000 |
24 | #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ | 24 | #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ |
25 | #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 | 25 | #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 |
26 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ | 26 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ |
27 | #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 | 27 | #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 |
28 | 28 | ||
29 | /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ | 29 | /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ |
30 | #define CONFIG_MALLOC_F_ADDR 0x182000 | 30 | #define CONFIG_MALLOC_F_ADDR 0x182000 |
31 | /* For RAW image gives a error info not panic */ | 31 | /* For RAW image gives a error info not panic */ |
32 | #define CONFIG_SPL_ABORT_ON_RAW_IMAGE | 32 | #define CONFIG_SPL_ABORT_ON_RAW_IMAGE |
33 | 33 | ||
34 | #undef CONFIG_DM_MMC | 34 | #undef CONFIG_DM_MMC |
35 | #undef CONFIG_DM_PMIC | 35 | #undef CONFIG_DM_PMIC |
36 | #undef CONFIG_DM_PMIC_PFUZE100 | 36 | #undef CONFIG_DM_PMIC_PFUZE100 |
37 | 37 | ||
38 | #define CONFIG_SYS_I2C | 38 | #define CONFIG_SYS_I2C |
39 | 39 | ||
40 | #define CONFIG_POWER | 40 | #define CONFIG_POWER |
41 | #define CONFIG_POWER_I2C | 41 | #define CONFIG_POWER_I2C |
42 | #define CONFIG_POWER_PFUZE100 | 42 | #define CONFIG_POWER_PFUZE100 |
43 | #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 | 43 | #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 |
44 | #endif | 44 | #endif |
45 | 45 | ||
46 | #define CONFIG_REMAKE_ELF | 46 | #define CONFIG_REMAKE_ELF |
47 | 47 | ||
48 | /* ENET Config */ | 48 | /* ENET Config */ |
49 | /* ENET1 */ | 49 | /* ENET1 */ |
50 | #if defined(CONFIG_FEC_MXC) | 50 | #if defined(CONFIG_FEC_MXC) |
51 | #define CONFIG_ETHPRIME "FEC" | 51 | #define CONFIG_ETHPRIME "FEC" |
52 | #define PHY_ANEG_TIMEOUT 20000 | 52 | #define PHY_ANEG_TIMEOUT 20000 |
53 | 53 | ||
54 | #define CONFIG_FEC_XCV_TYPE RGMII | 54 | #define CONFIG_FEC_XCV_TYPE RGMII |
55 | #define CONFIG_FEC_MXC_PHYADDR 6 | 55 | #define CONFIG_FEC_MXC_PHYADDR 1 |
56 | #define FEC_QUIRK_ENET_MAC | 56 | #define FEC_QUIRK_ENET_MAC |
57 | 57 | ||
58 | #define IMX_FEC_BASE 0x30BE0000 | 58 | #define IMX_FEC_BASE 0x30BE0000 |
59 | #endif | 59 | #endif |
60 | 60 | ||
61 | /* | 61 | /* |
62 | * Another approach is add the clocks for inmates into clks_init_on | 62 | * Another approach is add the clocks for inmates into clks_init_on |
63 | * in clk-imx8mq.c, then clk_ingore_unused could be removed. | 63 | * in clk-imx8mq.c, then clk_ingore_unused could be removed. |
64 | */ | 64 | */ |
65 | #define JAILHOUSE_ENV \ | 65 | #define JAILHOUSE_ENV \ |
66 | "jh_clk= \0 " \ | 66 | "jh_clk= \0 " \ |
67 | "jh_mmcboot=setenv fdt_file imx8mq-smarc.dtb; " \ | 67 | "jh_mmcboot=setenv fdt_file imx8mq-smarc.dtb; " \ |
68 | "setenv jh_clk clk_ignore_unused; " \ | 68 | "setenv jh_clk clk_ignore_unused; " \ |
69 | "if run loadimage; then " \ | 69 | "if run loadimage; then " \ |
70 | "run mmcboot; " \ | 70 | "run mmcboot; " \ |
71 | "else run jh_netboot; fi; \0" \ | 71 | "else run jh_netboot; fi; \0" \ |
72 | "jh_netboot=setenv fdt_file imx8mq-smarc.dtb; setenv jh_clk clk_ignore_unused; run netboot; \0 " | 72 | "jh_netboot=setenv fdt_file imx8mq-smarc.dtb; setenv jh_clk clk_ignore_unused; run netboot; \0 " |
73 | 73 | ||
74 | #define CONFIG_MFG_ENV_SETTINGS \ | 74 | #define CONFIG_MFG_ENV_SETTINGS \ |
75 | CONFIG_MFG_ENV_SETTINGS_DEFAULT \ | 75 | CONFIG_MFG_ENV_SETTINGS_DEFAULT \ |
76 | "initrd_addr=0x43800000\0" \ | 76 | "initrd_addr=0x43800000\0" \ |
77 | "initrd_high=0xffffffffffffffff\0" \ | 77 | "initrd_high=0xffffffffffffffff\0" \ |
78 | "emmc_dev=0\0"\ | 78 | "emmc_dev=0\0"\ |
79 | "sd_dev=1\0" \ | 79 | "sd_dev=1\0" \ |
80 | 80 | ||
81 | /* Initial environment variables */ | 81 | /* Initial environment variables */ |
82 | #define CONFIG_EXTRA_ENV_SETTINGS \ | 82 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
83 | CONFIG_MFG_ENV_SETTINGS \ | 83 | CONFIG_MFG_ENV_SETTINGS \ |
84 | JAILHOUSE_ENV \ | 84 | JAILHOUSE_ENV \ |
85 | "script=boot.scr\0" \ | 85 | "script=boot.scr\0" \ |
86 | "image=Image\0" \ | 86 | "image=Image\0" \ |
87 | "splashimage=0x50000000\0" \ | 87 | "splashimage=0x50000000\0" \ |
88 | "m4_bin=hello_world.bin\0" \ | 88 | "m4_bin=hello_world.bin\0" \ |
89 | "use_m4=no\0" \ | 89 | "use_m4=no\0" \ |
90 | "console=ttymxc0,115200\0" \ | 90 | "console=ttymxc0,115200\0" \ |
91 | "fdt_addr=0x43000000\0" \ | 91 | "fdt_addr=0x43000000\0" \ |
92 | "m4_addr=0x7e0000\0" \ | 92 | "m4_addr=0x7e0000\0" \ |
93 | "m4_addr_tmp=0x48000000\0" \ | 93 | "m4_addr_tmp=0x48000000\0" \ |
94 | "fdt_high=0xffffffffffffffff\0" \ | 94 | "fdt_high=0xffffffffffffffff\0" \ |
95 | "boot_fdt=try\0" \ | 95 | "boot_fdt=try\0" \ |
96 | "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ | 96 | "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ |
97 | "initrd_addr=0x43800000\0" \ | 97 | "initrd_addr=0x43800000\0" \ |
98 | "initrd_high=0xffffffffffffffff\0" \ | 98 | "initrd_high=0xffffffffffffffff\0" \ |
99 | "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ | 99 | "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ |
100 | "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ | 100 | "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ |
101 | "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ | 101 | "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ |
102 | "usbroot=/dev/sda2 rootwait ro\0" \ | 102 | "usbroot=/dev/sda2 rootwait ro\0" \ |
103 | "mmcrootfstype=ext4 rootwait\0" \ | 103 | "mmcrootfstype=ext4 rootwait\0" \ |
104 | "loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} uEnv.txt\0" \ | 104 | "loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} uEnv.txt\0" \ |
105 | "loadusbbootenv=fatload usb 0:1 ${loadaddr} uEnv.txt\0" \ | 105 | "loadusbbootenv=fatload usb 0:1 ${loadaddr} uEnv.txt\0" \ |
106 | "mmcautodetect=yes\0" \ | 106 | "mmcautodetect=yes\0" \ |
107 | "importbootenv=echo Importing environment from mmc (uEnv.txt)...; " \ | 107 | "importbootenv=echo Importing environment from mmc (uEnv.txt)...; " \ |
108 | "env import -t $loadaddr $filesize\0" \ | 108 | "env import -t $loadaddr $filesize\0" \ |
109 | "importusbbootenv=echo Importing environment from USB (uEnv.txt)...; " \ | 109 | "importusbbootenv=echo Importing environment from USB (uEnv.txt)...; " \ |
110 | "env import -t $loadaddr $filesize\0" \ | 110 | "env import -t $loadaddr $filesize\0" \ |
111 | "mmcargs=setenv bootargs ${jh_clk} console=${console} ${optargs} " \ | 111 | "mmcargs=setenv bootargs ${jh_clk} console=${console} ${optargs} " \ |
112 | "rootfstype=${mmcrootfstype} root=${mmcroot}\0 " \ | 112 | "rootfstype=${mmcrootfstype} root=${mmcroot}\0 " \ |
113 | "usbargs=setenv bootargs ${jh_clk} console=${console} ${optargs} " \ | 113 | "usbargs=setenv bootargs ${jh_clk} console=${console} ${optargs} " \ |
114 | "rootfsusbtype=${usbrootfstype} root=${usbroot}\0 " \ | 114 | "rootfsusbtype=${usbrootfstype} root=${usbroot}\0 " \ |
115 | "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | 115 | "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ |
116 | "bootscript=echo Running bootscript from mmc ...; " \ | 116 | "bootscript=echo Running bootscript from mmc ...; " \ |
117 | "source\0" \ | 117 | "source\0" \ |
118 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ | 118 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ |
119 | "loadm4bin=load mmc ${mmcdev}:${mmcpart} ${m4_addr_tmp} ${m4_bin}\0" \ | 119 | "loadm4bin=load mmc ${mmcdev}:${mmcpart} ${m4_addr_tmp} ${m4_bin}\0" \ |
120 | "loadusbimage=fatload usb 0:1 ${loadaddr} ${image}\0" \ | 120 | "loadusbimage=fatload usb 0:1 ${loadaddr} ${image}\0" \ |
121 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} /dtbs/${fdt_file}\0" \ | 121 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} /dtbs/${fdt_file}\0" \ |
122 | "loadusbfdt=fatload usb 0:1 ${fdt_addr} /dtbs/${fdt_file}\0" \ | 122 | "loadusbfdt=fatload usb 0:1 ${fdt_addr} /dtbs/${fdt_file}\0" \ |
123 | "cpm4mem=cp.b ${m4_addr_tmp} ${m4_addr} 20000\0" \ | 123 | "cpm4mem=cp.b ${m4_addr_tmp} ${m4_addr} 20000\0" \ |
124 | "mmcboot=echo Booting from mmc ...; " \ | 124 | "mmcboot=echo Booting from mmc ...; " \ |
125 | "run mmcargs; " \ | 125 | "run mmcargs; " \ |
126 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | 126 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
127 | "if run loadfdt; then " \ | 127 | "if run loadfdt; then " \ |
128 | "booti ${loadaddr} - ${fdt_addr}; " \ | 128 | "booti ${loadaddr} - ${fdt_addr}; " \ |
129 | "else " \ | 129 | "else " \ |
130 | "echo WARN: Cannot load the DT; " \ | 130 | "echo WARN: Cannot load the DT; " \ |
131 | "fi; " \ | 131 | "fi; " \ |
132 | "else " \ | 132 | "else " \ |
133 | "echo wait for boot; " \ | 133 | "echo wait for boot; " \ |
134 | "fi;\0" \ | 134 | "fi;\0" \ |
135 | "m4boot=" \ | 135 | "m4boot=" \ |
136 | "if test ${m4_addr} = 0x7e0000; then " \ | 136 | "if test ${m4_addr} = 0x7e0000; then " \ |
137 | "echo Booting M4 from TCM; " \ | 137 | "echo Booting M4 from TCM; " \ |
138 | "else " \ | 138 | "else " \ |
139 | "echo Booting M4 from DRAM; " \ | 139 | "echo Booting M4 from DRAM; " \ |
140 | "dcache flush; " \ | 140 | "dcache flush; " \ |
141 | "fi; " \ | 141 | "fi; " \ |
142 | "bootaux ${m4_addr};\0" \ | 142 | "bootaux ${m4_addr};\0" \ |
143 | "usbboot=echo Booting from USB ...; " \ | 143 | "usbboot=echo Booting from USB ...; " \ |
144 | "run usbargs; " \ | 144 | "run usbargs; " \ |
145 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | 145 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
146 | "if run loadusbfdt; then " \ | 146 | "if run loadusbfdt; then " \ |
147 | "booti ${loadaddr} - ${fdt_addr}; " \ | 147 | "booti ${loadaddr} - ${fdt_addr}; " \ |
148 | "else " \ | 148 | "else " \ |
149 | "echo WARN: Cannot load the DT; " \ | 149 | "echo WARN: Cannot load the DT; " \ |
150 | "fi; " \ | 150 | "fi; " \ |
151 | "else " \ | 151 | "else " \ |
152 | "echo wait for boot; " \ | 152 | "echo wait for boot; " \ |
153 | "fi;\0" \ | 153 | "fi;\0" \ |
154 | "netargs=setenv bootargs ${jh_clk} console=${console} " \ | 154 | "netargs=setenv bootargs ${jh_clk} console=${console} " \ |
155 | "root=/dev/nfs " \ | 155 | "root=/dev/nfs " \ |
156 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ | 156 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ |
157 | "netboot=echo Booting from net ...; " \ | 157 | "netboot=echo Booting from net ...; " \ |
158 | "run netargs; " \ | 158 | "run netargs; " \ |
159 | "if test ${ip_dyn} = yes; then " \ | 159 | "if test ${ip_dyn} = yes; then " \ |
160 | "setenv get_cmd dhcp; " \ | 160 | "setenv get_cmd dhcp; " \ |
161 | "else " \ | 161 | "else " \ |
162 | "setenv get_cmd tftp; " \ | 162 | "setenv get_cmd tftp; " \ |
163 | "fi; " \ | 163 | "fi; " \ |
164 | "${get_cmd} ${loadaddr} ${image}; " \ | 164 | "${get_cmd} ${loadaddr} ${image}; " \ |
165 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | 165 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
166 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ | 166 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ |
167 | "booti ${loadaddr} - ${fdt_addr}; " \ | 167 | "booti ${loadaddr} - ${fdt_addr}; " \ |
168 | "else " \ | 168 | "else " \ |
169 | "echo WARN: Cannot load the DT; " \ | 169 | "echo WARN: Cannot load the DT; " \ |
170 | "fi; " \ | 170 | "fi; " \ |
171 | "else " \ | 171 | "else " \ |
172 | "booti; " \ | 172 | "booti; " \ |
173 | "fi;\0" | 173 | "fi;\0" |
174 | 174 | ||
175 | #define CONFIG_BOOTCOMMAND \ | 175 | #define CONFIG_BOOTCOMMAND \ |
176 | "mmc dev ${mmcdev}; if mmc rescan; then " \ | 176 | "mmc dev ${mmcdev}; if mmc rescan; then " \ |
177 | "if test ${use_m4} = yes && run loadm4bin; then " \ | 177 | "if test ${use_m4} = yes && run loadm4bin; then " \ |
178 | "run cpm4mem; " \ | 178 | "run cpm4mem; " \ |
179 | "run m4boot; " \ | 179 | "run m4boot; " \ |
180 | "fi; " \ | 180 | "fi; " \ |
181 | "echo Checking for: uEnv.txt ...; " \ | 181 | "echo Checking for: uEnv.txt ...; " \ |
182 | "if test -e mmc ${bootpart} /uEnv.txt; then " \ | 182 | "if test -e mmc ${bootpart} /uEnv.txt; then " \ |
183 | "if run loadbootenv; then " \ | 183 | "if run loadbootenv; then " \ |
184 | "echo Loaded environment from uEnv.txt;" \ | 184 | "echo Loaded environment from uEnv.txt;" \ |
185 | "run importbootenv;" \ | 185 | "run importbootenv;" \ |
186 | "fi;" \ | 186 | "fi;" \ |
187 | "echo Checking if uenvcmd is set ...;" \ | 187 | "echo Checking if uenvcmd is set ...;" \ |
188 | "if test -n ${uenvcmd}; then " \ | 188 | "if test -n ${uenvcmd}; then " \ |
189 | "echo Running uenvcmd ...;" \ | 189 | "echo Running uenvcmd ...;" \ |
190 | "run uenvcmd;" \ | 190 | "run uenvcmd;" \ |
191 | "fi;" \ | 191 | "fi;" \ |
192 | "fi; " \ | 192 | "fi; " \ |
193 | "if run loadimage; then " \ | 193 | "if run loadimage; then " \ |
194 | "run mmcboot; " \ | 194 | "run mmcboot; " \ |
195 | "else run netboot; " \ | 195 | "else run netboot; " \ |
196 | "fi; " \ | 196 | "fi; " \ |
197 | "booti ${loadaddr} - ${fdt_addr}; fi;" | 197 | "booti ${loadaddr} - ${fdt_addr}; fi;" |
198 | 198 | ||
199 | /* Link Definitions */ | 199 | /* Link Definitions */ |
200 | #define CONFIG_LOADADDR 0x40480000 | 200 | #define CONFIG_LOADADDR 0x40480000 |
201 | 201 | ||
202 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | 202 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
203 | 203 | ||
204 | #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 | 204 | #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 |
205 | #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 | 205 | #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 |
206 | #define CONFIG_SYS_INIT_SP_OFFSET \ | 206 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
207 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | 207 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
208 | #define CONFIG_SYS_INIT_SP_ADDR \ | 208 | #define CONFIG_SYS_INIT_SP_ADDR \ |
209 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | 209 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
210 | 210 | ||
211 | #define CONFIG_ENV_OVERWRITE | 211 | #define CONFIG_ENV_OVERWRITE |
212 | #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ | 212 | #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ |
213 | #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ | 213 | #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ |
214 | 214 | ||
215 | /* Size of malloc() pool */ | 215 | /* Size of malloc() pool */ |
216 | #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024) | 216 | #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024) |
217 | 217 | ||
218 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 | 218 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
219 | #define PHYS_SDRAM 0x40000000 | 219 | #define PHYS_SDRAM 0x40000000 |
220 | #ifdef CONFIG_2GB_LPDDR4 | 220 | #ifdef CONFIG_2GB_LPDDR4 |
221 | #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ | 221 | #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ |
222 | #else | 222 | #else |
223 | #define PHYS_SDRAM_SIZE 0x100000000 /* 4GB DDR */ | 223 | #define PHYS_SDRAM_SIZE 0x100000000 /* 4GB DDR */ |
224 | #endif | 224 | #endif |
225 | 225 | ||
226 | #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM | 226 | #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM |
227 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ | 227 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ |
228 | (PHYS_SDRAM_SIZE >> 1)) | 228 | (PHYS_SDRAM_SIZE >> 1)) |
229 | 229 | ||
230 | #define CONFIG_BAUDRATE 115200 | 230 | #define CONFIG_BAUDRATE 115200 |
231 | 231 | ||
232 | #ifdef CONFIG_CONSOLE_SER0 | 232 | #ifdef CONFIG_CONSOLE_SER0 |
233 | #define CONFIG_MXC_UART_BASE UART4_BASE_ADDR | 233 | #define CONFIG_MXC_UART_BASE UART4_BASE_ADDR |
234 | #define CONSOLE_DEV "ttymxc3" | 234 | #define CONSOLE_DEV "ttymxc3" |
235 | #endif | 235 | #endif |
236 | 236 | ||
237 | #ifdef CONFIG_CONSOLE_SER1 | 237 | #ifdef CONFIG_CONSOLE_SER1 |
238 | #define CONFIG_MXC_UART_BASE UART3_BASE_ADDR | 238 | #define CONFIG_MXC_UART_BASE UART3_BASE_ADDR |
239 | #define CONSOLE_DEV "ttymxc2" | 239 | #define CONSOLE_DEV "ttymxc2" |
240 | #endif | 240 | #endif |
241 | 241 | ||
242 | #ifdef CONFIG_CONSOLE_SER2 | 242 | #ifdef CONFIG_CONSOLE_SER2 |
243 | #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR | 243 | #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR |
244 | #define CONSOLE_DEV "ttymxc1" | 244 | #define CONSOLE_DEV "ttymxc1" |
245 | #endif | 245 | #endif |
246 | 246 | ||
247 | #ifdef CONFIG_CONSOLE_SER3 | 247 | #ifdef CONFIG_CONSOLE_SER3 |
248 | #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR | 248 | #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR |
249 | #define CONSOLE_DEV "ttymxc0" | 249 | #define CONSOLE_DEV "ttymxc0" |
250 | #endif | 250 | #endif |
251 | 251 | ||
252 | /* Monitor Command Prompt */ | 252 | /* Monitor Command Prompt */ |
253 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " | 253 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
254 | #define CONFIG_SYS_CBSIZE 1024 | 254 | #define CONFIG_SYS_CBSIZE 1024 |
255 | #define CONFIG_SYS_MAXARGS 64 | 255 | #define CONFIG_SYS_MAXARGS 64 |
256 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | 256 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
257 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | 257 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
258 | sizeof(CONFIG_SYS_PROMPT) + 16) | 258 | sizeof(CONFIG_SYS_PROMPT) + 16) |
259 | 259 | ||
260 | #define CONFIG_IMX_BOOTAUX | 260 | #define CONFIG_IMX_BOOTAUX |
261 | 261 | ||
262 | #define CONFIG_SYS_FSL_USDHC_NUM 2 | 262 | #define CONFIG_SYS_FSL_USDHC_NUM 2 |
263 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | 263 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
264 | 264 | ||
265 | #define CONFIG_CMD_PART | 265 | #define CONFIG_CMD_PART |
266 | #define CONFIG_CMD_FS_GENERIC | 266 | #define CONFIG_CMD_FS_GENERIC |
267 | 267 | ||
268 | #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 | 268 | #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 |
269 | 269 | ||
270 | #ifdef CONFIG_FSL_QSPI | 270 | #ifdef CONFIG_FSL_QSPI |
271 | #define FSL_QSPI_FLASH_SIZE (SZ_32M) | 271 | #define FSL_QSPI_FLASH_SIZE (SZ_32M) |
272 | #define FSL_QSPI_FLASH_NUM 1 | 272 | #define FSL_QSPI_FLASH_NUM 1 |
273 | #endif | 273 | #endif |
274 | 274 | ||
275 | /* I2C Configs */ | 275 | /* I2C Configs */ |
276 | #define CONFIG_SYS_I2C_SPEED 100000 | 276 | #define CONFIG_SYS_I2C_SPEED 100000 |
277 | 277 | ||
278 | /* USB configs */ | 278 | /* USB configs */ |
279 | #ifndef CONFIG_SPL_BUILD | 279 | #ifndef CONFIG_SPL_BUILD |
280 | #define CONFIG_HAS_FSL_XHCI_USB | 280 | #define CONFIG_HAS_FSL_XHCI_USB |
281 | 281 | ||
282 | #ifdef CONFIG_HAS_FSL_XHCI_USB | 282 | #ifdef CONFIG_HAS_FSL_XHCI_USB |
283 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 | 283 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
284 | #endif | 284 | #endif |
285 | 285 | ||
286 | #define CONFIG_CMD_USB | 286 | #define CONFIG_CMD_USB |
287 | #define CONFIG_USB_STORAGE | 287 | #define CONFIG_USB_STORAGE |
288 | 288 | ||
289 | #define CONFIG_USBD_HS | 289 | #define CONFIG_USBD_HS |
290 | 290 | ||
291 | #define CONFIG_CMD_USB_MASS_STORAGE | 291 | #define CONFIG_CMD_USB_MASS_STORAGE |
292 | #define CONFIG_USB_GADGET_MASS_STORAGE | 292 | #define CONFIG_USB_GADGET_MASS_STORAGE |
293 | #define CONFIG_USB_FUNCTION_MASS_STORAGE | 293 | #define CONFIG_USB_FUNCTION_MASS_STORAGE |
294 | 294 | ||
295 | #define CONFIG_CMD_READ | 295 | #define CONFIG_CMD_READ |
296 | 296 | ||
297 | #endif | 297 | #endif |
298 | 298 | ||
299 | #define CONFIG_SERIAL_TAG | 299 | #define CONFIG_SERIAL_TAG |
300 | #define CONFIG_FASTBOOT_USB_DEV 0 | 300 | #define CONFIG_FASTBOOT_USB_DEV 0 |
301 | 301 | ||
302 | 302 | ||
303 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 | 303 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
304 | 304 | ||
305 | #define CONFIG_USBD_HS | 305 | #define CONFIG_USBD_HS |
306 | #define CONFIG_USB_GADGET_VBUS_DRAW 2 | 306 | #define CONFIG_USB_GADGET_VBUS_DRAW 2 |
307 | 307 | ||
308 | #ifndef CONFIG_SPL_BUILD | 308 | #ifndef CONFIG_SPL_BUILD |
309 | #define CONFIG_DM_PMIC | 309 | #define CONFIG_DM_PMIC |
310 | #endif | 310 | #endif |
311 | 311 | ||
312 | #ifdef CONFIG_DM_VIDEO | 312 | #ifdef CONFIG_DM_VIDEO |
313 | #define CONFIG_VIDEO_LOGO | 313 | #define CONFIG_VIDEO_LOGO |
314 | #define CONFIG_SPLASH_SCREEN | 314 | #define CONFIG_SPLASH_SCREEN |
315 | #define CONFIG_SPLASH_SCREEN_ALIGN | 315 | #define CONFIG_SPLASH_SCREEN_ALIGN |
316 | #define CONFIG_CMD_BMP | 316 | #define CONFIG_CMD_BMP |
317 | #define CONFIG_BMP_16BPP | 317 | #define CONFIG_BMP_16BPP |
318 | #define CONFIG_BMP_24BPP | 318 | #define CONFIG_BMP_24BPP |
319 | #define CONFIG_BMP_32BPP | 319 | #define CONFIG_BMP_32BPP |
320 | #define CONFIG_VIDEO_BMP_RLE8 | 320 | #define CONFIG_VIDEO_BMP_RLE8 |
321 | #define CONFIG_VIDEO_BMP_LOGO | 321 | #define CONFIG_VIDEO_BMP_LOGO |
322 | #endif | 322 | #endif |
323 | 323 | ||
324 | #ifdef CONFIG_ANDROID_SUPPORT | 324 | #ifdef CONFIG_ANDROID_SUPPORT |
325 | #include "smarcimx8mq_android.h" | 325 | #include "smarcimx8mq_android.h" |
326 | #endif | 326 | #endif |
327 | 327 | ||
328 | #endif | 328 | #endif |
329 | 329 |