MLK-20479 imx8mq: clear ocotp error bit

In case ocotp error bit is set, clear it. This is a workaround to ocotp error bit. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 781f2d8febe954b2ef3e51b6a2eebcfbf24b08eb)

MLK-20479 imx8mq: clear ocotp error bit
In case ocotp error bit is set, clear it. This is a workaround to ocotp error bit. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 781f2d8febe954b2ef3e51b6a2eebcfbf24b08eb)
Peng Fan
1 parent c630e0ad3b
Showing 1 changed file with 7 additions and 0 deletions Side-by-side Diff
arch/arm/mach-imx/imx8m/soc.c
@@ -249,6 +249,7 @@
  
 int arch_cpu_init(void)
 {
+	struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
 	/*
 	 * Init timer at very early state, because pll setting will use it,
 	 * Rom Turnned off SCTR, enable it before timer_init
@@ -287,6 +288,12 @@
 	/* Enable RTC */
 	writel(0x21, 0x30370038);
 #endif
+
+	if (is_imx8mq()) {
+		clock_enable(CCGR_OCOTP, 1);
+		if (readl(&ocotp->ctrl) & 0x200)
+			writel(0x200, &ocotp->ctrl_clr);
+	}
  
 	return 0;
 }
...	...	@@ -249,6 +249,7 @@
249	249
250	250	int arch_cpu_init(void)
251	251	{
	252	+ struct ocotp_regs ocotp = (struct ocotp_regs )OCOTP_BASE_ADDR;
252	253	/*
253	254	* Init timer at very early state, because pll setting will use it,
254	255	* Rom Turnned off SCTR, enable it before timer_init
...	...	@@ -287,6 +288,12 @@
287	288	/* Enable RTC */
288	289	writel(0x21, 0x30370038);
289	290	#endif
	291	+
	292	+ if (is_imx8mq()) {
	293	+ clock_enable(CCGR_OCOTP, 1);
	294	+ if (readl(&ocotp->ctrl) & 0x200)
	295	+ writel(0x200, &ocotp->ctrl_clr);
	296	+ }
290	297
291	298	return 0;
292	299	}