Eric Lee / smarc-uboot

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Commit b7a6e2c9c396c35596f467f5187da937306ddeb8

Authored by Jean-Jacques Hiblot
Committed by Jaehoon Chung
1 parent 173c06dfcc
Exists in smarc_8mq_lf_v2020.04 and in 20 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf-6.6.52-2.2.0, emb_lf_v2022.04, emb_lf_v2023.04, emb_lf_v2024.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

mmc: remove hc_wp_grp_size from struct mmc if not needed 

hc_wp_grp_size is needed only if hardware partitionning is used.
On ARM removing it saves about 30 bytes of code space.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>

Showing 3 changed files with 6 additions and 0 deletions Inline Diff

1 /* 1 /*
2 * (C) Copyright 2003 2 * (C) Copyright 2003
3 * Kyle Harris, kharris@nexus-tech.net 3 * Kyle Harris, kharris@nexus-tech.net
4 * 4 *
5 * SPDX-License-Identifier: GPL-2.0+ 5 * SPDX-License-Identifier: GPL-2.0+
6 */ 6 */
7 7
8 #include <common.h> 8 #include <common.h>
9 #include <command.h> 9 #include <command.h>
10 #include <console.h> 10 #include <console.h>
11 #include <mmc.h> 11 #include <mmc.h>
12 12
13 static int curr_device = -1; 13 static int curr_device = -1;
14 14
15 static void print_mmcinfo(struct mmc *mmc) 15 static void print_mmcinfo(struct mmc *mmc)
16 { 16 {
17 int i; 17 int i;
18 18
19 printf("Device: %s\n", mmc->cfg->name); 19 printf("Device: %s\n", mmc->cfg->name);
20 printf("Manufacturer ID: %x\n", mmc->cid[0] >> 24); 20 printf("Manufacturer ID: %x\n", mmc->cid[0] >> 24);
21 printf("OEM: %x\n", (mmc->cid[0] >> 8) & 0xffff); 21 printf("OEM: %x\n", (mmc->cid[0] >> 8) & 0xffff);
22 printf("Name: %c%c%c%c%c \n", mmc->cid[0] & 0xff, 22 printf("Name: %c%c%c%c%c \n", mmc->cid[0] & 0xff,
23 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, 23 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
24 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff); 24 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff);
25 25
26 printf("Bus Speed: %d\n", mmc->clock); 26 printf("Bus Speed: %d\n", mmc->clock);
27 #if CONFIG_IS_ENABLED(MMC_VERBOSE) 27 #if CONFIG_IS_ENABLED(MMC_VERBOSE)
28 printf("Mode : %s\n", mmc_mode_name(mmc->selected_mode)); 28 printf("Mode : %s\n", mmc_mode_name(mmc->selected_mode));
29 mmc_dump_capabilities("card capabilities", mmc->card_caps); 29 mmc_dump_capabilities("card capabilities", mmc->card_caps);
30 mmc_dump_capabilities("host capabilities", mmc->host_caps); 30 mmc_dump_capabilities("host capabilities", mmc->host_caps);
31 #endif 31 #endif
32 printf("Rd Block Len: %d\n", mmc->read_bl_len); 32 printf("Rd Block Len: %d\n", mmc->read_bl_len);
33 33
34 printf("%s version %d.%d", IS_SD(mmc) ? "SD" : "MMC", 34 printf("%s version %d.%d", IS_SD(mmc) ? "SD" : "MMC",
35 EXTRACT_SDMMC_MAJOR_VERSION(mmc->version), 35 EXTRACT_SDMMC_MAJOR_VERSION(mmc->version),
36 EXTRACT_SDMMC_MINOR_VERSION(mmc->version)); 36 EXTRACT_SDMMC_MINOR_VERSION(mmc->version));
37 if (EXTRACT_SDMMC_CHANGE_VERSION(mmc->version) != 0) 37 if (EXTRACT_SDMMC_CHANGE_VERSION(mmc->version) != 0)
38 printf(".%d", EXTRACT_SDMMC_CHANGE_VERSION(mmc->version)); 38 printf(".%d", EXTRACT_SDMMC_CHANGE_VERSION(mmc->version));
39 printf("\n"); 39 printf("\n");
40 40
41 printf("High Capacity: %s\n", mmc->high_capacity ? "Yes" : "No"); 41 printf("High Capacity: %s\n", mmc->high_capacity ? "Yes" : "No");
42 puts("Capacity: "); 42 puts("Capacity: ");
43 print_size(mmc->capacity, "\n"); 43 print_size(mmc->capacity, "\n");
44 44
45 printf("Bus Width: %d-bit%s\n", mmc->bus_width, 45 printf("Bus Width: %d-bit%s\n", mmc->bus_width,
46 mmc->ddr_mode ? " DDR" : ""); 46 mmc->ddr_mode ? " DDR" : "");
47 47
48 #if CONFIG_IS_ENABLED(MMC_WRITE) 48 #if CONFIG_IS_ENABLED(MMC_WRITE)
49 puts("Erase Group Size: "); 49 puts("Erase Group Size: ");
50 print_size(((u64)mmc->erase_grp_size) << 9, "\n"); 50 print_size(((u64)mmc->erase_grp_size) << 9, "\n");
51 #endif 51 #endif
52 52
53 if (!IS_SD(mmc) && mmc->version >= MMC_VERSION_4_41) { 53 if (!IS_SD(mmc) && mmc->version >= MMC_VERSION_4_41) {
54 bool has_enh = (mmc->part_support & ENHNCD_SUPPORT) != 0; 54 bool has_enh = (mmc->part_support & ENHNCD_SUPPORT) != 0;
55 bool usr_enh = has_enh && (mmc->part_attr & EXT_CSD_ENH_USR); 55 bool usr_enh = has_enh && (mmc->part_attr & EXT_CSD_ENH_USR);
56 56
57 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
57 puts("HC WP Group Size: "); 58 puts("HC WP Group Size: ");
58 print_size(((u64)mmc->hc_wp_grp_size) << 9, "\n"); 59 print_size(((u64)mmc->hc_wp_grp_size) << 9, "\n");
60 #endif
59 61
60 puts("User Capacity: "); 62 puts("User Capacity: ");
61 print_size(mmc->capacity_user, usr_enh ? " ENH" : ""); 63 print_size(mmc->capacity_user, usr_enh ? " ENH" : "");
62 if (mmc->wr_rel_set & EXT_CSD_WR_DATA_REL_USR) 64 if (mmc->wr_rel_set & EXT_CSD_WR_DATA_REL_USR)
63 puts(" WRREL\n"); 65 puts(" WRREL\n");
64 else 66 else
65 putc('\n'); 67 putc('\n');
66 if (usr_enh) { 68 if (usr_enh) {
67 puts("User Enhanced Start: "); 69 puts("User Enhanced Start: ");
68 print_size(mmc->enh_user_start, "\n"); 70 print_size(mmc->enh_user_start, "\n");
69 puts("User Enhanced Size: "); 71 puts("User Enhanced Size: ");
70 print_size(mmc->enh_user_size, "\n"); 72 print_size(mmc->enh_user_size, "\n");
71 } 73 }
72 puts("Boot Capacity: "); 74 puts("Boot Capacity: ");
73 print_size(mmc->capacity_boot, has_enh ? " ENH\n" : "\n"); 75 print_size(mmc->capacity_boot, has_enh ? " ENH\n" : "\n");
74 puts("RPMB Capacity: "); 76 puts("RPMB Capacity: ");
75 print_size(mmc->capacity_rpmb, has_enh ? " ENH\n" : "\n"); 77 print_size(mmc->capacity_rpmb, has_enh ? " ENH\n" : "\n");
76 78
77 for (i = 0; i < ARRAY_SIZE(mmc->capacity_gp); i++) { 79 for (i = 0; i < ARRAY_SIZE(mmc->capacity_gp); i++) {
78 bool is_enh = has_enh && 80 bool is_enh = has_enh &&
79 (mmc->part_attr & EXT_CSD_ENH_GP(i)); 81 (mmc->part_attr & EXT_CSD_ENH_GP(i));
80 if (mmc->capacity_gp[i]) { 82 if (mmc->capacity_gp[i]) {
81 printf("GP%i Capacity: ", i+1); 83 printf("GP%i Capacity: ", i+1);
82 print_size(mmc->capacity_gp[i], 84 print_size(mmc->capacity_gp[i],
83 is_enh ? " ENH" : ""); 85 is_enh ? " ENH" : "");
84 if (mmc->wr_rel_set & EXT_CSD_WR_DATA_REL_GP(i)) 86 if (mmc->wr_rel_set & EXT_CSD_WR_DATA_REL_GP(i))
85 puts(" WRREL\n"); 87 puts(" WRREL\n");
86 else 88 else
87 putc('\n'); 89 putc('\n');
88 } 90 }
89 } 91 }
90 } 92 }
91 } 93 }
92 static struct mmc *init_mmc_device(int dev, bool force_init) 94 static struct mmc *init_mmc_device(int dev, bool force_init)
93 { 95 {
94 struct mmc *mmc; 96 struct mmc *mmc;
95 mmc = find_mmc_device(dev); 97 mmc = find_mmc_device(dev);
96 if (!mmc) { 98 if (!mmc) {
97 printf("no mmc device at slot %x\n", dev); 99 printf("no mmc device at slot %x\n", dev);
98 return NULL; 100 return NULL;
99 } 101 }
100 102
101 if (force_init) 103 if (force_init)
102 mmc->has_init = 0; 104 mmc->has_init = 0;
103 if (mmc_init(mmc)) 105 if (mmc_init(mmc))
104 return NULL; 106 return NULL;
105 return mmc; 107 return mmc;
106 } 108 }
107 static int do_mmcinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 109 static int do_mmcinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
108 { 110 {
109 struct mmc *mmc; 111 struct mmc *mmc;
110 112
111 if (curr_device < 0) { 113 if (curr_device < 0) {
112 if (get_mmc_num() > 0) 114 if (get_mmc_num() > 0)
113 curr_device = 0; 115 curr_device = 0;
114 else { 116 else {
115 puts("No MMC device available\n"); 117 puts("No MMC device available\n");
116 return 1; 118 return 1;
117 } 119 }
118 } 120 }
119 121
120 mmc = init_mmc_device(curr_device, false); 122 mmc = init_mmc_device(curr_device, false);
121 if (!mmc) 123 if (!mmc)
122 return CMD_RET_FAILURE; 124 return CMD_RET_FAILURE;
123 125
124 print_mmcinfo(mmc); 126 print_mmcinfo(mmc);
125 return CMD_RET_SUCCESS; 127 return CMD_RET_SUCCESS;
126 } 128 }
127 129
128 #ifdef CONFIG_SUPPORT_EMMC_RPMB 130 #ifdef CONFIG_SUPPORT_EMMC_RPMB
129 static int confirm_key_prog(void) 131 static int confirm_key_prog(void)
130 { 132 {
131 puts("Warning: Programming authentication key can be done only once !\n" 133 puts("Warning: Programming authentication key can be done only once !\n"
132 " Use this command only if you are sure of what you are doing,\n" 134 " Use this command only if you are sure of what you are doing,\n"
133 "Really perform the key programming? <y/N> "); 135 "Really perform the key programming? <y/N> ");
134 if (confirm_yesno()) 136 if (confirm_yesno())
135 return 1; 137 return 1;
136 138
137 puts("Authentication key programming aborted\n"); 139 puts("Authentication key programming aborted\n");
138 return 0; 140 return 0;
139 } 141 }
140 static int do_mmcrpmb_key(cmd_tbl_t *cmdtp, int flag, 142 static int do_mmcrpmb_key(cmd_tbl_t *cmdtp, int flag,
141 int argc, char * const argv[]) 143 int argc, char * const argv[])
142 { 144 {
143 void *key_addr; 145 void *key_addr;
144 struct mmc *mmc = find_mmc_device(curr_device); 146 struct mmc *mmc = find_mmc_device(curr_device);
145 147
146 if (argc != 2) 148 if (argc != 2)
147 return CMD_RET_USAGE; 149 return CMD_RET_USAGE;
148 150
149 key_addr = (void *)simple_strtoul(argv[1], NULL, 16); 151 key_addr = (void *)simple_strtoul(argv[1], NULL, 16);
150 if (!confirm_key_prog()) 152 if (!confirm_key_prog())
151 return CMD_RET_FAILURE; 153 return CMD_RET_FAILURE;
152 if (mmc_rpmb_set_key(mmc, key_addr)) { 154 if (mmc_rpmb_set_key(mmc, key_addr)) {
153 printf("ERROR - Key already programmed ?\n"); 155 printf("ERROR - Key already programmed ?\n");
154 return CMD_RET_FAILURE; 156 return CMD_RET_FAILURE;
155 } 157 }
156 return CMD_RET_SUCCESS; 158 return CMD_RET_SUCCESS;
157 } 159 }
158 static int do_mmcrpmb_read(cmd_tbl_t *cmdtp, int flag, 160 static int do_mmcrpmb_read(cmd_tbl_t *cmdtp, int flag,
159 int argc, char * const argv[]) 161 int argc, char * const argv[])
160 { 162 {
161 u16 blk, cnt; 163 u16 blk, cnt;
162 void *addr; 164 void *addr;
163 int n; 165 int n;
164 void *key_addr = NULL; 166 void *key_addr = NULL;
165 struct mmc *mmc = find_mmc_device(curr_device); 167 struct mmc *mmc = find_mmc_device(curr_device);
166 168
167 if (argc < 4) 169 if (argc < 4)
168 return CMD_RET_USAGE; 170 return CMD_RET_USAGE;
169 171
170 addr = (void *)simple_strtoul(argv[1], NULL, 16); 172 addr = (void *)simple_strtoul(argv[1], NULL, 16);
171 blk = simple_strtoul(argv[2], NULL, 16); 173 blk = simple_strtoul(argv[2], NULL, 16);
172 cnt = simple_strtoul(argv[3], NULL, 16); 174 cnt = simple_strtoul(argv[3], NULL, 16);
173 175
174 if (argc == 5) 176 if (argc == 5)
175 key_addr = (void *)simple_strtoul(argv[4], NULL, 16); 177 key_addr = (void *)simple_strtoul(argv[4], NULL, 16);
176 178
177 printf("\nMMC RPMB read: dev # %d, block # %d, count %d ... ", 179 printf("\nMMC RPMB read: dev # %d, block # %d, count %d ... ",
178 curr_device, blk, cnt); 180 curr_device, blk, cnt);
179 n = mmc_rpmb_read(mmc, addr, blk, cnt, key_addr); 181 n = mmc_rpmb_read(mmc, addr, blk, cnt, key_addr);
180 182
181 printf("%d RPMB blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR"); 183 printf("%d RPMB blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR");
182 if (n != cnt) 184 if (n != cnt)
183 return CMD_RET_FAILURE; 185 return CMD_RET_FAILURE;
184 return CMD_RET_SUCCESS; 186 return CMD_RET_SUCCESS;
185 } 187 }
186 static int do_mmcrpmb_write(cmd_tbl_t *cmdtp, int flag, 188 static int do_mmcrpmb_write(cmd_tbl_t *cmdtp, int flag,
187 int argc, char * const argv[]) 189 int argc, char * const argv[])
188 { 190 {
189 u16 blk, cnt; 191 u16 blk, cnt;
190 void *addr; 192 void *addr;
191 int n; 193 int n;
192 void *key_addr; 194 void *key_addr;
193 struct mmc *mmc = find_mmc_device(curr_device); 195 struct mmc *mmc = find_mmc_device(curr_device);
194 196
195 if (argc != 5) 197 if (argc != 5)
196 return CMD_RET_USAGE; 198 return CMD_RET_USAGE;
197 199
198 addr = (void *)simple_strtoul(argv[1], NULL, 16); 200 addr = (void *)simple_strtoul(argv[1], NULL, 16);
199 blk = simple_strtoul(argv[2], NULL, 16); 201 blk = simple_strtoul(argv[2], NULL, 16);
200 cnt = simple_strtoul(argv[3], NULL, 16); 202 cnt = simple_strtoul(argv[3], NULL, 16);
201 key_addr = (void *)simple_strtoul(argv[4], NULL, 16); 203 key_addr = (void *)simple_strtoul(argv[4], NULL, 16);
202 204
203 printf("\nMMC RPMB write: dev # %d, block # %d, count %d ... ", 205 printf("\nMMC RPMB write: dev # %d, block # %d, count %d ... ",
204 curr_device, blk, cnt); 206 curr_device, blk, cnt);
205 n = mmc_rpmb_write(mmc, addr, blk, cnt, key_addr); 207 n = mmc_rpmb_write(mmc, addr, blk, cnt, key_addr);
206 208
207 printf("%d RPMB blocks written: %s\n", n, (n == cnt) ? "OK" : "ERROR"); 209 printf("%d RPMB blocks written: %s\n", n, (n == cnt) ? "OK" : "ERROR");
208 if (n != cnt) 210 if (n != cnt)
209 return CMD_RET_FAILURE; 211 return CMD_RET_FAILURE;
210 return CMD_RET_SUCCESS; 212 return CMD_RET_SUCCESS;
211 } 213 }
212 static int do_mmcrpmb_counter(cmd_tbl_t *cmdtp, int flag, 214 static int do_mmcrpmb_counter(cmd_tbl_t *cmdtp, int flag,
213 int argc, char * const argv[]) 215 int argc, char * const argv[])
214 { 216 {
215 unsigned long counter; 217 unsigned long counter;
216 struct mmc *mmc = find_mmc_device(curr_device); 218 struct mmc *mmc = find_mmc_device(curr_device);
217 219
218 if (mmc_rpmb_get_counter(mmc, &counter)) 220 if (mmc_rpmb_get_counter(mmc, &counter))
219 return CMD_RET_FAILURE; 221 return CMD_RET_FAILURE;
220 printf("RPMB Write counter= %lx\n", counter); 222 printf("RPMB Write counter= %lx\n", counter);
221 return CMD_RET_SUCCESS; 223 return CMD_RET_SUCCESS;
222 } 224 }
223 225
224 static cmd_tbl_t cmd_rpmb[] = { 226 static cmd_tbl_t cmd_rpmb[] = {
225 U_BOOT_CMD_MKENT(key, 2, 0, do_mmcrpmb_key, "", ""), 227 U_BOOT_CMD_MKENT(key, 2, 0, do_mmcrpmb_key, "", ""),
226 U_BOOT_CMD_MKENT(read, 5, 1, do_mmcrpmb_read, "", ""), 228 U_BOOT_CMD_MKENT(read, 5, 1, do_mmcrpmb_read, "", ""),
227 U_BOOT_CMD_MKENT(write, 5, 0, do_mmcrpmb_write, "", ""), 229 U_BOOT_CMD_MKENT(write, 5, 0, do_mmcrpmb_write, "", ""),
228 U_BOOT_CMD_MKENT(counter, 1, 1, do_mmcrpmb_counter, "", ""), 230 U_BOOT_CMD_MKENT(counter, 1, 1, do_mmcrpmb_counter, "", ""),
229 }; 231 };
230 232
231 static int do_mmcrpmb(cmd_tbl_t *cmdtp, int flag, 233 static int do_mmcrpmb(cmd_tbl_t *cmdtp, int flag,
232 int argc, char * const argv[]) 234 int argc, char * const argv[])
233 { 235 {
234 cmd_tbl_t *cp; 236 cmd_tbl_t *cp;
235 struct mmc *mmc; 237 struct mmc *mmc;
236 char original_part; 238 char original_part;
237 int ret; 239 int ret;
238 240
239 cp = find_cmd_tbl(argv[1], cmd_rpmb, ARRAY_SIZE(cmd_rpmb)); 241 cp = find_cmd_tbl(argv[1], cmd_rpmb, ARRAY_SIZE(cmd_rpmb));
240 242
241 /* Drop the rpmb subcommand */ 243 /* Drop the rpmb subcommand */
242 argc--; 244 argc--;
243 argv++; 245 argv++;
244 246
245 if (cp == NULL || argc > cp->maxargs) 247 if (cp == NULL || argc > cp->maxargs)
246 return CMD_RET_USAGE; 248 return CMD_RET_USAGE;
247 if (flag == CMD_FLAG_REPEAT && !cp->repeatable) 249 if (flag == CMD_FLAG_REPEAT && !cp->repeatable)
248 return CMD_RET_SUCCESS; 250 return CMD_RET_SUCCESS;
249 251
250 mmc = init_mmc_device(curr_device, false); 252 mmc = init_mmc_device(curr_device, false);
251 if (!mmc) 253 if (!mmc)
252 return CMD_RET_FAILURE; 254 return CMD_RET_FAILURE;
253 255
254 if (!(mmc->version & MMC_VERSION_MMC)) { 256 if (!(mmc->version & MMC_VERSION_MMC)) {
255 printf("It is not a EMMC device\n"); 257 printf("It is not a EMMC device\n");
256 return CMD_RET_FAILURE; 258 return CMD_RET_FAILURE;
257 } 259 }
258 if (mmc->version < MMC_VERSION_4_41) { 260 if (mmc->version < MMC_VERSION_4_41) {
259 printf("RPMB not supported before version 4.41\n"); 261 printf("RPMB not supported before version 4.41\n");
260 return CMD_RET_FAILURE; 262 return CMD_RET_FAILURE;
261 } 263 }
262 /* Switch to the RPMB partition */ 264 /* Switch to the RPMB partition */
263 #ifndef CONFIG_BLK 265 #ifndef CONFIG_BLK
264 original_part = mmc->block_dev.hwpart; 266 original_part = mmc->block_dev.hwpart;
265 #else 267 #else
266 original_part = mmc_get_blk_desc(mmc)->hwpart; 268 original_part = mmc_get_blk_desc(mmc)->hwpart;
267 #endif 269 #endif
268 if (blk_select_hwpart_devnum(IF_TYPE_MMC, curr_device, MMC_PART_RPMB) != 270 if (blk_select_hwpart_devnum(IF_TYPE_MMC, curr_device, MMC_PART_RPMB) !=
269 0) 271 0)
270 return CMD_RET_FAILURE; 272 return CMD_RET_FAILURE;
271 ret = cp->cmd(cmdtp, flag, argc, argv); 273 ret = cp->cmd(cmdtp, flag, argc, argv);
272 274
273 /* Return to original partition */ 275 /* Return to original partition */
274 if (blk_select_hwpart_devnum(IF_TYPE_MMC, curr_device, original_part) != 276 if (blk_select_hwpart_devnum(IF_TYPE_MMC, curr_device, original_part) !=
275 0) 277 0)
276 return CMD_RET_FAILURE; 278 return CMD_RET_FAILURE;
277 return ret; 279 return ret;
278 } 280 }
279 #endif 281 #endif
280 282
281 static int do_mmc_read(cmd_tbl_t *cmdtp, int flag, 283 static int do_mmc_read(cmd_tbl_t *cmdtp, int flag,
282 int argc, char * const argv[]) 284 int argc, char * const argv[])
283 { 285 {
284 struct mmc *mmc; 286 struct mmc *mmc;
285 u32 blk, cnt, n; 287 u32 blk, cnt, n;
286 void *addr; 288 void *addr;
287 289
288 if (argc != 4) 290 if (argc != 4)
289 return CMD_RET_USAGE; 291 return CMD_RET_USAGE;
290 292
291 addr = (void *)simple_strtoul(argv[1], NULL, 16); 293 addr = (void *)simple_strtoul(argv[1], NULL, 16);
292 blk = simple_strtoul(argv[2], NULL, 16); 294 blk = simple_strtoul(argv[2], NULL, 16);
293 cnt = simple_strtoul(argv[3], NULL, 16); 295 cnt = simple_strtoul(argv[3], NULL, 16);
294 296
295 mmc = init_mmc_device(curr_device, false); 297 mmc = init_mmc_device(curr_device, false);
296 if (!mmc) 298 if (!mmc)
297 return CMD_RET_FAILURE; 299 return CMD_RET_FAILURE;
298 300
299 printf("\nMMC read: dev # %d, block # %d, count %d ... ", 301 printf("\nMMC read: dev # %d, block # %d, count %d ... ",
300 curr_device, blk, cnt); 302 curr_device, blk, cnt);
301 303
302 n = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, addr); 304 n = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, addr);
303 printf("%d blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR"); 305 printf("%d blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR");
304 306
305 return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE; 307 return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
306 } 308 }
307 309
308 #if CONFIG_IS_ENABLED(MMC_WRITE) 310 #if CONFIG_IS_ENABLED(MMC_WRITE)
309 static int do_mmc_write(cmd_tbl_t *cmdtp, int flag, 311 static int do_mmc_write(cmd_tbl_t *cmdtp, int flag,
310 int argc, char * const argv[]) 312 int argc, char * const argv[])
311 { 313 {
312 struct mmc *mmc; 314 struct mmc *mmc;
313 u32 blk, cnt, n; 315 u32 blk, cnt, n;
314 void *addr; 316 void *addr;
315 317
316 if (argc != 4) 318 if (argc != 4)
317 return CMD_RET_USAGE; 319 return CMD_RET_USAGE;
318 320
319 addr = (void *)simple_strtoul(argv[1], NULL, 16); 321 addr = (void *)simple_strtoul(argv[1], NULL, 16);
320 blk = simple_strtoul(argv[2], NULL, 16); 322 blk = simple_strtoul(argv[2], NULL, 16);
321 cnt = simple_strtoul(argv[3], NULL, 16); 323 cnt = simple_strtoul(argv[3], NULL, 16);
322 324
323 mmc = init_mmc_device(curr_device, false); 325 mmc = init_mmc_device(curr_device, false);
324 if (!mmc) 326 if (!mmc)
325 return CMD_RET_FAILURE; 327 return CMD_RET_FAILURE;
326 328
327 printf("\nMMC write: dev # %d, block # %d, count %d ... ", 329 printf("\nMMC write: dev # %d, block # %d, count %d ... ",
328 curr_device, blk, cnt); 330 curr_device, blk, cnt);
329 331
330 if (mmc_getwp(mmc) == 1) { 332 if (mmc_getwp(mmc) == 1) {
331 printf("Error: card is write protected!\n"); 333 printf("Error: card is write protected!\n");
332 return CMD_RET_FAILURE; 334 return CMD_RET_FAILURE;
333 } 335 }
334 n = blk_dwrite(mmc_get_blk_desc(mmc), blk, cnt, addr); 336 n = blk_dwrite(mmc_get_blk_desc(mmc), blk, cnt, addr);
335 printf("%d blocks written: %s\n", n, (n == cnt) ? "OK" : "ERROR"); 337 printf("%d blocks written: %s\n", n, (n == cnt) ? "OK" : "ERROR");
336 338
337 return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE; 339 return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
338 } 340 }
339 static int do_mmc_erase(cmd_tbl_t *cmdtp, int flag, 341 static int do_mmc_erase(cmd_tbl_t *cmdtp, int flag,
340 int argc, char * const argv[]) 342 int argc, char * const argv[])
341 { 343 {
342 struct mmc *mmc; 344 struct mmc *mmc;
343 u32 blk, cnt, n; 345 u32 blk, cnt, n;
344 346
345 if (argc != 3) 347 if (argc != 3)
346 return CMD_RET_USAGE; 348 return CMD_RET_USAGE;
347 349
348 blk = simple_strtoul(argv[1], NULL, 16); 350 blk = simple_strtoul(argv[1], NULL, 16);
349 cnt = simple_strtoul(argv[2], NULL, 16); 351 cnt = simple_strtoul(argv[2], NULL, 16);
350 352
351 mmc = init_mmc_device(curr_device, false); 353 mmc = init_mmc_device(curr_device, false);
352 if (!mmc) 354 if (!mmc)
353 return CMD_RET_FAILURE; 355 return CMD_RET_FAILURE;
354 356
355 printf("\nMMC erase: dev # %d, block # %d, count %d ... ", 357 printf("\nMMC erase: dev # %d, block # %d, count %d ... ",
356 curr_device, blk, cnt); 358 curr_device, blk, cnt);
357 359
358 if (mmc_getwp(mmc) == 1) { 360 if (mmc_getwp(mmc) == 1) {
359 printf("Error: card is write protected!\n"); 361 printf("Error: card is write protected!\n");
360 return CMD_RET_FAILURE; 362 return CMD_RET_FAILURE;
361 } 363 }
362 n = blk_derase(mmc_get_blk_desc(mmc), blk, cnt); 364 n = blk_derase(mmc_get_blk_desc(mmc), blk, cnt);
363 printf("%d blocks erased: %s\n", n, (n == cnt) ? "OK" : "ERROR"); 365 printf("%d blocks erased: %s\n", n, (n == cnt) ? "OK" : "ERROR");
364 366
365 return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE; 367 return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
366 } 368 }
367 #endif 369 #endif
368 370
369 static int do_mmc_rescan(cmd_tbl_t *cmdtp, int flag, 371 static int do_mmc_rescan(cmd_tbl_t *cmdtp, int flag,
370 int argc, char * const argv[]) 372 int argc, char * const argv[])
371 { 373 {
372 struct mmc *mmc; 374 struct mmc *mmc;
373 375
374 mmc = init_mmc_device(curr_device, true); 376 mmc = init_mmc_device(curr_device, true);
375 if (!mmc) 377 if (!mmc)
376 return CMD_RET_FAILURE; 378 return CMD_RET_FAILURE;
377 379
378 return CMD_RET_SUCCESS; 380 return CMD_RET_SUCCESS;
379 } 381 }
380 static int do_mmc_part(cmd_tbl_t *cmdtp, int flag, 382 static int do_mmc_part(cmd_tbl_t *cmdtp, int flag,
381 int argc, char * const argv[]) 383 int argc, char * const argv[])
382 { 384 {
383 struct blk_desc *mmc_dev; 385 struct blk_desc *mmc_dev;
384 struct mmc *mmc; 386 struct mmc *mmc;
385 387
386 mmc = init_mmc_device(curr_device, false); 388 mmc = init_mmc_device(curr_device, false);
387 if (!mmc) 389 if (!mmc)
388 return CMD_RET_FAILURE; 390 return CMD_RET_FAILURE;
389 391
390 mmc_dev = blk_get_devnum_by_type(IF_TYPE_MMC, curr_device); 392 mmc_dev = blk_get_devnum_by_type(IF_TYPE_MMC, curr_device);
391 if (mmc_dev != NULL && mmc_dev->type != DEV_TYPE_UNKNOWN) { 393 if (mmc_dev != NULL && mmc_dev->type != DEV_TYPE_UNKNOWN) {
392 part_print(mmc_dev); 394 part_print(mmc_dev);
393 return CMD_RET_SUCCESS; 395 return CMD_RET_SUCCESS;
394 } 396 }
395 397
396 puts("get mmc type error!\n"); 398 puts("get mmc type error!\n");
397 return CMD_RET_FAILURE; 399 return CMD_RET_FAILURE;
398 } 400 }
399 static int do_mmc_dev(cmd_tbl_t *cmdtp, int flag, 401 static int do_mmc_dev(cmd_tbl_t *cmdtp, int flag,
400 int argc, char * const argv[]) 402 int argc, char * const argv[])
401 { 403 {
402 int dev, part = 0, ret; 404 int dev, part = 0, ret;
403 struct mmc *mmc; 405 struct mmc *mmc;
404 406
405 if (argc == 1) { 407 if (argc == 1) {
406 dev = curr_device; 408 dev = curr_device;
407 } else if (argc == 2) { 409 } else if (argc == 2) {
408 dev = simple_strtoul(argv[1], NULL, 10); 410 dev = simple_strtoul(argv[1], NULL, 10);
409 } else if (argc == 3) { 411 } else if (argc == 3) {
410 dev = (int)simple_strtoul(argv[1], NULL, 10); 412 dev = (int)simple_strtoul(argv[1], NULL, 10);
411 part = (int)simple_strtoul(argv[2], NULL, 10); 413 part = (int)simple_strtoul(argv[2], NULL, 10);
412 if (part > PART_ACCESS_MASK) { 414 if (part > PART_ACCESS_MASK) {
413 printf("#part_num shouldn't be larger than %d\n", 415 printf("#part_num shouldn't be larger than %d\n",
414 PART_ACCESS_MASK); 416 PART_ACCESS_MASK);
415 return CMD_RET_FAILURE; 417 return CMD_RET_FAILURE;
416 } 418 }
417 } else { 419 } else {
418 return CMD_RET_USAGE; 420 return CMD_RET_USAGE;
419 } 421 }
420 422
421 mmc = init_mmc_device(dev, true); 423 mmc = init_mmc_device(dev, true);
422 if (!mmc) 424 if (!mmc)
423 return CMD_RET_FAILURE; 425 return CMD_RET_FAILURE;
424 426
425 ret = blk_select_hwpart_devnum(IF_TYPE_MMC, dev, part); 427 ret = blk_select_hwpart_devnum(IF_TYPE_MMC, dev, part);
426 printf("switch to partitions #%d, %s\n", 428 printf("switch to partitions #%d, %s\n",
427 part, (!ret) ? "OK" : "ERROR"); 429 part, (!ret) ? "OK" : "ERROR");
428 if (ret) 430 if (ret)
429 return 1; 431 return 1;
430 432
431 curr_device = dev; 433 curr_device = dev;
432 if (mmc->part_config == MMCPART_NOAVAILABLE) 434 if (mmc->part_config == MMCPART_NOAVAILABLE)
433 printf("mmc%d is current device\n", curr_device); 435 printf("mmc%d is current device\n", curr_device);
434 else 436 else
435 printf("mmc%d(part %d) is current device\n", 437 printf("mmc%d(part %d) is current device\n",
436 curr_device, mmc_get_blk_desc(mmc)->hwpart); 438 curr_device, mmc_get_blk_desc(mmc)->hwpart);
437 439
438 return CMD_RET_SUCCESS; 440 return CMD_RET_SUCCESS;
439 } 441 }
440 static int do_mmc_list(cmd_tbl_t *cmdtp, int flag, 442 static int do_mmc_list(cmd_tbl_t *cmdtp, int flag,
441 int argc, char * const argv[]) 443 int argc, char * const argv[])
442 { 444 {
443 print_mmc_devices('\n'); 445 print_mmc_devices('\n');
444 return CMD_RET_SUCCESS; 446 return CMD_RET_SUCCESS;
445 } 447 }
446 448
447 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING) 449 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
448 static int parse_hwpart_user(struct mmc_hwpart_conf *pconf, 450 static int parse_hwpart_user(struct mmc_hwpart_conf *pconf,
449 int argc, char * const argv[]) 451 int argc, char * const argv[])
450 { 452 {
451 int i = 0; 453 int i = 0;
452 454
453 memset(&pconf->user, 0, sizeof(pconf->user)); 455 memset(&pconf->user, 0, sizeof(pconf->user));
454 456
455 while (i < argc) { 457 while (i < argc) {
456 if (!strcmp(argv[i], "enh")) { 458 if (!strcmp(argv[i], "enh")) {
457 if (i + 2 >= argc) 459 if (i + 2 >= argc)
458 return -1; 460 return -1;
459 pconf->user.enh_start = 461 pconf->user.enh_start =
460 simple_strtoul(argv[i+1], NULL, 10); 462 simple_strtoul(argv[i+1], NULL, 10);
461 pconf->user.enh_size = 463 pconf->user.enh_size =
462 simple_strtoul(argv[i+2], NULL, 10); 464 simple_strtoul(argv[i+2], NULL, 10);
463 i += 3; 465 i += 3;
464 } else if (!strcmp(argv[i], "wrrel")) { 466 } else if (!strcmp(argv[i], "wrrel")) {
465 if (i + 1 >= argc) 467 if (i + 1 >= argc)
466 return -1; 468 return -1;
467 pconf->user.wr_rel_change = 1; 469 pconf->user.wr_rel_change = 1;
468 if (!strcmp(argv[i+1], "on")) 470 if (!strcmp(argv[i+1], "on"))
469 pconf->user.wr_rel_set = 1; 471 pconf->user.wr_rel_set = 1;
470 else if (!strcmp(argv[i+1], "off")) 472 else if (!strcmp(argv[i+1], "off"))
471 pconf->user.wr_rel_set = 0; 473 pconf->user.wr_rel_set = 0;
472 else 474 else
473 return -1; 475 return -1;
474 i += 2; 476 i += 2;
475 } else { 477 } else {
476 break; 478 break;
477 } 479 }
478 } 480 }
479 return i; 481 return i;
480 } 482 }
481 483
482 static int parse_hwpart_gp(struct mmc_hwpart_conf *pconf, int pidx, 484 static int parse_hwpart_gp(struct mmc_hwpart_conf *pconf, int pidx,
483 int argc, char * const argv[]) 485 int argc, char * const argv[])
484 { 486 {
485 int i; 487 int i;
486 488
487 memset(&pconf->gp_part[pidx], 0, sizeof(pconf->gp_part[pidx])); 489 memset(&pconf->gp_part[pidx], 0, sizeof(pconf->gp_part[pidx]));
488 490
489 if (1 >= argc) 491 if (1 >= argc)
490 return -1; 492 return -1;
491 pconf->gp_part[pidx].size = simple_strtoul(argv[0], NULL, 10); 493 pconf->gp_part[pidx].size = simple_strtoul(argv[0], NULL, 10);
492 494
493 i = 1; 495 i = 1;
494 while (i < argc) { 496 while (i < argc) {
495 if (!strcmp(argv[i], "enh")) { 497 if (!strcmp(argv[i], "enh")) {
496 pconf->gp_part[pidx].enhanced = 1; 498 pconf->gp_part[pidx].enhanced = 1;
497 i += 1; 499 i += 1;
498 } else if (!strcmp(argv[i], "wrrel")) { 500 } else if (!strcmp(argv[i], "wrrel")) {
499 if (i + 1 >= argc) 501 if (i + 1 >= argc)
500 return -1; 502 return -1;
501 pconf->gp_part[pidx].wr_rel_change = 1; 503 pconf->gp_part[pidx].wr_rel_change = 1;
502 if (!strcmp(argv[i+1], "on")) 504 if (!strcmp(argv[i+1], "on"))
503 pconf->gp_part[pidx].wr_rel_set = 1; 505 pconf->gp_part[pidx].wr_rel_set = 1;
504 else if (!strcmp(argv[i+1], "off")) 506 else if (!strcmp(argv[i+1], "off"))
505 pconf->gp_part[pidx].wr_rel_set = 0; 507 pconf->gp_part[pidx].wr_rel_set = 0;
506 else 508 else
507 return -1; 509 return -1;
508 i += 2; 510 i += 2;
509 } else { 511 } else {
510 break; 512 break;
511 } 513 }
512 } 514 }
513 return i; 515 return i;
514 } 516 }
515 517
516 static int do_mmc_hwpartition(cmd_tbl_t *cmdtp, int flag, 518 static int do_mmc_hwpartition(cmd_tbl_t *cmdtp, int flag,
517 int argc, char * const argv[]) 519 int argc, char * const argv[])
518 { 520 {
519 struct mmc *mmc; 521 struct mmc *mmc;
520 struct mmc_hwpart_conf pconf = { }; 522 struct mmc_hwpart_conf pconf = { };
521 enum mmc_hwpart_conf_mode mode = MMC_HWPART_CONF_CHECK; 523 enum mmc_hwpart_conf_mode mode = MMC_HWPART_CONF_CHECK;
522 int i, r, pidx; 524 int i, r, pidx;
523 525
524 mmc = init_mmc_device(curr_device, false); 526 mmc = init_mmc_device(curr_device, false);
525 if (!mmc) 527 if (!mmc)
526 return CMD_RET_FAILURE; 528 return CMD_RET_FAILURE;
527 529
528 if (argc < 1) 530 if (argc < 1)
529 return CMD_RET_USAGE; 531 return CMD_RET_USAGE;
530 i = 1; 532 i = 1;
531 while (i < argc) { 533 while (i < argc) {
532 if (!strcmp(argv[i], "user")) { 534 if (!strcmp(argv[i], "user")) {
533 i++; 535 i++;
534 r = parse_hwpart_user(&pconf, argc-i, &argv[i]); 536 r = parse_hwpart_user(&pconf, argc-i, &argv[i]);
535 if (r < 0) 537 if (r < 0)
536 return CMD_RET_USAGE; 538 return CMD_RET_USAGE;
537 i += r; 539 i += r;
538 } else if (!strncmp(argv[i], "gp", 2) && 540 } else if (!strncmp(argv[i], "gp", 2) &&
539 strlen(argv[i]) == 3 && 541 strlen(argv[i]) == 3 &&
540 argv[i][2] >= '1' && argv[i][2] <= '4') { 542 argv[i][2] >= '1' && argv[i][2] <= '4') {
541 pidx = argv[i][2] - '1'; 543 pidx = argv[i][2] - '1';
542 i++; 544 i++;
543 r = parse_hwpart_gp(&pconf, pidx, argc-i, &argv[i]); 545 r = parse_hwpart_gp(&pconf, pidx, argc-i, &argv[i]);
544 if (r < 0) 546 if (r < 0)
545 return CMD_RET_USAGE; 547 return CMD_RET_USAGE;
546 i += r; 548 i += r;
547 } else if (!strcmp(argv[i], "check")) { 549 } else if (!strcmp(argv[i], "check")) {
548 mode = MMC_HWPART_CONF_CHECK; 550 mode = MMC_HWPART_CONF_CHECK;
549 i++; 551 i++;
550 } else if (!strcmp(argv[i], "set")) { 552 } else if (!strcmp(argv[i], "set")) {
551 mode = MMC_HWPART_CONF_SET; 553 mode = MMC_HWPART_CONF_SET;
552 i++; 554 i++;
553 } else if (!strcmp(argv[i], "complete")) { 555 } else if (!strcmp(argv[i], "complete")) {
554 mode = MMC_HWPART_CONF_COMPLETE; 556 mode = MMC_HWPART_CONF_COMPLETE;
555 i++; 557 i++;
556 } else { 558 } else {
557 return CMD_RET_USAGE; 559 return CMD_RET_USAGE;
558 } 560 }
559 } 561 }
560 562
561 puts("Partition configuration:\n"); 563 puts("Partition configuration:\n");
562 if (pconf.user.enh_size) { 564 if (pconf.user.enh_size) {
563 puts("\tUser Enhanced Start: "); 565 puts("\tUser Enhanced Start: ");
564 print_size(((u64)pconf.user.enh_start) << 9, "\n"); 566 print_size(((u64)pconf.user.enh_start) << 9, "\n");
565 puts("\tUser Enhanced Size: "); 567 puts("\tUser Enhanced Size: ");
566 print_size(((u64)pconf.user.enh_size) << 9, "\n"); 568 print_size(((u64)pconf.user.enh_size) << 9, "\n");
567 } else { 569 } else {
568 puts("\tNo enhanced user data area\n"); 570 puts("\tNo enhanced user data area\n");
569 } 571 }
570 if (pconf.user.wr_rel_change) 572 if (pconf.user.wr_rel_change)
571 printf("\tUser partition write reliability: %s\n", 573 printf("\tUser partition write reliability: %s\n",
572 pconf.user.wr_rel_set ? "on" : "off"); 574 pconf.user.wr_rel_set ? "on" : "off");
573 for (pidx = 0; pidx < 4; pidx++) { 575 for (pidx = 0; pidx < 4; pidx++) {
574 if (pconf.gp_part[pidx].size) { 576 if (pconf.gp_part[pidx].size) {
575 printf("\tGP%i Capacity: ", pidx+1); 577 printf("\tGP%i Capacity: ", pidx+1);
576 print_size(((u64)pconf.gp_part[pidx].size) << 9, 578 print_size(((u64)pconf.gp_part[pidx].size) << 9,
577 pconf.gp_part[pidx].enhanced ? 579 pconf.gp_part[pidx].enhanced ?
578 " ENH\n" : "\n"); 580 " ENH\n" : "\n");
579 } else { 581 } else {
580 printf("\tNo GP%i partition\n", pidx+1); 582 printf("\tNo GP%i partition\n", pidx+1);
581 } 583 }
582 if (pconf.gp_part[pidx].wr_rel_change) 584 if (pconf.gp_part[pidx].wr_rel_change)
583 printf("\tGP%i write reliability: %s\n", pidx+1, 585 printf("\tGP%i write reliability: %s\n", pidx+1,
584 pconf.gp_part[pidx].wr_rel_set ? "on" : "off"); 586 pconf.gp_part[pidx].wr_rel_set ? "on" : "off");
585 } 587 }
586 588
587 if (!mmc_hwpart_config(mmc, &pconf, mode)) { 589 if (!mmc_hwpart_config(mmc, &pconf, mode)) {
588 if (mode == MMC_HWPART_CONF_COMPLETE) 590 if (mode == MMC_HWPART_CONF_COMPLETE)
589 puts("Partitioning successful, " 591 puts("Partitioning successful, "
590 "power-cycle to make effective\n"); 592 "power-cycle to make effective\n");
591 return CMD_RET_SUCCESS; 593 return CMD_RET_SUCCESS;
592 } else { 594 } else {
593 puts("Failed!\n"); 595 puts("Failed!\n");
594 return CMD_RET_FAILURE; 596 return CMD_RET_FAILURE;
595 } 597 }
596 } 598 }
597 #endif 599 #endif
598 600
599 #ifdef CONFIG_SUPPORT_EMMC_BOOT 601 #ifdef CONFIG_SUPPORT_EMMC_BOOT
600 static int do_mmc_bootbus(cmd_tbl_t *cmdtp, int flag, 602 static int do_mmc_bootbus(cmd_tbl_t *cmdtp, int flag,
601 int argc, char * const argv[]) 603 int argc, char * const argv[])
602 { 604 {
603 int dev; 605 int dev;
604 struct mmc *mmc; 606 struct mmc *mmc;
605 u8 width, reset, mode; 607 u8 width, reset, mode;
606 608
607 if (argc != 5) 609 if (argc != 5)
608 return CMD_RET_USAGE; 610 return CMD_RET_USAGE;
609 dev = simple_strtoul(argv[1], NULL, 10); 611 dev = simple_strtoul(argv[1], NULL, 10);
610 width = simple_strtoul(argv[2], NULL, 10); 612 width = simple_strtoul(argv[2], NULL, 10);
611 reset = simple_strtoul(argv[3], NULL, 10); 613 reset = simple_strtoul(argv[3], NULL, 10);
612 mode = simple_strtoul(argv[4], NULL, 10); 614 mode = simple_strtoul(argv[4], NULL, 10);
613 615
614 mmc = init_mmc_device(dev, false); 616 mmc = init_mmc_device(dev, false);
615 if (!mmc) 617 if (!mmc)
616 return CMD_RET_FAILURE; 618 return CMD_RET_FAILURE;
617 619
618 if (IS_SD(mmc)) { 620 if (IS_SD(mmc)) {
619 puts("BOOT_BUS_WIDTH only exists on eMMC\n"); 621 puts("BOOT_BUS_WIDTH only exists on eMMC\n");
620 return CMD_RET_FAILURE; 622 return CMD_RET_FAILURE;
621 } 623 }
622 624
623 /* acknowledge to be sent during boot operation */ 625 /* acknowledge to be sent during boot operation */
624 return mmc_set_boot_bus_width(mmc, width, reset, mode); 626 return mmc_set_boot_bus_width(mmc, width, reset, mode);
625 } 627 }
626 static int do_mmc_boot_resize(cmd_tbl_t *cmdtp, int flag, 628 static int do_mmc_boot_resize(cmd_tbl_t *cmdtp, int flag,
627 int argc, char * const argv[]) 629 int argc, char * const argv[])
628 { 630 {
629 int dev; 631 int dev;
630 struct mmc *mmc; 632 struct mmc *mmc;
631 u32 bootsize, rpmbsize; 633 u32 bootsize, rpmbsize;
632 634
633 if (argc != 4) 635 if (argc != 4)
634 return CMD_RET_USAGE; 636 return CMD_RET_USAGE;
635 dev = simple_strtoul(argv[1], NULL, 10); 637 dev = simple_strtoul(argv[1], NULL, 10);
636 bootsize = simple_strtoul(argv[2], NULL, 10); 638 bootsize = simple_strtoul(argv[2], NULL, 10);
637 rpmbsize = simple_strtoul(argv[3], NULL, 10); 639 rpmbsize = simple_strtoul(argv[3], NULL, 10);
638 640
639 mmc = init_mmc_device(dev, false); 641 mmc = init_mmc_device(dev, false);
640 if (!mmc) 642 if (!mmc)
641 return CMD_RET_FAILURE; 643 return CMD_RET_FAILURE;
642 644
643 if (IS_SD(mmc)) { 645 if (IS_SD(mmc)) {
644 printf("It is not a EMMC device\n"); 646 printf("It is not a EMMC device\n");
645 return CMD_RET_FAILURE; 647 return CMD_RET_FAILURE;
646 } 648 }
647 649
648 if (mmc_boot_partition_size_change(mmc, bootsize, rpmbsize)) { 650 if (mmc_boot_partition_size_change(mmc, bootsize, rpmbsize)) {
649 printf("EMMC boot partition Size change Failed.\n"); 651 printf("EMMC boot partition Size change Failed.\n");
650 return CMD_RET_FAILURE; 652 return CMD_RET_FAILURE;
651 } 653 }
652 654
653 printf("EMMC boot partition Size %d MB\n", bootsize); 655 printf("EMMC boot partition Size %d MB\n", bootsize);
654 printf("EMMC RPMB partition Size %d MB\n", rpmbsize); 656 printf("EMMC RPMB partition Size %d MB\n", rpmbsize);
655 return CMD_RET_SUCCESS; 657 return CMD_RET_SUCCESS;
656 } 658 }
657 659
658 static int mmc_partconf_print(struct mmc *mmc) 660 static int mmc_partconf_print(struct mmc *mmc)
659 { 661 {
660 u8 ack, access, part; 662 u8 ack, access, part;
661 663
662 if (mmc->part_config == MMCPART_NOAVAILABLE) { 664 if (mmc->part_config == MMCPART_NOAVAILABLE) {
663 printf("No part_config info for ver. 0x%x\n", mmc->version); 665 printf("No part_config info for ver. 0x%x\n", mmc->version);
664 return CMD_RET_FAILURE; 666 return CMD_RET_FAILURE;
665 } 667 }
666 668
667 access = EXT_CSD_EXTRACT_PARTITION_ACCESS(mmc->part_config); 669 access = EXT_CSD_EXTRACT_PARTITION_ACCESS(mmc->part_config);
668 ack = EXT_CSD_EXTRACT_BOOT_ACK(mmc->part_config); 670 ack = EXT_CSD_EXTRACT_BOOT_ACK(mmc->part_config);
669 part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config); 671 part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config);
670 672
671 printf("EXT_CSD[179], PARTITION_CONFIG:\n" 673 printf("EXT_CSD[179], PARTITION_CONFIG:\n"
672 "BOOT_ACK: 0x%x\n" 674 "BOOT_ACK: 0x%x\n"
673 "BOOT_PARTITION_ENABLE: 0x%x\n" 675 "BOOT_PARTITION_ENABLE: 0x%x\n"
674 "PARTITION_ACCESS: 0x%x\n", ack, part, access); 676 "PARTITION_ACCESS: 0x%x\n", ack, part, access);
675 677
676 return CMD_RET_SUCCESS; 678 return CMD_RET_SUCCESS;
677 } 679 }
678 680
679 static int do_mmc_partconf(cmd_tbl_t *cmdtp, int flag, 681 static int do_mmc_partconf(cmd_tbl_t *cmdtp, int flag,
680 int argc, char * const argv[]) 682 int argc, char * const argv[])
681 { 683 {
682 int dev; 684 int dev;
683 struct mmc *mmc; 685 struct mmc *mmc;
684 u8 ack, part_num, access; 686 u8 ack, part_num, access;
685 687
686 if (argc != 2 && argc != 5) 688 if (argc != 2 && argc != 5)
687 return CMD_RET_USAGE; 689 return CMD_RET_USAGE;
688 690
689 dev = simple_strtoul(argv[1], NULL, 10); 691 dev = simple_strtoul(argv[1], NULL, 10);
690 692
691 mmc = init_mmc_device(dev, false); 693 mmc = init_mmc_device(dev, false);
692 if (!mmc) 694 if (!mmc)
693 return CMD_RET_FAILURE; 695 return CMD_RET_FAILURE;
694 696
695 if (IS_SD(mmc)) { 697 if (IS_SD(mmc)) {
696 puts("PARTITION_CONFIG only exists on eMMC\n"); 698 puts("PARTITION_CONFIG only exists on eMMC\n");
697 return CMD_RET_FAILURE; 699 return CMD_RET_FAILURE;
698 } 700 }
699 701
700 if (argc == 2) 702 if (argc == 2)
701 return mmc_partconf_print(mmc); 703 return mmc_partconf_print(mmc);
702 704
703 ack = simple_strtoul(argv[2], NULL, 10); 705 ack = simple_strtoul(argv[2], NULL, 10);
704 part_num = simple_strtoul(argv[3], NULL, 10); 706 part_num = simple_strtoul(argv[3], NULL, 10);
705 access = simple_strtoul(argv[4], NULL, 10); 707 access = simple_strtoul(argv[4], NULL, 10);
706 708
707 /* acknowledge to be sent during boot operation */ 709 /* acknowledge to be sent during boot operation */
708 return mmc_set_part_conf(mmc, ack, part_num, access); 710 return mmc_set_part_conf(mmc, ack, part_num, access);
709 } 711 }
710 static int do_mmc_rst_func(cmd_tbl_t *cmdtp, int flag, 712 static int do_mmc_rst_func(cmd_tbl_t *cmdtp, int flag,
711 int argc, char * const argv[]) 713 int argc, char * const argv[])
712 { 714 {
713 int dev; 715 int dev;
714 struct mmc *mmc; 716 struct mmc *mmc;
715 u8 enable; 717 u8 enable;
716 718
717 /* 719 /*
718 * Set the RST_n_ENABLE bit of RST_n_FUNCTION 720 * Set the RST_n_ENABLE bit of RST_n_FUNCTION
719 * The only valid values are 0x0, 0x1 and 0x2 and writing 721 * The only valid values are 0x0, 0x1 and 0x2 and writing
720 * a value of 0x1 or 0x2 sets the value permanently. 722 * a value of 0x1 or 0x2 sets the value permanently.
721 */ 723 */
722 if (argc != 3) 724 if (argc != 3)
723 return CMD_RET_USAGE; 725 return CMD_RET_USAGE;
724 726
725 dev = simple_strtoul(argv[1], NULL, 10); 727 dev = simple_strtoul(argv[1], NULL, 10);
726 enable = simple_strtoul(argv[2], NULL, 10); 728 enable = simple_strtoul(argv[2], NULL, 10);
727 729
728 if (enable > 2) { 730 if (enable > 2) {
729 puts("Invalid RST_n_ENABLE value\n"); 731 puts("Invalid RST_n_ENABLE value\n");
730 return CMD_RET_USAGE; 732 return CMD_RET_USAGE;
731 } 733 }
732 734
733 mmc = init_mmc_device(dev, false); 735 mmc = init_mmc_device(dev, false);
734 if (!mmc) 736 if (!mmc)
735 return CMD_RET_FAILURE; 737 return CMD_RET_FAILURE;
736 738
737 if (IS_SD(mmc)) { 739 if (IS_SD(mmc)) {
738 puts("RST_n_FUNCTION only exists on eMMC\n"); 740 puts("RST_n_FUNCTION only exists on eMMC\n");
739 return CMD_RET_FAILURE; 741 return CMD_RET_FAILURE;
740 } 742 }
741 743
742 return mmc_set_rst_n_function(mmc, enable); 744 return mmc_set_rst_n_function(mmc, enable);
743 } 745 }
744 #endif 746 #endif
745 static int do_mmc_setdsr(cmd_tbl_t *cmdtp, int flag, 747 static int do_mmc_setdsr(cmd_tbl_t *cmdtp, int flag,
746 int argc, char * const argv[]) 748 int argc, char * const argv[])
747 { 749 {
748 struct mmc *mmc; 750 struct mmc *mmc;
749 u32 val; 751 u32 val;
750 int ret; 752 int ret;
751 753
752 if (argc != 2) 754 if (argc != 2)
753 return CMD_RET_USAGE; 755 return CMD_RET_USAGE;
754 val = simple_strtoul(argv[1], NULL, 16); 756 val = simple_strtoul(argv[1], NULL, 16);
755 757
756 mmc = find_mmc_device(curr_device); 758 mmc = find_mmc_device(curr_device);
757 if (!mmc) { 759 if (!mmc) {
758 printf("no mmc device at slot %x\n", curr_device); 760 printf("no mmc device at slot %x\n", curr_device);
759 return CMD_RET_FAILURE; 761 return CMD_RET_FAILURE;
760 } 762 }
761 ret = mmc_set_dsr(mmc, val); 763 ret = mmc_set_dsr(mmc, val);
762 printf("set dsr %s\n", (!ret) ? "OK, force rescan" : "ERROR"); 764 printf("set dsr %s\n", (!ret) ? "OK, force rescan" : "ERROR");
763 if (!ret) { 765 if (!ret) {
764 mmc->has_init = 0; 766 mmc->has_init = 0;
765 if (mmc_init(mmc)) 767 if (mmc_init(mmc))
766 return CMD_RET_FAILURE; 768 return CMD_RET_FAILURE;
767 else 769 else
768 return CMD_RET_SUCCESS; 770 return CMD_RET_SUCCESS;
769 } 771 }
770 return ret; 772 return ret;
771 } 773 }
772 774
773 #ifdef CONFIG_CMD_BKOPS_ENABLE 775 #ifdef CONFIG_CMD_BKOPS_ENABLE
774 static int do_mmc_bkops_enable(cmd_tbl_t *cmdtp, int flag, 776 static int do_mmc_bkops_enable(cmd_tbl_t *cmdtp, int flag,
775 int argc, char * const argv[]) 777 int argc, char * const argv[])
776 { 778 {
777 int dev; 779 int dev;
778 struct mmc *mmc; 780 struct mmc *mmc;
779 781
780 if (argc != 2) 782 if (argc != 2)
781 return CMD_RET_USAGE; 783 return CMD_RET_USAGE;
782 784
783 dev = simple_strtoul(argv[1], NULL, 10); 785 dev = simple_strtoul(argv[1], NULL, 10);
784 786
785 mmc = init_mmc_device(dev, false); 787 mmc = init_mmc_device(dev, false);
786 if (!mmc) 788 if (!mmc)
787 return CMD_RET_FAILURE; 789 return CMD_RET_FAILURE;
788 790
789 if (IS_SD(mmc)) { 791 if (IS_SD(mmc)) {
790 puts("BKOPS_EN only exists on eMMC\n"); 792 puts("BKOPS_EN only exists on eMMC\n");
791 return CMD_RET_FAILURE; 793 return CMD_RET_FAILURE;
792 } 794 }
793 795
794 return mmc_set_bkops_enable(mmc); 796 return mmc_set_bkops_enable(mmc);
795 } 797 }
796 #endif 798 #endif
797 799
798 static cmd_tbl_t cmd_mmc[] = { 800 static cmd_tbl_t cmd_mmc[] = {
799 U_BOOT_CMD_MKENT(info, 1, 0, do_mmcinfo, "", ""), 801 U_BOOT_CMD_MKENT(info, 1, 0, do_mmcinfo, "", ""),
800 U_BOOT_CMD_MKENT(read, 4, 1, do_mmc_read, "", ""), 802 U_BOOT_CMD_MKENT(read, 4, 1, do_mmc_read, "", ""),
801 #if CONFIG_IS_ENABLED(MMC_WRITE) 803 #if CONFIG_IS_ENABLED(MMC_WRITE)
802 U_BOOT_CMD_MKENT(write, 4, 0, do_mmc_write, "", ""), 804 U_BOOT_CMD_MKENT(write, 4, 0, do_mmc_write, "", ""),
803 U_BOOT_CMD_MKENT(erase, 3, 0, do_mmc_erase, "", ""), 805 U_BOOT_CMD_MKENT(erase, 3, 0, do_mmc_erase, "", ""),
804 #endif 806 #endif
805 U_BOOT_CMD_MKENT(rescan, 1, 1, do_mmc_rescan, "", ""), 807 U_BOOT_CMD_MKENT(rescan, 1, 1, do_mmc_rescan, "", ""),
806 U_BOOT_CMD_MKENT(part, 1, 1, do_mmc_part, "", ""), 808 U_BOOT_CMD_MKENT(part, 1, 1, do_mmc_part, "", ""),
807 U_BOOT_CMD_MKENT(dev, 3, 0, do_mmc_dev, "", ""), 809 U_BOOT_CMD_MKENT(dev, 3, 0, do_mmc_dev, "", ""),
808 U_BOOT_CMD_MKENT(list, 1, 1, do_mmc_list, "", ""), 810 U_BOOT_CMD_MKENT(list, 1, 1, do_mmc_list, "", ""),
809 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING) 811 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
810 U_BOOT_CMD_MKENT(hwpartition, 28, 0, do_mmc_hwpartition, "", ""), 812 U_BOOT_CMD_MKENT(hwpartition, 28, 0, do_mmc_hwpartition, "", ""),
811 #endif 813 #endif
812 #ifdef CONFIG_SUPPORT_EMMC_BOOT 814 #ifdef CONFIG_SUPPORT_EMMC_BOOT
813 U_BOOT_CMD_MKENT(bootbus, 5, 0, do_mmc_bootbus, "", ""), 815 U_BOOT_CMD_MKENT(bootbus, 5, 0, do_mmc_bootbus, "", ""),
814 U_BOOT_CMD_MKENT(bootpart-resize, 4, 0, do_mmc_boot_resize, "", ""), 816 U_BOOT_CMD_MKENT(bootpart-resize, 4, 0, do_mmc_boot_resize, "", ""),
815 U_BOOT_CMD_MKENT(partconf, 5, 0, do_mmc_partconf, "", ""), 817 U_BOOT_CMD_MKENT(partconf, 5, 0, do_mmc_partconf, "", ""),
816 U_BOOT_CMD_MKENT(rst-function, 3, 0, do_mmc_rst_func, "", ""), 818 U_BOOT_CMD_MKENT(rst-function, 3, 0, do_mmc_rst_func, "", ""),
817 #endif 819 #endif
818 #ifdef CONFIG_SUPPORT_EMMC_RPMB 820 #ifdef CONFIG_SUPPORT_EMMC_RPMB
819 U_BOOT_CMD_MKENT(rpmb, CONFIG_SYS_MAXARGS, 1, do_mmcrpmb, "", ""), 821 U_BOOT_CMD_MKENT(rpmb, CONFIG_SYS_MAXARGS, 1, do_mmcrpmb, "", ""),
820 #endif 822 #endif
821 U_BOOT_CMD_MKENT(setdsr, 2, 0, do_mmc_setdsr, "", ""), 823 U_BOOT_CMD_MKENT(setdsr, 2, 0, do_mmc_setdsr, "", ""),
822 #ifdef CONFIG_CMD_BKOPS_ENABLE 824 #ifdef CONFIG_CMD_BKOPS_ENABLE
823 U_BOOT_CMD_MKENT(bkops-enable, 2, 0, do_mmc_bkops_enable, "", ""), 825 U_BOOT_CMD_MKENT(bkops-enable, 2, 0, do_mmc_bkops_enable, "", ""),
824 #endif 826 #endif
825 }; 827 };
826 828
827 static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 829 static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
828 { 830 {
829 cmd_tbl_t *cp; 831 cmd_tbl_t *cp;
830 832
831 cp = find_cmd_tbl(argv[1], cmd_mmc, ARRAY_SIZE(cmd_mmc)); 833 cp = find_cmd_tbl(argv[1], cmd_mmc, ARRAY_SIZE(cmd_mmc));
832 834
833 /* Drop the mmc command */ 835 /* Drop the mmc command */
834 argc--; 836 argc--;
835 argv++; 837 argv++;
836 838
837 if (cp == NULL || argc > cp->maxargs) 839 if (cp == NULL || argc > cp->maxargs)
838 return CMD_RET_USAGE; 840 return CMD_RET_USAGE;
839 if (flag == CMD_FLAG_REPEAT && !cp->repeatable) 841 if (flag == CMD_FLAG_REPEAT && !cp->repeatable)
840 return CMD_RET_SUCCESS; 842 return CMD_RET_SUCCESS;
841 843
842 if (curr_device < 0) { 844 if (curr_device < 0) {
843 if (get_mmc_num() > 0) { 845 if (get_mmc_num() > 0) {
844 curr_device = 0; 846 curr_device = 0;
845 } else { 847 } else {
846 puts("No MMC device available\n"); 848 puts("No MMC device available\n");
847 return CMD_RET_FAILURE; 849 return CMD_RET_FAILURE;
848 } 850 }
849 } 851 }
850 return cp->cmd(cmdtp, flag, argc, argv); 852 return cp->cmd(cmdtp, flag, argc, argv);
851 } 853 }
852 854
853 U_BOOT_CMD( 855 U_BOOT_CMD(
854 mmc, 29, 1, do_mmcops, 856 mmc, 29, 1, do_mmcops,
855 "MMC sub system", 857 "MMC sub system",
856 "info - display info of the current MMC device\n" 858 "info - display info of the current MMC device\n"
857 "mmc read addr blk# cnt\n" 859 "mmc read addr blk# cnt\n"
858 "mmc write addr blk# cnt\n" 860 "mmc write addr blk# cnt\n"
859 "mmc erase blk# cnt\n" 861 "mmc erase blk# cnt\n"
860 "mmc rescan\n" 862 "mmc rescan\n"
861 "mmc part - lists available partition on current mmc device\n" 863 "mmc part - lists available partition on current mmc device\n"
862 "mmc dev [dev] [part] - show or set current mmc device [partition]\n" 864 "mmc dev [dev] [part] - show or set current mmc device [partition]\n"
863 "mmc list - lists available devices\n" 865 "mmc list - lists available devices\n"
864 "mmc hwpartition [args...] - does hardware partitioning\n" 866 "mmc hwpartition [args...] - does hardware partitioning\n"
865 " arguments (sizes in 512-byte blocks):\n" 867 " arguments (sizes in 512-byte blocks):\n"
866 " [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes\n" 868 " [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes\n"
867 " [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition\n" 869 " [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition\n"
868 " [check|set|complete] - mode, complete set partitioning completed\n" 870 " [check|set|complete] - mode, complete set partitioning completed\n"
869 " WARNING: Partitioning is a write-once setting once it is set to complete.\n" 871 " WARNING: Partitioning is a write-once setting once it is set to complete.\n"
870 " Power cycling is required to initialize partitions after set to complete.\n" 872 " Power cycling is required to initialize partitions after set to complete.\n"
871 #ifdef CONFIG_SUPPORT_EMMC_BOOT 873 #ifdef CONFIG_SUPPORT_EMMC_BOOT
872 "mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode\n" 874 "mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode\n"
873 " - Set the BOOT_BUS_WIDTH field of the specified device\n" 875 " - Set the BOOT_BUS_WIDTH field of the specified device\n"
874 "mmc bootpart-resize <dev> <boot part size MB> <RPMB part size MB>\n" 876 "mmc bootpart-resize <dev> <boot part size MB> <RPMB part size MB>\n"
875 " - Change sizes of boot and RPMB partitions of specified device\n" 877 " - Change sizes of boot and RPMB partitions of specified device\n"
876 "mmc partconf dev [boot_ack boot_partition partition_access]\n" 878 "mmc partconf dev [boot_ack boot_partition partition_access]\n"
877 " - Show or change the bits of the PARTITION_CONFIG field of the specified device\n" 879 " - Show or change the bits of the PARTITION_CONFIG field of the specified device\n"
878 "mmc rst-function dev value\n" 880 "mmc rst-function dev value\n"
879 " - Change the RST_n_FUNCTION field of the specified device\n" 881 " - Change the RST_n_FUNCTION field of the specified device\n"
880 " WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values.\n" 882 " WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values.\n"
881 #endif 883 #endif
882 #ifdef CONFIG_SUPPORT_EMMC_RPMB 884 #ifdef CONFIG_SUPPORT_EMMC_RPMB
883 "mmc rpmb read addr blk# cnt [address of auth-key] - block size is 256 bytes\n" 885 "mmc rpmb read addr blk# cnt [address of auth-key] - block size is 256 bytes\n"
884 "mmc rpmb write addr blk# cnt <address of auth-key> - block size is 256 bytes\n" 886 "mmc rpmb write addr blk# cnt <address of auth-key> - block size is 256 bytes\n"
885 "mmc rpmb key <address of auth-key> - program the RPMB authentication key.\n" 887 "mmc rpmb key <address of auth-key> - program the RPMB authentication key.\n"
886 "mmc rpmb counter - read the value of the write counter\n" 888 "mmc rpmb counter - read the value of the write counter\n"
887 #endif 889 #endif
888 "mmc setdsr <value> - set DSR register value\n" 890 "mmc setdsr <value> - set DSR register value\n"
889 #ifdef CONFIG_CMD_BKOPS_ENABLE 891 #ifdef CONFIG_CMD_BKOPS_ENABLE
890 "mmc bkops-enable <dev> - enable background operations handshake on device\n" 892 "mmc bkops-enable <dev> - enable background operations handshake on device\n"
891 " WARNING: This is a write-once setting.\n" 893 " WARNING: This is a write-once setting.\n"
892 #endif 894 #endif
893 ); 895 );
894 896
895 /* Old command kept for compatibility. Same as 'mmc info' */ 897 /* Old command kept for compatibility. Same as 'mmc info' */
896 U_BOOT_CMD( 898 U_BOOT_CMD(
897 mmcinfo, 1, 0, do_mmcinfo, 899 mmcinfo, 1, 0, do_mmcinfo,
898 "display MMC info", 900 "display MMC info",
899 "- display info of the current MMC device" 901 "- display info of the current MMC device"
900 ); 902 );
901 903
1 /* 1 /*
2 * Copyright 2008, Freescale Semiconductor, Inc 2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming 3 * Andy Fleming
4 * 4 *
5 * Based vaguely on the Linux code 5 * Based vaguely on the Linux code
6 * 6 *
7 * SPDX-License-Identifier: GPL-2.0+ 7 * SPDX-License-Identifier: GPL-2.0+
8 */ 8 */
9 9
10 #include <config.h> 10 #include <config.h>
11 #include <common.h> 11 #include <common.h>
12 #include <command.h> 12 #include <command.h>
13 #include <dm.h> 13 #include <dm.h>
14 #include <dm/device-internal.h> 14 #include <dm/device-internal.h>
15 #include <errno.h> 15 #include <errno.h>
16 #include <mmc.h> 16 #include <mmc.h>
17 #include <part.h> 17 #include <part.h>
18 #include <power/regulator.h> 18 #include <power/regulator.h>
19 #include <malloc.h> 19 #include <malloc.h>
20 #include <memalign.h> 20 #include <memalign.h>
21 #include <linux/list.h> 21 #include <linux/list.h>
22 #include <div64.h> 22 #include <div64.h>
23 #include "mmc_private.h" 23 #include "mmc_private.h"
24 24
25 static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage); 25 static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage);
26 static int mmc_power_cycle(struct mmc *mmc); 26 static int mmc_power_cycle(struct mmc *mmc);
27 static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps); 27 static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps);
28 28
29 #if CONFIG_IS_ENABLED(MMC_TINY) 29 #if CONFIG_IS_ENABLED(MMC_TINY)
30 static struct mmc mmc_static; 30 static struct mmc mmc_static;
31 struct mmc *find_mmc_device(int dev_num) 31 struct mmc *find_mmc_device(int dev_num)
32 { 32 {
33 return &mmc_static; 33 return &mmc_static;
34 } 34 }
35 35
36 void mmc_do_preinit(void) 36 void mmc_do_preinit(void)
37 { 37 {
38 struct mmc *m = &mmc_static; 38 struct mmc *m = &mmc_static;
39 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT 39 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
40 mmc_set_preinit(m, 1); 40 mmc_set_preinit(m, 1);
41 #endif 41 #endif
42 if (m->preinit) 42 if (m->preinit)
43 mmc_start_init(m); 43 mmc_start_init(m);
44 } 44 }
45 45
46 struct blk_desc *mmc_get_blk_desc(struct mmc *mmc) 46 struct blk_desc *mmc_get_blk_desc(struct mmc *mmc)
47 { 47 {
48 return &mmc->block_dev; 48 return &mmc->block_dev;
49 } 49 }
50 #endif 50 #endif
51 51
52 #if !CONFIG_IS_ENABLED(DM_MMC) 52 #if !CONFIG_IS_ENABLED(DM_MMC)
53 53
54 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) 54 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
55 static int mmc_wait_dat0(struct mmc *mmc, int state, int timeout) 55 static int mmc_wait_dat0(struct mmc *mmc, int state, int timeout)
56 { 56 {
57 return -ENOSYS; 57 return -ENOSYS;
58 } 58 }
59 #endif 59 #endif
60 60
61 __weak int board_mmc_getwp(struct mmc *mmc) 61 __weak int board_mmc_getwp(struct mmc *mmc)
62 { 62 {
63 return -1; 63 return -1;
64 } 64 }
65 65
66 int mmc_getwp(struct mmc *mmc) 66 int mmc_getwp(struct mmc *mmc)
67 { 67 {
68 int wp; 68 int wp;
69 69
70 wp = board_mmc_getwp(mmc); 70 wp = board_mmc_getwp(mmc);
71 71
72 if (wp < 0) { 72 if (wp < 0) {
73 if (mmc->cfg->ops->getwp) 73 if (mmc->cfg->ops->getwp)
74 wp = mmc->cfg->ops->getwp(mmc); 74 wp = mmc->cfg->ops->getwp(mmc);
75 else 75 else
76 wp = 0; 76 wp = 0;
77 } 77 }
78 78
79 return wp; 79 return wp;
80 } 80 }
81 81
82 __weak int board_mmc_getcd(struct mmc *mmc) 82 __weak int board_mmc_getcd(struct mmc *mmc)
83 { 83 {
84 return -1; 84 return -1;
85 } 85 }
86 #endif 86 #endif
87 87
88 #ifdef CONFIG_MMC_TRACE 88 #ifdef CONFIG_MMC_TRACE
89 void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd) 89 void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd)
90 { 90 {
91 printf("CMD_SEND:%d\n", cmd->cmdidx); 91 printf("CMD_SEND:%d\n", cmd->cmdidx);
92 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg); 92 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
93 } 93 }
94 94
95 void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret) 95 void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret)
96 { 96 {
97 int i; 97 int i;
98 u8 *ptr; 98 u8 *ptr;
99 99
100 if (ret) { 100 if (ret) {
101 printf("\t\tRET\t\t\t %d\n", ret); 101 printf("\t\tRET\t\t\t %d\n", ret);
102 } else { 102 } else {
103 switch (cmd->resp_type) { 103 switch (cmd->resp_type) {
104 case MMC_RSP_NONE: 104 case MMC_RSP_NONE:
105 printf("\t\tMMC_RSP_NONE\n"); 105 printf("\t\tMMC_RSP_NONE\n");
106 break; 106 break;
107 case MMC_RSP_R1: 107 case MMC_RSP_R1:
108 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n", 108 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
109 cmd->response[0]); 109 cmd->response[0]);
110 break; 110 break;
111 case MMC_RSP_R1b: 111 case MMC_RSP_R1b:
112 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n", 112 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
113 cmd->response[0]); 113 cmd->response[0]);
114 break; 114 break;
115 case MMC_RSP_R2: 115 case MMC_RSP_R2:
116 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n", 116 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
117 cmd->response[0]); 117 cmd->response[0]);
118 printf("\t\t \t\t 0x%08X \n", 118 printf("\t\t \t\t 0x%08X \n",
119 cmd->response[1]); 119 cmd->response[1]);
120 printf("\t\t \t\t 0x%08X \n", 120 printf("\t\t \t\t 0x%08X \n",
121 cmd->response[2]); 121 cmd->response[2]);
122 printf("\t\t \t\t 0x%08X \n", 122 printf("\t\t \t\t 0x%08X \n",
123 cmd->response[3]); 123 cmd->response[3]);
124 printf("\n"); 124 printf("\n");
125 printf("\t\t\t\t\tDUMPING DATA\n"); 125 printf("\t\t\t\t\tDUMPING DATA\n");
126 for (i = 0; i < 4; i++) { 126 for (i = 0; i < 4; i++) {
127 int j; 127 int j;
128 printf("\t\t\t\t\t%03d - ", i*4); 128 printf("\t\t\t\t\t%03d - ", i*4);
129 ptr = (u8 *)&cmd->response[i]; 129 ptr = (u8 *)&cmd->response[i];
130 ptr += 3; 130 ptr += 3;
131 for (j = 0; j < 4; j++) 131 for (j = 0; j < 4; j++)
132 printf("%02X ", *ptr--); 132 printf("%02X ", *ptr--);
133 printf("\n"); 133 printf("\n");
134 } 134 }
135 break; 135 break;
136 case MMC_RSP_R3: 136 case MMC_RSP_R3:
137 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n", 137 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
138 cmd->response[0]); 138 cmd->response[0]);
139 break; 139 break;
140 default: 140 default:
141 printf("\t\tERROR MMC rsp not supported\n"); 141 printf("\t\tERROR MMC rsp not supported\n");
142 break; 142 break;
143 } 143 }
144 } 144 }
145 } 145 }
146 146
147 void mmc_trace_state(struct mmc *mmc, struct mmc_cmd *cmd) 147 void mmc_trace_state(struct mmc *mmc, struct mmc_cmd *cmd)
148 { 148 {
149 int status; 149 int status;
150 150
151 status = (cmd->response[0] & MMC_STATUS_CURR_STATE) >> 9; 151 status = (cmd->response[0] & MMC_STATUS_CURR_STATE) >> 9;
152 printf("CURR STATE:%d\n", status); 152 printf("CURR STATE:%d\n", status);
153 } 153 }
154 #endif 154 #endif
155 155
156 #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG) 156 #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
157 const char *mmc_mode_name(enum bus_mode mode) 157 const char *mmc_mode_name(enum bus_mode mode)
158 { 158 {
159 static const char *const names[] = { 159 static const char *const names[] = {
160 [MMC_LEGACY] = "MMC legacy", 160 [MMC_LEGACY] = "MMC legacy",
161 [SD_LEGACY] = "SD Legacy", 161 [SD_LEGACY] = "SD Legacy",
162 [MMC_HS] = "MMC High Speed (26MHz)", 162 [MMC_HS] = "MMC High Speed (26MHz)",
163 [SD_HS] = "SD High Speed (50MHz)", 163 [SD_HS] = "SD High Speed (50MHz)",
164 [UHS_SDR12] = "UHS SDR12 (25MHz)", 164 [UHS_SDR12] = "UHS SDR12 (25MHz)",
165 [UHS_SDR25] = "UHS SDR25 (50MHz)", 165 [UHS_SDR25] = "UHS SDR25 (50MHz)",
166 [UHS_SDR50] = "UHS SDR50 (100MHz)", 166 [UHS_SDR50] = "UHS SDR50 (100MHz)",
167 [UHS_SDR104] = "UHS SDR104 (208MHz)", 167 [UHS_SDR104] = "UHS SDR104 (208MHz)",
168 [UHS_DDR50] = "UHS DDR50 (50MHz)", 168 [UHS_DDR50] = "UHS DDR50 (50MHz)",
169 [MMC_HS_52] = "MMC High Speed (52MHz)", 169 [MMC_HS_52] = "MMC High Speed (52MHz)",
170 [MMC_DDR_52] = "MMC DDR52 (52MHz)", 170 [MMC_DDR_52] = "MMC DDR52 (52MHz)",
171 [MMC_HS_200] = "HS200 (200MHz)", 171 [MMC_HS_200] = "HS200 (200MHz)",
172 }; 172 };
173 173
174 if (mode >= MMC_MODES_END) 174 if (mode >= MMC_MODES_END)
175 return "Unknown mode"; 175 return "Unknown mode";
176 else 176 else
177 return names[mode]; 177 return names[mode];
178 } 178 }
179 #endif 179 #endif
180 180
181 static uint mmc_mode2freq(struct mmc *mmc, enum bus_mode mode) 181 static uint mmc_mode2freq(struct mmc *mmc, enum bus_mode mode)
182 { 182 {
183 static const int freqs[] = { 183 static const int freqs[] = {
184 [SD_LEGACY] = 25000000, 184 [SD_LEGACY] = 25000000,
185 [MMC_HS] = 26000000, 185 [MMC_HS] = 26000000,
186 [SD_HS] = 50000000, 186 [SD_HS] = 50000000,
187 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) 187 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
188 [UHS_SDR12] = 25000000, 188 [UHS_SDR12] = 25000000,
189 [UHS_SDR25] = 50000000, 189 [UHS_SDR25] = 50000000,
190 [UHS_SDR50] = 100000000, 190 [UHS_SDR50] = 100000000,
191 [UHS_DDR50] = 50000000, 191 [UHS_DDR50] = 50000000,
192 #ifdef MMC_SUPPORTS_TUNING 192 #ifdef MMC_SUPPORTS_TUNING
193 [UHS_SDR104] = 208000000, 193 [UHS_SDR104] = 208000000,
194 #endif 194 #endif
195 #endif 195 #endif
196 [MMC_HS_52] = 52000000, 196 [MMC_HS_52] = 52000000,
197 [MMC_DDR_52] = 52000000, 197 [MMC_DDR_52] = 52000000,
198 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) 198 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
199 [MMC_HS_200] = 200000000, 199 [MMC_HS_200] = 200000000,
200 #endif 200 #endif
201 }; 201 };
202 202
203 if (mode == MMC_LEGACY) 203 if (mode == MMC_LEGACY)
204 return mmc->legacy_speed; 204 return mmc->legacy_speed;
205 else if (mode >= MMC_MODES_END) 205 else if (mode >= MMC_MODES_END)
206 return 0; 206 return 0;
207 else 207 else
208 return freqs[mode]; 208 return freqs[mode];
209 } 209 }
210 210
211 static int mmc_select_mode(struct mmc *mmc, enum bus_mode mode) 211 static int mmc_select_mode(struct mmc *mmc, enum bus_mode mode)
212 { 212 {
213 mmc->selected_mode = mode; 213 mmc->selected_mode = mode;
214 mmc->tran_speed = mmc_mode2freq(mmc, mode); 214 mmc->tran_speed = mmc_mode2freq(mmc, mode);
215 mmc->ddr_mode = mmc_is_mode_ddr(mode); 215 mmc->ddr_mode = mmc_is_mode_ddr(mode);
216 debug("selecting mode %s (freq : %d MHz)\n", mmc_mode_name(mode), 216 debug("selecting mode %s (freq : %d MHz)\n", mmc_mode_name(mode),
217 mmc->tran_speed / 1000000); 217 mmc->tran_speed / 1000000);
218 return 0; 218 return 0;
219 } 219 }
220 220
221 #if !CONFIG_IS_ENABLED(DM_MMC) 221 #if !CONFIG_IS_ENABLED(DM_MMC)
222 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) 222 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
223 { 223 {
224 int ret; 224 int ret;
225 225
226 mmmc_trace_before_send(mmc, cmd); 226 mmmc_trace_before_send(mmc, cmd);
227 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data); 227 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
228 mmmc_trace_after_send(mmc, cmd, ret); 228 mmmc_trace_after_send(mmc, cmd, ret);
229 229
230 return ret; 230 return ret;
231 } 231 }
232 #endif 232 #endif
233 233
234 int mmc_send_status(struct mmc *mmc, int timeout) 234 int mmc_send_status(struct mmc *mmc, int timeout)
235 { 235 {
236 struct mmc_cmd cmd; 236 struct mmc_cmd cmd;
237 int err, retries = 5; 237 int err, retries = 5;
238 238
239 cmd.cmdidx = MMC_CMD_SEND_STATUS; 239 cmd.cmdidx = MMC_CMD_SEND_STATUS;
240 cmd.resp_type = MMC_RSP_R1; 240 cmd.resp_type = MMC_RSP_R1;
241 if (!mmc_host_is_spi(mmc)) 241 if (!mmc_host_is_spi(mmc))
242 cmd.cmdarg = mmc->rca << 16; 242 cmd.cmdarg = mmc->rca << 16;
243 243
244 while (1) { 244 while (1) {
245 err = mmc_send_cmd(mmc, &cmd, NULL); 245 err = mmc_send_cmd(mmc, &cmd, NULL);
246 if (!err) { 246 if (!err) {
247 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) && 247 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
248 (cmd.response[0] & MMC_STATUS_CURR_STATE) != 248 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
249 MMC_STATE_PRG) 249 MMC_STATE_PRG)
250 break; 250 break;
251 251
252 if (cmd.response[0] & MMC_STATUS_MASK) { 252 if (cmd.response[0] & MMC_STATUS_MASK) {
253 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 253 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
254 pr_err("Status Error: 0x%08X\n", 254 pr_err("Status Error: 0x%08X\n",
255 cmd.response[0]); 255 cmd.response[0]);
256 #endif 256 #endif
257 return -ECOMM; 257 return -ECOMM;
258 } 258 }
259 } else if (--retries < 0) 259 } else if (--retries < 0)
260 return err; 260 return err;
261 261
262 if (timeout-- <= 0) 262 if (timeout-- <= 0)
263 break; 263 break;
264 264
265 udelay(1000); 265 udelay(1000);
266 } 266 }
267 267
268 mmc_trace_state(mmc, &cmd); 268 mmc_trace_state(mmc, &cmd);
269 if (timeout <= 0) { 269 if (timeout <= 0) {
270 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 270 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
271 pr_err("Timeout waiting card ready\n"); 271 pr_err("Timeout waiting card ready\n");
272 #endif 272 #endif
273 return -ETIMEDOUT; 273 return -ETIMEDOUT;
274 } 274 }
275 275
276 return 0; 276 return 0;
277 } 277 }
278 278
279 int mmc_set_blocklen(struct mmc *mmc, int len) 279 int mmc_set_blocklen(struct mmc *mmc, int len)
280 { 280 {
281 struct mmc_cmd cmd; 281 struct mmc_cmd cmd;
282 int err; 282 int err;
283 283
284 if (mmc->ddr_mode) 284 if (mmc->ddr_mode)
285 return 0; 285 return 0;
286 286
287 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN; 287 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
288 cmd.resp_type = MMC_RSP_R1; 288 cmd.resp_type = MMC_RSP_R1;
289 cmd.cmdarg = len; 289 cmd.cmdarg = len;
290 290
291 err = mmc_send_cmd(mmc, &cmd, NULL); 291 err = mmc_send_cmd(mmc, &cmd, NULL);
292 292
293 #ifdef CONFIG_MMC_QUIRKS 293 #ifdef CONFIG_MMC_QUIRKS
294 if (err && (mmc->quirks & MMC_QUIRK_RETRY_SET_BLOCKLEN)) { 294 if (err && (mmc->quirks & MMC_QUIRK_RETRY_SET_BLOCKLEN)) {
295 int retries = 4; 295 int retries = 4;
296 /* 296 /*
297 * It has been seen that SET_BLOCKLEN may fail on the first 297 * It has been seen that SET_BLOCKLEN may fail on the first
298 * attempt, let's try a few more time 298 * attempt, let's try a few more time
299 */ 299 */
300 do { 300 do {
301 err = mmc_send_cmd(mmc, &cmd, NULL); 301 err = mmc_send_cmd(mmc, &cmd, NULL);
302 if (!err) 302 if (!err)
303 break; 303 break;
304 } while (retries--); 304 } while (retries--);
305 } 305 }
306 #endif 306 #endif
307 307
308 return err; 308 return err;
309 } 309 }
310 310
311 #ifdef MMC_SUPPORTS_TUNING 311 #ifdef MMC_SUPPORTS_TUNING
312 static const u8 tuning_blk_pattern_4bit[] = { 312 static const u8 tuning_blk_pattern_4bit[] = {
313 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc, 313 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
314 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef, 314 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
315 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb, 315 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
316 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef, 316 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
317 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c, 317 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
318 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee, 318 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
319 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff, 319 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
320 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde, 320 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
321 }; 321 };
322 322
323 static const u8 tuning_blk_pattern_8bit[] = { 323 static const u8 tuning_blk_pattern_8bit[] = {
324 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00, 324 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
325 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc, 325 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
326 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff, 326 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
327 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff, 327 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
328 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd, 328 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
329 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb, 329 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
330 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff, 330 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
331 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff, 331 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
332 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 332 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
333 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 333 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
334 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 334 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
335 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 335 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
336 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 336 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
337 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 337 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
338 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 338 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
339 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 339 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
340 }; 340 };
341 341
342 int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error) 342 int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error)
343 { 343 {
344 struct mmc_cmd cmd; 344 struct mmc_cmd cmd;
345 struct mmc_data data; 345 struct mmc_data data;
346 const u8 *tuning_block_pattern; 346 const u8 *tuning_block_pattern;
347 int size, err; 347 int size, err;
348 348
349 if (mmc->bus_width == 8) { 349 if (mmc->bus_width == 8) {
350 tuning_block_pattern = tuning_blk_pattern_8bit; 350 tuning_block_pattern = tuning_blk_pattern_8bit;
351 size = sizeof(tuning_blk_pattern_8bit); 351 size = sizeof(tuning_blk_pattern_8bit);
352 } else if (mmc->bus_width == 4) { 352 } else if (mmc->bus_width == 4) {
353 tuning_block_pattern = tuning_blk_pattern_4bit; 353 tuning_block_pattern = tuning_blk_pattern_4bit;
354 size = sizeof(tuning_blk_pattern_4bit); 354 size = sizeof(tuning_blk_pattern_4bit);
355 } else { 355 } else {
356 return -EINVAL; 356 return -EINVAL;
357 } 357 }
358 358
359 ALLOC_CACHE_ALIGN_BUFFER(u8, data_buf, size); 359 ALLOC_CACHE_ALIGN_BUFFER(u8, data_buf, size);
360 360
361 cmd.cmdidx = opcode; 361 cmd.cmdidx = opcode;
362 cmd.cmdarg = 0; 362 cmd.cmdarg = 0;
363 cmd.resp_type = MMC_RSP_R1; 363 cmd.resp_type = MMC_RSP_R1;
364 364
365 data.dest = (void *)data_buf; 365 data.dest = (void *)data_buf;
366 data.blocks = 1; 366 data.blocks = 1;
367 data.blocksize = size; 367 data.blocksize = size;
368 data.flags = MMC_DATA_READ; 368 data.flags = MMC_DATA_READ;
369 369
370 err = mmc_send_cmd(mmc, &cmd, &data); 370 err = mmc_send_cmd(mmc, &cmd, &data);
371 if (err) 371 if (err)
372 return err; 372 return err;
373 373
374 if (memcmp(data_buf, tuning_block_pattern, size)) 374 if (memcmp(data_buf, tuning_block_pattern, size))
375 return -EIO; 375 return -EIO;
376 376
377 return 0; 377 return 0;
378 } 378 }
379 #endif 379 #endif
380 380
381 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start, 381 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
382 lbaint_t blkcnt) 382 lbaint_t blkcnt)
383 { 383 {
384 struct mmc_cmd cmd; 384 struct mmc_cmd cmd;
385 struct mmc_data data; 385 struct mmc_data data;
386 386
387 if (blkcnt > 1) 387 if (blkcnt > 1)
388 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK; 388 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
389 else 389 else
390 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK; 390 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
391 391
392 if (mmc->high_capacity) 392 if (mmc->high_capacity)
393 cmd.cmdarg = start; 393 cmd.cmdarg = start;
394 else 394 else
395 cmd.cmdarg = start * mmc->read_bl_len; 395 cmd.cmdarg = start * mmc->read_bl_len;
396 396
397 cmd.resp_type = MMC_RSP_R1; 397 cmd.resp_type = MMC_RSP_R1;
398 398
399 data.dest = dst; 399 data.dest = dst;
400 data.blocks = blkcnt; 400 data.blocks = blkcnt;
401 data.blocksize = mmc->read_bl_len; 401 data.blocksize = mmc->read_bl_len;
402 data.flags = MMC_DATA_READ; 402 data.flags = MMC_DATA_READ;
403 403
404 if (mmc_send_cmd(mmc, &cmd, &data)) 404 if (mmc_send_cmd(mmc, &cmd, &data))
405 return 0; 405 return 0;
406 406
407 if (blkcnt > 1) { 407 if (blkcnt > 1) {
408 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; 408 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
409 cmd.cmdarg = 0; 409 cmd.cmdarg = 0;
410 cmd.resp_type = MMC_RSP_R1b; 410 cmd.resp_type = MMC_RSP_R1b;
411 if (mmc_send_cmd(mmc, &cmd, NULL)) { 411 if (mmc_send_cmd(mmc, &cmd, NULL)) {
412 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 412 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
413 pr_err("mmc fail to send stop cmd\n"); 413 pr_err("mmc fail to send stop cmd\n");
414 #endif 414 #endif
415 return 0; 415 return 0;
416 } 416 }
417 } 417 }
418 418
419 return blkcnt; 419 return blkcnt;
420 } 420 }
421 421
422 #if CONFIG_IS_ENABLED(BLK) 422 #if CONFIG_IS_ENABLED(BLK)
423 ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst) 423 ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
424 #else 424 #else
425 ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt, 425 ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
426 void *dst) 426 void *dst)
427 #endif 427 #endif
428 { 428 {
429 #if CONFIG_IS_ENABLED(BLK) 429 #if CONFIG_IS_ENABLED(BLK)
430 struct blk_desc *block_dev = dev_get_uclass_platdata(dev); 430 struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
431 #endif 431 #endif
432 int dev_num = block_dev->devnum; 432 int dev_num = block_dev->devnum;
433 int err; 433 int err;
434 lbaint_t cur, blocks_todo = blkcnt; 434 lbaint_t cur, blocks_todo = blkcnt;
435 435
436 if (blkcnt == 0) 436 if (blkcnt == 0)
437 return 0; 437 return 0;
438 438
439 struct mmc *mmc = find_mmc_device(dev_num); 439 struct mmc *mmc = find_mmc_device(dev_num);
440 if (!mmc) 440 if (!mmc)
441 return 0; 441 return 0;
442 442
443 if (CONFIG_IS_ENABLED(MMC_TINY)) 443 if (CONFIG_IS_ENABLED(MMC_TINY))
444 err = mmc_switch_part(mmc, block_dev->hwpart); 444 err = mmc_switch_part(mmc, block_dev->hwpart);
445 else 445 else
446 err = blk_dselect_hwpart(block_dev, block_dev->hwpart); 446 err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
447 447
448 if (err < 0) 448 if (err < 0)
449 return 0; 449 return 0;
450 450
451 if ((start + blkcnt) > block_dev->lba) { 451 if ((start + blkcnt) > block_dev->lba) {
452 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 452 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
453 pr_err("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n", 453 pr_err("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
454 start + blkcnt, block_dev->lba); 454 start + blkcnt, block_dev->lba);
455 #endif 455 #endif
456 return 0; 456 return 0;
457 } 457 }
458 458
459 if (mmc_set_blocklen(mmc, mmc->read_bl_len)) { 459 if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
460 debug("%s: Failed to set blocklen\n", __func__); 460 debug("%s: Failed to set blocklen\n", __func__);
461 return 0; 461 return 0;
462 } 462 }
463 463
464 do { 464 do {
465 cur = (blocks_todo > mmc->cfg->b_max) ? 465 cur = (blocks_todo > mmc->cfg->b_max) ?
466 mmc->cfg->b_max : blocks_todo; 466 mmc->cfg->b_max : blocks_todo;
467 if (mmc_read_blocks(mmc, dst, start, cur) != cur) { 467 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
468 debug("%s: Failed to read blocks\n", __func__); 468 debug("%s: Failed to read blocks\n", __func__);
469 return 0; 469 return 0;
470 } 470 }
471 blocks_todo -= cur; 471 blocks_todo -= cur;
472 start += cur; 472 start += cur;
473 dst += cur * mmc->read_bl_len; 473 dst += cur * mmc->read_bl_len;
474 } while (blocks_todo > 0); 474 } while (blocks_todo > 0);
475 475
476 return blkcnt; 476 return blkcnt;
477 } 477 }
478 478
479 static int mmc_go_idle(struct mmc *mmc) 479 static int mmc_go_idle(struct mmc *mmc)
480 { 480 {
481 struct mmc_cmd cmd; 481 struct mmc_cmd cmd;
482 int err; 482 int err;
483 483
484 udelay(1000); 484 udelay(1000);
485 485
486 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE; 486 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
487 cmd.cmdarg = 0; 487 cmd.cmdarg = 0;
488 cmd.resp_type = MMC_RSP_NONE; 488 cmd.resp_type = MMC_RSP_NONE;
489 489
490 err = mmc_send_cmd(mmc, &cmd, NULL); 490 err = mmc_send_cmd(mmc, &cmd, NULL);
491 491
492 if (err) 492 if (err)
493 return err; 493 return err;
494 494
495 udelay(2000); 495 udelay(2000);
496 496
497 return 0; 497 return 0;
498 } 498 }
499 499
500 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) 500 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
501 static int mmc_switch_voltage(struct mmc *mmc, int signal_voltage) 501 static int mmc_switch_voltage(struct mmc *mmc, int signal_voltage)
502 { 502 {
503 struct mmc_cmd cmd; 503 struct mmc_cmd cmd;
504 int err = 0; 504 int err = 0;
505 505
506 /* 506 /*
507 * Send CMD11 only if the request is to switch the card to 507 * Send CMD11 only if the request is to switch the card to
508 * 1.8V signalling. 508 * 1.8V signalling.
509 */ 509 */
510 if (signal_voltage == MMC_SIGNAL_VOLTAGE_330) 510 if (signal_voltage == MMC_SIGNAL_VOLTAGE_330)
511 return mmc_set_signal_voltage(mmc, signal_voltage); 511 return mmc_set_signal_voltage(mmc, signal_voltage);
512 512
513 cmd.cmdidx = SD_CMD_SWITCH_UHS18V; 513 cmd.cmdidx = SD_CMD_SWITCH_UHS18V;
514 cmd.cmdarg = 0; 514 cmd.cmdarg = 0;
515 cmd.resp_type = MMC_RSP_R1; 515 cmd.resp_type = MMC_RSP_R1;
516 516
517 err = mmc_send_cmd(mmc, &cmd, NULL); 517 err = mmc_send_cmd(mmc, &cmd, NULL);
518 if (err) 518 if (err)
519 return err; 519 return err;
520 520
521 if (!mmc_host_is_spi(mmc) && (cmd.response[0] & MMC_STATUS_ERROR)) 521 if (!mmc_host_is_spi(mmc) && (cmd.response[0] & MMC_STATUS_ERROR))
522 return -EIO; 522 return -EIO;
523 523
524 /* 524 /*
525 * The card should drive cmd and dat[0:3] low immediately 525 * The card should drive cmd and dat[0:3] low immediately
526 * after the response of cmd11, but wait 100 us to be sure 526 * after the response of cmd11, but wait 100 us to be sure
527 */ 527 */
528 err = mmc_wait_dat0(mmc, 0, 100); 528 err = mmc_wait_dat0(mmc, 0, 100);
529 if (err == -ENOSYS) 529 if (err == -ENOSYS)
530 udelay(100); 530 udelay(100);
531 else if (err) 531 else if (err)
532 return -ETIMEDOUT; 532 return -ETIMEDOUT;
533 533
534 /* 534 /*
535 * During a signal voltage level switch, the clock must be gated 535 * During a signal voltage level switch, the clock must be gated
536 * for 5 ms according to the SD spec 536 * for 5 ms according to the SD spec
537 */ 537 */
538 mmc_set_clock(mmc, mmc->clock, true); 538 mmc_set_clock(mmc, mmc->clock, true);
539 539
540 err = mmc_set_signal_voltage(mmc, signal_voltage); 540 err = mmc_set_signal_voltage(mmc, signal_voltage);
541 if (err) 541 if (err)
542 return err; 542 return err;
543 543
544 /* Keep clock gated for at least 10 ms, though spec only says 5 ms */ 544 /* Keep clock gated for at least 10 ms, though spec only says 5 ms */
545 mdelay(10); 545 mdelay(10);
546 mmc_set_clock(mmc, mmc->clock, false); 546 mmc_set_clock(mmc, mmc->clock, false);
547 547
548 /* 548 /*
549 * Failure to switch is indicated by the card holding 549 * Failure to switch is indicated by the card holding
550 * dat[0:3] low. Wait for at least 1 ms according to spec 550 * dat[0:3] low. Wait for at least 1 ms according to spec
551 */ 551 */
552 err = mmc_wait_dat0(mmc, 1, 1000); 552 err = mmc_wait_dat0(mmc, 1, 1000);
553 if (err == -ENOSYS) 553 if (err == -ENOSYS)
554 udelay(1000); 554 udelay(1000);
555 else if (err) 555 else if (err)
556 return -ETIMEDOUT; 556 return -ETIMEDOUT;
557 557
558 return 0; 558 return 0;
559 } 559 }
560 #endif 560 #endif
561 561
562 static int sd_send_op_cond(struct mmc *mmc, bool uhs_en) 562 static int sd_send_op_cond(struct mmc *mmc, bool uhs_en)
563 { 563 {
564 int timeout = 1000; 564 int timeout = 1000;
565 int err; 565 int err;
566 struct mmc_cmd cmd; 566 struct mmc_cmd cmd;
567 567
568 while (1) { 568 while (1) {
569 cmd.cmdidx = MMC_CMD_APP_CMD; 569 cmd.cmdidx = MMC_CMD_APP_CMD;
570 cmd.resp_type = MMC_RSP_R1; 570 cmd.resp_type = MMC_RSP_R1;
571 cmd.cmdarg = 0; 571 cmd.cmdarg = 0;
572 572
573 err = mmc_send_cmd(mmc, &cmd, NULL); 573 err = mmc_send_cmd(mmc, &cmd, NULL);
574 574
575 if (err) 575 if (err)
576 return err; 576 return err;
577 577
578 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND; 578 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
579 cmd.resp_type = MMC_RSP_R3; 579 cmd.resp_type = MMC_RSP_R3;
580 580
581 /* 581 /*
582 * Most cards do not answer if some reserved bits 582 * Most cards do not answer if some reserved bits
583 * in the ocr are set. However, Some controller 583 * in the ocr are set. However, Some controller
584 * can set bit 7 (reserved for low voltages), but 584 * can set bit 7 (reserved for low voltages), but
585 * how to manage low voltages SD card is not yet 585 * how to manage low voltages SD card is not yet
586 * specified. 586 * specified.
587 */ 587 */
588 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 : 588 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
589 (mmc->cfg->voltages & 0xff8000); 589 (mmc->cfg->voltages & 0xff8000);
590 590
591 if (mmc->version == SD_VERSION_2) 591 if (mmc->version == SD_VERSION_2)
592 cmd.cmdarg |= OCR_HCS; 592 cmd.cmdarg |= OCR_HCS;
593 593
594 if (uhs_en) 594 if (uhs_en)
595 cmd.cmdarg |= OCR_S18R; 595 cmd.cmdarg |= OCR_S18R;
596 596
597 err = mmc_send_cmd(mmc, &cmd, NULL); 597 err = mmc_send_cmd(mmc, &cmd, NULL);
598 598
599 if (err) 599 if (err)
600 return err; 600 return err;
601 601
602 if (cmd.response[0] & OCR_BUSY) 602 if (cmd.response[0] & OCR_BUSY)
603 break; 603 break;
604 604
605 if (timeout-- <= 0) 605 if (timeout-- <= 0)
606 return -EOPNOTSUPP; 606 return -EOPNOTSUPP;
607 607
608 udelay(1000); 608 udelay(1000);
609 } 609 }
610 610
611 if (mmc->version != SD_VERSION_2) 611 if (mmc->version != SD_VERSION_2)
612 mmc->version = SD_VERSION_1_0; 612 mmc->version = SD_VERSION_1_0;
613 613
614 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ 614 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
615 cmd.cmdidx = MMC_CMD_SPI_READ_OCR; 615 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
616 cmd.resp_type = MMC_RSP_R3; 616 cmd.resp_type = MMC_RSP_R3;
617 cmd.cmdarg = 0; 617 cmd.cmdarg = 0;
618 618
619 err = mmc_send_cmd(mmc, &cmd, NULL); 619 err = mmc_send_cmd(mmc, &cmd, NULL);
620 620
621 if (err) 621 if (err)
622 return err; 622 return err;
623 } 623 }
624 624
625 mmc->ocr = cmd.response[0]; 625 mmc->ocr = cmd.response[0];
626 626
627 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) 627 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
628 if (uhs_en && !(mmc_host_is_spi(mmc)) && (cmd.response[0] & 0x41000000) 628 if (uhs_en && !(mmc_host_is_spi(mmc)) && (cmd.response[0] & 0x41000000)
629 == 0x41000000) { 629 == 0x41000000) {
630 err = mmc_switch_voltage(mmc, MMC_SIGNAL_VOLTAGE_180); 630 err = mmc_switch_voltage(mmc, MMC_SIGNAL_VOLTAGE_180);
631 if (err) 631 if (err)
632 return err; 632 return err;
633 } 633 }
634 #endif 634 #endif
635 635
636 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); 636 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
637 mmc->rca = 0; 637 mmc->rca = 0;
638 638
639 return 0; 639 return 0;
640 } 640 }
641 641
642 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg) 642 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
643 { 643 {
644 struct mmc_cmd cmd; 644 struct mmc_cmd cmd;
645 int err; 645 int err;
646 646
647 cmd.cmdidx = MMC_CMD_SEND_OP_COND; 647 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
648 cmd.resp_type = MMC_RSP_R3; 648 cmd.resp_type = MMC_RSP_R3;
649 cmd.cmdarg = 0; 649 cmd.cmdarg = 0;
650 if (use_arg && !mmc_host_is_spi(mmc)) 650 if (use_arg && !mmc_host_is_spi(mmc))
651 cmd.cmdarg = OCR_HCS | 651 cmd.cmdarg = OCR_HCS |
652 (mmc->cfg->voltages & 652 (mmc->cfg->voltages &
653 (mmc->ocr & OCR_VOLTAGE_MASK)) | 653 (mmc->ocr & OCR_VOLTAGE_MASK)) |
654 (mmc->ocr & OCR_ACCESS_MODE); 654 (mmc->ocr & OCR_ACCESS_MODE);
655 655
656 err = mmc_send_cmd(mmc, &cmd, NULL); 656 err = mmc_send_cmd(mmc, &cmd, NULL);
657 if (err) 657 if (err)
658 return err; 658 return err;
659 mmc->ocr = cmd.response[0]; 659 mmc->ocr = cmd.response[0];
660 return 0; 660 return 0;
661 } 661 }
662 662
663 static int mmc_send_op_cond(struct mmc *mmc) 663 static int mmc_send_op_cond(struct mmc *mmc)
664 { 664 {
665 int err, i; 665 int err, i;
666 666
667 /* Some cards seem to need this */ 667 /* Some cards seem to need this */
668 mmc_go_idle(mmc); 668 mmc_go_idle(mmc);
669 669
670 /* Asking to the card its capabilities */ 670 /* Asking to the card its capabilities */
671 for (i = 0; i < 2; i++) { 671 for (i = 0; i < 2; i++) {
672 err = mmc_send_op_cond_iter(mmc, i != 0); 672 err = mmc_send_op_cond_iter(mmc, i != 0);
673 if (err) 673 if (err)
674 return err; 674 return err;
675 675
676 /* exit if not busy (flag seems to be inverted) */ 676 /* exit if not busy (flag seems to be inverted) */
677 if (mmc->ocr & OCR_BUSY) 677 if (mmc->ocr & OCR_BUSY)
678 break; 678 break;
679 } 679 }
680 mmc->op_cond_pending = 1; 680 mmc->op_cond_pending = 1;
681 return 0; 681 return 0;
682 } 682 }
683 683
684 static int mmc_complete_op_cond(struct mmc *mmc) 684 static int mmc_complete_op_cond(struct mmc *mmc)
685 { 685 {
686 struct mmc_cmd cmd; 686 struct mmc_cmd cmd;
687 int timeout = 1000; 687 int timeout = 1000;
688 uint start; 688 uint start;
689 int err; 689 int err;
690 690
691 mmc->op_cond_pending = 0; 691 mmc->op_cond_pending = 0;
692 if (!(mmc->ocr & OCR_BUSY)) { 692 if (!(mmc->ocr & OCR_BUSY)) {
693 /* Some cards seem to need this */ 693 /* Some cards seem to need this */
694 mmc_go_idle(mmc); 694 mmc_go_idle(mmc);
695 695
696 start = get_timer(0); 696 start = get_timer(0);
697 while (1) { 697 while (1) {
698 err = mmc_send_op_cond_iter(mmc, 1); 698 err = mmc_send_op_cond_iter(mmc, 1);
699 if (err) 699 if (err)
700 return err; 700 return err;
701 if (mmc->ocr & OCR_BUSY) 701 if (mmc->ocr & OCR_BUSY)
702 break; 702 break;
703 if (get_timer(start) > timeout) 703 if (get_timer(start) > timeout)
704 return -EOPNOTSUPP; 704 return -EOPNOTSUPP;
705 udelay(100); 705 udelay(100);
706 } 706 }
707 } 707 }
708 708
709 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ 709 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
710 cmd.cmdidx = MMC_CMD_SPI_READ_OCR; 710 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
711 cmd.resp_type = MMC_RSP_R3; 711 cmd.resp_type = MMC_RSP_R3;
712 cmd.cmdarg = 0; 712 cmd.cmdarg = 0;
713 713
714 err = mmc_send_cmd(mmc, &cmd, NULL); 714 err = mmc_send_cmd(mmc, &cmd, NULL);
715 715
716 if (err) 716 if (err)
717 return err; 717 return err;
718 718
719 mmc->ocr = cmd.response[0]; 719 mmc->ocr = cmd.response[0];
720 } 720 }
721 721
722 mmc->version = MMC_VERSION_UNKNOWN; 722 mmc->version = MMC_VERSION_UNKNOWN;
723 723
724 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); 724 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
725 mmc->rca = 1; 725 mmc->rca = 1;
726 726
727 return 0; 727 return 0;
728 } 728 }
729 729
730 730
731 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd) 731 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
732 { 732 {
733 struct mmc_cmd cmd; 733 struct mmc_cmd cmd;
734 struct mmc_data data; 734 struct mmc_data data;
735 int err; 735 int err;
736 736
737 /* Get the Card Status Register */ 737 /* Get the Card Status Register */
738 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; 738 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
739 cmd.resp_type = MMC_RSP_R1; 739 cmd.resp_type = MMC_RSP_R1;
740 cmd.cmdarg = 0; 740 cmd.cmdarg = 0;
741 741
742 data.dest = (char *)ext_csd; 742 data.dest = (char *)ext_csd;
743 data.blocks = 1; 743 data.blocks = 1;
744 data.blocksize = MMC_MAX_BLOCK_LEN; 744 data.blocksize = MMC_MAX_BLOCK_LEN;
745 data.flags = MMC_DATA_READ; 745 data.flags = MMC_DATA_READ;
746 746
747 err = mmc_send_cmd(mmc, &cmd, &data); 747 err = mmc_send_cmd(mmc, &cmd, &data);
748 748
749 return err; 749 return err;
750 } 750 }
751 751
752 int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) 752 int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
753 { 753 {
754 struct mmc_cmd cmd; 754 struct mmc_cmd cmd;
755 int timeout = 1000; 755 int timeout = 1000;
756 int retries = 3; 756 int retries = 3;
757 int ret; 757 int ret;
758 758
759 cmd.cmdidx = MMC_CMD_SWITCH; 759 cmd.cmdidx = MMC_CMD_SWITCH;
760 cmd.resp_type = MMC_RSP_R1b; 760 cmd.resp_type = MMC_RSP_R1b;
761 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | 761 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
762 (index << 16) | 762 (index << 16) |
763 (value << 8); 763 (value << 8);
764 764
765 while (retries > 0) { 765 while (retries > 0) {
766 ret = mmc_send_cmd(mmc, &cmd, NULL); 766 ret = mmc_send_cmd(mmc, &cmd, NULL);
767 767
768 /* Waiting for the ready status */ 768 /* Waiting for the ready status */
769 if (!ret) { 769 if (!ret) {
770 ret = mmc_send_status(mmc, timeout); 770 ret = mmc_send_status(mmc, timeout);
771 return ret; 771 return ret;
772 } 772 }
773 773
774 retries--; 774 retries--;
775 } 775 }
776 776
777 return ret; 777 return ret;
778 778
779 } 779 }
780 780
781 static int mmc_set_card_speed(struct mmc *mmc, enum bus_mode mode) 781 static int mmc_set_card_speed(struct mmc *mmc, enum bus_mode mode)
782 { 782 {
783 int err; 783 int err;
784 int speed_bits; 784 int speed_bits;
785 785
786 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN); 786 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
787 787
788 switch (mode) { 788 switch (mode) {
789 case MMC_HS: 789 case MMC_HS:
790 case MMC_HS_52: 790 case MMC_HS_52:
791 case MMC_DDR_52: 791 case MMC_DDR_52:
792 speed_bits = EXT_CSD_TIMING_HS; 792 speed_bits = EXT_CSD_TIMING_HS;
793 break; 793 break;
794 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) 794 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
795 case MMC_HS_200: 795 case MMC_HS_200:
796 speed_bits = EXT_CSD_TIMING_HS200; 796 speed_bits = EXT_CSD_TIMING_HS200;
797 break; 797 break;
798 #endif 798 #endif
799 case MMC_LEGACY: 799 case MMC_LEGACY:
800 speed_bits = EXT_CSD_TIMING_LEGACY; 800 speed_bits = EXT_CSD_TIMING_LEGACY;
801 break; 801 break;
802 default: 802 default:
803 return -EINVAL; 803 return -EINVAL;
804 } 804 }
805 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 805 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING,
806 speed_bits); 806 speed_bits);
807 if (err) 807 if (err)
808 return err; 808 return err;
809 809
810 if ((mode == MMC_HS) || (mode == MMC_HS_52)) { 810 if ((mode == MMC_HS) || (mode == MMC_HS_52)) {
811 /* Now check to see that it worked */ 811 /* Now check to see that it worked */
812 err = mmc_send_ext_csd(mmc, test_csd); 812 err = mmc_send_ext_csd(mmc, test_csd);
813 if (err) 813 if (err)
814 return err; 814 return err;
815 815
816 /* No high-speed support */ 816 /* No high-speed support */
817 if (!test_csd[EXT_CSD_HS_TIMING]) 817 if (!test_csd[EXT_CSD_HS_TIMING])
818 return -ENOTSUPP; 818 return -ENOTSUPP;
819 } 819 }
820 820
821 return 0; 821 return 0;
822 } 822 }
823 823
824 static int mmc_get_capabilities(struct mmc *mmc) 824 static int mmc_get_capabilities(struct mmc *mmc)
825 { 825 {
826 u8 *ext_csd = mmc->ext_csd; 826 u8 *ext_csd = mmc->ext_csd;
827 char cardtype; 827 char cardtype;
828 828
829 mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(MMC_LEGACY); 829 mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(MMC_LEGACY);
830 830
831 if (mmc_host_is_spi(mmc)) 831 if (mmc_host_is_spi(mmc))
832 return 0; 832 return 0;
833 833
834 /* Only version 4 supports high-speed */ 834 /* Only version 4 supports high-speed */
835 if (mmc->version < MMC_VERSION_4) 835 if (mmc->version < MMC_VERSION_4)
836 return 0; 836 return 0;
837 837
838 if (!ext_csd) { 838 if (!ext_csd) {
839 pr_err("No ext_csd found!\n"); /* this should enver happen */ 839 pr_err("No ext_csd found!\n"); /* this should enver happen */
840 return -ENOTSUPP; 840 return -ENOTSUPP;
841 } 841 }
842 842
843 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT; 843 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
844 844
845 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0x3f; 845 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0x3f;
846 mmc->cardtype = cardtype; 846 mmc->cardtype = cardtype;
847 847
848 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) 848 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
849 if (cardtype & (EXT_CSD_CARD_TYPE_HS200_1_2V | 849 if (cardtype & (EXT_CSD_CARD_TYPE_HS200_1_2V |
850 EXT_CSD_CARD_TYPE_HS200_1_8V)) { 850 EXT_CSD_CARD_TYPE_HS200_1_8V)) {
851 mmc->card_caps |= MMC_MODE_HS200; 851 mmc->card_caps |= MMC_MODE_HS200;
852 } 852 }
853 #endif 853 #endif
854 if (cardtype & EXT_CSD_CARD_TYPE_52) { 854 if (cardtype & EXT_CSD_CARD_TYPE_52) {
855 if (cardtype & EXT_CSD_CARD_TYPE_DDR_52) 855 if (cardtype & EXT_CSD_CARD_TYPE_DDR_52)
856 mmc->card_caps |= MMC_MODE_DDR_52MHz; 856 mmc->card_caps |= MMC_MODE_DDR_52MHz;
857 mmc->card_caps |= MMC_MODE_HS_52MHz; 857 mmc->card_caps |= MMC_MODE_HS_52MHz;
858 } 858 }
859 if (cardtype & EXT_CSD_CARD_TYPE_26) 859 if (cardtype & EXT_CSD_CARD_TYPE_26)
860 mmc->card_caps |= MMC_MODE_HS; 860 mmc->card_caps |= MMC_MODE_HS;
861 861
862 return 0; 862 return 0;
863 } 863 }
864 864
865 static int mmc_set_capacity(struct mmc *mmc, int part_num) 865 static int mmc_set_capacity(struct mmc *mmc, int part_num)
866 { 866 {
867 switch (part_num) { 867 switch (part_num) {
868 case 0: 868 case 0:
869 mmc->capacity = mmc->capacity_user; 869 mmc->capacity = mmc->capacity_user;
870 break; 870 break;
871 case 1: 871 case 1:
872 case 2: 872 case 2:
873 mmc->capacity = mmc->capacity_boot; 873 mmc->capacity = mmc->capacity_boot;
874 break; 874 break;
875 case 3: 875 case 3:
876 mmc->capacity = mmc->capacity_rpmb; 876 mmc->capacity = mmc->capacity_rpmb;
877 break; 877 break;
878 case 4: 878 case 4:
879 case 5: 879 case 5:
880 case 6: 880 case 6:
881 case 7: 881 case 7:
882 mmc->capacity = mmc->capacity_gp[part_num - 4]; 882 mmc->capacity = mmc->capacity_gp[part_num - 4];
883 break; 883 break;
884 default: 884 default:
885 return -1; 885 return -1;
886 } 886 }
887 887
888 mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len); 888 mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len);
889 889
890 return 0; 890 return 0;
891 } 891 }
892 892
893 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) 893 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
894 static int mmc_boot_part_access_chk(struct mmc *mmc, unsigned int part_num) 894 static int mmc_boot_part_access_chk(struct mmc *mmc, unsigned int part_num)
895 { 895 {
896 int forbidden = 0; 896 int forbidden = 0;
897 bool change = false; 897 bool change = false;
898 898
899 if (part_num & PART_ACCESS_MASK) 899 if (part_num & PART_ACCESS_MASK)
900 forbidden = MMC_CAP(MMC_HS_200); 900 forbidden = MMC_CAP(MMC_HS_200);
901 901
902 if (MMC_CAP(mmc->selected_mode) & forbidden) { 902 if (MMC_CAP(mmc->selected_mode) & forbidden) {
903 debug("selected mode (%s) is forbidden for part %d\n", 903 debug("selected mode (%s) is forbidden for part %d\n",
904 mmc_mode_name(mmc->selected_mode), part_num); 904 mmc_mode_name(mmc->selected_mode), part_num);
905 change = true; 905 change = true;
906 } else if (mmc->selected_mode != mmc->best_mode) { 906 } else if (mmc->selected_mode != mmc->best_mode) {
907 debug("selected mode is not optimal\n"); 907 debug("selected mode is not optimal\n");
908 change = true; 908 change = true;
909 } 909 }
910 910
911 if (change) 911 if (change)
912 return mmc_select_mode_and_width(mmc, 912 return mmc_select_mode_and_width(mmc,
913 mmc->card_caps & ~forbidden); 913 mmc->card_caps & ~forbidden);
914 914
915 return 0; 915 return 0;
916 } 916 }
917 #else 917 #else
918 static inline int mmc_boot_part_access_chk(struct mmc *mmc, 918 static inline int mmc_boot_part_access_chk(struct mmc *mmc,
919 unsigned int part_num) 919 unsigned int part_num)
920 { 920 {
921 return 0; 921 return 0;
922 } 922 }
923 #endif 923 #endif
924 924
925 int mmc_switch_part(struct mmc *mmc, unsigned int part_num) 925 int mmc_switch_part(struct mmc *mmc, unsigned int part_num)
926 { 926 {
927 int ret; 927 int ret;
928 928
929 ret = mmc_boot_part_access_chk(mmc, part_num); 929 ret = mmc_boot_part_access_chk(mmc, part_num);
930 if (ret) 930 if (ret)
931 return ret; 931 return ret;
932 932
933 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, 933 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
934 (mmc->part_config & ~PART_ACCESS_MASK) 934 (mmc->part_config & ~PART_ACCESS_MASK)
935 | (part_num & PART_ACCESS_MASK)); 935 | (part_num & PART_ACCESS_MASK));
936 936
937 /* 937 /*
938 * Set the capacity if the switch succeeded or was intended 938 * Set the capacity if the switch succeeded or was intended
939 * to return to representing the raw device. 939 * to return to representing the raw device.
940 */ 940 */
941 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) { 941 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
942 ret = mmc_set_capacity(mmc, part_num); 942 ret = mmc_set_capacity(mmc, part_num);
943 mmc_get_blk_desc(mmc)->hwpart = part_num; 943 mmc_get_blk_desc(mmc)->hwpart = part_num;
944 } 944 }
945 945
946 return ret; 946 return ret;
947 } 947 }
948 948
949 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING) 949 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
950 int mmc_hwpart_config(struct mmc *mmc, 950 int mmc_hwpart_config(struct mmc *mmc,
951 const struct mmc_hwpart_conf *conf, 951 const struct mmc_hwpart_conf *conf,
952 enum mmc_hwpart_conf_mode mode) 952 enum mmc_hwpart_conf_mode mode)
953 { 953 {
954 u8 part_attrs = 0; 954 u8 part_attrs = 0;
955 u32 enh_size_mult; 955 u32 enh_size_mult;
956 u32 enh_start_addr; 956 u32 enh_start_addr;
957 u32 gp_size_mult[4]; 957 u32 gp_size_mult[4];
958 u32 max_enh_size_mult; 958 u32 max_enh_size_mult;
959 u32 tot_enh_size_mult = 0; 959 u32 tot_enh_size_mult = 0;
960 u8 wr_rel_set; 960 u8 wr_rel_set;
961 int i, pidx, err; 961 int i, pidx, err;
962 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); 962 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
963 963
964 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE) 964 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
965 return -EINVAL; 965 return -EINVAL;
966 966
967 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) { 967 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
968 pr_err("eMMC >= 4.4 required for enhanced user data area\n"); 968 pr_err("eMMC >= 4.4 required for enhanced user data area\n");
969 return -EMEDIUMTYPE; 969 return -EMEDIUMTYPE;
970 } 970 }
971 971
972 if (!(mmc->part_support & PART_SUPPORT)) { 972 if (!(mmc->part_support & PART_SUPPORT)) {
973 pr_err("Card does not support partitioning\n"); 973 pr_err("Card does not support partitioning\n");
974 return -EMEDIUMTYPE; 974 return -EMEDIUMTYPE;
975 } 975 }
976 976
977 if (!mmc->hc_wp_grp_size) { 977 if (!mmc->hc_wp_grp_size) {
978 pr_err("Card does not define HC WP group size\n"); 978 pr_err("Card does not define HC WP group size\n");
979 return -EMEDIUMTYPE; 979 return -EMEDIUMTYPE;
980 } 980 }
981 981
982 /* check partition alignment and total enhanced size */ 982 /* check partition alignment and total enhanced size */
983 if (conf->user.enh_size) { 983 if (conf->user.enh_size) {
984 if (conf->user.enh_size % mmc->hc_wp_grp_size || 984 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
985 conf->user.enh_start % mmc->hc_wp_grp_size) { 985 conf->user.enh_start % mmc->hc_wp_grp_size) {
986 pr_err("User data enhanced area not HC WP group " 986 pr_err("User data enhanced area not HC WP group "
987 "size aligned\n"); 987 "size aligned\n");
988 return -EINVAL; 988 return -EINVAL;
989 } 989 }
990 part_attrs |= EXT_CSD_ENH_USR; 990 part_attrs |= EXT_CSD_ENH_USR;
991 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size; 991 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
992 if (mmc->high_capacity) { 992 if (mmc->high_capacity) {
993 enh_start_addr = conf->user.enh_start; 993 enh_start_addr = conf->user.enh_start;
994 } else { 994 } else {
995 enh_start_addr = (conf->user.enh_start << 9); 995 enh_start_addr = (conf->user.enh_start << 9);
996 } 996 }
997 } else { 997 } else {
998 enh_size_mult = 0; 998 enh_size_mult = 0;
999 enh_start_addr = 0; 999 enh_start_addr = 0;
1000 } 1000 }
1001 tot_enh_size_mult += enh_size_mult; 1001 tot_enh_size_mult += enh_size_mult;
1002 1002
1003 for (pidx = 0; pidx < 4; pidx++) { 1003 for (pidx = 0; pidx < 4; pidx++) {
1004 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) { 1004 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
1005 pr_err("GP%i partition not HC WP group size " 1005 pr_err("GP%i partition not HC WP group size "
1006 "aligned\n", pidx+1); 1006 "aligned\n", pidx+1);
1007 return -EINVAL; 1007 return -EINVAL;
1008 } 1008 }
1009 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size; 1009 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
1010 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) { 1010 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
1011 part_attrs |= EXT_CSD_ENH_GP(pidx); 1011 part_attrs |= EXT_CSD_ENH_GP(pidx);
1012 tot_enh_size_mult += gp_size_mult[pidx]; 1012 tot_enh_size_mult += gp_size_mult[pidx];
1013 } 1013 }
1014 } 1014 }
1015 1015
1016 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) { 1016 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
1017 pr_err("Card does not support enhanced attribute\n"); 1017 pr_err("Card does not support enhanced attribute\n");
1018 return -EMEDIUMTYPE; 1018 return -EMEDIUMTYPE;
1019 } 1019 }
1020 1020
1021 err = mmc_send_ext_csd(mmc, ext_csd); 1021 err = mmc_send_ext_csd(mmc, ext_csd);
1022 if (err) 1022 if (err)
1023 return err; 1023 return err;
1024 1024
1025 max_enh_size_mult = 1025 max_enh_size_mult =
1026 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) + 1026 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
1027 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) + 1027 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
1028 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT]; 1028 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
1029 if (tot_enh_size_mult > max_enh_size_mult) { 1029 if (tot_enh_size_mult > max_enh_size_mult) {
1030 pr_err("Total enhanced size exceeds maximum (%u > %u)\n", 1030 pr_err("Total enhanced size exceeds maximum (%u > %u)\n",
1031 tot_enh_size_mult, max_enh_size_mult); 1031 tot_enh_size_mult, max_enh_size_mult);
1032 return -EMEDIUMTYPE; 1032 return -EMEDIUMTYPE;
1033 } 1033 }
1034 1034
1035 /* The default value of EXT_CSD_WR_REL_SET is device 1035 /* The default value of EXT_CSD_WR_REL_SET is device
1036 * dependent, the values can only be changed if the 1036 * dependent, the values can only be changed if the
1037 * EXT_CSD_HS_CTRL_REL bit is set. The values can be 1037 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
1038 * changed only once and before partitioning is completed. */ 1038 * changed only once and before partitioning is completed. */
1039 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET]; 1039 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1040 if (conf->user.wr_rel_change) { 1040 if (conf->user.wr_rel_change) {
1041 if (conf->user.wr_rel_set) 1041 if (conf->user.wr_rel_set)
1042 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR; 1042 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
1043 else 1043 else
1044 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR; 1044 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
1045 } 1045 }
1046 for (pidx = 0; pidx < 4; pidx++) { 1046 for (pidx = 0; pidx < 4; pidx++) {
1047 if (conf->gp_part[pidx].wr_rel_change) { 1047 if (conf->gp_part[pidx].wr_rel_change) {
1048 if (conf->gp_part[pidx].wr_rel_set) 1048 if (conf->gp_part[pidx].wr_rel_set)
1049 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx); 1049 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
1050 else 1050 else
1051 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx); 1051 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
1052 } 1052 }
1053 } 1053 }
1054 1054
1055 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] && 1055 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
1056 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) { 1056 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
1057 puts("Card does not support host controlled partition write " 1057 puts("Card does not support host controlled partition write "
1058 "reliability settings\n"); 1058 "reliability settings\n");
1059 return -EMEDIUMTYPE; 1059 return -EMEDIUMTYPE;
1060 } 1060 }
1061 1061
1062 if (ext_csd[EXT_CSD_PARTITION_SETTING] & 1062 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
1063 EXT_CSD_PARTITION_SETTING_COMPLETED) { 1063 EXT_CSD_PARTITION_SETTING_COMPLETED) {
1064 pr_err("Card already partitioned\n"); 1064 pr_err("Card already partitioned\n");
1065 return -EPERM; 1065 return -EPERM;
1066 } 1066 }
1067 1067
1068 if (mode == MMC_HWPART_CONF_CHECK) 1068 if (mode == MMC_HWPART_CONF_CHECK)
1069 return 0; 1069 return 0;
1070 1070
1071 /* Partitioning requires high-capacity size definitions */ 1071 /* Partitioning requires high-capacity size definitions */
1072 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) { 1072 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
1073 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 1073 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1074 EXT_CSD_ERASE_GROUP_DEF, 1); 1074 EXT_CSD_ERASE_GROUP_DEF, 1);
1075 1075
1076 if (err) 1076 if (err)
1077 return err; 1077 return err;
1078 1078
1079 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1; 1079 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1080 1080
1081 /* update erase group size to be high-capacity */ 1081 /* update erase group size to be high-capacity */
1082 mmc->erase_grp_size = 1082 mmc->erase_grp_size =
1083 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024; 1083 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1084 1084
1085 } 1085 }
1086 1086
1087 /* all OK, write the configuration */ 1087 /* all OK, write the configuration */
1088 for (i = 0; i < 4; i++) { 1088 for (i = 0; i < 4; i++) {
1089 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 1089 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1090 EXT_CSD_ENH_START_ADDR+i, 1090 EXT_CSD_ENH_START_ADDR+i,
1091 (enh_start_addr >> (i*8)) & 0xFF); 1091 (enh_start_addr >> (i*8)) & 0xFF);
1092 if (err) 1092 if (err)
1093 return err; 1093 return err;
1094 } 1094 }
1095 for (i = 0; i < 3; i++) { 1095 for (i = 0; i < 3; i++) {
1096 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 1096 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1097 EXT_CSD_ENH_SIZE_MULT+i, 1097 EXT_CSD_ENH_SIZE_MULT+i,
1098 (enh_size_mult >> (i*8)) & 0xFF); 1098 (enh_size_mult >> (i*8)) & 0xFF);
1099 if (err) 1099 if (err)
1100 return err; 1100 return err;
1101 } 1101 }
1102 for (pidx = 0; pidx < 4; pidx++) { 1102 for (pidx = 0; pidx < 4; pidx++) {
1103 for (i = 0; i < 3; i++) { 1103 for (i = 0; i < 3; i++) {
1104 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 1104 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1105 EXT_CSD_GP_SIZE_MULT+pidx*3+i, 1105 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
1106 (gp_size_mult[pidx] >> (i*8)) & 0xFF); 1106 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
1107 if (err) 1107 if (err)
1108 return err; 1108 return err;
1109 } 1109 }
1110 } 1110 }
1111 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 1111 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1112 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs); 1112 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
1113 if (err) 1113 if (err)
1114 return err; 1114 return err;
1115 1115
1116 if (mode == MMC_HWPART_CONF_SET) 1116 if (mode == MMC_HWPART_CONF_SET)
1117 return 0; 1117 return 0;
1118 1118
1119 /* The WR_REL_SET is a write-once register but shall be 1119 /* The WR_REL_SET is a write-once register but shall be
1120 * written before setting PART_SETTING_COMPLETED. As it is 1120 * written before setting PART_SETTING_COMPLETED. As it is
1121 * write-once we can only write it when completing the 1121 * write-once we can only write it when completing the
1122 * partitioning. */ 1122 * partitioning. */
1123 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) { 1123 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
1124 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 1124 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1125 EXT_CSD_WR_REL_SET, wr_rel_set); 1125 EXT_CSD_WR_REL_SET, wr_rel_set);
1126 if (err) 1126 if (err)
1127 return err; 1127 return err;
1128 } 1128 }
1129 1129
1130 /* Setting PART_SETTING_COMPLETED confirms the partition 1130 /* Setting PART_SETTING_COMPLETED confirms the partition
1131 * configuration but it only becomes effective after power 1131 * configuration but it only becomes effective after power
1132 * cycle, so we do not adjust the partition related settings 1132 * cycle, so we do not adjust the partition related settings
1133 * in the mmc struct. */ 1133 * in the mmc struct. */
1134 1134
1135 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 1135 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1136 EXT_CSD_PARTITION_SETTING, 1136 EXT_CSD_PARTITION_SETTING,
1137 EXT_CSD_PARTITION_SETTING_COMPLETED); 1137 EXT_CSD_PARTITION_SETTING_COMPLETED);
1138 if (err) 1138 if (err)
1139 return err; 1139 return err;
1140 1140
1141 return 0; 1141 return 0;
1142 } 1142 }
1143 #endif 1143 #endif
1144 1144
1145 #if !CONFIG_IS_ENABLED(DM_MMC) 1145 #if !CONFIG_IS_ENABLED(DM_MMC)
1146 int mmc_getcd(struct mmc *mmc) 1146 int mmc_getcd(struct mmc *mmc)
1147 { 1147 {
1148 int cd; 1148 int cd;
1149 1149
1150 cd = board_mmc_getcd(mmc); 1150 cd = board_mmc_getcd(mmc);
1151 1151
1152 if (cd < 0) { 1152 if (cd < 0) {
1153 if (mmc->cfg->ops->getcd) 1153 if (mmc->cfg->ops->getcd)
1154 cd = mmc->cfg->ops->getcd(mmc); 1154 cd = mmc->cfg->ops->getcd(mmc);
1155 else 1155 else
1156 cd = 1; 1156 cd = 1;
1157 } 1157 }
1158 1158
1159 return cd; 1159 return cd;
1160 } 1160 }
1161 #endif 1161 #endif
1162 1162
1163 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp) 1163 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
1164 { 1164 {
1165 struct mmc_cmd cmd; 1165 struct mmc_cmd cmd;
1166 struct mmc_data data; 1166 struct mmc_data data;
1167 1167
1168 /* Switch the frequency */ 1168 /* Switch the frequency */
1169 cmd.cmdidx = SD_CMD_SWITCH_FUNC; 1169 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
1170 cmd.resp_type = MMC_RSP_R1; 1170 cmd.resp_type = MMC_RSP_R1;
1171 cmd.cmdarg = (mode << 31) | 0xffffff; 1171 cmd.cmdarg = (mode << 31) | 0xffffff;
1172 cmd.cmdarg &= ~(0xf << (group * 4)); 1172 cmd.cmdarg &= ~(0xf << (group * 4));
1173 cmd.cmdarg |= value << (group * 4); 1173 cmd.cmdarg |= value << (group * 4);
1174 1174
1175 data.dest = (char *)resp; 1175 data.dest = (char *)resp;
1176 data.blocksize = 64; 1176 data.blocksize = 64;
1177 data.blocks = 1; 1177 data.blocks = 1;
1178 data.flags = MMC_DATA_READ; 1178 data.flags = MMC_DATA_READ;
1179 1179
1180 return mmc_send_cmd(mmc, &cmd, &data); 1180 return mmc_send_cmd(mmc, &cmd, &data);
1181 } 1181 }
1182 1182
1183 1183
1184 static int sd_get_capabilities(struct mmc *mmc) 1184 static int sd_get_capabilities(struct mmc *mmc)
1185 { 1185 {
1186 int err; 1186 int err;
1187 struct mmc_cmd cmd; 1187 struct mmc_cmd cmd;
1188 ALLOC_CACHE_ALIGN_BUFFER(__be32, scr, 2); 1188 ALLOC_CACHE_ALIGN_BUFFER(__be32, scr, 2);
1189 ALLOC_CACHE_ALIGN_BUFFER(__be32, switch_status, 16); 1189 ALLOC_CACHE_ALIGN_BUFFER(__be32, switch_status, 16);
1190 struct mmc_data data; 1190 struct mmc_data data;
1191 int timeout; 1191 int timeout;
1192 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) 1192 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1193 u32 sd3_bus_mode; 1193 u32 sd3_bus_mode;
1194 #endif 1194 #endif
1195 1195
1196 mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(SD_LEGACY); 1196 mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(SD_LEGACY);
1197 1197
1198 if (mmc_host_is_spi(mmc)) 1198 if (mmc_host_is_spi(mmc))
1199 return 0; 1199 return 0;
1200 1200
1201 /* Read the SCR to find out if this card supports higher speeds */ 1201 /* Read the SCR to find out if this card supports higher speeds */
1202 cmd.cmdidx = MMC_CMD_APP_CMD; 1202 cmd.cmdidx = MMC_CMD_APP_CMD;
1203 cmd.resp_type = MMC_RSP_R1; 1203 cmd.resp_type = MMC_RSP_R1;
1204 cmd.cmdarg = mmc->rca << 16; 1204 cmd.cmdarg = mmc->rca << 16;
1205 1205
1206 err = mmc_send_cmd(mmc, &cmd, NULL); 1206 err = mmc_send_cmd(mmc, &cmd, NULL);
1207 1207
1208 if (err) 1208 if (err)
1209 return err; 1209 return err;
1210 1210
1211 cmd.cmdidx = SD_CMD_APP_SEND_SCR; 1211 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
1212 cmd.resp_type = MMC_RSP_R1; 1212 cmd.resp_type = MMC_RSP_R1;
1213 cmd.cmdarg = 0; 1213 cmd.cmdarg = 0;
1214 1214
1215 timeout = 3; 1215 timeout = 3;
1216 1216
1217 retry_scr: 1217 retry_scr:
1218 data.dest = (char *)scr; 1218 data.dest = (char *)scr;
1219 data.blocksize = 8; 1219 data.blocksize = 8;
1220 data.blocks = 1; 1220 data.blocks = 1;
1221 data.flags = MMC_DATA_READ; 1221 data.flags = MMC_DATA_READ;
1222 1222
1223 err = mmc_send_cmd(mmc, &cmd, &data); 1223 err = mmc_send_cmd(mmc, &cmd, &data);
1224 1224
1225 if (err) { 1225 if (err) {
1226 if (timeout--) 1226 if (timeout--)
1227 goto retry_scr; 1227 goto retry_scr;
1228 1228
1229 return err; 1229 return err;
1230 } 1230 }
1231 1231
1232 mmc->scr[0] = __be32_to_cpu(scr[0]); 1232 mmc->scr[0] = __be32_to_cpu(scr[0]);
1233 mmc->scr[1] = __be32_to_cpu(scr[1]); 1233 mmc->scr[1] = __be32_to_cpu(scr[1]);
1234 1234
1235 switch ((mmc->scr[0] >> 24) & 0xf) { 1235 switch ((mmc->scr[0] >> 24) & 0xf) {
1236 case 0: 1236 case 0:
1237 mmc->version = SD_VERSION_1_0; 1237 mmc->version = SD_VERSION_1_0;
1238 break; 1238 break;
1239 case 1: 1239 case 1:
1240 mmc->version = SD_VERSION_1_10; 1240 mmc->version = SD_VERSION_1_10;
1241 break; 1241 break;
1242 case 2: 1242 case 2:
1243 mmc->version = SD_VERSION_2; 1243 mmc->version = SD_VERSION_2;
1244 if ((mmc->scr[0] >> 15) & 0x1) 1244 if ((mmc->scr[0] >> 15) & 0x1)
1245 mmc->version = SD_VERSION_3; 1245 mmc->version = SD_VERSION_3;
1246 break; 1246 break;
1247 default: 1247 default:
1248 mmc->version = SD_VERSION_1_0; 1248 mmc->version = SD_VERSION_1_0;
1249 break; 1249 break;
1250 } 1250 }
1251 1251
1252 if (mmc->scr[0] & SD_DATA_4BIT) 1252 if (mmc->scr[0] & SD_DATA_4BIT)
1253 mmc->card_caps |= MMC_MODE_4BIT; 1253 mmc->card_caps |= MMC_MODE_4BIT;
1254 1254
1255 /* Version 1.0 doesn't support switching */ 1255 /* Version 1.0 doesn't support switching */
1256 if (mmc->version == SD_VERSION_1_0) 1256 if (mmc->version == SD_VERSION_1_0)
1257 return 0; 1257 return 0;
1258 1258
1259 timeout = 4; 1259 timeout = 4;
1260 while (timeout--) { 1260 while (timeout--) {
1261 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1, 1261 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
1262 (u8 *)switch_status); 1262 (u8 *)switch_status);
1263 1263
1264 if (err) 1264 if (err)
1265 return err; 1265 return err;
1266 1266
1267 /* The high-speed function is busy. Try again */ 1267 /* The high-speed function is busy. Try again */
1268 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY)) 1268 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
1269 break; 1269 break;
1270 } 1270 }
1271 1271
1272 /* If high-speed isn't supported, we return */ 1272 /* If high-speed isn't supported, we return */
1273 if (__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED) 1273 if (__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)
1274 mmc->card_caps |= MMC_CAP(SD_HS); 1274 mmc->card_caps |= MMC_CAP(SD_HS);
1275 1275
1276 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) 1276 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1277 /* Version before 3.0 don't support UHS modes */ 1277 /* Version before 3.0 don't support UHS modes */
1278 if (mmc->version < SD_VERSION_3) 1278 if (mmc->version < SD_VERSION_3)
1279 return 0; 1279 return 0;
1280 1280
1281 sd3_bus_mode = __be32_to_cpu(switch_status[3]) >> 16 & 0x1f; 1281 sd3_bus_mode = __be32_to_cpu(switch_status[3]) >> 16 & 0x1f;
1282 if (sd3_bus_mode & SD_MODE_UHS_SDR104) 1282 if (sd3_bus_mode & SD_MODE_UHS_SDR104)
1283 mmc->card_caps |= MMC_CAP(UHS_SDR104); 1283 mmc->card_caps |= MMC_CAP(UHS_SDR104);
1284 if (sd3_bus_mode & SD_MODE_UHS_SDR50) 1284 if (sd3_bus_mode & SD_MODE_UHS_SDR50)
1285 mmc->card_caps |= MMC_CAP(UHS_SDR50); 1285 mmc->card_caps |= MMC_CAP(UHS_SDR50);
1286 if (sd3_bus_mode & SD_MODE_UHS_SDR25) 1286 if (sd3_bus_mode & SD_MODE_UHS_SDR25)
1287 mmc->card_caps |= MMC_CAP(UHS_SDR25); 1287 mmc->card_caps |= MMC_CAP(UHS_SDR25);
1288 if (sd3_bus_mode & SD_MODE_UHS_SDR12) 1288 if (sd3_bus_mode & SD_MODE_UHS_SDR12)
1289 mmc->card_caps |= MMC_CAP(UHS_SDR12); 1289 mmc->card_caps |= MMC_CAP(UHS_SDR12);
1290 if (sd3_bus_mode & SD_MODE_UHS_DDR50) 1290 if (sd3_bus_mode & SD_MODE_UHS_DDR50)
1291 mmc->card_caps |= MMC_CAP(UHS_DDR50); 1291 mmc->card_caps |= MMC_CAP(UHS_DDR50);
1292 #endif 1292 #endif
1293 1293
1294 return 0; 1294 return 0;
1295 } 1295 }
1296 1296
1297 static int sd_set_card_speed(struct mmc *mmc, enum bus_mode mode) 1297 static int sd_set_card_speed(struct mmc *mmc, enum bus_mode mode)
1298 { 1298 {
1299 int err; 1299 int err;
1300 1300
1301 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16); 1301 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
1302 int speed; 1302 int speed;
1303 1303
1304 switch (mode) { 1304 switch (mode) {
1305 case SD_LEGACY: 1305 case SD_LEGACY:
1306 speed = UHS_SDR12_BUS_SPEED; 1306 speed = UHS_SDR12_BUS_SPEED;
1307 break; 1307 break;
1308 case SD_HS: 1308 case SD_HS:
1309 speed = HIGH_SPEED_BUS_SPEED; 1309 speed = HIGH_SPEED_BUS_SPEED;
1310 break; 1310 break;
1311 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) 1311 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1312 case UHS_SDR12: 1312 case UHS_SDR12:
1313 speed = UHS_SDR12_BUS_SPEED; 1313 speed = UHS_SDR12_BUS_SPEED;
1314 break; 1314 break;
1315 case UHS_SDR25: 1315 case UHS_SDR25:
1316 speed = UHS_SDR25_BUS_SPEED; 1316 speed = UHS_SDR25_BUS_SPEED;
1317 break; 1317 break;
1318 case UHS_SDR50: 1318 case UHS_SDR50:
1319 speed = UHS_SDR50_BUS_SPEED; 1319 speed = UHS_SDR50_BUS_SPEED;
1320 break; 1320 break;
1321 case UHS_DDR50: 1321 case UHS_DDR50:
1322 speed = UHS_DDR50_BUS_SPEED; 1322 speed = UHS_DDR50_BUS_SPEED;
1323 break; 1323 break;
1324 case UHS_SDR104: 1324 case UHS_SDR104:
1325 speed = UHS_SDR104_BUS_SPEED; 1325 speed = UHS_SDR104_BUS_SPEED;
1326 break; 1326 break;
1327 #endif 1327 #endif
1328 default: 1328 default:
1329 return -EINVAL; 1329 return -EINVAL;
1330 } 1330 }
1331 1331
1332 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, speed, (u8 *)switch_status); 1332 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, speed, (u8 *)switch_status);
1333 if (err) 1333 if (err)
1334 return err; 1334 return err;
1335 1335
1336 if ((__be32_to_cpu(switch_status[4]) >> 24) != speed) 1336 if ((__be32_to_cpu(switch_status[4]) >> 24) != speed)
1337 return -ENOTSUPP; 1337 return -ENOTSUPP;
1338 1338
1339 return 0; 1339 return 0;
1340 } 1340 }
1341 1341
1342 int sd_select_bus_width(struct mmc *mmc, int w) 1342 int sd_select_bus_width(struct mmc *mmc, int w)
1343 { 1343 {
1344 int err; 1344 int err;
1345 struct mmc_cmd cmd; 1345 struct mmc_cmd cmd;
1346 1346
1347 if ((w != 4) && (w != 1)) 1347 if ((w != 4) && (w != 1))
1348 return -EINVAL; 1348 return -EINVAL;
1349 1349
1350 cmd.cmdidx = MMC_CMD_APP_CMD; 1350 cmd.cmdidx = MMC_CMD_APP_CMD;
1351 cmd.resp_type = MMC_RSP_R1; 1351 cmd.resp_type = MMC_RSP_R1;
1352 cmd.cmdarg = mmc->rca << 16; 1352 cmd.cmdarg = mmc->rca << 16;
1353 1353
1354 err = mmc_send_cmd(mmc, &cmd, NULL); 1354 err = mmc_send_cmd(mmc, &cmd, NULL);
1355 if (err) 1355 if (err)
1356 return err; 1356 return err;
1357 1357
1358 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH; 1358 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1359 cmd.resp_type = MMC_RSP_R1; 1359 cmd.resp_type = MMC_RSP_R1;
1360 if (w == 4) 1360 if (w == 4)
1361 cmd.cmdarg = 2; 1361 cmd.cmdarg = 2;
1362 else if (w == 1) 1362 else if (w == 1)
1363 cmd.cmdarg = 0; 1363 cmd.cmdarg = 0;
1364 err = mmc_send_cmd(mmc, &cmd, NULL); 1364 err = mmc_send_cmd(mmc, &cmd, NULL);
1365 if (err) 1365 if (err)
1366 return err; 1366 return err;
1367 1367
1368 return 0; 1368 return 0;
1369 } 1369 }
1370 1370
1371 #if CONFIG_IS_ENABLED(MMC_WRITE) 1371 #if CONFIG_IS_ENABLED(MMC_WRITE)
1372 static int sd_read_ssr(struct mmc *mmc) 1372 static int sd_read_ssr(struct mmc *mmc)
1373 { 1373 {
1374 static const unsigned int sd_au_size[] = { 1374 static const unsigned int sd_au_size[] = {
1375 0, SZ_16K / 512, SZ_32K / 512, 1375 0, SZ_16K / 512, SZ_32K / 512,
1376 SZ_64K / 512, SZ_128K / 512, SZ_256K / 512, 1376 SZ_64K / 512, SZ_128K / 512, SZ_256K / 512,
1377 SZ_512K / 512, SZ_1M / 512, SZ_2M / 512, 1377 SZ_512K / 512, SZ_1M / 512, SZ_2M / 512,
1378 SZ_4M / 512, SZ_8M / 512, (SZ_8M + SZ_4M) / 512, 1378 SZ_4M / 512, SZ_8M / 512, (SZ_8M + SZ_4M) / 512,
1379 SZ_16M / 512, (SZ_16M + SZ_8M) / 512, SZ_32M / 512, 1379 SZ_16M / 512, (SZ_16M + SZ_8M) / 512, SZ_32M / 512,
1380 SZ_64M / 512, 1380 SZ_64M / 512,
1381 }; 1381 };
1382 int err, i; 1382 int err, i;
1383 struct mmc_cmd cmd; 1383 struct mmc_cmd cmd;
1384 ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16); 1384 ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16);
1385 struct mmc_data data; 1385 struct mmc_data data;
1386 int timeout = 3; 1386 int timeout = 3;
1387 unsigned int au, eo, et, es; 1387 unsigned int au, eo, et, es;
1388 1388
1389 cmd.cmdidx = MMC_CMD_APP_CMD; 1389 cmd.cmdidx = MMC_CMD_APP_CMD;
1390 cmd.resp_type = MMC_RSP_R1; 1390 cmd.resp_type = MMC_RSP_R1;
1391 cmd.cmdarg = mmc->rca << 16; 1391 cmd.cmdarg = mmc->rca << 16;
1392 1392
1393 err = mmc_send_cmd(mmc, &cmd, NULL); 1393 err = mmc_send_cmd(mmc, &cmd, NULL);
1394 if (err) 1394 if (err)
1395 return err; 1395 return err;
1396 1396
1397 cmd.cmdidx = SD_CMD_APP_SD_STATUS; 1397 cmd.cmdidx = SD_CMD_APP_SD_STATUS;
1398 cmd.resp_type = MMC_RSP_R1; 1398 cmd.resp_type = MMC_RSP_R1;
1399 cmd.cmdarg = 0; 1399 cmd.cmdarg = 0;
1400 1400
1401 retry_ssr: 1401 retry_ssr:
1402 data.dest = (char *)ssr; 1402 data.dest = (char *)ssr;
1403 data.blocksize = 64; 1403 data.blocksize = 64;
1404 data.blocks = 1; 1404 data.blocks = 1;
1405 data.flags = MMC_DATA_READ; 1405 data.flags = MMC_DATA_READ;
1406 1406
1407 err = mmc_send_cmd(mmc, &cmd, &data); 1407 err = mmc_send_cmd(mmc, &cmd, &data);
1408 if (err) { 1408 if (err) {
1409 if (timeout--) 1409 if (timeout--)
1410 goto retry_ssr; 1410 goto retry_ssr;
1411 1411
1412 return err; 1412 return err;
1413 } 1413 }
1414 1414
1415 for (i = 0; i < 16; i++) 1415 for (i = 0; i < 16; i++)
1416 ssr[i] = be32_to_cpu(ssr[i]); 1416 ssr[i] = be32_to_cpu(ssr[i]);
1417 1417
1418 au = (ssr[2] >> 12) & 0xF; 1418 au = (ssr[2] >> 12) & 0xF;
1419 if ((au <= 9) || (mmc->version == SD_VERSION_3)) { 1419 if ((au <= 9) || (mmc->version == SD_VERSION_3)) {
1420 mmc->ssr.au = sd_au_size[au]; 1420 mmc->ssr.au = sd_au_size[au];
1421 es = (ssr[3] >> 24) & 0xFF; 1421 es = (ssr[3] >> 24) & 0xFF;
1422 es |= (ssr[2] & 0xFF) << 8; 1422 es |= (ssr[2] & 0xFF) << 8;
1423 et = (ssr[3] >> 18) & 0x3F; 1423 et = (ssr[3] >> 18) & 0x3F;
1424 if (es && et) { 1424 if (es && et) {
1425 eo = (ssr[3] >> 16) & 0x3; 1425 eo = (ssr[3] >> 16) & 0x3;
1426 mmc->ssr.erase_timeout = (et * 1000) / es; 1426 mmc->ssr.erase_timeout = (et * 1000) / es;
1427 mmc->ssr.erase_offset = eo * 1000; 1427 mmc->ssr.erase_offset = eo * 1000;
1428 } 1428 }
1429 } else { 1429 } else {
1430 debug("Invalid Allocation Unit Size.\n"); 1430 debug("Invalid Allocation Unit Size.\n");
1431 } 1431 }
1432 1432
1433 return 0; 1433 return 0;
1434 } 1434 }
1435 #endif 1435 #endif
1436 /* frequency bases */ 1436 /* frequency bases */
1437 /* divided by 10 to be nice to platforms without floating point */ 1437 /* divided by 10 to be nice to platforms without floating point */
1438 static const int fbase[] = { 1438 static const int fbase[] = {
1439 10000, 1439 10000,
1440 100000, 1440 100000,
1441 1000000, 1441 1000000,
1442 10000000, 1442 10000000,
1443 }; 1443 };
1444 1444
1445 /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice 1445 /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
1446 * to platforms without floating point. 1446 * to platforms without floating point.
1447 */ 1447 */
1448 static const u8 multipliers[] = { 1448 static const u8 multipliers[] = {
1449 0, /* reserved */ 1449 0, /* reserved */
1450 10, 1450 10,
1451 12, 1451 12,
1452 13, 1452 13,
1453 15, 1453 15,
1454 20, 1454 20,
1455 25, 1455 25,
1456 30, 1456 30,
1457 35, 1457 35,
1458 40, 1458 40,
1459 45, 1459 45,
1460 50, 1460 50,
1461 55, 1461 55,
1462 60, 1462 60,
1463 70, 1463 70,
1464 80, 1464 80,
1465 }; 1465 };
1466 1466
1467 static inline int bus_width(uint cap) 1467 static inline int bus_width(uint cap)
1468 { 1468 {
1469 if (cap == MMC_MODE_8BIT) 1469 if (cap == MMC_MODE_8BIT)
1470 return 8; 1470 return 8;
1471 if (cap == MMC_MODE_4BIT) 1471 if (cap == MMC_MODE_4BIT)
1472 return 4; 1472 return 4;
1473 if (cap == MMC_MODE_1BIT) 1473 if (cap == MMC_MODE_1BIT)
1474 return 1; 1474 return 1;
1475 pr_warn("invalid bus witdh capability 0x%x\n", cap); 1475 pr_warn("invalid bus witdh capability 0x%x\n", cap);
1476 return 0; 1476 return 0;
1477 } 1477 }
1478 1478
1479 #if !CONFIG_IS_ENABLED(DM_MMC) 1479 #if !CONFIG_IS_ENABLED(DM_MMC)
1480 #ifdef MMC_SUPPORTS_TUNING 1480 #ifdef MMC_SUPPORTS_TUNING
1481 static int mmc_execute_tuning(struct mmc *mmc, uint opcode) 1481 static int mmc_execute_tuning(struct mmc *mmc, uint opcode)
1482 { 1482 {
1483 return -ENOTSUPP; 1483 return -ENOTSUPP;
1484 } 1484 }
1485 #endif 1485 #endif
1486 1486
1487 static void mmc_send_init_stream(struct mmc *mmc) 1487 static void mmc_send_init_stream(struct mmc *mmc)
1488 { 1488 {
1489 } 1489 }
1490 1490
1491 static int mmc_set_ios(struct mmc *mmc) 1491 static int mmc_set_ios(struct mmc *mmc)
1492 { 1492 {
1493 int ret = 0; 1493 int ret = 0;
1494 1494
1495 if (mmc->cfg->ops->set_ios) 1495 if (mmc->cfg->ops->set_ios)
1496 ret = mmc->cfg->ops->set_ios(mmc); 1496 ret = mmc->cfg->ops->set_ios(mmc);
1497 1497
1498 return ret; 1498 return ret;
1499 } 1499 }
1500 #endif 1500 #endif
1501 1501
1502 int mmc_set_clock(struct mmc *mmc, uint clock, bool disable) 1502 int mmc_set_clock(struct mmc *mmc, uint clock, bool disable)
1503 { 1503 {
1504 if (clock > mmc->cfg->f_max) 1504 if (clock > mmc->cfg->f_max)
1505 clock = mmc->cfg->f_max; 1505 clock = mmc->cfg->f_max;
1506 1506
1507 if (clock < mmc->cfg->f_min) 1507 if (clock < mmc->cfg->f_min)
1508 clock = mmc->cfg->f_min; 1508 clock = mmc->cfg->f_min;
1509 1509
1510 mmc->clock = clock; 1510 mmc->clock = clock;
1511 mmc->clk_disable = disable; 1511 mmc->clk_disable = disable;
1512 1512
1513 return mmc_set_ios(mmc); 1513 return mmc_set_ios(mmc);
1514 } 1514 }
1515 1515
1516 static int mmc_set_bus_width(struct mmc *mmc, uint width) 1516 static int mmc_set_bus_width(struct mmc *mmc, uint width)
1517 { 1517 {
1518 mmc->bus_width = width; 1518 mmc->bus_width = width;
1519 1519
1520 return mmc_set_ios(mmc); 1520 return mmc_set_ios(mmc);
1521 } 1521 }
1522 1522
1523 #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG) 1523 #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
1524 /* 1524 /*
1525 * helper function to display the capabilities in a human 1525 * helper function to display the capabilities in a human
1526 * friendly manner. The capabilities include bus width and 1526 * friendly manner. The capabilities include bus width and
1527 * supported modes. 1527 * supported modes.
1528 */ 1528 */
1529 void mmc_dump_capabilities(const char *text, uint caps) 1529 void mmc_dump_capabilities(const char *text, uint caps)
1530 { 1530 {
1531 enum bus_mode mode; 1531 enum bus_mode mode;
1532 1532
1533 printf("%s: widths [", text); 1533 printf("%s: widths [", text);
1534 if (caps & MMC_MODE_8BIT) 1534 if (caps & MMC_MODE_8BIT)
1535 printf("8, "); 1535 printf("8, ");
1536 if (caps & MMC_MODE_4BIT) 1536 if (caps & MMC_MODE_4BIT)
1537 printf("4, "); 1537 printf("4, ");
1538 if (caps & MMC_MODE_1BIT) 1538 if (caps & MMC_MODE_1BIT)
1539 printf("1, "); 1539 printf("1, ");
1540 printf("\b\b] modes ["); 1540 printf("\b\b] modes [");
1541 for (mode = MMC_LEGACY; mode < MMC_MODES_END; mode++) 1541 for (mode = MMC_LEGACY; mode < MMC_MODES_END; mode++)
1542 if (MMC_CAP(mode) & caps) 1542 if (MMC_CAP(mode) & caps)
1543 printf("%s, ", mmc_mode_name(mode)); 1543 printf("%s, ", mmc_mode_name(mode));
1544 printf("\b\b]\n"); 1544 printf("\b\b]\n");
1545 } 1545 }
1546 #endif 1546 #endif
1547 1547
1548 struct mode_width_tuning { 1548 struct mode_width_tuning {
1549 enum bus_mode mode; 1549 enum bus_mode mode;
1550 uint widths; 1550 uint widths;
1551 #ifdef MMC_SUPPORTS_TUNING 1551 #ifdef MMC_SUPPORTS_TUNING
1552 uint tuning; 1552 uint tuning;
1553 #endif 1553 #endif
1554 }; 1554 };
1555 1555
1556 #if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE) 1556 #if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE)
1557 int mmc_voltage_to_mv(enum mmc_voltage voltage) 1557 int mmc_voltage_to_mv(enum mmc_voltage voltage)
1558 { 1558 {
1559 switch (voltage) { 1559 switch (voltage) {
1560 case MMC_SIGNAL_VOLTAGE_000: return 0; 1560 case MMC_SIGNAL_VOLTAGE_000: return 0;
1561 case MMC_SIGNAL_VOLTAGE_330: return 3300; 1561 case MMC_SIGNAL_VOLTAGE_330: return 3300;
1562 case MMC_SIGNAL_VOLTAGE_180: return 1800; 1562 case MMC_SIGNAL_VOLTAGE_180: return 1800;
1563 case MMC_SIGNAL_VOLTAGE_120: return 1200; 1563 case MMC_SIGNAL_VOLTAGE_120: return 1200;
1564 } 1564 }
1565 return -EINVAL; 1565 return -EINVAL;
1566 } 1566 }
1567 1567
1568 static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage) 1568 static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
1569 { 1569 {
1570 int err; 1570 int err;
1571 1571
1572 if (mmc->signal_voltage == signal_voltage) 1572 if (mmc->signal_voltage == signal_voltage)
1573 return 0; 1573 return 0;
1574 1574
1575 mmc->signal_voltage = signal_voltage; 1575 mmc->signal_voltage = signal_voltage;
1576 err = mmc_set_ios(mmc); 1576 err = mmc_set_ios(mmc);
1577 if (err) 1577 if (err)
1578 debug("unable to set voltage (err %d)\n", err); 1578 debug("unable to set voltage (err %d)\n", err);
1579 1579
1580 return err; 1580 return err;
1581 } 1581 }
1582 #else 1582 #else
1583 static inline int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage) 1583 static inline int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
1584 { 1584 {
1585 return 0; 1585 return 0;
1586 } 1586 }
1587 #endif 1587 #endif
1588 1588
1589 static const struct mode_width_tuning sd_modes_by_pref[] = { 1589 static const struct mode_width_tuning sd_modes_by_pref[] = {
1590 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) 1590 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1591 #ifdef MMC_SUPPORTS_TUNING 1591 #ifdef MMC_SUPPORTS_TUNING
1592 { 1592 {
1593 .mode = UHS_SDR104, 1593 .mode = UHS_SDR104,
1594 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT, 1594 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1595 .tuning = MMC_CMD_SEND_TUNING_BLOCK 1595 .tuning = MMC_CMD_SEND_TUNING_BLOCK
1596 }, 1596 },
1597 #endif 1597 #endif
1598 { 1598 {
1599 .mode = UHS_SDR50, 1599 .mode = UHS_SDR50,
1600 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT, 1600 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1601 }, 1601 },
1602 { 1602 {
1603 .mode = UHS_DDR50, 1603 .mode = UHS_DDR50,
1604 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT, 1604 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1605 }, 1605 },
1606 { 1606 {
1607 .mode = UHS_SDR25, 1607 .mode = UHS_SDR25,
1608 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT, 1608 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1609 }, 1609 },
1610 #endif 1610 #endif
1611 { 1611 {
1612 .mode = SD_HS, 1612 .mode = SD_HS,
1613 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT, 1613 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1614 }, 1614 },
1615 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) 1615 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1616 { 1616 {
1617 .mode = UHS_SDR12, 1617 .mode = UHS_SDR12,
1618 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT, 1618 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1619 }, 1619 },
1620 #endif 1620 #endif
1621 { 1621 {
1622 .mode = SD_LEGACY, 1622 .mode = SD_LEGACY,
1623 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT, 1623 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1624 } 1624 }
1625 }; 1625 };
1626 1626
1627 #define for_each_sd_mode_by_pref(caps, mwt) \ 1627 #define for_each_sd_mode_by_pref(caps, mwt) \
1628 for (mwt = sd_modes_by_pref;\ 1628 for (mwt = sd_modes_by_pref;\
1629 mwt < sd_modes_by_pref + ARRAY_SIZE(sd_modes_by_pref);\ 1629 mwt < sd_modes_by_pref + ARRAY_SIZE(sd_modes_by_pref);\
1630 mwt++) \ 1630 mwt++) \
1631 if (caps & MMC_CAP(mwt->mode)) 1631 if (caps & MMC_CAP(mwt->mode))
1632 1632
1633 static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps) 1633 static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps)
1634 { 1634 {
1635 int err; 1635 int err;
1636 uint widths[] = {MMC_MODE_4BIT, MMC_MODE_1BIT}; 1636 uint widths[] = {MMC_MODE_4BIT, MMC_MODE_1BIT};
1637 const struct mode_width_tuning *mwt; 1637 const struct mode_width_tuning *mwt;
1638 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) 1638 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1639 bool uhs_en = (mmc->ocr & OCR_S18R) ? true : false; 1639 bool uhs_en = (mmc->ocr & OCR_S18R) ? true : false;
1640 #else 1640 #else
1641 bool uhs_en = false; 1641 bool uhs_en = false;
1642 #endif 1642 #endif
1643 uint caps; 1643 uint caps;
1644 1644
1645 #ifdef DEBUG 1645 #ifdef DEBUG
1646 mmc_dump_capabilities("sd card", card_caps); 1646 mmc_dump_capabilities("sd card", card_caps);
1647 mmc_dump_capabilities("host", mmc->host_caps); 1647 mmc_dump_capabilities("host", mmc->host_caps);
1648 #endif 1648 #endif
1649 1649
1650 /* Restrict card's capabilities by what the host can do */ 1650 /* Restrict card's capabilities by what the host can do */
1651 caps = card_caps & mmc->host_caps; 1651 caps = card_caps & mmc->host_caps;
1652 1652
1653 if (!uhs_en) 1653 if (!uhs_en)
1654 caps &= ~UHS_CAPS; 1654 caps &= ~UHS_CAPS;
1655 1655
1656 for_each_sd_mode_by_pref(caps, mwt) { 1656 for_each_sd_mode_by_pref(caps, mwt) {
1657 uint *w; 1657 uint *w;
1658 1658
1659 for (w = widths; w < widths + ARRAY_SIZE(widths); w++) { 1659 for (w = widths; w < widths + ARRAY_SIZE(widths); w++) {
1660 if (*w & caps & mwt->widths) { 1660 if (*w & caps & mwt->widths) {
1661 debug("trying mode %s width %d (at %d MHz)\n", 1661 debug("trying mode %s width %d (at %d MHz)\n",
1662 mmc_mode_name(mwt->mode), 1662 mmc_mode_name(mwt->mode),
1663 bus_width(*w), 1663 bus_width(*w),
1664 mmc_mode2freq(mmc, mwt->mode) / 1000000); 1664 mmc_mode2freq(mmc, mwt->mode) / 1000000);
1665 1665
1666 /* configure the bus width (card + host) */ 1666 /* configure the bus width (card + host) */
1667 err = sd_select_bus_width(mmc, bus_width(*w)); 1667 err = sd_select_bus_width(mmc, bus_width(*w));
1668 if (err) 1668 if (err)
1669 goto error; 1669 goto error;
1670 mmc_set_bus_width(mmc, bus_width(*w)); 1670 mmc_set_bus_width(mmc, bus_width(*w));
1671 1671
1672 /* configure the bus mode (card) */ 1672 /* configure the bus mode (card) */
1673 err = sd_set_card_speed(mmc, mwt->mode); 1673 err = sd_set_card_speed(mmc, mwt->mode);
1674 if (err) 1674 if (err)
1675 goto error; 1675 goto error;
1676 1676
1677 /* configure the bus mode (host) */ 1677 /* configure the bus mode (host) */
1678 mmc_select_mode(mmc, mwt->mode); 1678 mmc_select_mode(mmc, mwt->mode);
1679 mmc_set_clock(mmc, mmc->tran_speed, false); 1679 mmc_set_clock(mmc, mmc->tran_speed, false);
1680 1680
1681 #ifdef MMC_SUPPORTS_TUNING 1681 #ifdef MMC_SUPPORTS_TUNING
1682 /* execute tuning if needed */ 1682 /* execute tuning if needed */
1683 if (mwt->tuning && !mmc_host_is_spi(mmc)) { 1683 if (mwt->tuning && !mmc_host_is_spi(mmc)) {
1684 err = mmc_execute_tuning(mmc, 1684 err = mmc_execute_tuning(mmc,
1685 mwt->tuning); 1685 mwt->tuning);
1686 if (err) { 1686 if (err) {
1687 debug("tuning failed\n"); 1687 debug("tuning failed\n");
1688 goto error; 1688 goto error;
1689 } 1689 }
1690 } 1690 }
1691 #endif 1691 #endif
1692 1692
1693 #if CONFIG_IS_ENABLED(MMC_WRITE) 1693 #if CONFIG_IS_ENABLED(MMC_WRITE)
1694 err = sd_read_ssr(mmc); 1694 err = sd_read_ssr(mmc);
1695 if (!err) 1695 if (!err)
1696 pr_warn("unable to read ssr\n"); 1696 pr_warn("unable to read ssr\n");
1697 #endif 1697 #endif
1698 if (!err) 1698 if (!err)
1699 return 0; 1699 return 0;
1700 1700
1701 error: 1701 error:
1702 /* revert to a safer bus speed */ 1702 /* revert to a safer bus speed */
1703 mmc_select_mode(mmc, SD_LEGACY); 1703 mmc_select_mode(mmc, SD_LEGACY);
1704 mmc_set_clock(mmc, mmc->tran_speed, false); 1704 mmc_set_clock(mmc, mmc->tran_speed, false);
1705 } 1705 }
1706 } 1706 }
1707 } 1707 }
1708 1708
1709 printf("unable to select a mode\n"); 1709 printf("unable to select a mode\n");
1710 return -ENOTSUPP; 1710 return -ENOTSUPP;
1711 } 1711 }
1712 1712
1713 /* 1713 /*
1714 * read the compare the part of ext csd that is constant. 1714 * read the compare the part of ext csd that is constant.
1715 * This can be used to check that the transfer is working 1715 * This can be used to check that the transfer is working
1716 * as expected. 1716 * as expected.
1717 */ 1717 */
1718 static int mmc_read_and_compare_ext_csd(struct mmc *mmc) 1718 static int mmc_read_and_compare_ext_csd(struct mmc *mmc)
1719 { 1719 {
1720 int err; 1720 int err;
1721 const u8 *ext_csd = mmc->ext_csd; 1721 const u8 *ext_csd = mmc->ext_csd;
1722 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN); 1722 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1723 1723
1724 if (mmc->version < MMC_VERSION_4) 1724 if (mmc->version < MMC_VERSION_4)
1725 return 0; 1725 return 0;
1726 1726
1727 err = mmc_send_ext_csd(mmc, test_csd); 1727 err = mmc_send_ext_csd(mmc, test_csd);
1728 if (err) 1728 if (err)
1729 return err; 1729 return err;
1730 1730
1731 /* Only compare read only fields */ 1731 /* Only compare read only fields */
1732 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] 1732 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1733 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] && 1733 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1734 ext_csd[EXT_CSD_HC_WP_GRP_SIZE] 1734 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1735 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] && 1735 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1736 ext_csd[EXT_CSD_REV] 1736 ext_csd[EXT_CSD_REV]
1737 == test_csd[EXT_CSD_REV] && 1737 == test_csd[EXT_CSD_REV] &&
1738 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] 1738 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1739 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] && 1739 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1740 memcmp(&ext_csd[EXT_CSD_SEC_CNT], 1740 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1741 &test_csd[EXT_CSD_SEC_CNT], 4) == 0) 1741 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1742 return 0; 1742 return 0;
1743 1743
1744 return -EBADMSG; 1744 return -EBADMSG;
1745 } 1745 }
1746 1746
1747 #if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE) 1747 #if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE)
1748 static int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode, 1748 static int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode,
1749 uint32_t allowed_mask) 1749 uint32_t allowed_mask)
1750 { 1750 {
1751 u32 card_mask = 0; 1751 u32 card_mask = 0;
1752 1752
1753 switch (mode) { 1753 switch (mode) {
1754 case MMC_HS_200: 1754 case MMC_HS_200:
1755 if (mmc->cardtype & EXT_CSD_CARD_TYPE_HS200_1_8V) 1755 if (mmc->cardtype & EXT_CSD_CARD_TYPE_HS200_1_8V)
1756 card_mask |= MMC_SIGNAL_VOLTAGE_180; 1756 card_mask |= MMC_SIGNAL_VOLTAGE_180;
1757 if (mmc->cardtype & EXT_CSD_CARD_TYPE_HS200_1_2V) 1757 if (mmc->cardtype & EXT_CSD_CARD_TYPE_HS200_1_2V)
1758 card_mask |= MMC_SIGNAL_VOLTAGE_120; 1758 card_mask |= MMC_SIGNAL_VOLTAGE_120;
1759 break; 1759 break;
1760 case MMC_DDR_52: 1760 case MMC_DDR_52:
1761 if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V) 1761 if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
1762 card_mask |= MMC_SIGNAL_VOLTAGE_330 | 1762 card_mask |= MMC_SIGNAL_VOLTAGE_330 |
1763 MMC_SIGNAL_VOLTAGE_180; 1763 MMC_SIGNAL_VOLTAGE_180;
1764 if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_2V) 1764 if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_2V)
1765 card_mask |= MMC_SIGNAL_VOLTAGE_120; 1765 card_mask |= MMC_SIGNAL_VOLTAGE_120;
1766 break; 1766 break;
1767 default: 1767 default:
1768 card_mask |= MMC_SIGNAL_VOLTAGE_330; 1768 card_mask |= MMC_SIGNAL_VOLTAGE_330;
1769 break; 1769 break;
1770 } 1770 }
1771 1771
1772 while (card_mask & allowed_mask) { 1772 while (card_mask & allowed_mask) {
1773 enum mmc_voltage best_match; 1773 enum mmc_voltage best_match;
1774 1774
1775 best_match = 1 << (ffs(card_mask & allowed_mask) - 1); 1775 best_match = 1 << (ffs(card_mask & allowed_mask) - 1);
1776 if (!mmc_set_signal_voltage(mmc, best_match)) 1776 if (!mmc_set_signal_voltage(mmc, best_match))
1777 return 0; 1777 return 0;
1778 1778
1779 allowed_mask &= ~best_match; 1779 allowed_mask &= ~best_match;
1780 } 1780 }
1781 1781
1782 return -ENOTSUPP; 1782 return -ENOTSUPP;
1783 } 1783 }
1784 #else 1784 #else
1785 static inline int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode, 1785 static inline int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode,
1786 uint32_t allowed_mask) 1786 uint32_t allowed_mask)
1787 { 1787 {
1788 return 0; 1788 return 0;
1789 } 1789 }
1790 #endif 1790 #endif
1791 1791
1792 static const struct mode_width_tuning mmc_modes_by_pref[] = { 1792 static const struct mode_width_tuning mmc_modes_by_pref[] = {
1793 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) 1793 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
1794 { 1794 {
1795 .mode = MMC_HS_200, 1795 .mode = MMC_HS_200,
1796 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT, 1796 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT,
1797 .tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200 1797 .tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200
1798 }, 1798 },
1799 #endif 1799 #endif
1800 { 1800 {
1801 .mode = MMC_DDR_52, 1801 .mode = MMC_DDR_52,
1802 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT, 1802 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT,
1803 }, 1803 },
1804 { 1804 {
1805 .mode = MMC_HS_52, 1805 .mode = MMC_HS_52,
1806 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT, 1806 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1807 }, 1807 },
1808 { 1808 {
1809 .mode = MMC_HS, 1809 .mode = MMC_HS,
1810 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT, 1810 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1811 }, 1811 },
1812 { 1812 {
1813 .mode = MMC_LEGACY, 1813 .mode = MMC_LEGACY,
1814 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT, 1814 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1815 } 1815 }
1816 }; 1816 };
1817 1817
1818 #define for_each_mmc_mode_by_pref(caps, mwt) \ 1818 #define for_each_mmc_mode_by_pref(caps, mwt) \
1819 for (mwt = mmc_modes_by_pref;\ 1819 for (mwt = mmc_modes_by_pref;\
1820 mwt < mmc_modes_by_pref + ARRAY_SIZE(mmc_modes_by_pref);\ 1820 mwt < mmc_modes_by_pref + ARRAY_SIZE(mmc_modes_by_pref);\
1821 mwt++) \ 1821 mwt++) \
1822 if (caps & MMC_CAP(mwt->mode)) 1822 if (caps & MMC_CAP(mwt->mode))
1823 1823
1824 static const struct ext_csd_bus_width { 1824 static const struct ext_csd_bus_width {
1825 uint cap; 1825 uint cap;
1826 bool is_ddr; 1826 bool is_ddr;
1827 uint ext_csd_bits; 1827 uint ext_csd_bits;
1828 } ext_csd_bus_width[] = { 1828 } ext_csd_bus_width[] = {
1829 {MMC_MODE_8BIT, true, EXT_CSD_DDR_BUS_WIDTH_8}, 1829 {MMC_MODE_8BIT, true, EXT_CSD_DDR_BUS_WIDTH_8},
1830 {MMC_MODE_4BIT, true, EXT_CSD_DDR_BUS_WIDTH_4}, 1830 {MMC_MODE_4BIT, true, EXT_CSD_DDR_BUS_WIDTH_4},
1831 {MMC_MODE_8BIT, false, EXT_CSD_BUS_WIDTH_8}, 1831 {MMC_MODE_8BIT, false, EXT_CSD_BUS_WIDTH_8},
1832 {MMC_MODE_4BIT, false, EXT_CSD_BUS_WIDTH_4}, 1832 {MMC_MODE_4BIT, false, EXT_CSD_BUS_WIDTH_4},
1833 {MMC_MODE_1BIT, false, EXT_CSD_BUS_WIDTH_1}, 1833 {MMC_MODE_1BIT, false, EXT_CSD_BUS_WIDTH_1},
1834 }; 1834 };
1835 1835
1836 #define for_each_supported_width(caps, ddr, ecbv) \ 1836 #define for_each_supported_width(caps, ddr, ecbv) \
1837 for (ecbv = ext_csd_bus_width;\ 1837 for (ecbv = ext_csd_bus_width;\
1838 ecbv < ext_csd_bus_width + ARRAY_SIZE(ext_csd_bus_width);\ 1838 ecbv < ext_csd_bus_width + ARRAY_SIZE(ext_csd_bus_width);\
1839 ecbv++) \ 1839 ecbv++) \
1840 if ((ddr == ecbv->is_ddr) && (caps & ecbv->cap)) 1840 if ((ddr == ecbv->is_ddr) && (caps & ecbv->cap))
1841 1841
1842 static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps) 1842 static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps)
1843 { 1843 {
1844 int err; 1844 int err;
1845 const struct mode_width_tuning *mwt; 1845 const struct mode_width_tuning *mwt;
1846 const struct ext_csd_bus_width *ecbw; 1846 const struct ext_csd_bus_width *ecbw;
1847 1847
1848 #ifdef DEBUG 1848 #ifdef DEBUG
1849 mmc_dump_capabilities("mmc", card_caps); 1849 mmc_dump_capabilities("mmc", card_caps);
1850 mmc_dump_capabilities("host", mmc->host_caps); 1850 mmc_dump_capabilities("host", mmc->host_caps);
1851 #endif 1851 #endif
1852 1852
1853 /* Restrict card's capabilities by what the host can do */ 1853 /* Restrict card's capabilities by what the host can do */
1854 card_caps &= mmc->host_caps; 1854 card_caps &= mmc->host_caps;
1855 1855
1856 /* Only version 4 of MMC supports wider bus widths */ 1856 /* Only version 4 of MMC supports wider bus widths */
1857 if (mmc->version < MMC_VERSION_4) 1857 if (mmc->version < MMC_VERSION_4)
1858 return 0; 1858 return 0;
1859 1859
1860 if (!mmc->ext_csd) { 1860 if (!mmc->ext_csd) {
1861 debug("No ext_csd found!\n"); /* this should enver happen */ 1861 debug("No ext_csd found!\n"); /* this should enver happen */
1862 return -ENOTSUPP; 1862 return -ENOTSUPP;
1863 } 1863 }
1864 1864
1865 mmc_set_clock(mmc, mmc->legacy_speed, false); 1865 mmc_set_clock(mmc, mmc->legacy_speed, false);
1866 1866
1867 for_each_mmc_mode_by_pref(card_caps, mwt) { 1867 for_each_mmc_mode_by_pref(card_caps, mwt) {
1868 for_each_supported_width(card_caps & mwt->widths, 1868 for_each_supported_width(card_caps & mwt->widths,
1869 mmc_is_mode_ddr(mwt->mode), ecbw) { 1869 mmc_is_mode_ddr(mwt->mode), ecbw) {
1870 enum mmc_voltage old_voltage; 1870 enum mmc_voltage old_voltage;
1871 debug("trying mode %s width %d (at %d MHz)\n", 1871 debug("trying mode %s width %d (at %d MHz)\n",
1872 mmc_mode_name(mwt->mode), 1872 mmc_mode_name(mwt->mode),
1873 bus_width(ecbw->cap), 1873 bus_width(ecbw->cap),
1874 mmc_mode2freq(mmc, mwt->mode) / 1000000); 1874 mmc_mode2freq(mmc, mwt->mode) / 1000000);
1875 old_voltage = mmc->signal_voltage; 1875 old_voltage = mmc->signal_voltage;
1876 err = mmc_set_lowest_voltage(mmc, mwt->mode, 1876 err = mmc_set_lowest_voltage(mmc, mwt->mode,
1877 MMC_ALL_SIGNAL_VOLTAGE); 1877 MMC_ALL_SIGNAL_VOLTAGE);
1878 if (err) 1878 if (err)
1879 continue; 1879 continue;
1880 1880
1881 /* configure the bus width (card + host) */ 1881 /* configure the bus width (card + host) */
1882 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 1882 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1883 EXT_CSD_BUS_WIDTH, 1883 EXT_CSD_BUS_WIDTH,
1884 ecbw->ext_csd_bits & ~EXT_CSD_DDR_FLAG); 1884 ecbw->ext_csd_bits & ~EXT_CSD_DDR_FLAG);
1885 if (err) 1885 if (err)
1886 goto error; 1886 goto error;
1887 mmc_set_bus_width(mmc, bus_width(ecbw->cap)); 1887 mmc_set_bus_width(mmc, bus_width(ecbw->cap));
1888 1888
1889 /* configure the bus speed (card) */ 1889 /* configure the bus speed (card) */
1890 err = mmc_set_card_speed(mmc, mwt->mode); 1890 err = mmc_set_card_speed(mmc, mwt->mode);
1891 if (err) 1891 if (err)
1892 goto error; 1892 goto error;
1893 1893
1894 /* 1894 /*
1895 * configure the bus width AND the ddr mode (card) 1895 * configure the bus width AND the ddr mode (card)
1896 * The host side will be taken care of in the next step 1896 * The host side will be taken care of in the next step
1897 */ 1897 */
1898 if (ecbw->ext_csd_bits & EXT_CSD_DDR_FLAG) { 1898 if (ecbw->ext_csd_bits & EXT_CSD_DDR_FLAG) {
1899 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 1899 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1900 EXT_CSD_BUS_WIDTH, 1900 EXT_CSD_BUS_WIDTH,
1901 ecbw->ext_csd_bits); 1901 ecbw->ext_csd_bits);
1902 if (err) 1902 if (err)
1903 goto error; 1903 goto error;
1904 } 1904 }
1905 1905
1906 /* configure the bus mode (host) */ 1906 /* configure the bus mode (host) */
1907 mmc_select_mode(mmc, mwt->mode); 1907 mmc_select_mode(mmc, mwt->mode);
1908 mmc_set_clock(mmc, mmc->tran_speed, false); 1908 mmc_set_clock(mmc, mmc->tran_speed, false);
1909 #ifdef MMC_SUPPORTS_TUNING 1909 #ifdef MMC_SUPPORTS_TUNING
1910 1910
1911 /* execute tuning if needed */ 1911 /* execute tuning if needed */
1912 if (mwt->tuning) { 1912 if (mwt->tuning) {
1913 err = mmc_execute_tuning(mmc, mwt->tuning); 1913 err = mmc_execute_tuning(mmc, mwt->tuning);
1914 if (err) { 1914 if (err) {
1915 debug("tuning failed\n"); 1915 debug("tuning failed\n");
1916 goto error; 1916 goto error;
1917 } 1917 }
1918 } 1918 }
1919 #endif 1919 #endif
1920 1920
1921 /* do a transfer to check the configuration */ 1921 /* do a transfer to check the configuration */
1922 err = mmc_read_and_compare_ext_csd(mmc); 1922 err = mmc_read_and_compare_ext_csd(mmc);
1923 if (!err) 1923 if (!err)
1924 return 0; 1924 return 0;
1925 error: 1925 error:
1926 mmc_set_signal_voltage(mmc, old_voltage); 1926 mmc_set_signal_voltage(mmc, old_voltage);
1927 /* if an error occured, revert to a safer bus mode */ 1927 /* if an error occured, revert to a safer bus mode */
1928 mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 1928 mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1929 EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_1); 1929 EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_1);
1930 mmc_select_mode(mmc, MMC_LEGACY); 1930 mmc_select_mode(mmc, MMC_LEGACY);
1931 mmc_set_bus_width(mmc, 1); 1931 mmc_set_bus_width(mmc, 1);
1932 } 1932 }
1933 } 1933 }
1934 1934
1935 pr_err("unable to select a mode\n"); 1935 pr_err("unable to select a mode\n");
1936 1936
1937 return -ENOTSUPP; 1937 return -ENOTSUPP;
1938 } 1938 }
1939 1939
1940 static int mmc_startup_v4(struct mmc *mmc) 1940 static int mmc_startup_v4(struct mmc *mmc)
1941 { 1941 {
1942 int err, i; 1942 int err, i;
1943 u64 capacity; 1943 u64 capacity;
1944 bool has_parts = false; 1944 bool has_parts = false;
1945 bool part_completed; 1945 bool part_completed;
1946 static const u32 mmc_versions[] = { 1946 static const u32 mmc_versions[] = {
1947 MMC_VERSION_4, 1947 MMC_VERSION_4,
1948 MMC_VERSION_4_1, 1948 MMC_VERSION_4_1,
1949 MMC_VERSION_4_2, 1949 MMC_VERSION_4_2,
1950 MMC_VERSION_4_3, 1950 MMC_VERSION_4_3,
1951 MMC_VERSION_4_41, 1951 MMC_VERSION_4_41,
1952 MMC_VERSION_4_5, 1952 MMC_VERSION_4_5,
1953 MMC_VERSION_5_0, 1953 MMC_VERSION_5_0,
1954 MMC_VERSION_5_1 1954 MMC_VERSION_5_1
1955 }; 1955 };
1956 1956
1957 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); 1957 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1958 1958
1959 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4)) 1959 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4))
1960 return 0; 1960 return 0;
1961 1961
1962 /* check ext_csd version and capacity */ 1962 /* check ext_csd version and capacity */
1963 err = mmc_send_ext_csd(mmc, ext_csd); 1963 err = mmc_send_ext_csd(mmc, ext_csd);
1964 if (err) 1964 if (err)
1965 goto error; 1965 goto error;
1966 1966
1967 /* store the ext csd for future reference */ 1967 /* store the ext csd for future reference */
1968 if (!mmc->ext_csd) 1968 if (!mmc->ext_csd)
1969 mmc->ext_csd = malloc(MMC_MAX_BLOCK_LEN); 1969 mmc->ext_csd = malloc(MMC_MAX_BLOCK_LEN);
1970 if (!mmc->ext_csd) 1970 if (!mmc->ext_csd)
1971 return -ENOMEM; 1971 return -ENOMEM;
1972 memcpy(mmc->ext_csd, ext_csd, MMC_MAX_BLOCK_LEN); 1972 memcpy(mmc->ext_csd, ext_csd, MMC_MAX_BLOCK_LEN);
1973 1973
1974 if (ext_csd[EXT_CSD_REV] > ARRAY_SIZE(mmc_versions)) 1974 if (ext_csd[EXT_CSD_REV] > ARRAY_SIZE(mmc_versions))
1975 return -EINVAL; 1975 return -EINVAL;
1976 1976
1977 mmc->version = mmc_versions[ext_csd[EXT_CSD_REV]]; 1977 mmc->version = mmc_versions[ext_csd[EXT_CSD_REV]];
1978 1978
1979 if (mmc->version >= MMC_VERSION_4_2) { 1979 if (mmc->version >= MMC_VERSION_4_2) {
1980 /* 1980 /*
1981 * According to the JEDEC Standard, the value of 1981 * According to the JEDEC Standard, the value of
1982 * ext_csd's capacity is valid if the value is more 1982 * ext_csd's capacity is valid if the value is more
1983 * than 2GB 1983 * than 2GB
1984 */ 1984 */
1985 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0 1985 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1986 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8 1986 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1987 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16 1987 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1988 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24; 1988 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
1989 capacity *= MMC_MAX_BLOCK_LEN; 1989 capacity *= MMC_MAX_BLOCK_LEN;
1990 if ((capacity >> 20) > 2 * 1024) 1990 if ((capacity >> 20) > 2 * 1024)
1991 mmc->capacity_user = capacity; 1991 mmc->capacity_user = capacity;
1992 } 1992 }
1993 1993
1994 /* The partition data may be non-zero but it is only 1994 /* The partition data may be non-zero but it is only
1995 * effective if PARTITION_SETTING_COMPLETED is set in 1995 * effective if PARTITION_SETTING_COMPLETED is set in
1996 * EXT_CSD, so ignore any data if this bit is not set, 1996 * EXT_CSD, so ignore any data if this bit is not set,
1997 * except for enabling the high-capacity group size 1997 * except for enabling the high-capacity group size
1998 * definition (see below). 1998 * definition (see below).
1999 */ 1999 */
2000 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] & 2000 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
2001 EXT_CSD_PARTITION_SETTING_COMPLETED); 2001 EXT_CSD_PARTITION_SETTING_COMPLETED);
2002 2002
2003 /* store the partition info of emmc */ 2003 /* store the partition info of emmc */
2004 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT]; 2004 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
2005 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) || 2005 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
2006 ext_csd[EXT_CSD_BOOT_MULT]) 2006 ext_csd[EXT_CSD_BOOT_MULT])
2007 mmc->part_config = ext_csd[EXT_CSD_PART_CONF]; 2007 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
2008 if (part_completed && 2008 if (part_completed &&
2009 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT)) 2009 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
2010 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE]; 2010 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
2011 2011
2012 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17; 2012 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
2013 2013
2014 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17; 2014 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
2015 2015
2016 for (i = 0; i < 4; i++) { 2016 for (i = 0; i < 4; i++) {
2017 int idx = EXT_CSD_GP_SIZE_MULT + i * 3; 2017 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
2018 uint mult = (ext_csd[idx + 2] << 16) + 2018 uint mult = (ext_csd[idx + 2] << 16) +
2019 (ext_csd[idx + 1] << 8) + ext_csd[idx]; 2019 (ext_csd[idx + 1] << 8) + ext_csd[idx];
2020 if (mult) 2020 if (mult)
2021 has_parts = true; 2021 has_parts = true;
2022 if (!part_completed) 2022 if (!part_completed)
2023 continue; 2023 continue;
2024 mmc->capacity_gp[i] = mult; 2024 mmc->capacity_gp[i] = mult;
2025 mmc->capacity_gp[i] *= 2025 mmc->capacity_gp[i] *=
2026 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; 2026 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
2027 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 2027 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2028 mmc->capacity_gp[i] <<= 19; 2028 mmc->capacity_gp[i] <<= 19;
2029 } 2029 }
2030 2030
2031 #ifndef CONFIG_SPL_BUILD 2031 #ifndef CONFIG_SPL_BUILD
2032 if (part_completed) { 2032 if (part_completed) {
2033 mmc->enh_user_size = 2033 mmc->enh_user_size =
2034 (ext_csd[EXT_CSD_ENH_SIZE_MULT + 2] << 16) + 2034 (ext_csd[EXT_CSD_ENH_SIZE_MULT + 2] << 16) +
2035 (ext_csd[EXT_CSD_ENH_SIZE_MULT + 1] << 8) + 2035 (ext_csd[EXT_CSD_ENH_SIZE_MULT + 1] << 8) +
2036 ext_csd[EXT_CSD_ENH_SIZE_MULT]; 2036 ext_csd[EXT_CSD_ENH_SIZE_MULT];
2037 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; 2037 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
2038 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 2038 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2039 mmc->enh_user_size <<= 19; 2039 mmc->enh_user_size <<= 19;
2040 mmc->enh_user_start = 2040 mmc->enh_user_start =
2041 (ext_csd[EXT_CSD_ENH_START_ADDR + 3] << 24) + 2041 (ext_csd[EXT_CSD_ENH_START_ADDR + 3] << 24) +
2042 (ext_csd[EXT_CSD_ENH_START_ADDR + 2] << 16) + 2042 (ext_csd[EXT_CSD_ENH_START_ADDR + 2] << 16) +
2043 (ext_csd[EXT_CSD_ENH_START_ADDR + 1] << 8) + 2043 (ext_csd[EXT_CSD_ENH_START_ADDR + 1] << 8) +
2044 ext_csd[EXT_CSD_ENH_START_ADDR]; 2044 ext_csd[EXT_CSD_ENH_START_ADDR];
2045 if (mmc->high_capacity) 2045 if (mmc->high_capacity)
2046 mmc->enh_user_start <<= 9; 2046 mmc->enh_user_start <<= 9;
2047 } 2047 }
2048 #endif 2048 #endif
2049 2049
2050 /* 2050 /*
2051 * Host needs to enable ERASE_GRP_DEF bit if device is 2051 * Host needs to enable ERASE_GRP_DEF bit if device is
2052 * partitioned. This bit will be lost every time after a reset 2052 * partitioned. This bit will be lost every time after a reset
2053 * or power off. This will affect erase size. 2053 * or power off. This will affect erase size.
2054 */ 2054 */
2055 if (part_completed) 2055 if (part_completed)
2056 has_parts = true; 2056 has_parts = true;
2057 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) && 2057 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
2058 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB)) 2058 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
2059 has_parts = true; 2059 has_parts = true;
2060 if (has_parts) { 2060 if (has_parts) {
2061 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 2061 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
2062 EXT_CSD_ERASE_GROUP_DEF, 1); 2062 EXT_CSD_ERASE_GROUP_DEF, 1);
2063 2063
2064 if (err) 2064 if (err)
2065 goto error; 2065 goto error;
2066 2066
2067 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1; 2067 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
2068 } 2068 }
2069 2069
2070 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) { 2070 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
2071 #if CONFIG_IS_ENABLED(MMC_WRITE) 2071 #if CONFIG_IS_ENABLED(MMC_WRITE)
2072 /* Read out group size from ext_csd */ 2072 /* Read out group size from ext_csd */
2073 mmc->erase_grp_size = 2073 mmc->erase_grp_size =
2074 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024; 2074 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
2075 #endif 2075 #endif
2076 /* 2076 /*
2077 * if high capacity and partition setting completed 2077 * if high capacity and partition setting completed
2078 * SEC_COUNT is valid even if it is smaller than 2 GiB 2078 * SEC_COUNT is valid even if it is smaller than 2 GiB
2079 * JEDEC Standard JESD84-B45, 6.2.4 2079 * JEDEC Standard JESD84-B45, 6.2.4
2080 */ 2080 */
2081 if (mmc->high_capacity && part_completed) { 2081 if (mmc->high_capacity && part_completed) {
2082 capacity = (ext_csd[EXT_CSD_SEC_CNT]) | 2082 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
2083 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) | 2083 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
2084 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) | 2084 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
2085 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24); 2085 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
2086 capacity *= MMC_MAX_BLOCK_LEN; 2086 capacity *= MMC_MAX_BLOCK_LEN;
2087 mmc->capacity_user = capacity; 2087 mmc->capacity_user = capacity;
2088 } 2088 }
2089 } 2089 }
2090 #if CONFIG_IS_ENABLED(MMC_WRITE) 2090 #if CONFIG_IS_ENABLED(MMC_WRITE)
2091 else { 2091 else {
2092 /* Calculate the group size from the csd value. */ 2092 /* Calculate the group size from the csd value. */
2093 int erase_gsz, erase_gmul; 2093 int erase_gsz, erase_gmul;
2094 2094
2095 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10; 2095 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
2096 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5; 2096 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
2097 mmc->erase_grp_size = (erase_gsz + 1) 2097 mmc->erase_grp_size = (erase_gsz + 1)
2098 * (erase_gmul + 1); 2098 * (erase_gmul + 1);
2099 } 2099 }
2100 #endif 2100 #endif
2101 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
2101 mmc->hc_wp_grp_size = 1024 2102 mmc->hc_wp_grp_size = 1024
2102 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] 2103 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
2103 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 2104 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2105 #endif
2104 2106
2105 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET]; 2107 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
2106 2108
2107 return 0; 2109 return 0;
2108 error: 2110 error:
2109 if (mmc->ext_csd) { 2111 if (mmc->ext_csd) {
2110 free(mmc->ext_csd); 2112 free(mmc->ext_csd);
2111 mmc->ext_csd = NULL; 2113 mmc->ext_csd = NULL;
2112 } 2114 }
2113 return err; 2115 return err;
2114 } 2116 }
2115 2117
2116 static int mmc_startup(struct mmc *mmc) 2118 static int mmc_startup(struct mmc *mmc)
2117 { 2119 {
2118 int err, i; 2120 int err, i;
2119 uint mult, freq; 2121 uint mult, freq;
2120 u64 cmult, csize; 2122 u64 cmult, csize;
2121 struct mmc_cmd cmd; 2123 struct mmc_cmd cmd;
2122 struct blk_desc *bdesc; 2124 struct blk_desc *bdesc;
2123 2125
2124 #ifdef CONFIG_MMC_SPI_CRC_ON 2126 #ifdef CONFIG_MMC_SPI_CRC_ON
2125 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */ 2127 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
2126 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF; 2128 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
2127 cmd.resp_type = MMC_RSP_R1; 2129 cmd.resp_type = MMC_RSP_R1;
2128 cmd.cmdarg = 1; 2130 cmd.cmdarg = 1;
2129 err = mmc_send_cmd(mmc, &cmd, NULL); 2131 err = mmc_send_cmd(mmc, &cmd, NULL);
2130 if (err) 2132 if (err)
2131 return err; 2133 return err;
2132 } 2134 }
2133 #endif 2135 #endif
2134 2136
2135 /* Put the Card in Identify Mode */ 2137 /* Put the Card in Identify Mode */
2136 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID : 2138 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
2137 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */ 2139 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
2138 cmd.resp_type = MMC_RSP_R2; 2140 cmd.resp_type = MMC_RSP_R2;
2139 cmd.cmdarg = 0; 2141 cmd.cmdarg = 0;
2140 2142
2141 err = mmc_send_cmd(mmc, &cmd, NULL); 2143 err = mmc_send_cmd(mmc, &cmd, NULL);
2142 2144
2143 #ifdef CONFIG_MMC_QUIRKS 2145 #ifdef CONFIG_MMC_QUIRKS
2144 if (err && (mmc->quirks & MMC_QUIRK_RETRY_SEND_CID)) { 2146 if (err && (mmc->quirks & MMC_QUIRK_RETRY_SEND_CID)) {
2145 int retries = 4; 2147 int retries = 4;
2146 /* 2148 /*
2147 * It has been seen that SEND_CID may fail on the first 2149 * It has been seen that SEND_CID may fail on the first
2148 * attempt, let's try a few more time 2150 * attempt, let's try a few more time
2149 */ 2151 */
2150 do { 2152 do {
2151 err = mmc_send_cmd(mmc, &cmd, NULL); 2153 err = mmc_send_cmd(mmc, &cmd, NULL);
2152 if (!err) 2154 if (!err)
2153 break; 2155 break;
2154 } while (retries--); 2156 } while (retries--);
2155 } 2157 }
2156 #endif 2158 #endif
2157 2159
2158 if (err) 2160 if (err)
2159 return err; 2161 return err;
2160 2162
2161 memcpy(mmc->cid, cmd.response, 16); 2163 memcpy(mmc->cid, cmd.response, 16);
2162 2164
2163 /* 2165 /*
2164 * For MMC cards, set the Relative Address. 2166 * For MMC cards, set the Relative Address.
2165 * For SD cards, get the Relatvie Address. 2167 * For SD cards, get the Relatvie Address.
2166 * This also puts the cards into Standby State 2168 * This also puts the cards into Standby State
2167 */ 2169 */
2168 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ 2170 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
2169 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR; 2171 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
2170 cmd.cmdarg = mmc->rca << 16; 2172 cmd.cmdarg = mmc->rca << 16;
2171 cmd.resp_type = MMC_RSP_R6; 2173 cmd.resp_type = MMC_RSP_R6;
2172 2174
2173 err = mmc_send_cmd(mmc, &cmd, NULL); 2175 err = mmc_send_cmd(mmc, &cmd, NULL);
2174 2176
2175 if (err) 2177 if (err)
2176 return err; 2178 return err;
2177 2179
2178 if (IS_SD(mmc)) 2180 if (IS_SD(mmc))
2179 mmc->rca = (cmd.response[0] >> 16) & 0xffff; 2181 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
2180 } 2182 }
2181 2183
2182 /* Get the Card-Specific Data */ 2184 /* Get the Card-Specific Data */
2183 cmd.cmdidx = MMC_CMD_SEND_CSD; 2185 cmd.cmdidx = MMC_CMD_SEND_CSD;
2184 cmd.resp_type = MMC_RSP_R2; 2186 cmd.resp_type = MMC_RSP_R2;
2185 cmd.cmdarg = mmc->rca << 16; 2187 cmd.cmdarg = mmc->rca << 16;
2186 2188
2187 err = mmc_send_cmd(mmc, &cmd, NULL); 2189 err = mmc_send_cmd(mmc, &cmd, NULL);
2188 2190
2189 if (err) 2191 if (err)
2190 return err; 2192 return err;
2191 2193
2192 mmc->csd[0] = cmd.response[0]; 2194 mmc->csd[0] = cmd.response[0];
2193 mmc->csd[1] = cmd.response[1]; 2195 mmc->csd[1] = cmd.response[1];
2194 mmc->csd[2] = cmd.response[2]; 2196 mmc->csd[2] = cmd.response[2];
2195 mmc->csd[3] = cmd.response[3]; 2197 mmc->csd[3] = cmd.response[3];
2196 2198
2197 if (mmc->version == MMC_VERSION_UNKNOWN) { 2199 if (mmc->version == MMC_VERSION_UNKNOWN) {
2198 int version = (cmd.response[0] >> 26) & 0xf; 2200 int version = (cmd.response[0] >> 26) & 0xf;
2199 2201
2200 switch (version) { 2202 switch (version) {
2201 case 0: 2203 case 0:
2202 mmc->version = MMC_VERSION_1_2; 2204 mmc->version = MMC_VERSION_1_2;
2203 break; 2205 break;
2204 case 1: 2206 case 1:
2205 mmc->version = MMC_VERSION_1_4; 2207 mmc->version = MMC_VERSION_1_4;
2206 break; 2208 break;
2207 case 2: 2209 case 2:
2208 mmc->version = MMC_VERSION_2_2; 2210 mmc->version = MMC_VERSION_2_2;
2209 break; 2211 break;
2210 case 3: 2212 case 3:
2211 mmc->version = MMC_VERSION_3; 2213 mmc->version = MMC_VERSION_3;
2212 break; 2214 break;
2213 case 4: 2215 case 4:
2214 mmc->version = MMC_VERSION_4; 2216 mmc->version = MMC_VERSION_4;
2215 break; 2217 break;
2216 default: 2218 default:
2217 mmc->version = MMC_VERSION_1_2; 2219 mmc->version = MMC_VERSION_1_2;
2218 break; 2220 break;
2219 } 2221 }
2220 } 2222 }
2221 2223
2222 /* divide frequency by 10, since the mults are 10x bigger */ 2224 /* divide frequency by 10, since the mults are 10x bigger */
2223 freq = fbase[(cmd.response[0] & 0x7)]; 2225 freq = fbase[(cmd.response[0] & 0x7)];
2224 mult = multipliers[((cmd.response[0] >> 3) & 0xf)]; 2226 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
2225 2227
2226 mmc->legacy_speed = freq * mult; 2228 mmc->legacy_speed = freq * mult;
2227 mmc_select_mode(mmc, MMC_LEGACY); 2229 mmc_select_mode(mmc, MMC_LEGACY);
2228 2230
2229 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1); 2231 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
2230 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf); 2232 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
2231 #if CONFIG_IS_ENABLED(MMC_WRITE) 2233 #if CONFIG_IS_ENABLED(MMC_WRITE)
2232 2234
2233 if (IS_SD(mmc)) 2235 if (IS_SD(mmc))
2234 mmc->write_bl_len = mmc->read_bl_len; 2236 mmc->write_bl_len = mmc->read_bl_len;
2235 else 2237 else
2236 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf); 2238 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
2237 #endif 2239 #endif
2238 2240
2239 if (mmc->high_capacity) { 2241 if (mmc->high_capacity) {
2240 csize = (mmc->csd[1] & 0x3f) << 16 2242 csize = (mmc->csd[1] & 0x3f) << 16
2241 | (mmc->csd[2] & 0xffff0000) >> 16; 2243 | (mmc->csd[2] & 0xffff0000) >> 16;
2242 cmult = 8; 2244 cmult = 8;
2243 } else { 2245 } else {
2244 csize = (mmc->csd[1] & 0x3ff) << 2 2246 csize = (mmc->csd[1] & 0x3ff) << 2
2245 | (mmc->csd[2] & 0xc0000000) >> 30; 2247 | (mmc->csd[2] & 0xc0000000) >> 30;
2246 cmult = (mmc->csd[2] & 0x00038000) >> 15; 2248 cmult = (mmc->csd[2] & 0x00038000) >> 15;
2247 } 2249 }
2248 2250
2249 mmc->capacity_user = (csize + 1) << (cmult + 2); 2251 mmc->capacity_user = (csize + 1) << (cmult + 2);
2250 mmc->capacity_user *= mmc->read_bl_len; 2252 mmc->capacity_user *= mmc->read_bl_len;
2251 mmc->capacity_boot = 0; 2253 mmc->capacity_boot = 0;
2252 mmc->capacity_rpmb = 0; 2254 mmc->capacity_rpmb = 0;
2253 for (i = 0; i < 4; i++) 2255 for (i = 0; i < 4; i++)
2254 mmc->capacity_gp[i] = 0; 2256 mmc->capacity_gp[i] = 0;
2255 2257
2256 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN) 2258 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
2257 mmc->read_bl_len = MMC_MAX_BLOCK_LEN; 2259 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
2258 2260
2259 #if CONFIG_IS_ENABLED(MMC_WRITE) 2261 #if CONFIG_IS_ENABLED(MMC_WRITE)
2260 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN) 2262 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
2261 mmc->write_bl_len = MMC_MAX_BLOCK_LEN; 2263 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
2262 #endif 2264 #endif
2263 2265
2264 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) { 2266 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
2265 cmd.cmdidx = MMC_CMD_SET_DSR; 2267 cmd.cmdidx = MMC_CMD_SET_DSR;
2266 cmd.cmdarg = (mmc->dsr & 0xffff) << 16; 2268 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
2267 cmd.resp_type = MMC_RSP_NONE; 2269 cmd.resp_type = MMC_RSP_NONE;
2268 if (mmc_send_cmd(mmc, &cmd, NULL)) 2270 if (mmc_send_cmd(mmc, &cmd, NULL))
2269 pr_warn("MMC: SET_DSR failed\n"); 2271 pr_warn("MMC: SET_DSR failed\n");
2270 } 2272 }
2271 2273
2272 /* Select the card, and put it into Transfer Mode */ 2274 /* Select the card, and put it into Transfer Mode */
2273 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ 2275 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
2274 cmd.cmdidx = MMC_CMD_SELECT_CARD; 2276 cmd.cmdidx = MMC_CMD_SELECT_CARD;
2275 cmd.resp_type = MMC_RSP_R1; 2277 cmd.resp_type = MMC_RSP_R1;
2276 cmd.cmdarg = mmc->rca << 16; 2278 cmd.cmdarg = mmc->rca << 16;
2277 err = mmc_send_cmd(mmc, &cmd, NULL); 2279 err = mmc_send_cmd(mmc, &cmd, NULL);
2278 2280
2279 if (err) 2281 if (err)
2280 return err; 2282 return err;
2281 } 2283 }
2282 2284
2283 /* 2285 /*
2284 * For SD, its erase group is always one sector 2286 * For SD, its erase group is always one sector
2285 */ 2287 */
2286 #if CONFIG_IS_ENABLED(MMC_WRITE) 2288 #if CONFIG_IS_ENABLED(MMC_WRITE)
2287 mmc->erase_grp_size = 1; 2289 mmc->erase_grp_size = 1;
2288 #endif 2290 #endif
2289 mmc->part_config = MMCPART_NOAVAILABLE; 2291 mmc->part_config = MMCPART_NOAVAILABLE;
2290 2292
2291 err = mmc_startup_v4(mmc); 2293 err = mmc_startup_v4(mmc);
2292 if (err) 2294 if (err)
2293 return err; 2295 return err;
2294 2296
2295 err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart); 2297 err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart);
2296 if (err) 2298 if (err)
2297 return err; 2299 return err;
2298 2300
2299 if (IS_SD(mmc)) { 2301 if (IS_SD(mmc)) {
2300 err = sd_get_capabilities(mmc); 2302 err = sd_get_capabilities(mmc);
2301 if (err) 2303 if (err)
2302 return err; 2304 return err;
2303 err = sd_select_mode_and_width(mmc, mmc->card_caps); 2305 err = sd_select_mode_and_width(mmc, mmc->card_caps);
2304 } else { 2306 } else {
2305 err = mmc_get_capabilities(mmc); 2307 err = mmc_get_capabilities(mmc);
2306 if (err) 2308 if (err)
2307 return err; 2309 return err;
2308 mmc_select_mode_and_width(mmc, mmc->card_caps); 2310 mmc_select_mode_and_width(mmc, mmc->card_caps);
2309 } 2311 }
2310 2312
2311 if (err) 2313 if (err)
2312 return err; 2314 return err;
2313 2315
2314 mmc->best_mode = mmc->selected_mode; 2316 mmc->best_mode = mmc->selected_mode;
2315 2317
2316 /* Fix the block length for DDR mode */ 2318 /* Fix the block length for DDR mode */
2317 if (mmc->ddr_mode) { 2319 if (mmc->ddr_mode) {
2318 mmc->read_bl_len = MMC_MAX_BLOCK_LEN; 2320 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
2319 #if CONFIG_IS_ENABLED(MMC_WRITE) 2321 #if CONFIG_IS_ENABLED(MMC_WRITE)
2320 mmc->write_bl_len = MMC_MAX_BLOCK_LEN; 2322 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
2321 #endif 2323 #endif
2322 } 2324 }
2323 2325
2324 /* fill in device description */ 2326 /* fill in device description */
2325 bdesc = mmc_get_blk_desc(mmc); 2327 bdesc = mmc_get_blk_desc(mmc);
2326 bdesc->lun = 0; 2328 bdesc->lun = 0;
2327 bdesc->hwpart = 0; 2329 bdesc->hwpart = 0;
2328 bdesc->type = 0; 2330 bdesc->type = 0;
2329 bdesc->blksz = mmc->read_bl_len; 2331 bdesc->blksz = mmc->read_bl_len;
2330 bdesc->log2blksz = LOG2(bdesc->blksz); 2332 bdesc->log2blksz = LOG2(bdesc->blksz);
2331 bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len); 2333 bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len);
2332 #if !defined(CONFIG_SPL_BUILD) || \ 2334 #if !defined(CONFIG_SPL_BUILD) || \
2333 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \ 2335 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
2334 !defined(CONFIG_USE_TINY_PRINTF)) 2336 !defined(CONFIG_USE_TINY_PRINTF))
2335 sprintf(bdesc->vendor, "Man %06x Snr %04x%04x", 2337 sprintf(bdesc->vendor, "Man %06x Snr %04x%04x",
2336 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff), 2338 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
2337 (mmc->cid[3] >> 16) & 0xffff); 2339 (mmc->cid[3] >> 16) & 0xffff);
2338 sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff, 2340 sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
2339 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, 2341 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
2340 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff, 2342 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
2341 (mmc->cid[2] >> 24) & 0xff); 2343 (mmc->cid[2] >> 24) & 0xff);
2342 sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf, 2344 sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
2343 (mmc->cid[2] >> 16) & 0xf); 2345 (mmc->cid[2] >> 16) & 0xf);
2344 #else 2346 #else
2345 bdesc->vendor[0] = 0; 2347 bdesc->vendor[0] = 0;
2346 bdesc->product[0] = 0; 2348 bdesc->product[0] = 0;
2347 bdesc->revision[0] = 0; 2349 bdesc->revision[0] = 0;
2348 #endif 2350 #endif
2349 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT) 2351 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
2350 part_init(bdesc); 2352 part_init(bdesc);
2351 #endif 2353 #endif
2352 2354
2353 return 0; 2355 return 0;
2354 } 2356 }
2355 2357
2356 static int mmc_send_if_cond(struct mmc *mmc) 2358 static int mmc_send_if_cond(struct mmc *mmc)
2357 { 2359 {
2358 struct mmc_cmd cmd; 2360 struct mmc_cmd cmd;
2359 int err; 2361 int err;
2360 2362
2361 cmd.cmdidx = SD_CMD_SEND_IF_COND; 2363 cmd.cmdidx = SD_CMD_SEND_IF_COND;
2362 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */ 2364 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
2363 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa; 2365 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
2364 cmd.resp_type = MMC_RSP_R7; 2366 cmd.resp_type = MMC_RSP_R7;
2365 2367
2366 err = mmc_send_cmd(mmc, &cmd, NULL); 2368 err = mmc_send_cmd(mmc, &cmd, NULL);
2367 2369
2368 if (err) 2370 if (err)
2369 return err; 2371 return err;
2370 2372
2371 if ((cmd.response[0] & 0xff) != 0xaa) 2373 if ((cmd.response[0] & 0xff) != 0xaa)
2372 return -EOPNOTSUPP; 2374 return -EOPNOTSUPP;
2373 else 2375 else
2374 mmc->version = SD_VERSION_2; 2376 mmc->version = SD_VERSION_2;
2375 2377
2376 return 0; 2378 return 0;
2377 } 2379 }
2378 2380
2379 #if !CONFIG_IS_ENABLED(DM_MMC) 2381 #if !CONFIG_IS_ENABLED(DM_MMC)
2380 /* board-specific MMC power initializations. */ 2382 /* board-specific MMC power initializations. */
2381 __weak void board_mmc_power_init(void) 2383 __weak void board_mmc_power_init(void)
2382 { 2384 {
2383 } 2385 }
2384 #endif 2386 #endif
2385 2387
2386 static int mmc_power_init(struct mmc *mmc) 2388 static int mmc_power_init(struct mmc *mmc)
2387 { 2389 {
2388 #if CONFIG_IS_ENABLED(DM_MMC) 2390 #if CONFIG_IS_ENABLED(DM_MMC)
2389 #if CONFIG_IS_ENABLED(DM_REGULATOR) 2391 #if CONFIG_IS_ENABLED(DM_REGULATOR)
2390 int ret; 2392 int ret;
2391 2393
2392 ret = device_get_supply_regulator(mmc->dev, "vmmc-supply", 2394 ret = device_get_supply_regulator(mmc->dev, "vmmc-supply",
2393 &mmc->vmmc_supply); 2395 &mmc->vmmc_supply);
2394 if (ret) 2396 if (ret)
2395 debug("%s: No vmmc supply\n", mmc->dev->name); 2397 debug("%s: No vmmc supply\n", mmc->dev->name);
2396 2398
2397 ret = device_get_supply_regulator(mmc->dev, "vqmmc-supply", 2399 ret = device_get_supply_regulator(mmc->dev, "vqmmc-supply",
2398 &mmc->vqmmc_supply); 2400 &mmc->vqmmc_supply);
2399 if (ret) 2401 if (ret)
2400 debug("%s: No vqmmc supply\n", mmc->dev->name); 2402 debug("%s: No vqmmc supply\n", mmc->dev->name);
2401 #endif 2403 #endif
2402 #else /* !CONFIG_DM_MMC */ 2404 #else /* !CONFIG_DM_MMC */
2403 /* 2405 /*
2404 * Driver model should use a regulator, as above, rather than calling 2406 * Driver model should use a regulator, as above, rather than calling
2405 * out to board code. 2407 * out to board code.
2406 */ 2408 */
2407 board_mmc_power_init(); 2409 board_mmc_power_init();
2408 #endif 2410 #endif
2409 return 0; 2411 return 0;
2410 } 2412 }
2411 2413
2412 /* 2414 /*
2413 * put the host in the initial state: 2415 * put the host in the initial state:
2414 * - turn on Vdd (card power supply) 2416 * - turn on Vdd (card power supply)
2415 * - configure the bus width and clock to minimal values 2417 * - configure the bus width and clock to minimal values
2416 */ 2418 */
2417 static void mmc_set_initial_state(struct mmc *mmc) 2419 static void mmc_set_initial_state(struct mmc *mmc)
2418 { 2420 {
2419 int err; 2421 int err;
2420 2422
2421 /* First try to set 3.3V. If it fails set to 1.8V */ 2423 /* First try to set 3.3V. If it fails set to 1.8V */
2422 err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_330); 2424 err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_330);
2423 if (err != 0) 2425 if (err != 0)
2424 err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_180); 2426 err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_180);
2425 if (err != 0) 2427 if (err != 0)
2426 pr_warn("mmc: failed to set signal voltage\n"); 2428 pr_warn("mmc: failed to set signal voltage\n");
2427 2429
2428 mmc_select_mode(mmc, MMC_LEGACY); 2430 mmc_select_mode(mmc, MMC_LEGACY);
2429 mmc_set_bus_width(mmc, 1); 2431 mmc_set_bus_width(mmc, 1);
2430 mmc_set_clock(mmc, 0, false); 2432 mmc_set_clock(mmc, 0, false);
2431 } 2433 }
2432 2434
2433 static int mmc_power_on(struct mmc *mmc) 2435 static int mmc_power_on(struct mmc *mmc)
2434 { 2436 {
2435 #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR) 2437 #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
2436 if (mmc->vmmc_supply) { 2438 if (mmc->vmmc_supply) {
2437 int ret = regulator_set_enable(mmc->vmmc_supply, true); 2439 int ret = regulator_set_enable(mmc->vmmc_supply, true);
2438 2440
2439 if (ret) { 2441 if (ret) {
2440 puts("Error enabling VMMC supply\n"); 2442 puts("Error enabling VMMC supply\n");
2441 return ret; 2443 return ret;
2442 } 2444 }
2443 } 2445 }
2444 #endif 2446 #endif
2445 return 0; 2447 return 0;
2446 } 2448 }
2447 2449
2448 static int mmc_power_off(struct mmc *mmc) 2450 static int mmc_power_off(struct mmc *mmc)
2449 { 2451 {
2450 mmc_set_clock(mmc, 1, true); 2452 mmc_set_clock(mmc, 1, true);
2451 #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR) 2453 #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
2452 if (mmc->vmmc_supply) { 2454 if (mmc->vmmc_supply) {
2453 int ret = regulator_set_enable(mmc->vmmc_supply, false); 2455 int ret = regulator_set_enable(mmc->vmmc_supply, false);
2454 2456
2455 if (ret) { 2457 if (ret) {
2456 debug("Error disabling VMMC supply\n"); 2458 debug("Error disabling VMMC supply\n");
2457 return ret; 2459 return ret;
2458 } 2460 }
2459 } 2461 }
2460 #endif 2462 #endif
2461 return 0; 2463 return 0;
2462 } 2464 }
2463 2465
2464 static int mmc_power_cycle(struct mmc *mmc) 2466 static int mmc_power_cycle(struct mmc *mmc)
2465 { 2467 {
2466 int ret; 2468 int ret;
2467 2469
2468 ret = mmc_power_off(mmc); 2470 ret = mmc_power_off(mmc);
2469 if (ret) 2471 if (ret)
2470 return ret; 2472 return ret;
2471 /* 2473 /*
2472 * SD spec recommends at least 1ms of delay. Let's wait for 2ms 2474 * SD spec recommends at least 1ms of delay. Let's wait for 2ms
2473 * to be on the safer side. 2475 * to be on the safer side.
2474 */ 2476 */
2475 udelay(2000); 2477 udelay(2000);
2476 return mmc_power_on(mmc); 2478 return mmc_power_on(mmc);
2477 } 2479 }
2478 2480
2479 int mmc_start_init(struct mmc *mmc) 2481 int mmc_start_init(struct mmc *mmc)
2480 { 2482 {
2481 bool no_card; 2483 bool no_card;
2482 bool uhs_en = supports_uhs(mmc->cfg->host_caps); 2484 bool uhs_en = supports_uhs(mmc->cfg->host_caps);
2483 int err; 2485 int err;
2484 2486
2485 /* 2487 /*
2486 * all hosts are capable of 1 bit bus-width and able to use the legacy 2488 * all hosts are capable of 1 bit bus-width and able to use the legacy
2487 * timings. 2489 * timings.
2488 */ 2490 */
2489 mmc->host_caps = mmc->cfg->host_caps | MMC_CAP(SD_LEGACY) | 2491 mmc->host_caps = mmc->cfg->host_caps | MMC_CAP(SD_LEGACY) |
2490 MMC_CAP(MMC_LEGACY) | MMC_MODE_1BIT; 2492 MMC_CAP(MMC_LEGACY) | MMC_MODE_1BIT;
2491 2493
2492 /* we pretend there's no card when init is NULL */ 2494 /* we pretend there's no card when init is NULL */
2493 no_card = mmc_getcd(mmc) == 0; 2495 no_card = mmc_getcd(mmc) == 0;
2494 #if !CONFIG_IS_ENABLED(DM_MMC) 2496 #if !CONFIG_IS_ENABLED(DM_MMC)
2495 no_card = no_card || (mmc->cfg->ops->init == NULL); 2497 no_card = no_card || (mmc->cfg->ops->init == NULL);
2496 #endif 2498 #endif
2497 if (no_card) { 2499 if (no_card) {
2498 mmc->has_init = 0; 2500 mmc->has_init = 0;
2499 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 2501 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
2500 printf("MMC: no card present\n"); 2502 printf("MMC: no card present\n");
2501 #endif 2503 #endif
2502 return -ENOMEDIUM; 2504 return -ENOMEDIUM;
2503 } 2505 }
2504 2506
2505 if (mmc->has_init) 2507 if (mmc->has_init)
2506 return 0; 2508 return 0;
2507 2509
2508 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT 2510 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
2509 mmc_adapter_card_type_ident(); 2511 mmc_adapter_card_type_ident();
2510 #endif 2512 #endif
2511 err = mmc_power_init(mmc); 2513 err = mmc_power_init(mmc);
2512 if (err) 2514 if (err)
2513 return err; 2515 return err;
2514 2516
2515 #ifdef CONFIG_MMC_QUIRKS 2517 #ifdef CONFIG_MMC_QUIRKS
2516 mmc->quirks = MMC_QUIRK_RETRY_SET_BLOCKLEN | 2518 mmc->quirks = MMC_QUIRK_RETRY_SET_BLOCKLEN |
2517 MMC_QUIRK_RETRY_SEND_CID; 2519 MMC_QUIRK_RETRY_SEND_CID;
2518 #endif 2520 #endif
2519 2521
2520 err = mmc_power_cycle(mmc); 2522 err = mmc_power_cycle(mmc);
2521 if (err) { 2523 if (err) {
2522 /* 2524 /*
2523 * if power cycling is not supported, we should not try 2525 * if power cycling is not supported, we should not try
2524 * to use the UHS modes, because we wouldn't be able to 2526 * to use the UHS modes, because we wouldn't be able to
2525 * recover from an error during the UHS initialization. 2527 * recover from an error during the UHS initialization.
2526 */ 2528 */
2527 debug("Unable to do a full power cycle. Disabling the UHS modes for safety\n"); 2529 debug("Unable to do a full power cycle. Disabling the UHS modes for safety\n");
2528 uhs_en = false; 2530 uhs_en = false;
2529 mmc->host_caps &= ~UHS_CAPS; 2531 mmc->host_caps &= ~UHS_CAPS;
2530 err = mmc_power_on(mmc); 2532 err = mmc_power_on(mmc);
2531 } 2533 }
2532 if (err) 2534 if (err)
2533 return err; 2535 return err;
2534 2536
2535 #if CONFIG_IS_ENABLED(DM_MMC) 2537 #if CONFIG_IS_ENABLED(DM_MMC)
2536 /* The device has already been probed ready for use */ 2538 /* The device has already been probed ready for use */
2537 #else 2539 #else
2538 /* made sure it's not NULL earlier */ 2540 /* made sure it's not NULL earlier */
2539 err = mmc->cfg->ops->init(mmc); 2541 err = mmc->cfg->ops->init(mmc);
2540 if (err) 2542 if (err)
2541 return err; 2543 return err;
2542 #endif 2544 #endif
2543 mmc->ddr_mode = 0; 2545 mmc->ddr_mode = 0;
2544 2546
2545 retry: 2547 retry:
2546 mmc_set_initial_state(mmc); 2548 mmc_set_initial_state(mmc);
2547 mmc_send_init_stream(mmc); 2549 mmc_send_init_stream(mmc);
2548 2550
2549 /* Reset the Card */ 2551 /* Reset the Card */
2550 err = mmc_go_idle(mmc); 2552 err = mmc_go_idle(mmc);
2551 2553
2552 if (err) 2554 if (err)
2553 return err; 2555 return err;
2554 2556
2555 /* The internal partition reset to user partition(0) at every CMD0*/ 2557 /* The internal partition reset to user partition(0) at every CMD0*/
2556 mmc_get_blk_desc(mmc)->hwpart = 0; 2558 mmc_get_blk_desc(mmc)->hwpart = 0;
2557 2559
2558 /* Test for SD version 2 */ 2560 /* Test for SD version 2 */
2559 err = mmc_send_if_cond(mmc); 2561 err = mmc_send_if_cond(mmc);
2560 2562
2561 /* Now try to get the SD card's operating condition */ 2563 /* Now try to get the SD card's operating condition */
2562 err = sd_send_op_cond(mmc, uhs_en); 2564 err = sd_send_op_cond(mmc, uhs_en);
2563 if (err && uhs_en) { 2565 if (err && uhs_en) {
2564 uhs_en = false; 2566 uhs_en = false;
2565 mmc_power_cycle(mmc); 2567 mmc_power_cycle(mmc);
2566 goto retry; 2568 goto retry;
2567 } 2569 }
2568 2570
2569 /* If the command timed out, we check for an MMC card */ 2571 /* If the command timed out, we check for an MMC card */
2570 if (err == -ETIMEDOUT) { 2572 if (err == -ETIMEDOUT) {
2571 err = mmc_send_op_cond(mmc); 2573 err = mmc_send_op_cond(mmc);
2572 2574
2573 if (err) { 2575 if (err) {
2574 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 2576 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
2575 pr_err("Card did not respond to voltage select!\n"); 2577 pr_err("Card did not respond to voltage select!\n");
2576 #endif 2578 #endif
2577 return -EOPNOTSUPP; 2579 return -EOPNOTSUPP;
2578 } 2580 }
2579 } 2581 }
2580 2582
2581 if (!err) 2583 if (!err)
2582 mmc->init_in_progress = 1; 2584 mmc->init_in_progress = 1;
2583 2585
2584 return err; 2586 return err;
2585 } 2587 }
2586 2588
2587 static int mmc_complete_init(struct mmc *mmc) 2589 static int mmc_complete_init(struct mmc *mmc)
2588 { 2590 {
2589 int err = 0; 2591 int err = 0;
2590 2592
2591 mmc->init_in_progress = 0; 2593 mmc->init_in_progress = 0;
2592 if (mmc->op_cond_pending) 2594 if (mmc->op_cond_pending)
2593 err = mmc_complete_op_cond(mmc); 2595 err = mmc_complete_op_cond(mmc);
2594 2596
2595 if (!err) 2597 if (!err)
2596 err = mmc_startup(mmc); 2598 err = mmc_startup(mmc);
2597 if (err) 2599 if (err)
2598 mmc->has_init = 0; 2600 mmc->has_init = 0;
2599 else 2601 else
2600 mmc->has_init = 1; 2602 mmc->has_init = 1;
2601 return err; 2603 return err;
2602 } 2604 }
2603 2605
2604 int mmc_init(struct mmc *mmc) 2606 int mmc_init(struct mmc *mmc)
2605 { 2607 {
2606 int err = 0; 2608 int err = 0;
2607 __maybe_unused unsigned start; 2609 __maybe_unused unsigned start;
2608 #if CONFIG_IS_ENABLED(DM_MMC) 2610 #if CONFIG_IS_ENABLED(DM_MMC)
2609 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev); 2611 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev);
2610 2612
2611 upriv->mmc = mmc; 2613 upriv->mmc = mmc;
2612 #endif 2614 #endif
2613 if (mmc->has_init) 2615 if (mmc->has_init)
2614 return 0; 2616 return 0;
2615 2617
2616 start = get_timer(0); 2618 start = get_timer(0);
2617 2619
2618 if (!mmc->init_in_progress) 2620 if (!mmc->init_in_progress)
2619 err = mmc_start_init(mmc); 2621 err = mmc_start_init(mmc);
2620 2622
2621 if (!err) 2623 if (!err)
2622 err = mmc_complete_init(mmc); 2624 err = mmc_complete_init(mmc);
2623 if (err) 2625 if (err)
2624 printf("%s: %d, time %lu\n", __func__, err, get_timer(start)); 2626 printf("%s: %d, time %lu\n", __func__, err, get_timer(start));
2625 2627
2626 return err; 2628 return err;
2627 } 2629 }
2628 2630
2629 int mmc_set_dsr(struct mmc *mmc, u16 val) 2631 int mmc_set_dsr(struct mmc *mmc, u16 val)
2630 { 2632 {
2631 mmc->dsr = val; 2633 mmc->dsr = val;
2632 return 0; 2634 return 0;
2633 } 2635 }
2634 2636
2635 /* CPU-specific MMC initializations */ 2637 /* CPU-specific MMC initializations */
2636 __weak int cpu_mmc_init(bd_t *bis) 2638 __weak int cpu_mmc_init(bd_t *bis)
2637 { 2639 {
2638 return -1; 2640 return -1;
2639 } 2641 }
2640 2642
2641 /* board-specific MMC initializations. */ 2643 /* board-specific MMC initializations. */
2642 __weak int board_mmc_init(bd_t *bis) 2644 __weak int board_mmc_init(bd_t *bis)
2643 { 2645 {
2644 return -1; 2646 return -1;
2645 } 2647 }
2646 2648
2647 void mmc_set_preinit(struct mmc *mmc, int preinit) 2649 void mmc_set_preinit(struct mmc *mmc, int preinit)
2648 { 2650 {
2649 mmc->preinit = preinit; 2651 mmc->preinit = preinit;
2650 } 2652 }
2651 2653
2652 #if CONFIG_IS_ENABLED(DM_MMC) && defined(CONFIG_SPL_BUILD) 2654 #if CONFIG_IS_ENABLED(DM_MMC) && defined(CONFIG_SPL_BUILD)
2653 static int mmc_probe(bd_t *bis) 2655 static int mmc_probe(bd_t *bis)
2654 { 2656 {
2655 return 0; 2657 return 0;
2656 } 2658 }
2657 #elif CONFIG_IS_ENABLED(DM_MMC) 2659 #elif CONFIG_IS_ENABLED(DM_MMC)
2658 static int mmc_probe(bd_t *bis) 2660 static int mmc_probe(bd_t *bis)
2659 { 2661 {
2660 int ret, i; 2662 int ret, i;
2661 struct uclass *uc; 2663 struct uclass *uc;
2662 struct udevice *dev; 2664 struct udevice *dev;
2663 2665
2664 ret = uclass_get(UCLASS_MMC, &uc); 2666 ret = uclass_get(UCLASS_MMC, &uc);
2665 if (ret) 2667 if (ret)
2666 return ret; 2668 return ret;
2667 2669
2668 /* 2670 /*
2669 * Try to add them in sequence order. Really with driver model we 2671 * Try to add them in sequence order. Really with driver model we
2670 * should allow holes, but the current MMC list does not allow that. 2672 * should allow holes, but the current MMC list does not allow that.
2671 * So if we request 0, 1, 3 we will get 0, 1, 2. 2673 * So if we request 0, 1, 3 we will get 0, 1, 2.
2672 */ 2674 */
2673 for (i = 0; ; i++) { 2675 for (i = 0; ; i++) {
2674 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev); 2676 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
2675 if (ret == -ENODEV) 2677 if (ret == -ENODEV)
2676 break; 2678 break;
2677 } 2679 }
2678 uclass_foreach_dev(dev, uc) { 2680 uclass_foreach_dev(dev, uc) {
2679 ret = device_probe(dev); 2681 ret = device_probe(dev);
2680 if (ret) 2682 if (ret)
2681 pr_err("%s - probe failed: %d\n", dev->name, ret); 2683 pr_err("%s - probe failed: %d\n", dev->name, ret);
2682 } 2684 }
2683 2685
2684 return 0; 2686 return 0;
2685 } 2687 }
2686 #else 2688 #else
2687 static int mmc_probe(bd_t *bis) 2689 static int mmc_probe(bd_t *bis)
2688 { 2690 {
2689 if (board_mmc_init(bis) < 0) 2691 if (board_mmc_init(bis) < 0)
2690 cpu_mmc_init(bis); 2692 cpu_mmc_init(bis);
2691 2693
2692 return 0; 2694 return 0;
2693 } 2695 }
2694 #endif 2696 #endif
2695 2697
2696 int mmc_initialize(bd_t *bis) 2698 int mmc_initialize(bd_t *bis)
2697 { 2699 {
2698 static int initialized = 0; 2700 static int initialized = 0;
2699 int ret; 2701 int ret;
2700 if (initialized) /* Avoid initializing mmc multiple times */ 2702 if (initialized) /* Avoid initializing mmc multiple times */
2701 return 0; 2703 return 0;
2702 initialized = 1; 2704 initialized = 1;
2703 2705
2704 #if !CONFIG_IS_ENABLED(BLK) 2706 #if !CONFIG_IS_ENABLED(BLK)
2705 #if !CONFIG_IS_ENABLED(MMC_TINY) 2707 #if !CONFIG_IS_ENABLED(MMC_TINY)
2706 mmc_list_init(); 2708 mmc_list_init();
2707 #endif 2709 #endif
2708 #endif 2710 #endif
2709 ret = mmc_probe(bis); 2711 ret = mmc_probe(bis);
2710 if (ret) 2712 if (ret)
2711 return ret; 2713 return ret;
2712 2714
2713 #ifndef CONFIG_SPL_BUILD 2715 #ifndef CONFIG_SPL_BUILD
2714 print_mmc_devices(','); 2716 print_mmc_devices(',');
2715 #endif 2717 #endif
2716 2718
2717 mmc_do_preinit(); 2719 mmc_do_preinit();
2718 return 0; 2720 return 0;
2719 } 2721 }
2720 2722
2721 #ifdef CONFIG_CMD_BKOPS_ENABLE 2723 #ifdef CONFIG_CMD_BKOPS_ENABLE
2722 int mmc_set_bkops_enable(struct mmc *mmc) 2724 int mmc_set_bkops_enable(struct mmc *mmc)
2723 { 2725 {
2724 int err; 2726 int err;
2725 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); 2727 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
2726 2728
2727 err = mmc_send_ext_csd(mmc, ext_csd); 2729 err = mmc_send_ext_csd(mmc, ext_csd);
2728 if (err) { 2730 if (err) {
2729 puts("Could not get ext_csd register values\n"); 2731 puts("Could not get ext_csd register values\n");
2730 return err; 2732 return err;
2731 } 2733 }
2732 2734
2733 if (!(ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1)) { 2735 if (!(ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1)) {
2734 puts("Background operations not supported on device\n"); 2736 puts("Background operations not supported on device\n");
2735 return -EMEDIUMTYPE; 2737 return -EMEDIUMTYPE;
2736 } 2738 }
2737 2739
2738 if (ext_csd[EXT_CSD_BKOPS_EN] & 0x1) { 2740 if (ext_csd[EXT_CSD_BKOPS_EN] & 0x1) {
2739 puts("Background operations already enabled\n"); 2741 puts("Background operations already enabled\n");
2740 return 0; 2742 return 0;
2741 } 2743 }
2742 2744
2743 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BKOPS_EN, 1); 2745 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BKOPS_EN, 1);
2744 if (err) { 2746 if (err) {
2745 puts("Failed to enable manual background operations\n"); 2747 puts("Failed to enable manual background operations\n");
2746 return err; 2748 return err;
2747 } 2749 }
2748 2750
2749 puts("Enabled manual background operations\n"); 2751 puts("Enabled manual background operations\n");
2750 2752
2751 return 0; 2753 return 0;
2752 } 2754 }
2753 #endif 2755 #endif
2754 2756
1 /* 1 /*
2 * Copyright 2008,2010 Freescale Semiconductor, Inc 2 * Copyright 2008,2010 Freescale Semiconductor, Inc
3 * Andy Fleming 3 * Andy Fleming
4 * 4 *
5 * Based (loosely) on the Linux code 5 * Based (loosely) on the Linux code
6 * 6 *
7 * SPDX-License-Identifier: GPL-2.0+ 7 * SPDX-License-Identifier: GPL-2.0+
8 */ 8 */
9 9
10 #ifndef _MMC_H_ 10 #ifndef _MMC_H_
11 #define _MMC_H_ 11 #define _MMC_H_
12 12
13 #include <linux/list.h> 13 #include <linux/list.h>
14 #include <linux/sizes.h> 14 #include <linux/sizes.h>
15 #include <linux/compiler.h> 15 #include <linux/compiler.h>
16 #include <part.h> 16 #include <part.h>
17 17
18 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) 18 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
19 #define MMC_SUPPORTS_TUNING 19 #define MMC_SUPPORTS_TUNING
20 #endif 20 #endif
21 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) 21 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
22 #define MMC_SUPPORTS_TUNING 22 #define MMC_SUPPORTS_TUNING
23 #endif 23 #endif
24 24
25 /* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */ 25 /* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */
26 #define SD_VERSION_SD (1U << 31) 26 #define SD_VERSION_SD (1U << 31)
27 #define MMC_VERSION_MMC (1U << 30) 27 #define MMC_VERSION_MMC (1U << 30)
28 28
29 #define MAKE_SDMMC_VERSION(a, b, c) \ 29 #define MAKE_SDMMC_VERSION(a, b, c) \
30 ((((u32)(a)) << 16) | ((u32)(b) << 8) | (u32)(c)) 30 ((((u32)(a)) << 16) | ((u32)(b) << 8) | (u32)(c))
31 #define MAKE_SD_VERSION(a, b, c) \ 31 #define MAKE_SD_VERSION(a, b, c) \
32 (SD_VERSION_SD | MAKE_SDMMC_VERSION(a, b, c)) 32 (SD_VERSION_SD | MAKE_SDMMC_VERSION(a, b, c))
33 #define MAKE_MMC_VERSION(a, b, c) \ 33 #define MAKE_MMC_VERSION(a, b, c) \
34 (MMC_VERSION_MMC | MAKE_SDMMC_VERSION(a, b, c)) 34 (MMC_VERSION_MMC | MAKE_SDMMC_VERSION(a, b, c))
35 35
36 #define EXTRACT_SDMMC_MAJOR_VERSION(x) \ 36 #define EXTRACT_SDMMC_MAJOR_VERSION(x) \
37 (((u32)(x) >> 16) & 0xff) 37 (((u32)(x) >> 16) & 0xff)
38 #define EXTRACT_SDMMC_MINOR_VERSION(x) \ 38 #define EXTRACT_SDMMC_MINOR_VERSION(x) \
39 (((u32)(x) >> 8) & 0xff) 39 (((u32)(x) >> 8) & 0xff)
40 #define EXTRACT_SDMMC_CHANGE_VERSION(x) \ 40 #define EXTRACT_SDMMC_CHANGE_VERSION(x) \
41 ((u32)(x) & 0xff) 41 ((u32)(x) & 0xff)
42 42
43 #define SD_VERSION_3 MAKE_SD_VERSION(3, 0, 0) 43 #define SD_VERSION_3 MAKE_SD_VERSION(3, 0, 0)
44 #define SD_VERSION_2 MAKE_SD_VERSION(2, 0, 0) 44 #define SD_VERSION_2 MAKE_SD_VERSION(2, 0, 0)
45 #define SD_VERSION_1_0 MAKE_SD_VERSION(1, 0, 0) 45 #define SD_VERSION_1_0 MAKE_SD_VERSION(1, 0, 0)
46 #define SD_VERSION_1_10 MAKE_SD_VERSION(1, 10, 0) 46 #define SD_VERSION_1_10 MAKE_SD_VERSION(1, 10, 0)
47 47
48 #define MMC_VERSION_UNKNOWN MAKE_MMC_VERSION(0, 0, 0) 48 #define MMC_VERSION_UNKNOWN MAKE_MMC_VERSION(0, 0, 0)
49 #define MMC_VERSION_1_2 MAKE_MMC_VERSION(1, 2, 0) 49 #define MMC_VERSION_1_2 MAKE_MMC_VERSION(1, 2, 0)
50 #define MMC_VERSION_1_4 MAKE_MMC_VERSION(1, 4, 0) 50 #define MMC_VERSION_1_4 MAKE_MMC_VERSION(1, 4, 0)
51 #define MMC_VERSION_2_2 MAKE_MMC_VERSION(2, 2, 0) 51 #define MMC_VERSION_2_2 MAKE_MMC_VERSION(2, 2, 0)
52 #define MMC_VERSION_3 MAKE_MMC_VERSION(3, 0, 0) 52 #define MMC_VERSION_3 MAKE_MMC_VERSION(3, 0, 0)
53 #define MMC_VERSION_4 MAKE_MMC_VERSION(4, 0, 0) 53 #define MMC_VERSION_4 MAKE_MMC_VERSION(4, 0, 0)
54 #define MMC_VERSION_4_1 MAKE_MMC_VERSION(4, 1, 0) 54 #define MMC_VERSION_4_1 MAKE_MMC_VERSION(4, 1, 0)
55 #define MMC_VERSION_4_2 MAKE_MMC_VERSION(4, 2, 0) 55 #define MMC_VERSION_4_2 MAKE_MMC_VERSION(4, 2, 0)
56 #define MMC_VERSION_4_3 MAKE_MMC_VERSION(4, 3, 0) 56 #define MMC_VERSION_4_3 MAKE_MMC_VERSION(4, 3, 0)
57 #define MMC_VERSION_4_41 MAKE_MMC_VERSION(4, 4, 1) 57 #define MMC_VERSION_4_41 MAKE_MMC_VERSION(4, 4, 1)
58 #define MMC_VERSION_4_5 MAKE_MMC_VERSION(4, 5, 0) 58 #define MMC_VERSION_4_5 MAKE_MMC_VERSION(4, 5, 0)
59 #define MMC_VERSION_5_0 MAKE_MMC_VERSION(5, 0, 0) 59 #define MMC_VERSION_5_0 MAKE_MMC_VERSION(5, 0, 0)
60 #define MMC_VERSION_5_1 MAKE_MMC_VERSION(5, 1, 0) 60 #define MMC_VERSION_5_1 MAKE_MMC_VERSION(5, 1, 0)
61 61
62 #define MMC_CAP(mode) (1 << mode) 62 #define MMC_CAP(mode) (1 << mode)
63 #define MMC_MODE_HS (MMC_CAP(MMC_HS) | MMC_CAP(SD_HS)) 63 #define MMC_MODE_HS (MMC_CAP(MMC_HS) | MMC_CAP(SD_HS))
64 #define MMC_MODE_HS_52MHz MMC_CAP(MMC_HS_52) 64 #define MMC_MODE_HS_52MHz MMC_CAP(MMC_HS_52)
65 #define MMC_MODE_DDR_52MHz MMC_CAP(MMC_DDR_52) 65 #define MMC_MODE_DDR_52MHz MMC_CAP(MMC_DDR_52)
66 #define MMC_MODE_HS200 MMC_CAP(MMC_HS_200) 66 #define MMC_MODE_HS200 MMC_CAP(MMC_HS_200)
67 67
68 #define MMC_MODE_8BIT BIT(30) 68 #define MMC_MODE_8BIT BIT(30)
69 #define MMC_MODE_4BIT BIT(29) 69 #define MMC_MODE_4BIT BIT(29)
70 #define MMC_MODE_1BIT BIT(28) 70 #define MMC_MODE_1BIT BIT(28)
71 #define MMC_MODE_SPI BIT(27) 71 #define MMC_MODE_SPI BIT(27)
72 72
73 73
74 #define SD_DATA_4BIT 0x00040000 74 #define SD_DATA_4BIT 0x00040000
75 75
76 #define IS_SD(x) ((x)->version & SD_VERSION_SD) 76 #define IS_SD(x) ((x)->version & SD_VERSION_SD)
77 #define IS_MMC(x) ((x)->version & MMC_VERSION_MMC) 77 #define IS_MMC(x) ((x)->version & MMC_VERSION_MMC)
78 78
79 #define MMC_DATA_READ 1 79 #define MMC_DATA_READ 1
80 #define MMC_DATA_WRITE 2 80 #define MMC_DATA_WRITE 2
81 81
82 #define MMC_CMD_GO_IDLE_STATE 0 82 #define MMC_CMD_GO_IDLE_STATE 0
83 #define MMC_CMD_SEND_OP_COND 1 83 #define MMC_CMD_SEND_OP_COND 1
84 #define MMC_CMD_ALL_SEND_CID 2 84 #define MMC_CMD_ALL_SEND_CID 2
85 #define MMC_CMD_SET_RELATIVE_ADDR 3 85 #define MMC_CMD_SET_RELATIVE_ADDR 3
86 #define MMC_CMD_SET_DSR 4 86 #define MMC_CMD_SET_DSR 4
87 #define MMC_CMD_SWITCH 6 87 #define MMC_CMD_SWITCH 6
88 #define MMC_CMD_SELECT_CARD 7 88 #define MMC_CMD_SELECT_CARD 7
89 #define MMC_CMD_SEND_EXT_CSD 8 89 #define MMC_CMD_SEND_EXT_CSD 8
90 #define MMC_CMD_SEND_CSD 9 90 #define MMC_CMD_SEND_CSD 9
91 #define MMC_CMD_SEND_CID 10 91 #define MMC_CMD_SEND_CID 10
92 #define MMC_CMD_STOP_TRANSMISSION 12 92 #define MMC_CMD_STOP_TRANSMISSION 12
93 #define MMC_CMD_SEND_STATUS 13 93 #define MMC_CMD_SEND_STATUS 13
94 #define MMC_CMD_SET_BLOCKLEN 16 94 #define MMC_CMD_SET_BLOCKLEN 16
95 #define MMC_CMD_READ_SINGLE_BLOCK 17 95 #define MMC_CMD_READ_SINGLE_BLOCK 17
96 #define MMC_CMD_READ_MULTIPLE_BLOCK 18 96 #define MMC_CMD_READ_MULTIPLE_BLOCK 18
97 #define MMC_CMD_SEND_TUNING_BLOCK 19 97 #define MMC_CMD_SEND_TUNING_BLOCK 19
98 #define MMC_CMD_SEND_TUNING_BLOCK_HS200 21 98 #define MMC_CMD_SEND_TUNING_BLOCK_HS200 21
99 #define MMC_CMD_SET_BLOCK_COUNT 23 99 #define MMC_CMD_SET_BLOCK_COUNT 23
100 #define MMC_CMD_WRITE_SINGLE_BLOCK 24 100 #define MMC_CMD_WRITE_SINGLE_BLOCK 24
101 #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25 101 #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25
102 #define MMC_CMD_ERASE_GROUP_START 35 102 #define MMC_CMD_ERASE_GROUP_START 35
103 #define MMC_CMD_ERASE_GROUP_END 36 103 #define MMC_CMD_ERASE_GROUP_END 36
104 #define MMC_CMD_ERASE 38 104 #define MMC_CMD_ERASE 38
105 #define MMC_CMD_APP_CMD 55 105 #define MMC_CMD_APP_CMD 55
106 #define MMC_CMD_SPI_READ_OCR 58 106 #define MMC_CMD_SPI_READ_OCR 58
107 #define MMC_CMD_SPI_CRC_ON_OFF 59 107 #define MMC_CMD_SPI_CRC_ON_OFF 59
108 #define MMC_CMD_RES_MAN 62 108 #define MMC_CMD_RES_MAN 62
109 109
110 #define MMC_CMD62_ARG1 0xefac62ec 110 #define MMC_CMD62_ARG1 0xefac62ec
111 #define MMC_CMD62_ARG2 0xcbaea7 111 #define MMC_CMD62_ARG2 0xcbaea7
112 112
113 113
114 #define SD_CMD_SEND_RELATIVE_ADDR 3 114 #define SD_CMD_SEND_RELATIVE_ADDR 3
115 #define SD_CMD_SWITCH_FUNC 6 115 #define SD_CMD_SWITCH_FUNC 6
116 #define SD_CMD_SEND_IF_COND 8 116 #define SD_CMD_SEND_IF_COND 8
117 #define SD_CMD_SWITCH_UHS18V 11 117 #define SD_CMD_SWITCH_UHS18V 11
118 118
119 #define SD_CMD_APP_SET_BUS_WIDTH 6 119 #define SD_CMD_APP_SET_BUS_WIDTH 6
120 #define SD_CMD_APP_SD_STATUS 13 120 #define SD_CMD_APP_SD_STATUS 13
121 #define SD_CMD_ERASE_WR_BLK_START 32 121 #define SD_CMD_ERASE_WR_BLK_START 32
122 #define SD_CMD_ERASE_WR_BLK_END 33 122 #define SD_CMD_ERASE_WR_BLK_END 33
123 #define SD_CMD_APP_SEND_OP_COND 41 123 #define SD_CMD_APP_SEND_OP_COND 41
124 #define SD_CMD_APP_SEND_SCR 51 124 #define SD_CMD_APP_SEND_SCR 51
125 125
126 static inline bool mmc_is_tuning_cmd(uint cmdidx) 126 static inline bool mmc_is_tuning_cmd(uint cmdidx)
127 { 127 {
128 if ((cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200) || 128 if ((cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200) ||
129 (cmdidx == MMC_CMD_SEND_TUNING_BLOCK)) 129 (cmdidx == MMC_CMD_SEND_TUNING_BLOCK))
130 return true; 130 return true;
131 return false; 131 return false;
132 } 132 }
133 133
134 /* SCR definitions in different words */ 134 /* SCR definitions in different words */
135 #define SD_HIGHSPEED_BUSY 0x00020000 135 #define SD_HIGHSPEED_BUSY 0x00020000
136 #define SD_HIGHSPEED_SUPPORTED 0x00020000 136 #define SD_HIGHSPEED_SUPPORTED 0x00020000
137 137
138 #define UHS_SDR12_BUS_SPEED 0 138 #define UHS_SDR12_BUS_SPEED 0
139 #define HIGH_SPEED_BUS_SPEED 1 139 #define HIGH_SPEED_BUS_SPEED 1
140 #define UHS_SDR25_BUS_SPEED 1 140 #define UHS_SDR25_BUS_SPEED 1
141 #define UHS_SDR50_BUS_SPEED 2 141 #define UHS_SDR50_BUS_SPEED 2
142 #define UHS_SDR104_BUS_SPEED 3 142 #define UHS_SDR104_BUS_SPEED 3
143 #define UHS_DDR50_BUS_SPEED 4 143 #define UHS_DDR50_BUS_SPEED 4
144 144
145 #define SD_MODE_UHS_SDR12 BIT(UHS_SDR12_BUS_SPEED) 145 #define SD_MODE_UHS_SDR12 BIT(UHS_SDR12_BUS_SPEED)
146 #define SD_MODE_UHS_SDR25 BIT(UHS_SDR25_BUS_SPEED) 146 #define SD_MODE_UHS_SDR25 BIT(UHS_SDR25_BUS_SPEED)
147 #define SD_MODE_UHS_SDR50 BIT(UHS_SDR50_BUS_SPEED) 147 #define SD_MODE_UHS_SDR50 BIT(UHS_SDR50_BUS_SPEED)
148 #define SD_MODE_UHS_SDR104 BIT(UHS_SDR104_BUS_SPEED) 148 #define SD_MODE_UHS_SDR104 BIT(UHS_SDR104_BUS_SPEED)
149 #define SD_MODE_UHS_DDR50 BIT(UHS_DDR50_BUS_SPEED) 149 #define SD_MODE_UHS_DDR50 BIT(UHS_DDR50_BUS_SPEED)
150 150
151 #define OCR_BUSY 0x80000000 151 #define OCR_BUSY 0x80000000
152 #define OCR_HCS 0x40000000 152 #define OCR_HCS 0x40000000
153 #define OCR_S18R 0x1000000 153 #define OCR_S18R 0x1000000
154 #define OCR_VOLTAGE_MASK 0x007FFF80 154 #define OCR_VOLTAGE_MASK 0x007FFF80
155 #define OCR_ACCESS_MODE 0x60000000 155 #define OCR_ACCESS_MODE 0x60000000
156 156
157 #define MMC_ERASE_ARG 0x00000000 157 #define MMC_ERASE_ARG 0x00000000
158 #define MMC_SECURE_ERASE_ARG 0x80000000 158 #define MMC_SECURE_ERASE_ARG 0x80000000
159 #define MMC_TRIM_ARG 0x00000001 159 #define MMC_TRIM_ARG 0x00000001
160 #define MMC_DISCARD_ARG 0x00000003 160 #define MMC_DISCARD_ARG 0x00000003
161 #define MMC_SECURE_TRIM1_ARG 0x80000001 161 #define MMC_SECURE_TRIM1_ARG 0x80000001
162 #define MMC_SECURE_TRIM2_ARG 0x80008000 162 #define MMC_SECURE_TRIM2_ARG 0x80008000
163 163
164 #define MMC_STATUS_MASK (~0x0206BF7F) 164 #define MMC_STATUS_MASK (~0x0206BF7F)
165 #define MMC_STATUS_SWITCH_ERROR (1 << 7) 165 #define MMC_STATUS_SWITCH_ERROR (1 << 7)
166 #define MMC_STATUS_RDY_FOR_DATA (1 << 8) 166 #define MMC_STATUS_RDY_FOR_DATA (1 << 8)
167 #define MMC_STATUS_CURR_STATE (0xf << 9) 167 #define MMC_STATUS_CURR_STATE (0xf << 9)
168 #define MMC_STATUS_ERROR (1 << 19) 168 #define MMC_STATUS_ERROR (1 << 19)
169 169
170 #define MMC_STATE_PRG (7 << 9) 170 #define MMC_STATE_PRG (7 << 9)
171 171
172 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ 172 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
173 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ 173 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
174 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ 174 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
175 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ 175 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
176 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ 176 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
177 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ 177 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
178 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ 178 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
179 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ 179 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
180 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ 180 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
181 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ 181 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
182 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ 182 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
183 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ 183 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
184 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ 184 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
185 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ 185 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
186 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ 186 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
187 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ 187 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
188 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ 188 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
189 189
190 #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */ 190 #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
191 #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte 191 #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte
192 addressed by index which are 192 addressed by index which are
193 1 in value field */ 193 1 in value field */
194 #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte 194 #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte
195 addressed by index, which are 195 addressed by index, which are
196 1 in value field */ 196 1 in value field */
197 #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */ 197 #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */
198 198
199 #define SD_SWITCH_CHECK 0 199 #define SD_SWITCH_CHECK 0
200 #define SD_SWITCH_SWITCH 1 200 #define SD_SWITCH_SWITCH 1
201 201
202 /* 202 /*
203 * EXT_CSD fields 203 * EXT_CSD fields
204 */ 204 */
205 #define EXT_CSD_ENH_START_ADDR 136 /* R/W */ 205 #define EXT_CSD_ENH_START_ADDR 136 /* R/W */
206 #define EXT_CSD_ENH_SIZE_MULT 140 /* R/W */ 206 #define EXT_CSD_ENH_SIZE_MULT 140 /* R/W */
207 #define EXT_CSD_GP_SIZE_MULT 143 /* R/W */ 207 #define EXT_CSD_GP_SIZE_MULT 143 /* R/W */
208 #define EXT_CSD_PARTITION_SETTING 155 /* R/W */ 208 #define EXT_CSD_PARTITION_SETTING 155 /* R/W */
209 #define EXT_CSD_PARTITIONS_ATTRIBUTE 156 /* R/W */ 209 #define EXT_CSD_PARTITIONS_ATTRIBUTE 156 /* R/W */
210 #define EXT_CSD_MAX_ENH_SIZE_MULT 157 /* R */ 210 #define EXT_CSD_MAX_ENH_SIZE_MULT 157 /* R */
211 #define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */ 211 #define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */
212 #define EXT_CSD_RST_N_FUNCTION 162 /* R/W */ 212 #define EXT_CSD_RST_N_FUNCTION 162 /* R/W */
213 #define EXT_CSD_BKOPS_EN 163 /* R/W & R/W/E */ 213 #define EXT_CSD_BKOPS_EN 163 /* R/W & R/W/E */
214 #define EXT_CSD_WR_REL_PARAM 166 /* R */ 214 #define EXT_CSD_WR_REL_PARAM 166 /* R */
215 #define EXT_CSD_WR_REL_SET 167 /* R/W */ 215 #define EXT_CSD_WR_REL_SET 167 /* R/W */
216 #define EXT_CSD_RPMB_MULT 168 /* RO */ 216 #define EXT_CSD_RPMB_MULT 168 /* RO */
217 #define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ 217 #define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
218 #define EXT_CSD_BOOT_BUS_WIDTH 177 218 #define EXT_CSD_BOOT_BUS_WIDTH 177
219 #define EXT_CSD_PART_CONF 179 /* R/W */ 219 #define EXT_CSD_PART_CONF 179 /* R/W */
220 #define EXT_CSD_BUS_WIDTH 183 /* R/W */ 220 #define EXT_CSD_BUS_WIDTH 183 /* R/W */
221 #define EXT_CSD_HS_TIMING 185 /* R/W */ 221 #define EXT_CSD_HS_TIMING 185 /* R/W */
222 #define EXT_CSD_REV 192 /* RO */ 222 #define EXT_CSD_REV 192 /* RO */
223 #define EXT_CSD_CARD_TYPE 196 /* RO */ 223 #define EXT_CSD_CARD_TYPE 196 /* RO */
224 #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ 224 #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
225 #define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */ 225 #define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */
226 #define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */ 226 #define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
227 #define EXT_CSD_BOOT_MULT 226 /* RO */ 227 #define EXT_CSD_BOOT_MULT 226 /* RO */
228 #define EXT_CSD_BKOPS_SUPPORT 502 /* RO */ 228 #define EXT_CSD_BKOPS_SUPPORT 502 /* RO */
229 229
230 /* 230 /*
231 * EXT_CSD field definitions 231 * EXT_CSD field definitions
232 */ 232 */
233 233
234 #define EXT_CSD_CMD_SET_NORMAL (1 << 0) 234 #define EXT_CSD_CMD_SET_NORMAL (1 << 0)
235 #define EXT_CSD_CMD_SET_SECURE (1 << 1) 235 #define EXT_CSD_CMD_SET_SECURE (1 << 1)
236 #define EXT_CSD_CMD_SET_CPSECURE (1 << 2) 236 #define EXT_CSD_CMD_SET_CPSECURE (1 << 2)
237 237
238 #define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */ 238 #define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */
239 #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */ 239 #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */
240 #define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2) 240 #define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2)
241 #define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3) 241 #define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3)
242 #define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \ 242 #define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
243 | EXT_CSD_CARD_TYPE_DDR_1_2V) 243 | EXT_CSD_CARD_TYPE_DDR_1_2V)
244 244
245 #define EXT_CSD_CARD_TYPE_HS200_1_8V BIT(4) /* Card can run at 200MHz */ 245 #define EXT_CSD_CARD_TYPE_HS200_1_8V BIT(4) /* Card can run at 200MHz */
246 /* SDR mode @1.8V I/O */ 246 /* SDR mode @1.8V I/O */
247 #define EXT_CSD_CARD_TYPE_HS200_1_2V BIT(5) /* Card can run at 200MHz */ 247 #define EXT_CSD_CARD_TYPE_HS200_1_2V BIT(5) /* Card can run at 200MHz */
248 /* SDR mode @1.2V I/O */ 248 /* SDR mode @1.2V I/O */
249 #define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \ 249 #define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \
250 EXT_CSD_CARD_TYPE_HS200_1_2V) 250 EXT_CSD_CARD_TYPE_HS200_1_2V)
251 251
252 #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ 252 #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
253 #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ 253 #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
254 #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ 254 #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
255 #define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */ 255 #define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */
256 #define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */ 256 #define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
257 #define EXT_CSD_DDR_FLAG BIT(2) /* Flag for DDR mode */ 257 #define EXT_CSD_DDR_FLAG BIT(2) /* Flag for DDR mode */
258 258
259 #define EXT_CSD_TIMING_LEGACY 0 /* no high speed */ 259 #define EXT_CSD_TIMING_LEGACY 0 /* no high speed */
260 #define EXT_CSD_TIMING_HS 1 /* HS */ 260 #define EXT_CSD_TIMING_HS 1 /* HS */
261 #define EXT_CSD_TIMING_HS200 2 /* HS200 */ 261 #define EXT_CSD_TIMING_HS200 2 /* HS200 */
262 262
263 #define EXT_CSD_BOOT_ACK_ENABLE (1 << 6) 263 #define EXT_CSD_BOOT_ACK_ENABLE (1 << 6)
264 #define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3) 264 #define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3)
265 #define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0) 265 #define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0)
266 #define EXT_CSD_PARTITION_ACCESS_DISABLE (0 << 0) 266 #define EXT_CSD_PARTITION_ACCESS_DISABLE (0 << 0)
267 267
268 #define EXT_CSD_BOOT_ACK(x) (x << 6) 268 #define EXT_CSD_BOOT_ACK(x) (x << 6)
269 #define EXT_CSD_BOOT_PART_NUM(x) (x << 3) 269 #define EXT_CSD_BOOT_PART_NUM(x) (x << 3)
270 #define EXT_CSD_PARTITION_ACCESS(x) (x << 0) 270 #define EXT_CSD_PARTITION_ACCESS(x) (x << 0)
271 271
272 #define EXT_CSD_EXTRACT_BOOT_ACK(x) (((x) >> 6) & 0x1) 272 #define EXT_CSD_EXTRACT_BOOT_ACK(x) (((x) >> 6) & 0x1)
273 #define EXT_CSD_EXTRACT_BOOT_PART(x) (((x) >> 3) & 0x7) 273 #define EXT_CSD_EXTRACT_BOOT_PART(x) (((x) >> 3) & 0x7)
274 #define EXT_CSD_EXTRACT_PARTITION_ACCESS(x) ((x) & 0x7) 274 #define EXT_CSD_EXTRACT_PARTITION_ACCESS(x) ((x) & 0x7)
275 275
276 #define EXT_CSD_BOOT_BUS_WIDTH_MODE(x) (x << 3) 276 #define EXT_CSD_BOOT_BUS_WIDTH_MODE(x) (x << 3)
277 #define EXT_CSD_BOOT_BUS_WIDTH_RESET(x) (x << 2) 277 #define EXT_CSD_BOOT_BUS_WIDTH_RESET(x) (x << 2)
278 #define EXT_CSD_BOOT_BUS_WIDTH_WIDTH(x) (x) 278 #define EXT_CSD_BOOT_BUS_WIDTH_WIDTH(x) (x)
279 279
280 #define EXT_CSD_PARTITION_SETTING_COMPLETED (1 << 0) 280 #define EXT_CSD_PARTITION_SETTING_COMPLETED (1 << 0)
281 281
282 #define EXT_CSD_ENH_USR (1 << 0) /* user data area is enhanced */ 282 #define EXT_CSD_ENH_USR (1 << 0) /* user data area is enhanced */
283 #define EXT_CSD_ENH_GP(x) (1 << ((x)+1)) /* GP part (x+1) is enhanced */ 283 #define EXT_CSD_ENH_GP(x) (1 << ((x)+1)) /* GP part (x+1) is enhanced */
284 284
285 #define EXT_CSD_HS_CTRL_REL (1 << 0) /* host controlled WR_REL_SET */ 285 #define EXT_CSD_HS_CTRL_REL (1 << 0) /* host controlled WR_REL_SET */
286 286
287 #define EXT_CSD_WR_DATA_REL_USR (1 << 0) /* user data area WR_REL */ 287 #define EXT_CSD_WR_DATA_REL_USR (1 << 0) /* user data area WR_REL */
288 #define EXT_CSD_WR_DATA_REL_GP(x) (1 << ((x)+1)) /* GP part (x+1) WR_REL */ 288 #define EXT_CSD_WR_DATA_REL_GP(x) (1 << ((x)+1)) /* GP part (x+1) WR_REL */
289 289
290 #define R1_ILLEGAL_COMMAND (1 << 22) 290 #define R1_ILLEGAL_COMMAND (1 << 22)
291 #define R1_APP_CMD (1 << 5) 291 #define R1_APP_CMD (1 << 5)
292 292
293 #define MMC_RSP_PRESENT (1 << 0) 293 #define MMC_RSP_PRESENT (1 << 0)
294 #define MMC_RSP_136 (1 << 1) /* 136 bit response */ 294 #define MMC_RSP_136 (1 << 1) /* 136 bit response */
295 #define MMC_RSP_CRC (1 << 2) /* expect valid crc */ 295 #define MMC_RSP_CRC (1 << 2) /* expect valid crc */
296 #define MMC_RSP_BUSY (1 << 3) /* card may send busy */ 296 #define MMC_RSP_BUSY (1 << 3) /* card may send busy */
297 #define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ 297 #define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
298 298
299 #define MMC_RSP_NONE (0) 299 #define MMC_RSP_NONE (0)
300 #define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 300 #define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
301 #define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \ 301 #define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \
302 MMC_RSP_BUSY) 302 MMC_RSP_BUSY)
303 #define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) 303 #define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
304 #define MMC_RSP_R3 (MMC_RSP_PRESENT) 304 #define MMC_RSP_R3 (MMC_RSP_PRESENT)
305 #define MMC_RSP_R4 (MMC_RSP_PRESENT) 305 #define MMC_RSP_R4 (MMC_RSP_PRESENT)
306 #define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 306 #define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
307 #define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 307 #define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
308 #define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 308 #define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
309 309
310 #define MMCPART_NOAVAILABLE (0xff) 310 #define MMCPART_NOAVAILABLE (0xff)
311 #define PART_ACCESS_MASK (0x7) 311 #define PART_ACCESS_MASK (0x7)
312 #define PART_SUPPORT (0x1) 312 #define PART_SUPPORT (0x1)
313 #define ENHNCD_SUPPORT (0x2) 313 #define ENHNCD_SUPPORT (0x2)
314 #define PART_ENH_ATTRIB (0x1f) 314 #define PART_ENH_ATTRIB (0x1f)
315 315
316 #define MMC_QUIRK_RETRY_SEND_CID BIT(0) 316 #define MMC_QUIRK_RETRY_SEND_CID BIT(0)
317 #define MMC_QUIRK_RETRY_SET_BLOCKLEN BIT(1) 317 #define MMC_QUIRK_RETRY_SET_BLOCKLEN BIT(1)
318 318
319 enum mmc_voltage { 319 enum mmc_voltage {
320 MMC_SIGNAL_VOLTAGE_000 = 0, 320 MMC_SIGNAL_VOLTAGE_000 = 0,
321 MMC_SIGNAL_VOLTAGE_120 = 1, 321 MMC_SIGNAL_VOLTAGE_120 = 1,
322 MMC_SIGNAL_VOLTAGE_180 = 2, 322 MMC_SIGNAL_VOLTAGE_180 = 2,
323 MMC_SIGNAL_VOLTAGE_330 = 4, 323 MMC_SIGNAL_VOLTAGE_330 = 4,
324 }; 324 };
325 325
326 #define MMC_ALL_SIGNAL_VOLTAGE (MMC_SIGNAL_VOLTAGE_120 |\ 326 #define MMC_ALL_SIGNAL_VOLTAGE (MMC_SIGNAL_VOLTAGE_120 |\
327 MMC_SIGNAL_VOLTAGE_180 |\ 327 MMC_SIGNAL_VOLTAGE_180 |\
328 MMC_SIGNAL_VOLTAGE_330) 328 MMC_SIGNAL_VOLTAGE_330)
329 329
330 /* Maximum block size for MMC */ 330 /* Maximum block size for MMC */
331 #define MMC_MAX_BLOCK_LEN 512 331 #define MMC_MAX_BLOCK_LEN 512
332 332
333 /* The number of MMC physical partitions. These consist of: 333 /* The number of MMC physical partitions. These consist of:
334 * boot partitions (2), general purpose partitions (4) in MMC v4.4. 334 * boot partitions (2), general purpose partitions (4) in MMC v4.4.
335 */ 335 */
336 #define MMC_NUM_BOOT_PARTITION 2 336 #define MMC_NUM_BOOT_PARTITION 2
337 #define MMC_PART_RPMB 3 /* RPMB partition number */ 337 #define MMC_PART_RPMB 3 /* RPMB partition number */
338 338
339 /* Driver model support */ 339 /* Driver model support */
340 340
341 /** 341 /**
342 * struct mmc_uclass_priv - Holds information about a device used by the uclass 342 * struct mmc_uclass_priv - Holds information about a device used by the uclass
343 */ 343 */
344 struct mmc_uclass_priv { 344 struct mmc_uclass_priv {
345 struct mmc *mmc; 345 struct mmc *mmc;
346 }; 346 };
347 347
348 /** 348 /**
349 * mmc_get_mmc_dev() - get the MMC struct pointer for a device 349 * mmc_get_mmc_dev() - get the MMC struct pointer for a device
350 * 350 *
351 * Provided that the device is already probed and ready for use, this value 351 * Provided that the device is already probed and ready for use, this value
352 * will be available. 352 * will be available.
353 * 353 *
354 * @dev: Device 354 * @dev: Device
355 * @return associated mmc struct pointer if available, else NULL 355 * @return associated mmc struct pointer if available, else NULL
356 */ 356 */
357 struct mmc *mmc_get_mmc_dev(struct udevice *dev); 357 struct mmc *mmc_get_mmc_dev(struct udevice *dev);
358 358
359 /* End of driver model support */ 359 /* End of driver model support */
360 360
361 struct mmc_cid { 361 struct mmc_cid {
362 unsigned long psn; 362 unsigned long psn;
363 unsigned short oid; 363 unsigned short oid;
364 unsigned char mid; 364 unsigned char mid;
365 unsigned char prv; 365 unsigned char prv;
366 unsigned char mdt; 366 unsigned char mdt;
367 char pnm[7]; 367 char pnm[7];
368 }; 368 };
369 369
370 struct mmc_cmd { 370 struct mmc_cmd {
371 ushort cmdidx; 371 ushort cmdidx;
372 uint resp_type; 372 uint resp_type;
373 uint cmdarg; 373 uint cmdarg;
374 uint response[4]; 374 uint response[4];
375 }; 375 };
376 376
377 struct mmc_data { 377 struct mmc_data {
378 union { 378 union {
379 char *dest; 379 char *dest;
380 const char *src; /* src buffers don't get written to */ 380 const char *src; /* src buffers don't get written to */
381 }; 381 };
382 uint flags; 382 uint flags;
383 uint blocks; 383 uint blocks;
384 uint blocksize; 384 uint blocksize;
385 }; 385 };
386 386
387 /* forward decl. */ 387 /* forward decl. */
388 struct mmc; 388 struct mmc;
389 389
390 #if CONFIG_IS_ENABLED(DM_MMC) 390 #if CONFIG_IS_ENABLED(DM_MMC)
391 struct dm_mmc_ops { 391 struct dm_mmc_ops {
392 /** 392 /**
393 * send_cmd() - Send a command to the MMC device 393 * send_cmd() - Send a command to the MMC device
394 * 394 *
395 * @dev: Device to receive the command 395 * @dev: Device to receive the command
396 * @cmd: Command to send 396 * @cmd: Command to send
397 * @data: Additional data to send/receive 397 * @data: Additional data to send/receive
398 * @return 0 if OK, -ve on error 398 * @return 0 if OK, -ve on error
399 */ 399 */
400 int (*send_cmd)(struct udevice *dev, struct mmc_cmd *cmd, 400 int (*send_cmd)(struct udevice *dev, struct mmc_cmd *cmd,
401 struct mmc_data *data); 401 struct mmc_data *data);
402 402
403 /** 403 /**
404 * set_ios() - Set the I/O speed/width for an MMC device 404 * set_ios() - Set the I/O speed/width for an MMC device
405 * 405 *
406 * @dev: Device to update 406 * @dev: Device to update
407 * @return 0 if OK, -ve on error 407 * @return 0 if OK, -ve on error
408 */ 408 */
409 int (*set_ios)(struct udevice *dev); 409 int (*set_ios)(struct udevice *dev);
410 410
411 /** 411 /**
412 * send_init_stream() - send the initialization stream: 74 clock cycles 412 * send_init_stream() - send the initialization stream: 74 clock cycles
413 * This is used after power up before sending the first command 413 * This is used after power up before sending the first command
414 * 414 *
415 * @dev: Device to update 415 * @dev: Device to update
416 */ 416 */
417 void (*send_init_stream)(struct udevice *dev); 417 void (*send_init_stream)(struct udevice *dev);
418 418
419 /** 419 /**
420 * get_cd() - See whether a card is present 420 * get_cd() - See whether a card is present
421 * 421 *
422 * @dev: Device to check 422 * @dev: Device to check
423 * @return 0 if not present, 1 if present, -ve on error 423 * @return 0 if not present, 1 if present, -ve on error
424 */ 424 */
425 int (*get_cd)(struct udevice *dev); 425 int (*get_cd)(struct udevice *dev);
426 426
427 /** 427 /**
428 * get_wp() - See whether a card has write-protect enabled 428 * get_wp() - See whether a card has write-protect enabled
429 * 429 *
430 * @dev: Device to check 430 * @dev: Device to check
431 * @return 0 if write-enabled, 1 if write-protected, -ve on error 431 * @return 0 if write-enabled, 1 if write-protected, -ve on error
432 */ 432 */
433 int (*get_wp)(struct udevice *dev); 433 int (*get_wp)(struct udevice *dev);
434 434
435 #ifdef MMC_SUPPORTS_TUNING 435 #ifdef MMC_SUPPORTS_TUNING
436 /** 436 /**
437 * execute_tuning() - Start the tuning process 437 * execute_tuning() - Start the tuning process
438 * 438 *
439 * @dev: Device to start the tuning 439 * @dev: Device to start the tuning
440 * @opcode: Command opcode to send 440 * @opcode: Command opcode to send
441 * @return 0 if OK, -ve on error 441 * @return 0 if OK, -ve on error
442 */ 442 */
443 int (*execute_tuning)(struct udevice *dev, uint opcode); 443 int (*execute_tuning)(struct udevice *dev, uint opcode);
444 #endif 444 #endif
445 445
446 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) 446 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
447 /** 447 /**
448 * wait_dat0() - wait until dat0 is in the target state 448 * wait_dat0() - wait until dat0 is in the target state
449 * (CLK must be running during the wait) 449 * (CLK must be running during the wait)
450 * 450 *
451 * @dev: Device to check 451 * @dev: Device to check
452 * @state: target state 452 * @state: target state
453 * @timeout: timeout in us 453 * @timeout: timeout in us
454 * @return 0 if dat0 is in the target state, -ve on error 454 * @return 0 if dat0 is in the target state, -ve on error
455 */ 455 */
456 int (*wait_dat0)(struct udevice *dev, int state, int timeout); 456 int (*wait_dat0)(struct udevice *dev, int state, int timeout);
457 #endif 457 #endif
458 }; 458 };
459 459
460 #define mmc_get_ops(dev) ((struct dm_mmc_ops *)(dev)->driver->ops) 460 #define mmc_get_ops(dev) ((struct dm_mmc_ops *)(dev)->driver->ops)
461 461
462 int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, 462 int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
463 struct mmc_data *data); 463 struct mmc_data *data);
464 int dm_mmc_set_ios(struct udevice *dev); 464 int dm_mmc_set_ios(struct udevice *dev);
465 void dm_mmc_send_init_stream(struct udevice *dev); 465 void dm_mmc_send_init_stream(struct udevice *dev);
466 int dm_mmc_get_cd(struct udevice *dev); 466 int dm_mmc_get_cd(struct udevice *dev);
467 int dm_mmc_get_wp(struct udevice *dev); 467 int dm_mmc_get_wp(struct udevice *dev);
468 int dm_mmc_execute_tuning(struct udevice *dev, uint opcode); 468 int dm_mmc_execute_tuning(struct udevice *dev, uint opcode);
469 int dm_mmc_wait_dat0(struct udevice *dev, int state, int timeout); 469 int dm_mmc_wait_dat0(struct udevice *dev, int state, int timeout);
470 470
471 /* Transition functions for compatibility */ 471 /* Transition functions for compatibility */
472 int mmc_set_ios(struct mmc *mmc); 472 int mmc_set_ios(struct mmc *mmc);
473 void mmc_send_init_stream(struct mmc *mmc); 473 void mmc_send_init_stream(struct mmc *mmc);
474 int mmc_getcd(struct mmc *mmc); 474 int mmc_getcd(struct mmc *mmc);
475 int mmc_getwp(struct mmc *mmc); 475 int mmc_getwp(struct mmc *mmc);
476 int mmc_execute_tuning(struct mmc *mmc, uint opcode); 476 int mmc_execute_tuning(struct mmc *mmc, uint opcode);
477 int mmc_wait_dat0(struct mmc *mmc, int state, int timeout); 477 int mmc_wait_dat0(struct mmc *mmc, int state, int timeout);
478 478
479 #else 479 #else
480 struct mmc_ops { 480 struct mmc_ops {
481 int (*send_cmd)(struct mmc *mmc, 481 int (*send_cmd)(struct mmc *mmc,
482 struct mmc_cmd *cmd, struct mmc_data *data); 482 struct mmc_cmd *cmd, struct mmc_data *data);
483 int (*set_ios)(struct mmc *mmc); 483 int (*set_ios)(struct mmc *mmc);
484 int (*init)(struct mmc *mmc); 484 int (*init)(struct mmc *mmc);
485 int (*getcd)(struct mmc *mmc); 485 int (*getcd)(struct mmc *mmc);
486 int (*getwp)(struct mmc *mmc); 486 int (*getwp)(struct mmc *mmc);
487 }; 487 };
488 #endif 488 #endif
489 489
490 struct mmc_config { 490 struct mmc_config {
491 const char *name; 491 const char *name;
492 #if !CONFIG_IS_ENABLED(DM_MMC) 492 #if !CONFIG_IS_ENABLED(DM_MMC)
493 const struct mmc_ops *ops; 493 const struct mmc_ops *ops;
494 #endif 494 #endif
495 uint host_caps; 495 uint host_caps;
496 uint voltages; 496 uint voltages;
497 uint f_min; 497 uint f_min;
498 uint f_max; 498 uint f_max;
499 uint b_max; 499 uint b_max;
500 unsigned char part_type; 500 unsigned char part_type;
501 }; 501 };
502 502
503 struct sd_ssr { 503 struct sd_ssr {
504 unsigned int au; /* In sectors */ 504 unsigned int au; /* In sectors */
505 unsigned int erase_timeout; /* In milliseconds */ 505 unsigned int erase_timeout; /* In milliseconds */
506 unsigned int erase_offset; /* In milliseconds */ 506 unsigned int erase_offset; /* In milliseconds */
507 }; 507 };
508 508
509 enum bus_mode { 509 enum bus_mode {
510 MMC_LEGACY, 510 MMC_LEGACY,
511 SD_LEGACY, 511 SD_LEGACY,
512 MMC_HS, 512 MMC_HS,
513 SD_HS, 513 SD_HS,
514 MMC_HS_52, 514 MMC_HS_52,
515 MMC_DDR_52, 515 MMC_DDR_52,
516 UHS_SDR12, 516 UHS_SDR12,
517 UHS_SDR25, 517 UHS_SDR25,
518 UHS_SDR50, 518 UHS_SDR50,
519 UHS_DDR50, 519 UHS_DDR50,
520 UHS_SDR104, 520 UHS_SDR104,
521 MMC_HS_200, 521 MMC_HS_200,
522 MMC_MODES_END 522 MMC_MODES_END
523 }; 523 };
524 524
525 const char *mmc_mode_name(enum bus_mode mode); 525 const char *mmc_mode_name(enum bus_mode mode);
526 void mmc_dump_capabilities(const char *text, uint caps); 526 void mmc_dump_capabilities(const char *text, uint caps);
527 527
528 static inline bool mmc_is_mode_ddr(enum bus_mode mode) 528 static inline bool mmc_is_mode_ddr(enum bus_mode mode)
529 { 529 {
530 if (mode == MMC_DDR_52) 530 if (mode == MMC_DDR_52)
531 return true; 531 return true;
532 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) 532 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
533 else if (mode == UHS_DDR50) 533 else if (mode == UHS_DDR50)
534 return true; 534 return true;
535 #endif 535 #endif
536 else 536 else
537 return false; 537 return false;
538 } 538 }
539 539
540 #define UHS_CAPS (MMC_CAP(UHS_SDR12) | MMC_CAP(UHS_SDR25) | \ 540 #define UHS_CAPS (MMC_CAP(UHS_SDR12) | MMC_CAP(UHS_SDR25) | \
541 MMC_CAP(UHS_SDR50) | MMC_CAP(UHS_SDR104) | \ 541 MMC_CAP(UHS_SDR50) | MMC_CAP(UHS_SDR104) | \
542 MMC_CAP(UHS_DDR50)) 542 MMC_CAP(UHS_DDR50))
543 543
544 static inline bool supports_uhs(uint caps) 544 static inline bool supports_uhs(uint caps)
545 { 545 {
546 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) 546 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
547 return (caps & UHS_CAPS) ? true : false; 547 return (caps & UHS_CAPS) ? true : false;
548 #else 548 #else
549 return false; 549 return false;
550 #endif 550 #endif
551 } 551 }
552 552
553 /* 553 /*
554 * With CONFIG_DM_MMC enabled, struct mmc can be accessed from the MMC device 554 * With CONFIG_DM_MMC enabled, struct mmc can be accessed from the MMC device
555 * with mmc_get_mmc_dev(). 555 * with mmc_get_mmc_dev().
556 * 556 *
557 * TODO struct mmc should be in mmc_private but it's hard to fix right now 557 * TODO struct mmc should be in mmc_private but it's hard to fix right now
558 */ 558 */
559 struct mmc { 559 struct mmc {
560 #if !CONFIG_IS_ENABLED(BLK) 560 #if !CONFIG_IS_ENABLED(BLK)
561 struct list_head link; 561 struct list_head link;
562 #endif 562 #endif
563 const struct mmc_config *cfg; /* provided configuration */ 563 const struct mmc_config *cfg; /* provided configuration */
564 uint version; 564 uint version;
565 void *priv; 565 void *priv;
566 uint has_init; 566 uint has_init;
567 int high_capacity; 567 int high_capacity;
568 bool clk_disable; /* true if the clock can be turned off */ 568 bool clk_disable; /* true if the clock can be turned off */
569 uint bus_width; 569 uint bus_width;
570 uint clock; 570 uint clock;
571 enum mmc_voltage signal_voltage; 571 enum mmc_voltage signal_voltage;
572 uint card_caps; 572 uint card_caps;
573 uint host_caps; 573 uint host_caps;
574 uint ocr; 574 uint ocr;
575 uint dsr; 575 uint dsr;
576 uint dsr_imp; 576 uint dsr_imp;
577 uint scr[2]; 577 uint scr[2];
578 uint csd[4]; 578 uint csd[4];
579 uint cid[4]; 579 uint cid[4];
580 ushort rca; 580 ushort rca;
581 u8 part_support; 581 u8 part_support;
582 u8 part_attr; 582 u8 part_attr;
583 u8 wr_rel_set; 583 u8 wr_rel_set;
584 u8 part_config; 584 u8 part_config;
585 uint tran_speed; 585 uint tran_speed;
586 uint legacy_speed; /* speed for the legacy mode provided by the card */ 586 uint legacy_speed; /* speed for the legacy mode provided by the card */
587 uint read_bl_len; 587 uint read_bl_len;
588 #if CONFIG_IS_ENABLED(MMC_WRITE) 588 #if CONFIG_IS_ENABLED(MMC_WRITE)
589 uint write_bl_len; 589 uint write_bl_len;
590 uint erase_grp_size; /* in 512-byte sectors */ 590 uint erase_grp_size; /* in 512-byte sectors */
591 #endif 591 #endif
592 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
592 uint hc_wp_grp_size; /* in 512-byte sectors */ 593 uint hc_wp_grp_size; /* in 512-byte sectors */
594 #endif
593 #if CONFIG_IS_ENABLED(MMC_WRITE) 595 #if CONFIG_IS_ENABLED(MMC_WRITE)
594 struct sd_ssr ssr; /* SD status register */ 596 struct sd_ssr ssr; /* SD status register */
595 #endif 597 #endif
596 u64 capacity; 598 u64 capacity;
597 u64 capacity_user; 599 u64 capacity_user;
598 u64 capacity_boot; 600 u64 capacity_boot;
599 u64 capacity_rpmb; 601 u64 capacity_rpmb;
600 u64 capacity_gp[4]; 602 u64 capacity_gp[4];
601 #ifndef CONFIG_SPL_BUILD 603 #ifndef CONFIG_SPL_BUILD
602 u64 enh_user_start; 604 u64 enh_user_start;
603 u64 enh_user_size; 605 u64 enh_user_size;
604 #endif 606 #endif
605 #if !CONFIG_IS_ENABLED(BLK) 607 #if !CONFIG_IS_ENABLED(BLK)
606 struct blk_desc block_dev; 608 struct blk_desc block_dev;
607 #endif 609 #endif
608 char op_cond_pending; /* 1 if we are waiting on an op_cond command */ 610 char op_cond_pending; /* 1 if we are waiting on an op_cond command */
609 char init_in_progress; /* 1 if we have done mmc_start_init() */ 611 char init_in_progress; /* 1 if we have done mmc_start_init() */
610 char preinit; /* start init as early as possible */ 612 char preinit; /* start init as early as possible */
611 int ddr_mode; 613 int ddr_mode;
612 #if CONFIG_IS_ENABLED(DM_MMC) 614 #if CONFIG_IS_ENABLED(DM_MMC)
613 struct udevice *dev; /* Device for this MMC controller */ 615 struct udevice *dev; /* Device for this MMC controller */
614 #if CONFIG_IS_ENABLED(DM_REGULATOR) 616 #if CONFIG_IS_ENABLED(DM_REGULATOR)
615 struct udevice *vmmc_supply; /* Main voltage regulator (Vcc)*/ 617 struct udevice *vmmc_supply; /* Main voltage regulator (Vcc)*/
616 struct udevice *vqmmc_supply; /* IO voltage regulator (Vccq)*/ 618 struct udevice *vqmmc_supply; /* IO voltage regulator (Vccq)*/
617 #endif 619 #endif
618 #endif 620 #endif
619 u8 *ext_csd; 621 u8 *ext_csd;
620 u32 cardtype; /* cardtype read from the MMC */ 622 u32 cardtype; /* cardtype read from the MMC */
621 enum mmc_voltage current_voltage; 623 enum mmc_voltage current_voltage;
622 enum bus_mode selected_mode; /* mode currently used */ 624 enum bus_mode selected_mode; /* mode currently used */
623 enum bus_mode best_mode; /* best mode is the supported mode with the 625 enum bus_mode best_mode; /* best mode is the supported mode with the
624 * highest bandwidth. It may not always be the 626 * highest bandwidth. It may not always be the
625 * operating mode due to limitations when 627 * operating mode due to limitations when
626 * accessing the boot partitions 628 * accessing the boot partitions
627 */ 629 */
628 u32 quirks; 630 u32 quirks;
629 }; 631 };
630 632
631 struct mmc_hwpart_conf { 633 struct mmc_hwpart_conf {
632 struct { 634 struct {
633 uint enh_start; /* in 512-byte sectors */ 635 uint enh_start; /* in 512-byte sectors */
634 uint enh_size; /* in 512-byte sectors, if 0 no enh area */ 636 uint enh_size; /* in 512-byte sectors, if 0 no enh area */
635 unsigned wr_rel_change : 1; 637 unsigned wr_rel_change : 1;
636 unsigned wr_rel_set : 1; 638 unsigned wr_rel_set : 1;
637 } user; 639 } user;
638 struct { 640 struct {
639 uint size; /* in 512-byte sectors */ 641 uint size; /* in 512-byte sectors */
640 unsigned enhanced : 1; 642 unsigned enhanced : 1;
641 unsigned wr_rel_change : 1; 643 unsigned wr_rel_change : 1;
642 unsigned wr_rel_set : 1; 644 unsigned wr_rel_set : 1;
643 } gp_part[4]; 645 } gp_part[4];
644 }; 646 };
645 647
646 enum mmc_hwpart_conf_mode { 648 enum mmc_hwpart_conf_mode {
647 MMC_HWPART_CONF_CHECK, 649 MMC_HWPART_CONF_CHECK,
648 MMC_HWPART_CONF_SET, 650 MMC_HWPART_CONF_SET,
649 MMC_HWPART_CONF_COMPLETE, 651 MMC_HWPART_CONF_COMPLETE,
650 }; 652 };
651 653
652 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv); 654 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv);
653 655
654 /** 656 /**
655 * mmc_bind() - Set up a new MMC device ready for probing 657 * mmc_bind() - Set up a new MMC device ready for probing
656 * 658 *
657 * A child block device is bound with the IF_TYPE_MMC interface type. This 659 * A child block device is bound with the IF_TYPE_MMC interface type. This
658 * allows the device to be used with CONFIG_BLK 660 * allows the device to be used with CONFIG_BLK
659 * 661 *
660 * @dev: MMC device to set up 662 * @dev: MMC device to set up
661 * @mmc: MMC struct 663 * @mmc: MMC struct
662 * @cfg: MMC configuration 664 * @cfg: MMC configuration
663 * @return 0 if OK, -ve on error 665 * @return 0 if OK, -ve on error
664 */ 666 */
665 int mmc_bind(struct udevice *dev, struct mmc *mmc, 667 int mmc_bind(struct udevice *dev, struct mmc *mmc,
666 const struct mmc_config *cfg); 668 const struct mmc_config *cfg);
667 void mmc_destroy(struct mmc *mmc); 669 void mmc_destroy(struct mmc *mmc);
668 670
669 /** 671 /**
670 * mmc_unbind() - Unbind a MMC device's child block device 672 * mmc_unbind() - Unbind a MMC device's child block device
671 * 673 *
672 * @dev: MMC device 674 * @dev: MMC device
673 * @return 0 if OK, -ve on error 675 * @return 0 if OK, -ve on error
674 */ 676 */
675 int mmc_unbind(struct udevice *dev); 677 int mmc_unbind(struct udevice *dev);
676 int mmc_initialize(bd_t *bis); 678 int mmc_initialize(bd_t *bis);
677 int mmc_init(struct mmc *mmc); 679 int mmc_init(struct mmc *mmc);
678 int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error); 680 int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error);
679 681
680 /** 682 /**
681 * mmc_of_parse() - Parse the device tree to get the capabilities of the host 683 * mmc_of_parse() - Parse the device tree to get the capabilities of the host
682 * 684 *
683 * @dev: MMC device 685 * @dev: MMC device
684 * @cfg: MMC configuration 686 * @cfg: MMC configuration
685 * @return 0 if OK, -ve on error 687 * @return 0 if OK, -ve on error
686 */ 688 */
687 int mmc_of_parse(struct udevice *dev, struct mmc_config *cfg); 689 int mmc_of_parse(struct udevice *dev, struct mmc_config *cfg);
688 690
689 int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size); 691 int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size);
690 692
691 /** 693 /**
692 * mmc_voltage_to_mv() - Convert a mmc_voltage in mV 694 * mmc_voltage_to_mv() - Convert a mmc_voltage in mV
693 * 695 *
694 * @voltage: The mmc_voltage to convert 696 * @voltage: The mmc_voltage to convert
695 * @return the value in mV if OK, -EINVAL on error (invalid mmc_voltage value) 697 * @return the value in mV if OK, -EINVAL on error (invalid mmc_voltage value)
696 */ 698 */
697 int mmc_voltage_to_mv(enum mmc_voltage voltage); 699 int mmc_voltage_to_mv(enum mmc_voltage voltage);
698 700
699 /** 701 /**
700 * mmc_set_clock() - change the bus clock 702 * mmc_set_clock() - change the bus clock
701 * @mmc: MMC struct 703 * @mmc: MMC struct
702 * @clock: bus frequency in Hz 704 * @clock: bus frequency in Hz
703 * @disable: flag indicating if the clock must on or off 705 * @disable: flag indicating if the clock must on or off
704 * @return 0 if OK, -ve on error 706 * @return 0 if OK, -ve on error
705 */ 707 */
706 int mmc_set_clock(struct mmc *mmc, uint clock, bool disable); 708 int mmc_set_clock(struct mmc *mmc, uint clock, bool disable);
707 709
708 struct mmc *find_mmc_device(int dev_num); 710 struct mmc *find_mmc_device(int dev_num);
709 int mmc_set_dev(int dev_num); 711 int mmc_set_dev(int dev_num);
710 void print_mmc_devices(char separator); 712 void print_mmc_devices(char separator);
711 713
712 /** 714 /**
713 * get_mmc_num() - get the total MMC device number 715 * get_mmc_num() - get the total MMC device number
714 * 716 *
715 * @return 0 if there is no MMC device, else the number of devices 717 * @return 0 if there is no MMC device, else the number of devices
716 */ 718 */
717 int get_mmc_num(void); 719 int get_mmc_num(void);
718 int mmc_switch_part(struct mmc *mmc, unsigned int part_num); 720 int mmc_switch_part(struct mmc *mmc, unsigned int part_num);
719 int mmc_hwpart_config(struct mmc *mmc, const struct mmc_hwpart_conf *conf, 721 int mmc_hwpart_config(struct mmc *mmc, const struct mmc_hwpart_conf *conf,
720 enum mmc_hwpart_conf_mode mode); 722 enum mmc_hwpart_conf_mode mode);
721 723
722 #if !CONFIG_IS_ENABLED(DM_MMC) 724 #if !CONFIG_IS_ENABLED(DM_MMC)
723 int mmc_getcd(struct mmc *mmc); 725 int mmc_getcd(struct mmc *mmc);
724 int board_mmc_getcd(struct mmc *mmc); 726 int board_mmc_getcd(struct mmc *mmc);
725 int mmc_getwp(struct mmc *mmc); 727 int mmc_getwp(struct mmc *mmc);
726 int board_mmc_getwp(struct mmc *mmc); 728 int board_mmc_getwp(struct mmc *mmc);
727 #endif 729 #endif
728 730
729 int mmc_set_dsr(struct mmc *mmc, u16 val); 731 int mmc_set_dsr(struct mmc *mmc, u16 val);
730 /* Function to change the size of boot partition and rpmb partitions */ 732 /* Function to change the size of boot partition and rpmb partitions */
731 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, 733 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
732 unsigned long rpmbsize); 734 unsigned long rpmbsize);
733 /* Function to modify the PARTITION_CONFIG field of EXT_CSD */ 735 /* Function to modify the PARTITION_CONFIG field of EXT_CSD */
734 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access); 736 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access);
735 /* Function to modify the BOOT_BUS_WIDTH field of EXT_CSD */ 737 /* Function to modify the BOOT_BUS_WIDTH field of EXT_CSD */
736 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode); 738 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode);
737 /* Function to modify the RST_n_FUNCTION field of EXT_CSD */ 739 /* Function to modify the RST_n_FUNCTION field of EXT_CSD */
738 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable); 740 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable);
739 /* Functions to read / write the RPMB partition */ 741 /* Functions to read / write the RPMB partition */
740 int mmc_rpmb_set_key(struct mmc *mmc, void *key); 742 int mmc_rpmb_set_key(struct mmc *mmc, void *key);
741 int mmc_rpmb_get_counter(struct mmc *mmc, unsigned long *counter); 743 int mmc_rpmb_get_counter(struct mmc *mmc, unsigned long *counter);
742 int mmc_rpmb_read(struct mmc *mmc, void *addr, unsigned short blk, 744 int mmc_rpmb_read(struct mmc *mmc, void *addr, unsigned short blk,
743 unsigned short cnt, unsigned char *key); 745 unsigned short cnt, unsigned char *key);
744 int mmc_rpmb_write(struct mmc *mmc, void *addr, unsigned short blk, 746 int mmc_rpmb_write(struct mmc *mmc, void *addr, unsigned short blk,
745 unsigned short cnt, unsigned char *key); 747 unsigned short cnt, unsigned char *key);
746 #ifdef CONFIG_CMD_BKOPS_ENABLE 748 #ifdef CONFIG_CMD_BKOPS_ENABLE
747 int mmc_set_bkops_enable(struct mmc *mmc); 749 int mmc_set_bkops_enable(struct mmc *mmc);
748 #endif 750 #endif
749 751
750 /** 752 /**
751 * Start device initialization and return immediately; it does not block on 753 * Start device initialization and return immediately; it does not block on
752 * polling OCR (operation condition register) status. Then you should call 754 * polling OCR (operation condition register) status. Then you should call
753 * mmc_init, which would block on polling OCR status and complete the device 755 * mmc_init, which would block on polling OCR status and complete the device
754 * initializatin. 756 * initializatin.
755 * 757 *
756 * @param mmc Pointer to a MMC device struct 758 * @param mmc Pointer to a MMC device struct
757 * @return 0 on success, IN_PROGRESS on waiting for OCR status, <0 on error. 759 * @return 0 on success, IN_PROGRESS on waiting for OCR status, <0 on error.
758 */ 760 */
759 int mmc_start_init(struct mmc *mmc); 761 int mmc_start_init(struct mmc *mmc);
760 762
761 /** 763 /**
762 * Set preinit flag of mmc device. 764 * Set preinit flag of mmc device.
763 * 765 *
764 * This will cause the device to be pre-inited during mmc_initialize(), 766 * This will cause the device to be pre-inited during mmc_initialize(),
765 * which may save boot time if the device is not accessed until later. 767 * which may save boot time if the device is not accessed until later.
766 * Some eMMC devices take 200-300ms to init, but unfortunately they 768 * Some eMMC devices take 200-300ms to init, but unfortunately they
767 * must be sent a series of commands to even get them to start preparing 769 * must be sent a series of commands to even get them to start preparing
768 * for operation. 770 * for operation.
769 * 771 *
770 * @param mmc Pointer to a MMC device struct 772 * @param mmc Pointer to a MMC device struct
771 * @param preinit preinit flag value 773 * @param preinit preinit flag value
772 */ 774 */
773 void mmc_set_preinit(struct mmc *mmc, int preinit); 775 void mmc_set_preinit(struct mmc *mmc, int preinit);
774 776
775 #ifdef CONFIG_MMC_SPI 777 #ifdef CONFIG_MMC_SPI
776 #define mmc_host_is_spi(mmc) ((mmc)->cfg->host_caps & MMC_MODE_SPI) 778 #define mmc_host_is_spi(mmc) ((mmc)->cfg->host_caps & MMC_MODE_SPI)
777 #else 779 #else
778 #define mmc_host_is_spi(mmc) 0 780 #define mmc_host_is_spi(mmc) 0
779 #endif 781 #endif
780 struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode); 782 struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode);
781 783
782 void board_mmc_power_init(void); 784 void board_mmc_power_init(void);
783 int board_mmc_init(bd_t *bis); 785 int board_mmc_init(bd_t *bis);
784 int cpu_mmc_init(bd_t *bis); 786 int cpu_mmc_init(bd_t *bis);
785 int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr); 787 int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr);
786 int mmc_get_env_dev(void); 788 int mmc_get_env_dev(void);
787 789
788 /* Set block count limit because of 16 bit register limit on some hardware*/ 790 /* Set block count limit because of 16 bit register limit on some hardware*/
789 #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT 791 #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
790 #define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535 792 #define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
791 #endif 793 #endif
792 794
793 /** 795 /**
794 * mmc_get_blk_desc() - Get the block descriptor for an MMC device 796 * mmc_get_blk_desc() - Get the block descriptor for an MMC device
795 * 797 *
796 * @mmc: MMC device 798 * @mmc: MMC device
797 * @return block device if found, else NULL 799 * @return block device if found, else NULL
798 */ 800 */
799 struct blk_desc *mmc_get_blk_desc(struct mmc *mmc); 801 struct blk_desc *mmc_get_blk_desc(struct mmc *mmc);
800 802
801 #endif /* _MMC_H_ */ 803 #endif /* _MMC_H_ */
802 804