From be25ff5c10a7f8292f461599d406d08fa7a89e69 Mon Sep 17 00:00:00 2001 From: Leonid Lobachev Date: Mon, 4 Jun 2018 18:49:19 -0700 Subject: [PATCH] MA-14518 AIY: Enable i2c2 and i2c3 in u-boot. Enable i2c2 and i2c3 for AIY. Change-Id: I984e2e76e7c8929cc62088b6838c81f5dc838568 --- arch/arm/dts/fsl-imx8mq-aiy.dts | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/fsl-imx8mq-aiy.dts b/arch/arm/dts/fsl-imx8mq-aiy.dts index 4316554..7453e30 100644 --- a/arch/arm/dts/fsl-imx8mq-aiy.dts +++ b/arch/arm/dts/fsl-imx8mq-aiy.dts @@ -1,5 +1,5 @@ /* - * Copyright 2018 NXP + * Copyright 2019 NXP * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -187,6 +187,12 @@ >; }; + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000007f + MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x4000007f + >; + }; pinctrl_pcie0: pcie0grp { fsl,pins = < @@ -568,7 +574,14 @@ clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; - status = "disabled"; + status = "okay"; +}; + +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; }; &pcie0{ -- 1.9.1