Eric Lee / smarc-uboot

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Commit cee055d7eb1c9178f3fca8d576a2cd6bb21aaed6

Authored by Breno Lima
Committed by Ye Li
1 parent 0c515e4972
Exists in smarc-imx_v2018.03_4.14.78_1.0.0_ga

MLK-20583-1 imx: mx6sabresd: Enable OCOTP CTRL clock in DCD and plugin 

The HAB code can not set Field Return and SRK Revoke sticky bits in case
OCOTP CTRL clock is gated out.

In case we disable OCOTP CTRL clock in DCD and plugin those features may
not operate as expected.

Keep OCOTP CTRL clock enabled in DCD and plugin so HAB can propely lock
those features, users should use the CSF Unlock command to prevent those
features from being locked.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
(cherry picked from commit fe78359704fa5c5199daf0274019ae58980bc710)

Showing 6 changed files with 6 additions and 6 deletions Side-by-side Diff

board/freescale/mx6sabresd/mx6dlsabresd.cfg
Diff comments   View file @ cee055d
... ... @@ -136,7 +136,7 @@
136 136 /* set the default clock gate to save power */
137 137 DATA 4 0x020c4068 0x00C03F3F
138 138 DATA 4 0x020c406c 0x0030FC03
139   -DATA 4 0x020c4070 0x0FFFC000
  139 +DATA 4 0x020c4070 0x0FFFF000
140 140 DATA 4 0x020c4074 0x3FF00000
141 141 DATA 4 0x020c4078 0x00FFF300
142 142 DATA 4 0x020c407c 0x0F0000C3
board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg
Diff comments   View file @ cee055d
... ... @@ -135,7 +135,7 @@
135 135 /* set the default clock gate to save power */
136 136 DATA 4 0x020c4068 0x00C03F3F
137 137 DATA 4 0x020c406c 0x0030FC03
138   -DATA 4 0x020c4070 0x0FFFC000
  138 +DATA 4 0x020c4070 0x0FFFF000
139 139 DATA 4 0x020c4074 0x3FF00000
140 140 DATA 4 0x020c4078 0x00FFF300
141 141 DATA 4 0x020c407c 0x0F0000F3
board/freescale/mx6sabresd/mx6qp.cfg
Diff comments   View file @ cee055d
... ... @@ -147,7 +147,7 @@
147 147 /* set the default clock gate to save power */
148 148 DATA 4, 0x020c4068, 0x00C03F3F
149 149 DATA 4, 0x020c406c, 0x0030FC03
150   -DATA 4, 0x020c4070, 0x0FFFC000
  150 +DATA 4, 0x020c4070, 0x0FFFF000
151 151 DATA 4, 0x020c4074, 0x3FF00000
152 152 DATA 4, 0x020c4078, 0x00FFF300
153 153 DATA 4, 0x020c407c, 0x0F0000F3
board/freescale/mx6sabresd/mx6qp_optee.cfg
Diff comments   View file @ cee055d
... ... @@ -147,7 +147,7 @@
147 147 /* set the default clock gate to save power */
148 148 DATA 4, 0x020c4068, 0x00C03F3F
149 149 DATA 4, 0x020c406c, 0x0030FC03
150   -DATA 4, 0x020c4070, 0x0FFFC000
  150 +DATA 4, 0x020c4070, 0x0FFFF000
151 151 DATA 4, 0x020c4074, 0x3FF00000
152 152 DATA 4, 0x020c4078, 0x00FFF300
153 153 DATA 4, 0x020c407c, 0x0F0000F3
board/freescale/mx6sabresd/mx6solo_4x_mt41j128.cfg
Diff comments   View file @ cee055d
... ... @@ -111,7 +111,7 @@
111 111 /* set the default clock gate to save power */
112 112 DATA 4, 0x020c4068, 0x00C03F3F
113 113 DATA 4, 0x020c406c, 0x0030FC03
114   -DATA 4, 0x020c4070, 0x0FFFC000
  114 +DATA 4, 0x020c4070, 0x0FFFF000
115 115 DATA 4, 0x020c4074, 0x3FF00000
116 116 DATA 4, 0x020c4078, 0x00FFF300
117 117 DATA 4, 0x020c407c, 0x0F0000C3
board/freescale/mx6sabresd/plugin.S
Diff comments   View file @ cee055d
... ... @@ -636,7 +636,7 @@
636 636 str r1, [r0, #0x068]
637 637 ldr r1, =0x0030FC03
638 638 str r1, [r0, #0x06c]
639   - ldr r1, =0x0FFFC000
  639 + ldr r1, =0x0FFFF000
640 640 str r1, [r0, #0x070]
641 641 ldr r1, =0x3FF00000
642 642 str r1, [r0, #0x074]