04 Mar, 2015
1 commit
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Signed-off-by: Tom Rini
03 Mar, 2015
3 commits
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Signed-off-by: Sinan Akman
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Add basic Xilinx ZynqMP arm64 support.
Serial and SD is supported.
It supports emulation platfrom ep108 and QEMU.Signed-off-by: Michal Simek
Reviewed-by: Tom Rini
02 Mar, 2015
24 commits
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Signed-off-by: Andreas Bießmann
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This code was introduced to support the multiple .config
configuration in U-Boot. We do not need it any more.Signed-off-by: Masahiro Yamada
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Fix trivial typo.
Acked-by: Simon Glass
Signed-off-by: Axel Lin -
Signed-off-by: Tom Rini
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With a389531 we now call readl() from this file so add so
that we have a prototype for the function.Signed-off-by: Tom Rini
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After discussion during the last u-boot mini summit with USB maintainer -
Marek Vasut - it has been decided, that gadget development should be
coordinated by DFU custodian.Such patch formalizes current development status.
Signed-off-by: Lukasz Majewski
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Integrate latest validated register settings from Toradex WinCE BSP
4.2 working accross all module versions from early V1.x, V1.2D, V2.2B
to V2.4A.Signed-off-by: Marcel Ziswiler
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Usually not required for NOR flash.
Signed-off-by: Marcel Ziswiler
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Signed-off-by: Marcel Ziswiler
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While 'mmc init' is no longer required the address to bootm the kernel
from NOR flash was wrong.Signed-off-by: Marcel Ziswiler
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Specify a CONFIG_BOARD_SIZE_LIMIT of 256 KB in order to avoid
overwriting the factory configuration block located at offset 0x40000
in NOR flash.Signed-off-by: Marcel Ziswiler
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To save more than 20 KB of precious space in NOR flash get rid of the
following configuration options:CONFIG_CMD_LOADB
CONFIG_CMD_LOADS
CONFIG_SYS_LONGHELPSigned-off-by: Marcel Ziswiler
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Migrate Toradex Colibri PXA270 to use CONFIG_SYS_GENERIC_BOARD.
Signed-off-by: Marcel Ziswiler
Reviewed-by: Simon Glass
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I couldn't quite figure out whether or not CONFIG_SYS_ENV_IS_NOWHERE
actually ever worked but nowadays this is called CONFIG_ENV_IS_NOWHERE.Signed-off-by: Marcel Ziswiler
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Signed-off-by: Marcel Ziswiler
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Signed-off-by: Marcel Ziswiler
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Basically finish what the following commit started a long time ago:
488f5d8790c451fc527fe5d2ef218f2a5e40ea17
Signed-off-by: Marcel Ziswiler
For mx35pdk/woodburn:
Acked-by: Stefano Babic
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Signed-off-by: Marcel Ziswiler
28 Feb, 2015
12 commits
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Each way of the system cache has 256 entries for PH1-Pro4 and older
SoCs, whereas 512 entries for PH1-Pro5 and newer SoCs. The line
size is still 128 byte. Thus, the way size is 32KB/64KB for old/new
SoCs.To keep lowlevel_init SoC-independent, set BOOT_RAM_SIZE to the
constant value 32KB. It is large enough for temporary RAM and
should work for all the SoCs of UniPhier family.Signed-off-by: Masahiro Yamada
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This function was intended for MN2WS0235 (what we call PH1-Pro4TV).
On that SoC, MPLL is already running on the power-on reset and it
makes sense to stop the PLL at early boot-up.
On the other hand, PH1-Pro4(R) does not have SC_MPLLOSCCTL register,
so this function has no point.Signed-off-by: Masahiro Yamada
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This code is duplicated in ph1-ld4/sg_init.c and ph1-pro4/sg_init.c.
Merge the same code into a new file, memconf.c.The helper functions no longer have to be placed in the header file.
Also, move them into memconf.c.Signed-off-by: Masahiro Yamada
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The 3CS support card (CONFIG_DCC_MICRO_SUPPORT_CARD) used to be used
very often before, but it is recently getting a minority. Swith to
the 1CS support card (CONFIG_PFC_MICRO_SUPPORT_CARD).Signed-off-by: Masahiro Yamada
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Two support card variants are used with UniPhier reference boards:
- 1 chip select support card (original CPLD)
- 3 chip selects support card (ARIMA-compatible CPLD)Currently, the former is only supported on PH1-Pro4, but it can be
expanded to PH1-LD4, PH1-sLD8 with a little code change.Signed-off-by: Masahiro Yamada
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PH1-Pro4 includes both EHCI and xHCI IP cores.
Unfortunately, U-Boot cannot enable EHCI and xHCI support
simultaneously. Some users may wish Super-Speed connection.
Disable CONFIG_USB_EHCI_HCD and enable CONFIG_USB_XHCI_HCD.Signed-off-by: Masahiro Yamada
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Support xHCI host driver used on Panasonic UniPhier platform.
Signed-off-by: Masahiro Yamada
Acked-by: Marek Vasut -
Each USB port corresponds to the following IP core:
port0: xHCI (0x65a00000) SS+HS
port1: xHCI (0x65c00000) HS (SS PHY is not implemented)
port2: EHCI (0x5a800100) HS
port3: EHCI (0x5a810100) HSSigned-off-by: Masahiro Yamada
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This is necessary to use the USB 3.0 host controllers on PH1-Pro4.
Signed-off-by: Masahiro Yamada
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This is necessary to use the xHCI cores for PH1-Pro4.
Signed-off-by: Masahiro Yamada
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EHCI host controllers have a common register interface.
We may wish to implement a generic EHCI driver someday.Signed-off-by: Masahiro Yamada
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Because uniphier_ehci_reset() is only called from ehci-uniphier.c,
it can be a static function there.Signed-off-by: Masahiro Yamada
Acked-by: Marek Vasut