18 Mar, 2015

3 commits


17 Mar, 2015

10 commits


16 Mar, 2015

3 commits


15 Mar, 2015

3 commits


13 Mar, 2015

15 commits

  • The Driver Model description in README was removed by commit
    65eb659e56fa (README: remove description about driver model
    configuration options), and was revived by mistake by commit
    b79dadf846e5 when resolving the conflict.

    Signed-off-by: Masahiro Yamada
    Cc: Tom Rini
    Acked-by: Simon Glass

    Masahiro Yamada
     
  • This should make it more clear why there appear to be C pre-processor
    symbols in the file that contain mixed case. They're really error
    messages.

    Suggested-by: Simon Glass
    Signed-off-by: Stephen Warren
    Reviewed-by: Tom Rini
    Reviewed-by: Simon Glass

    Stephen Warren
     
  • When Beagle X15 is connected to Gigabit switch, it takes
    more time to finish auto-negotiation than on a 10/100 switch.

    The default 4 second limit times-out more often than not. This is
    observed when testing with a D-Link DGS-1008A desktop switch.

    Increase the auto-negotiation time-out for Beagle-X15 to handle
    this case.

    Signed-off-by: Sekhar Nori
    Reviewed-by: Tom Rini

    Sekhar Nori
     
  • RX51 has a secure logic which uses different parameters compared to
    traditional implementation. So, make the generic secure acr write
    over-ride-able by board file and refactor rx51 code to use this.

    While at it, enable the OMAP3 specific errata code for 454179, 430973,
    621766.

    Signed-off-by: Nishanth Menon
    Reviewed-by: Tom Rini

    Nishanth Menon
     
  • Enable the OMAP3 specific errata code for 454179, 430973, 621766
    and while at it, remove legacy non-revision checked errata logic.

    Signed-off-by: Nishanth Menon
    Tested-by: Matt Porter
    Reviewed-by: Tom Rini

    Nishanth Menon
     
  • Update to existing recommendation for L2ACTLR configuration to prevent
    system instability and optimize performance.

    These apply to both OMAP5 and DRA7.

    Reported-by: Vivek Chengalvala
    Signed-off-by: Nishanth Menon
    Reviewed-by: Tom Rini

    Nishanth Menon
     
  • This patch enables the workaround for ARM errata 798870 for OMAP5 /
    DRA7 which says "If back-to-back speculative cache line fills (fill
    A and fill B) are issued from the L1 data cache of a CPU to the
    L2 cache, the second request (fill B) is then cancelled, and the
    second request would have detected a hazard against a recent write or
    eviction (write B) to the same cache line as fill B then the L2 logic
    might deadlock."

    An l2auxctlr accessor implementation for OMAP5 and DRA7 is introduced
    here as well.

    Signed-off-by: Praveen Rao
    Signed-off-by: Angela Stegmaier
    Signed-off-by: Nishanth Menon
    Tested-by: Matt Porter
    Reviewed-by: Tom Rini

    Praveen Rao
     
  • omap_smc1 is now generic enough to remove duplicate
    omap3_gp_romcode_call logic that omap3 introduced.

    As part of this change, move to using the generic lowlevel_init.S for
    omap3 as well.

    Signed-off-by: Nishanth Menon
    Tested-by: Matt Porter
    Reviewed-by: Tom Rini

    Nishanth Menon
     
  • This is in preperation of using generic cross OMAP code.

    Signed-off-by: Nishanth Menon
    Tested-by: Matt Porter
    Reviewed-by: Tom Rini

    Nishanth Menon
     
  • set_pl310_ctrl_reg does use the Secure Monitor Call (SMC) to setup
    PL310 control register, however, that is something that is generic
    enough to be used for OMAP5 generation of processors as well. The only
    difference being the service being invoked for the function.

    So, convert the service to a macro and use a generic name (same as
    that used in Linux for some consistency). While at that, also add a
    data barrier which is necessary as per recommendation.

    While at this, smc #0 is maintained as handcoded assembly thanks to
    various gcc version eccentricities, discussion thread:
    http://marc.info/?t=142542166800001&r=1&w=2

    Signed-off-by: Nishanth Menon
    Tested-by: Matt Porter
    Reviewed-by: Tom Rini

    Nishanth Menon
     
  • 621766: Under a specific set of conditions, executing a sequence of
    NEON or vfp load instructions can cause processor deadlock
    Impacts: Every Cortex-A8 processors with revision lower than r2p1
    Work around: Set L1NEON to 1

    Based on ARM errata Document revision 20.0 (13 Nov 2010)

    Signed-off-by: Nishanth Menon
    Tested-by: Matt Porter
    Reviewed-by: Tom Rini

    Nishanth Menon
     
  • 430973: Stale prediction on replaced inter working branch causes
    Cortex-A8 to execute in the wrong ARM/Thumb state
    Impacts: Every Cortex-A8 processors with revision lower than r2p1
    Work around: Set IBE to 1

    Based on ARM errata Document revision 20.0 (13 Nov 2010)

    Signed-off-by: Nishanth Menon
    Tested-by: Matt Porter
    Reviewed-by: Tom Rini

    Nishanth Menon
     
  • 454179: Stale prediction may inhibit target address misprediction on
    next predicted taken branch
    Impacts: Every Cortex-A8 processors with revision lower than r2p1
    Work around: Set IBE and disable branch size mispredict to 1

    Also provide a hook for SoC specific handling to take place if needed.

    Based on ARM errata Document revision 20.0 (13 Nov 2010)

    Signed-off-by: Nishanth Menon
    Tested-by: Matt Porter
    Reviewed-by: Tom Rini

    Nishanth Menon
     
  • Add workaround for Cortex-A15 ARM erratum 798870 which says
    "If back-to-back speculative cache line fills (fill A and fill B) are
    issued from the L1 data cache of a CPU to the L2 cache, the second
    request (fill B) is then cancelled, and the second request would have
    detected a hazard against a recent write or eviction (write B) to the
    same cache line as fill B then the L2 logic might deadlock."

    Implementations for SoC families such as Exynos, OMAP5/DRA7 etc
    will be widely different.

    Every SoC has slightly different manner of setting up access to L2ACLR
    and similar registers since the Secure Monitor handling of Secure
    Monitor Call(smc) is diverse. Hence an weak function is introduced
    which may be overriden to implement SoC specific accessor implementation.

    Based on ARM errata Document revision 18.0 (22 Nov 2013)

    Signed-off-by: Nishanth Menon
    Tested-by: Matt Porter
    Reviewed-by: Tom Rini

    Nishanth Menon
     
  • The purpose of this build target is to do SPL over USB RNDIS. We remove
    YMODEM, MMC and NAND (and re-set ENV to be built-in) as when those are needed
    we can use the other build targets. This brings us well under size limit again.

    Signed-off-by: Tom Rini

    Tom Rini
     

11 Mar, 2015

1 commit


10 Mar, 2015

5 commits

  • Fix a typo in board/sunxi/Kconfig which caused VIDEO_LCD_PANEL_I2C to be
    enabled on all sunxi boards. Also fix a compile error which shows up once
    VIDEO_LCD_PANEL_I2C is actually disabled on most boards as it should be.

    Signed-off-by: Hans de Goede
    Acked-by: Ian Campbell

    Hans de Goede
     
  • This patch add support for Wexler TAB7200 tablet.

    The Wexler TAB7200 is a A20 based tablet with 7 inch display(800x480),
    capacitive touchscreen(5 fingers), 1G RAM, 4G NAND, micro SD card slot,
    mini HDMI port, 3.5mm audio plug, 1 USB OTG port and 1 USB 2.0 port.

    Signed-off-by: Aleksei Mamlin
    Acked-by: Hans de Goede
    Signed-off-by: Hans de Goede

    Aleksei Mamlin
     
  • Use the AXP223 PMIC to detect VBUS for musb otg support.

    Signed-off-by: Chen-Yu Tsai
    Acked-by: Hans de Goede
    Signed-off-by: Hans de Goede

    Chen-Yu Tsai
     
  • This enables the musb glue layer to use the AXP221's VBUS detection
    function to check for VBUS. This fixes otg support on the A23 q8h
    tablets.

    Note that u-boot never calls musb_shutdown(), so once VBUS is enabled,
    it is never disabled until the system is powered off, or the OS does
    so. This can be used to our advantage to keep VBUS powered into the
    OS, where support for AXP221 is not available yet.

    Fixes: 52defe8f6570 ("sunxi: musb: Check Vbus-det before enabling otg port power")
    Signed-off-by: Chen-Yu Tsai
    Acked-by: Hans de Goede
    Signed-off-by: Hans de Goede

    Chen-Yu Tsai
     
  • Some of the AXP PMICs support VBUS detection, i.e. checking whether
    VBUS power input is available and usable (supplied by an external
    source). A few boards use this instead of a separate GPIO to detect
    VBUS on USB OTG.

    Signed-off-by: Chen-Yu Tsai
    Acked-by: Hans de Goede
    Signed-off-by: Hans de Goede

    Chen-Yu Tsai