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arch/arm/boot/dts/exynos4.dtsi
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b571abb3b ARM: dts: Move pa... |
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/* * Samsung's Exynos4 SoC series common device tree source * * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. * http://www.samsung.com * Copyright (c) 2010-2011 Linaro Ltd. * www.linaro.org * * Samsung's Exynos4 SoC series device nodes are listed in this file. Particular * SoCs from Exynos4 series can include this file and provide values for SoCs * specfic bindings. * * Note: This file does not include device nodes for all the controllers in * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional * nodes can be added to this file. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ |
1c75a78a4 ARM: dts: use mac... |
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#include <dt-bindings/clock/exynos4.h> |
990a7bfd8 ARM: dts: Add aud... |
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#include <dt-bindings/clock/exynos-audss-clk.h> |
3799279f7 ARM: dts: use #in... |
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#include "skeleton.dtsi" |
b571abb3b ARM: dts: Move pa... |
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/ { interrupt-parent = <&gic>; aliases { spi0 = &spi_0; spi1 = &spi_1; spi2 = &spi_2; |
34db4990e ARM: dts: Add ali... |
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i2c0 = &i2c_0; i2c1 = &i2c_1; i2c2 = &i2c_2; i2c3 = &i2c_3; i2c4 = &i2c_4; i2c5 = &i2c_5; i2c6 = &i2c_6; i2c7 = &i2c_7; |
d1b8a41d3 ARM: dts: Add cam... |
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csis0 = &csis_0; csis1 = &csis_1; fimc0 = &fimc_0; fimc1 = &fimc_1; fimc2 = &fimc_2; fimc3 = &fimc_3; |
1e64f48ea ARM: dts: SAMSUNG... |
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serial0 = &serial_0; serial1 = &serial_1; serial2 = &serial_2; serial3 = &serial_3; |
b571abb3b ARM: dts: Move pa... |
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}; |
990a7bfd8 ARM: dts: Add aud... |
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clock_audss: clock-controller@03810000 { compatible = "samsung,exynos4210-audss-clock"; reg = <0x03810000 0x0C>; #clock-cells = <1>; }; i2s0: i2s@03830000 { compatible = "samsung,s5pv210-i2s"; reg = <0x03830000 0x100>; clocks = <&clock_audss EXYNOS_I2S_BUS>; clock-names = "iis"; dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>; dma-names = "tx", "rx", "tx-sec"; samsung,idma-addr = <0x03000000>; status = "disabled"; }; |
096ee6adc ARM: dts: Add chi... |
67 68 69 70 |
chipid@10000000 { compatible = "samsung,exynos4210-chipid"; reg = <0x10000000 0x100>; }; |
21b190d24 ARM: dts: Add MIP... |
71 72 73 74 75 |
mipi_phy: video-phy@10020710 { compatible = "samsung,s5pv210-mipi-video-phy"; reg = <0x10020710 8>; #phy-cells = <1>; }; |
91d88f038 ARM: dts: Set up ... |
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pd_mfc: mfc-power-domain@10023C40 { compatible = "samsung,exynos4210-pd"; reg = <0x10023C40 0x20>; }; pd_g3d: g3d-power-domain@10023C60 { compatible = "samsung,exynos4210-pd"; reg = <0x10023C60 0x20>; }; pd_lcd0: lcd0-power-domain@10023C80 { compatible = "samsung,exynos4210-pd"; reg = <0x10023C80 0x20>; }; pd_tv: tv-power-domain@10023C20 { compatible = "samsung,exynos4210-pd"; reg = <0x10023C20 0x20>; }; pd_cam: cam-power-domain@10023C00 { compatible = "samsung,exynos4210-pd"; reg = <0x10023C00 0x20>; }; pd_gps: gps-power-domain@10023CE0 { compatible = "samsung,exynos4210-pd"; reg = <0x10023CE0 0x20>; |
b571abb3b ARM: dts: Move pa... |
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}; |
10ea1f183 ARM: dts: Add GPS... |
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pd_gps_alive: gps-alive-power-domain@10023D00 { compatible = "samsung,exynos4210-pd"; reg = <0x10023D00 0x20>; }; |
0572b7253 ARM: dts: Fix mis... |
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gic: interrupt-controller@10490000 { |
b571abb3b ARM: dts: Move pa... |
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compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; interrupt-controller; |
cf286b405 ARM: dts: fix reg... |
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reg = <0x10490000 0x10000>, <0x10480000 0x10000>; |
b571abb3b ARM: dts: Move pa... |
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}; |
0572b7253 ARM: dts: Fix mis... |
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combiner: interrupt-controller@10440000 { |
b571abb3b ARM: dts: Move pa... |
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compatible = "samsung,exynos4210-combiner"; #interrupt-cells = <2>; interrupt-controller; reg = <0x10440000 0x1000>; }; |
6f4b82a35 ARM: dts: clean u... |
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pmu { compatible = "arm,cortex-a9-pmu"; interrupt-parent = <&combiner>; interrupts = <2 2>, <3 2>; }; |
9f052d0c5 ARM: dts: Fix sys... |
126 |
sys_reg: syscon@10010000 { |
a64b1b220 ARM: dts: Add SYS... |
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compatible = "samsung,exynos4-sysreg", "syscon"; reg = <0x10010000 0x400>; }; |
7b9613aca ARM: dts: add PMU... |
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pmu_system_controller: system-controller@10020000 { compatible = "samsung,exynos4210-pmu", "syscon"; reg = <0x10020000 0x4000>; }; |
8b7dd64cb ARM: dts: exynos4... |
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dsi_0: dsi@11C80000 { compatible = "samsung,exynos4210-mipi-dsi"; reg = <0x11C80000 0x10000>; interrupts = <0 79 0>; samsung,power-domain = <&pd_lcd0>; phys = <&mipi_phy 1>; phy-names = "dsim"; |
c8366bac1 ARM: dts: replace... |
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clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>; |
8b7dd64cb ARM: dts: exynos4... |
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clock-names = "bus_clk", "pll_clk"; status = "disabled"; #address-cells = <1>; #size-cells = <0>; }; |
d1b8a41d3 ARM: dts: Add cam... |
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camera { compatible = "samsung,fimc", "simple-bus"; status = "disabled"; #address-cells = <1>; #size-cells = <1>; |
ee5eda64a ARM: dts: Update ... |
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#clock-cells = <1>; clock-output-names = "cam_a_clkout", "cam_b_clkout"; |
d1b8a41d3 ARM: dts: Add cam... |
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ranges; |
d1b8a41d3 ARM: dts: Add cam... |
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fimc_0: fimc@11800000 { compatible = "samsung,exynos4210-fimc"; reg = <0x11800000 0x1000>; interrupts = <0 84 0>; |
1c75a78a4 ARM: dts: use mac... |
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clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>; |
d1b8a41d3 ARM: dts: Add cam... |
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clock-names = "fimc", "sclk_fimc"; samsung,power-domain = <&pd_cam>; samsung,sysreg = <&sys_reg>; status = "disabled"; }; fimc_1: fimc@11810000 { compatible = "samsung,exynos4210-fimc"; reg = <0x11810000 0x1000>; interrupts = <0 85 0>; |
1c75a78a4 ARM: dts: use mac... |
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clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>; |
d1b8a41d3 ARM: dts: Add cam... |
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clock-names = "fimc", "sclk_fimc"; samsung,power-domain = <&pd_cam>; samsung,sysreg = <&sys_reg>; status = "disabled"; }; fimc_2: fimc@11820000 { compatible = "samsung,exynos4210-fimc"; reg = <0x11820000 0x1000>; interrupts = <0 86 0>; |
1c75a78a4 ARM: dts: use mac... |
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clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>; |
d1b8a41d3 ARM: dts: Add cam... |
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clock-names = "fimc", "sclk_fimc"; samsung,power-domain = <&pd_cam>; samsung,sysreg = <&sys_reg>; status = "disabled"; }; fimc_3: fimc@11830000 { compatible = "samsung,exynos4210-fimc"; reg = <0x11830000 0x1000>; interrupts = <0 87 0>; |
1c75a78a4 ARM: dts: use mac... |
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clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>; |
d1b8a41d3 ARM: dts: Add cam... |
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clock-names = "fimc", "sclk_fimc"; samsung,power-domain = <&pd_cam>; samsung,sysreg = <&sys_reg>; status = "disabled"; }; csis_0: csis@11880000 { compatible = "samsung,exynos4210-csis"; reg = <0x11880000 0x4000>; interrupts = <0 78 0>; |
1c75a78a4 ARM: dts: use mac... |
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clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>; |
d1b8a41d3 ARM: dts: Add cam... |
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clock-names = "csis", "sclk_csis"; bus-width = <4>; samsung,power-domain = <&pd_cam>; |
21b190d24 ARM: dts: Add MIP... |
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phys = <&mipi_phy 0>; phy-names = "csis"; |
d1b8a41d3 ARM: dts: Add cam... |
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status = "disabled"; #address-cells = <1>; #size-cells = <0>; }; csis_1: csis@11890000 { compatible = "samsung,exynos4210-csis"; reg = <0x11890000 0x4000>; interrupts = <0 80 0>; |
1c75a78a4 ARM: dts: use mac... |
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clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>; |
d1b8a41d3 ARM: dts: Add cam... |
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clock-names = "csis", "sclk_csis"; bus-width = <2>; samsung,power-domain = <&pd_cam>; |
21b190d24 ARM: dts: Add MIP... |
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phys = <&mipi_phy 2>; phy-names = "csis"; |
d1b8a41d3 ARM: dts: Add cam... |
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status = "disabled"; #address-cells = <1>; #size-cells = <0>; }; }; |
b571abb3b ARM: dts: Move pa... |
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watchdog@10060000 { compatible = "samsung,s3c2410-wdt"; reg = <0x10060000 0x100>; interrupts = <0 43 0>; |
1c75a78a4 ARM: dts: use mac... |
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clocks = <&clock CLK_WDT>; |
7ad34337b ARM: dts: add clo... |
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clock-names = "watchdog"; |
c9e23f00c ARM: dts: Assume ... |
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status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
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}; rtc@10070000 { compatible = "samsung,s3c6410-rtc"; reg = <0x10070000 0x100>; interrupts = <0 44 0>, <0 45 0>; |
1c75a78a4 ARM: dts: use mac... |
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clocks = <&clock CLK_RTC>; |
7ad34337b ARM: dts: add clo... |
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clock-names = "rtc"; |
c9e23f00c ARM: dts: Assume ... |
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status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
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}; keypad@100A0000 { compatible = "samsung,s5pv210-keypad"; reg = <0x100A0000 0x100>; interrupts = <0 109 0>; |
1c75a78a4 ARM: dts: use mac... |
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clocks = <&clock CLK_KEYIF>; |
7ad34337b ARM: dts: add clo... |
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clock-names = "keypad"; |
c9e23f00c ARM: dts: Assume ... |
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status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
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}; sdhci@12510000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12510000 0x100>; interrupts = <0 73 0>; |
1c75a78a4 ARM: dts: use mac... |
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clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>; |
7ad34337b ARM: dts: add clo... |
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clock-names = "hsmmc", "mmc_busclk.2"; |
c9e23f00c ARM: dts: Assume ... |
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status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
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}; sdhci@12520000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12520000 0x100>; interrupts = <0 74 0>; |
1c75a78a4 ARM: dts: use mac... |
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clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>; |
7ad34337b ARM: dts: add clo... |
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clock-names = "hsmmc", "mmc_busclk.2"; |
c9e23f00c ARM: dts: Assume ... |
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status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
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}; sdhci@12530000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12530000 0x100>; interrupts = <0 75 0>; |
1c75a78a4 ARM: dts: use mac... |
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clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>; |
7ad34337b ARM: dts: add clo... |
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clock-names = "hsmmc", "mmc_busclk.2"; |
c9e23f00c ARM: dts: Assume ... |
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status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
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}; sdhci@12540000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12540000 0x100>; interrupts = <0 76 0>; |
1c75a78a4 ARM: dts: use mac... |
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clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>; |
7ad34337b ARM: dts: add clo... |
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clock-names = "hsmmc", "mmc_busclk.2"; |
c9e23f00c ARM: dts: Assume ... |
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status = "disabled"; |
26bbd41fe ARM: dts: add exy... |
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}; exynos_usbphy: exynos-usbphy@125B0000 { compatible = "samsung,exynos4210-usb2-phy"; reg = <0x125B0000 0x100>; samsung,pmureg-phandle = <&pmu_system_controller>; clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>; clock-names = "phy", "ref"; #phy-cells = <1>; status = "disabled"; |
ef14d94cd ARM: dts: add hso... |
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}; hsotg@12480000 { compatible = "samsung,s3c6400-hsotg"; reg = <0x12480000 0x20000>; interrupts = <0 71 0>; clocks = <&clock CLK_USB_DEVICE>; clock-names = "otg"; phys = <&exynos_usbphy 0>; phy-names = "usb2-phy"; status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
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}; |
6f9d02a05 ARM: dts: Add USB... |
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ehci@12580000 { compatible = "samsung,exynos4210-ehci"; reg = <0x12580000 0x100>; interrupts = <0 70 0>; |
1c75a78a4 ARM: dts: use mac... |
316 |
clocks = <&clock CLK_USB_HOST>; |
6f9d02a05 ARM: dts: Add USB... |
317 318 |
clock-names = "usbhost"; status = "disabled"; |
366126d5c ARM: dts: add por... |
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#address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; phys = <&exynos_usbphy 1>; status = "disabled"; }; port@1 { reg = <1>; phys = <&exynos_usbphy 2>; status = "disabled"; }; port@2 { reg = <2>; phys = <&exynos_usbphy 3>; status = "disabled"; }; |
6f9d02a05 ARM: dts: Add USB... |
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}; ohci@12590000 { compatible = "samsung,exynos4210-ohci"; reg = <0x12590000 0x100>; interrupts = <0 70 0>; |
1c75a78a4 ARM: dts: use mac... |
342 |
clocks = <&clock CLK_USB_HOST>; |
6f9d02a05 ARM: dts: Add USB... |
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clock-names = "usbhost"; status = "disabled"; |
366126d5c ARM: dts: add por... |
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#address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; phys = <&exynos_usbphy 1>; status = "disabled"; }; |
6f9d02a05 ARM: dts: Add USB... |
352 |
}; |
990a7bfd8 ARM: dts: Add aud... |
353 |
i2s1: i2s@13960000 { |
fddcd3007 ARM: dts: Fix I2S... |
354 |
compatible = "samsung,s3c6410-i2s"; |
990a7bfd8 ARM: dts: Add aud... |
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reg = <0x13960000 0x100>; clocks = <&clock CLK_I2S1>; clock-names = "iis"; dmas = <&pdma1 12>, <&pdma1 11>; dma-names = "tx", "rx"; status = "disabled"; }; i2s2: i2s@13970000 { |
fddcd3007 ARM: dts: Fix I2S... |
364 |
compatible = "samsung,s3c6410-i2s"; |
990a7bfd8 ARM: dts: Add aud... |
365 366 367 368 369 370 371 |
reg = <0x13970000 0x100>; clocks = <&clock CLK_I2S2>; clock-names = "iis"; dmas = <&pdma0 14>, <&pdma0 13>; dma-names = "tx", "rx"; status = "disabled"; }; |
20901f74e ARM: dts: Add MFC... |
372 373 374 375 376 |
mfc: codec@13400000 { compatible = "samsung,mfc-v5"; reg = <0x13400000 0x10000>; interrupts = <0 94 0>; samsung,power-domain = <&pd_mfc>; |
e7160bfc0 ARM: dts: add mis... |
377 378 |
clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>; clock-names = "mfc", "sclk_mfc"; |
20901f74e ARM: dts: Add MFC... |
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status = "disabled"; }; |
1e64f48ea ARM: dts: SAMSUNG... |
381 |
serial_0: serial@13800000 { |
b571abb3b ARM: dts: Move pa... |
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compatible = "samsung,exynos4210-uart"; reg = <0x13800000 0x100>; interrupts = <0 52 0>; |
1c75a78a4 ARM: dts: use mac... |
385 |
clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; |
7ad34337b ARM: dts: add clo... |
386 |
clock-names = "uart", "clk_uart_baud0"; |
c9e23f00c ARM: dts: Assume ... |
387 |
status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
388 |
}; |
1e64f48ea ARM: dts: SAMSUNG... |
389 |
serial_1: serial@13810000 { |
b571abb3b ARM: dts: Move pa... |
390 391 392 |
compatible = "samsung,exynos4210-uart"; reg = <0x13810000 0x100>; interrupts = <0 53 0>; |
1c75a78a4 ARM: dts: use mac... |
393 |
clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; |
7ad34337b ARM: dts: add clo... |
394 |
clock-names = "uart", "clk_uart_baud0"; |
c9e23f00c ARM: dts: Assume ... |
395 |
status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
396 |
}; |
1e64f48ea ARM: dts: SAMSUNG... |
397 |
serial_2: serial@13820000 { |
b571abb3b ARM: dts: Move pa... |
398 399 400 |
compatible = "samsung,exynos4210-uart"; reg = <0x13820000 0x100>; interrupts = <0 54 0>; |
1c75a78a4 ARM: dts: use mac... |
401 |
clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; |
7ad34337b ARM: dts: add clo... |
402 |
clock-names = "uart", "clk_uart_baud0"; |
c9e23f00c ARM: dts: Assume ... |
403 |
status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
404 |
}; |
1e64f48ea ARM: dts: SAMSUNG... |
405 |
serial_3: serial@13830000 { |
b571abb3b ARM: dts: Move pa... |
406 407 408 |
compatible = "samsung,exynos4210-uart"; reg = <0x13830000 0x100>; interrupts = <0 55 0>; |
1c75a78a4 ARM: dts: use mac... |
409 |
clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>; |
7ad34337b ARM: dts: add clo... |
410 |
clock-names = "uart", "clk_uart_baud0"; |
c9e23f00c ARM: dts: Assume ... |
411 |
status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
412 |
}; |
34db4990e ARM: dts: Add ali... |
413 |
i2c_0: i2c@13860000 { |
1b198d56d ARM: dts: Specify... |
414 415 |
#address-cells = <1>; #size-cells = <0>; |
b571abb3b ARM: dts: Move pa... |
416 417 418 |
compatible = "samsung,s3c2440-i2c"; reg = <0x13860000 0x100>; interrupts = <0 58 0>; |
1c75a78a4 ARM: dts: use mac... |
419 |
clocks = <&clock CLK_I2C0>; |
7ad34337b ARM: dts: add clo... |
420 |
clock-names = "i2c"; |
045c8f635 ARM: dts: add pin... |
421 422 |
pinctrl-names = "default"; pinctrl-0 = <&i2c0_bus>; |
c9e23f00c ARM: dts: Assume ... |
423 |
status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
424 |
}; |
34db4990e ARM: dts: Add ali... |
425 |
i2c_1: i2c@13870000 { |
1b198d56d ARM: dts: Specify... |
426 427 |
#address-cells = <1>; #size-cells = <0>; |
b571abb3b ARM: dts: Move pa... |
428 429 430 |
compatible = "samsung,s3c2440-i2c"; reg = <0x13870000 0x100>; interrupts = <0 59 0>; |
1c75a78a4 ARM: dts: use mac... |
431 |
clocks = <&clock CLK_I2C1>; |
7ad34337b ARM: dts: add clo... |
432 |
clock-names = "i2c"; |
045c8f635 ARM: dts: add pin... |
433 434 |
pinctrl-names = "default"; pinctrl-0 = <&i2c1_bus>; |
c9e23f00c ARM: dts: Assume ... |
435 |
status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
436 |
}; |
34db4990e ARM: dts: Add ali... |
437 |
i2c_2: i2c@13880000 { |
1b198d56d ARM: dts: Specify... |
438 439 |
#address-cells = <1>; #size-cells = <0>; |
b571abb3b ARM: dts: Move pa... |
440 441 442 |
compatible = "samsung,s3c2440-i2c"; reg = <0x13880000 0x100>; interrupts = <0 60 0>; |
1c75a78a4 ARM: dts: use mac... |
443 |
clocks = <&clock CLK_I2C2>; |
7ad34337b ARM: dts: add clo... |
444 |
clock-names = "i2c"; |
9c869d1f0 ARM: dts: add mis... |
445 446 |
pinctrl-names = "default"; pinctrl-0 = <&i2c2_bus>; |
c9e23f00c ARM: dts: Assume ... |
447 |
status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
448 |
}; |
34db4990e ARM: dts: Add ali... |
449 |
i2c_3: i2c@13890000 { |
1b198d56d ARM: dts: Specify... |
450 451 |
#address-cells = <1>; #size-cells = <0>; |
b571abb3b ARM: dts: Move pa... |
452 453 454 |
compatible = "samsung,s3c2440-i2c"; reg = <0x13890000 0x100>; interrupts = <0 61 0>; |
1c75a78a4 ARM: dts: use mac... |
455 |
clocks = <&clock CLK_I2C3>; |
7ad34337b ARM: dts: add clo... |
456 |
clock-names = "i2c"; |
9c869d1f0 ARM: dts: add mis... |
457 458 |
pinctrl-names = "default"; pinctrl-0 = <&i2c3_bus>; |
c9e23f00c ARM: dts: Assume ... |
459 |
status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
460 |
}; |
34db4990e ARM: dts: Add ali... |
461 |
i2c_4: i2c@138A0000 { |
1b198d56d ARM: dts: Specify... |
462 463 |
#address-cells = <1>; #size-cells = <0>; |
b571abb3b ARM: dts: Move pa... |
464 465 466 |
compatible = "samsung,s3c2440-i2c"; reg = <0x138A0000 0x100>; interrupts = <0 62 0>; |
1c75a78a4 ARM: dts: use mac... |
467 |
clocks = <&clock CLK_I2C4>; |
7ad34337b ARM: dts: add clo... |
468 |
clock-names = "i2c"; |
9c869d1f0 ARM: dts: add mis... |
469 470 |
pinctrl-names = "default"; pinctrl-0 = <&i2c4_bus>; |
c9e23f00c ARM: dts: Assume ... |
471 |
status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
472 |
}; |
34db4990e ARM: dts: Add ali... |
473 |
i2c_5: i2c@138B0000 { |
1b198d56d ARM: dts: Specify... |
474 475 |
#address-cells = <1>; #size-cells = <0>; |
b571abb3b ARM: dts: Move pa... |
476 477 478 |
compatible = "samsung,s3c2440-i2c"; reg = <0x138B0000 0x100>; interrupts = <0 63 0>; |
1c75a78a4 ARM: dts: use mac... |
479 |
clocks = <&clock CLK_I2C5>; |
7ad34337b ARM: dts: add clo... |
480 |
clock-names = "i2c"; |
9c869d1f0 ARM: dts: add mis... |
481 482 |
pinctrl-names = "default"; pinctrl-0 = <&i2c5_bus>; |
c9e23f00c ARM: dts: Assume ... |
483 |
status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
484 |
}; |
34db4990e ARM: dts: Add ali... |
485 |
i2c_6: i2c@138C0000 { |
1b198d56d ARM: dts: Specify... |
486 487 |
#address-cells = <1>; #size-cells = <0>; |
b571abb3b ARM: dts: Move pa... |
488 489 490 |
compatible = "samsung,s3c2440-i2c"; reg = <0x138C0000 0x100>; interrupts = <0 64 0>; |
1c75a78a4 ARM: dts: use mac... |
491 |
clocks = <&clock CLK_I2C6>; |
7ad34337b ARM: dts: add clo... |
492 |
clock-names = "i2c"; |
9c869d1f0 ARM: dts: add mis... |
493 494 |
pinctrl-names = "default"; pinctrl-0 = <&i2c6_bus>; |
c9e23f00c ARM: dts: Assume ... |
495 |
status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
496 |
}; |
34db4990e ARM: dts: Add ali... |
497 |
i2c_7: i2c@138D0000 { |
1b198d56d ARM: dts: Specify... |
498 499 |
#address-cells = <1>; #size-cells = <0>; |
b571abb3b ARM: dts: Move pa... |
500 501 502 |
compatible = "samsung,s3c2440-i2c"; reg = <0x138D0000 0x100>; interrupts = <0 65 0>; |
1c75a78a4 ARM: dts: use mac... |
503 |
clocks = <&clock CLK_I2C7>; |
7ad34337b ARM: dts: add clo... |
504 |
clock-names = "i2c"; |
9c869d1f0 ARM: dts: add mis... |
505 506 |
pinctrl-names = "default"; pinctrl-0 = <&i2c7_bus>; |
c9e23f00c ARM: dts: Assume ... |
507 |
status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
508 509 510 511 512 513 |
}; spi_0: spi@13920000 { compatible = "samsung,exynos4210-spi"; reg = <0x13920000 0x100>; interrupts = <0 66 0>; |
48b3af1e9 ARM: dts: Use gen... |
514 515 |
dmas = <&pdma0 7>, <&pdma0 6>; dma-names = "tx", "rx"; |
b571abb3b ARM: dts: Move pa... |
516 517 |
#address-cells = <1>; #size-cells = <0>; |
1c75a78a4 ARM: dts: use mac... |
518 |
clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>; |
7ad34337b ARM: dts: add clo... |
519 |
clock-names = "spi", "spi_busclk0"; |
045c8f635 ARM: dts: add pin... |
520 521 |
pinctrl-names = "default"; pinctrl-0 = <&spi0_bus>; |
c9e23f00c ARM: dts: Assume ... |
522 |
status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
523 524 525 526 527 528 |
}; spi_1: spi@13930000 { compatible = "samsung,exynos4210-spi"; reg = <0x13930000 0x100>; interrupts = <0 67 0>; |
48b3af1e9 ARM: dts: Use gen... |
529 530 |
dmas = <&pdma1 7>, <&pdma1 6>; dma-names = "tx", "rx"; |
b571abb3b ARM: dts: Move pa... |
531 532 |
#address-cells = <1>; #size-cells = <0>; |
1c75a78a4 ARM: dts: use mac... |
533 |
clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>; |
7ad34337b ARM: dts: add clo... |
534 |
clock-names = "spi", "spi_busclk0"; |
045c8f635 ARM: dts: add pin... |
535 536 |
pinctrl-names = "default"; pinctrl-0 = <&spi1_bus>; |
c9e23f00c ARM: dts: Assume ... |
537 |
status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
538 539 540 541 542 543 |
}; spi_2: spi@13940000 { compatible = "samsung,exynos4210-spi"; reg = <0x13940000 0x100>; interrupts = <0 68 0>; |
48b3af1e9 ARM: dts: Use gen... |
544 545 |
dmas = <&pdma0 9>, <&pdma0 8>; dma-names = "tx", "rx"; |
b571abb3b ARM: dts: Move pa... |
546 547 |
#address-cells = <1>; #size-cells = <0>; |
1c75a78a4 ARM: dts: use mac... |
548 |
clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>; |
7ad34337b ARM: dts: add clo... |
549 |
clock-names = "spi", "spi_busclk0"; |
045c8f635 ARM: dts: add pin... |
550 551 |
pinctrl-names = "default"; pinctrl-0 = <&spi2_bus>; |
c9e23f00c ARM: dts: Assume ... |
552 |
status = "disabled"; |
b571abb3b ARM: dts: Move pa... |
553 |
}; |
cc4193eac ARM: dts: exynos4... |
554 555 556 557 |
pwm@139D0000 { compatible = "samsung,exynos4210-pwm"; reg = <0x139D0000 0x1000>; interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>; |
1c75a78a4 ARM: dts: use mac... |
558 |
clocks = <&clock CLK_PWM>; |
ec06dbe77 ARM: dts: exynos4... |
559 |
clock-names = "timers"; |
2fd82d330 ARM: dts: fix pwm... |
560 |
#pwm-cells = <3>; |
cc4193eac ARM: dts: exynos4... |
561 562 |
status = "disabled"; }; |
b571abb3b ARM: dts: Move pa... |
563 564 565 566 567 568 569 570 571 572 573 |
amba { #address-cells = <1>; #size-cells = <1>; compatible = "arm,amba-bus"; interrupt-parent = <&gic>; ranges; pdma0: pdma@12680000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x12680000 0x1000>; interrupts = <0 35 0>; |
1c75a78a4 ARM: dts: use mac... |
574 |
clocks = <&clock CLK_PDMA0>; |
7ad34337b ARM: dts: add clo... |
575 |
clock-names = "apb_pclk"; |
0a96d4d36 ARM: EXYNOS: Add ... |
576 577 578 |
#dma-cells = <1>; #dma-channels = <8>; #dma-requests = <32>; |
b571abb3b ARM: dts: Move pa... |
579 580 581 582 583 584 |
}; pdma1: pdma@12690000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x12690000 0x1000>; interrupts = <0 36 0>; |
1c75a78a4 ARM: dts: use mac... |
585 |
clocks = <&clock CLK_PDMA1>; |
7ad34337b ARM: dts: add clo... |
586 |
clock-names = "apb_pclk"; |
0a96d4d36 ARM: EXYNOS: Add ... |
587 588 589 |
#dma-cells = <1>; #dma-channels = <8>; #dma-requests = <32>; |
b571abb3b ARM: dts: Move pa... |
590 |
}; |
f7e758af0 ARM: dts: add nod... |
591 592 593 594 595 |
mdma1: mdma@12850000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x12850000 0x1000>; interrupts = <0 34 0>; |
1c75a78a4 ARM: dts: use mac... |
596 |
clocks = <&clock CLK_MDMA>; |
7ad34337b ARM: dts: add clo... |
597 |
clock-names = "apb_pclk"; |
0a96d4d36 ARM: EXYNOS: Add ... |
598 599 600 |
#dma-cells = <1>; #dma-channels = <8>; #dma-requests = <1>; |
f7e758af0 ARM: dts: add nod... |
601 |
}; |
b571abb3b ARM: dts: Move pa... |
602 |
}; |
768c3a567 ARM: dts: Add FIM... |
603 604 605 606 607 608 609 |
fimd: fimd@11c00000 { compatible = "samsung,exynos4210-fimd"; interrupt-parent = <&combiner>; reg = <0x11c00000 0x20000>; interrupt-names = "fifo", "vsync", "lcd_sys"; interrupts = <11 0>, <11 1>, <11 2>; |
1c75a78a4 ARM: dts: use mac... |
610 |
clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>; |
768c3a567 ARM: dts: Add FIM... |
611 612 |
clock-names = "sclk_fimd", "fimd"; samsung,power-domain = <&pd_lcd0>; |
2eb629417 ARM: dts: exynos4... |
613 |
samsung,sysreg = <&sys_reg>; |
768c3a567 ARM: dts: Add FIM... |
614 615 |
status = "disabled"; }; |
b571abb3b ARM: dts: Move pa... |
616 |
}; |