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drivers/iio/light/tsl2563.c
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/* |
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* drivers/iio/light/tsl2563.c |
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* * Copyright (C) 2008 Nokia Corporation * * Written by Timo O. Karjalainen <timo.o.karjalainen@nokia.com> * Contact: Amit Kucheria <amit.kucheria@verdurent.com> * * Converted to IIO driver * Amit Kucheria <amit.kucheria@verdurent.com> * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA * 02110-1301 USA */ #include <linux/module.h> #include <linux/i2c.h> #include <linux/interrupt.h> |
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#include <linux/irq.h> |
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#include <linux/sched.h> #include <linux/mutex.h> #include <linux/delay.h> |
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#include <linux/pm.h> |
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#include <linux/err.h> |
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#include <linux/slab.h> |
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#include <linux/iio/iio.h> #include <linux/iio/sysfs.h> #include <linux/iio/events.h> |
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#include <linux/platform_data/tsl2563.h> |
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/* Use this many bits for fraction part. */ |
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#define ADC_FRAC_BITS 14 |
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/* Given number of 1/10000's in ADC_FRAC_BITS precision. */ #define FRAC10K(f) (((f) * (1L << (ADC_FRAC_BITS))) / (10000)) /* Bits used for fraction in calibration coefficients.*/ |
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#define CALIB_FRAC_BITS 10 |
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/* 0.5 in CALIB_FRAC_BITS precision */ #define CALIB_FRAC_HALF (1 << (CALIB_FRAC_BITS - 1)) /* Make a fraction from a number n that was multiplied with b. */ #define CALIB_FRAC(n, b) (((n) << CALIB_FRAC_BITS) / (b)) /* Decimal 10^(digits in sysfs presentation) */ |
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#define CALIB_BASE_SYSFS 1000 |
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#define TSL2563_CMD 0x80 #define TSL2563_CLEARINT 0x40 |
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#define TSL2563_REG_CTRL 0x00 #define TSL2563_REG_TIMING 0x01 #define TSL2563_REG_LOWLOW 0x02 /* data0 low threshold, 2 bytes */ #define TSL2563_REG_LOWHIGH 0x03 #define TSL2563_REG_HIGHLOW 0x04 /* data0 high threshold, 2 bytes */ #define TSL2563_REG_HIGHHIGH 0x05 #define TSL2563_REG_INT 0x06 #define TSL2563_REG_ID 0x0a #define TSL2563_REG_DATA0LOW 0x0c /* broadband sensor value, 2 bytes */ #define TSL2563_REG_DATA0HIGH 0x0d #define TSL2563_REG_DATA1LOW 0x0e /* infrared sensor value, 2 bytes */ #define TSL2563_REG_DATA1HIGH 0x0f |
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#define TSL2563_CMD_POWER_ON 0x03 #define TSL2563_CMD_POWER_OFF 0x00 #define TSL2563_CTRL_POWER_MASK 0x03 |
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#define TSL2563_TIMING_13MS 0x00 #define TSL2563_TIMING_100MS 0x01 #define TSL2563_TIMING_400MS 0x02 #define TSL2563_TIMING_MASK 0x03 #define TSL2563_TIMING_GAIN16 0x10 #define TSL2563_TIMING_GAIN1 0x00 |
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#define TSL2563_INT_DISBLED 0x00 #define TSL2563_INT_LEVEL 0x10 |
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#define TSL2563_INT_PERSIST(n) ((n) & 0x0F) struct tsl2563_gainlevel_coeff { u8 gaintime; u16 min; u16 max; }; |
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static const struct tsl2563_gainlevel_coeff tsl2563_gainlevel_table[] = { |
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{ .gaintime = TSL2563_TIMING_400MS | TSL2563_TIMING_GAIN16, .min = 0, .max = 65534, }, { .gaintime = TSL2563_TIMING_400MS | TSL2563_TIMING_GAIN1, .min = 2048, .max = 65534, }, { .gaintime = TSL2563_TIMING_100MS | TSL2563_TIMING_GAIN1, .min = 4095, .max = 37177, }, { .gaintime = TSL2563_TIMING_13MS | TSL2563_TIMING_GAIN1, .min = 3000, .max = 65535, }, }; struct tsl2563_chip { struct mutex lock; struct i2c_client *client; |
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struct delayed_work poweroff_work; /* Remember state for suspend and resume functions */ |
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bool suspended; |
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struct tsl2563_gainlevel_coeff const *gainlevel; |
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u16 low_thres; u16 high_thres; u8 intr; |
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bool int_enabled; |
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/* Calibration coefficients */ u32 calib0; u32 calib1; int cover_comp_gain; /* Cache current values, to be returned while suspended */ u32 data0; u32 data1; }; |
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static int tsl2563_set_power(struct tsl2563_chip *chip, int on) { struct i2c_client *client = chip->client; u8 cmd; cmd = on ? TSL2563_CMD_POWER_ON : TSL2563_CMD_POWER_OFF; |
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return i2c_smbus_write_byte_data(client, TSL2563_CMD | TSL2563_REG_CTRL, cmd); |
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} /* * Return value is 0 for off, 1 for on, or a negative error * code if reading failed. */ static int tsl2563_get_power(struct tsl2563_chip *chip) { struct i2c_client *client = chip->client; int ret; |
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ret = i2c_smbus_read_byte_data(client, TSL2563_CMD | TSL2563_REG_CTRL); if (ret < 0) |
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return ret; |
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return (ret & TSL2563_CTRL_POWER_MASK) == TSL2563_CMD_POWER_ON; |
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} static int tsl2563_configure(struct tsl2563_chip *chip) { |
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int ret; |
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ret = i2c_smbus_write_byte_data(chip->client, TSL2563_CMD | TSL2563_REG_TIMING, |
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chip->gainlevel->gaintime); if (ret) |
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goto error_ret; |
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ret = i2c_smbus_write_byte_data(chip->client, TSL2563_CMD | TSL2563_REG_HIGHLOW, |
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chip->high_thres & 0xFF); if (ret) goto error_ret; |
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ret = i2c_smbus_write_byte_data(chip->client, TSL2563_CMD | TSL2563_REG_HIGHHIGH, |
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(chip->high_thres >> 8) & 0xFF); if (ret) goto error_ret; |
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ret = i2c_smbus_write_byte_data(chip->client, TSL2563_CMD | TSL2563_REG_LOWLOW, |
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chip->low_thres & 0xFF); if (ret) goto error_ret; |
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ret = i2c_smbus_write_byte_data(chip->client, TSL2563_CMD | TSL2563_REG_LOWHIGH, |
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(chip->low_thres >> 8) & 0xFF); |
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/* * Interrupt register is automatically written anyway if it is relevant * so is not here. */ |
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error_ret: |
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return ret; } static void tsl2563_poweroff_work(struct work_struct *work) { struct tsl2563_chip *chip = container_of(work, struct tsl2563_chip, poweroff_work.work); tsl2563_set_power(chip, 0); } static int tsl2563_detect(struct tsl2563_chip *chip) { int ret; ret = tsl2563_set_power(chip, 1); if (ret) return ret; ret = tsl2563_get_power(chip); if (ret < 0) return ret; return ret ? 0 : -ENODEV; } static int tsl2563_read_id(struct tsl2563_chip *chip, u8 *id) { struct i2c_client *client = chip->client; int ret; |
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ret = i2c_smbus_read_byte_data(client, TSL2563_CMD | TSL2563_REG_ID); if (ret < 0) |
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return ret; |
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*id = ret; |
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return 0; } /* * "Normalized" ADC value is one obtained with 400ms of integration time and * 16x gain. This function returns the number of bits of shift needed to * convert between normalized values and HW values obtained using given * timing and gain settings. */ static int adc_shiftbits(u8 timing) { int shift = 0; switch (timing & TSL2563_TIMING_MASK) { case TSL2563_TIMING_13MS: shift += 5; break; case TSL2563_TIMING_100MS: shift += 2; break; case TSL2563_TIMING_400MS: /* no-op */ break; } if (!(timing & TSL2563_TIMING_GAIN16)) shift += 4; return shift; } /* Convert a HW ADC value to normalized scale. */ static u32 normalize_adc(u16 adc, u8 timing) { return adc << adc_shiftbits(timing); } static void tsl2563_wait_adc(struct tsl2563_chip *chip) { unsigned int delay; switch (chip->gainlevel->gaintime & TSL2563_TIMING_MASK) { case TSL2563_TIMING_13MS: delay = 14; break; case TSL2563_TIMING_100MS: delay = 101; break; default: delay = 402; } /* * TODO: Make sure that we wait at least required delay but why we * have to extend it one tick more? */ schedule_timeout_interruptible(msecs_to_jiffies(delay) + 2); } static int tsl2563_adjust_gainlevel(struct tsl2563_chip *chip, u16 adc) { struct i2c_client *client = chip->client; if (adc > chip->gainlevel->max || adc < chip->gainlevel->min) { (adc > chip->gainlevel->max) ? chip->gainlevel++ : chip->gainlevel--; |
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i2c_smbus_write_byte_data(client, TSL2563_CMD | TSL2563_REG_TIMING, chip->gainlevel->gaintime); |
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tsl2563_wait_adc(chip); tsl2563_wait_adc(chip); return 1; } else return 0; } static int tsl2563_get_adc(struct tsl2563_chip *chip) { struct i2c_client *client = chip->client; |
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u16 adc0, adc1; int retry = 1; int ret = 0; |
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if (chip->suspended) |
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goto out; |
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if (!chip->int_enabled) { cancel_delayed_work(&chip->poweroff_work); if (!tsl2563_get_power(chip)) { ret = tsl2563_set_power(chip, 1); if (ret) goto out; ret = tsl2563_configure(chip); if (ret) goto out; tsl2563_wait_adc(chip); } |
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} while (retry) { |
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ret = i2c_smbus_read_word_data(client, TSL2563_CMD | TSL2563_REG_DATA0LOW); if (ret < 0) |
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goto out; |
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adc0 = ret; |
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ret = i2c_smbus_read_word_data(client, TSL2563_CMD | TSL2563_REG_DATA1LOW); if (ret < 0) |
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goto out; |
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adc1 = ret; |
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retry = tsl2563_adjust_gainlevel(chip, adc0); } chip->data0 = normalize_adc(adc0, chip->gainlevel->gaintime); chip->data1 = normalize_adc(adc1, chip->gainlevel->gaintime); |
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if (!chip->int_enabled) schedule_delayed_work(&chip->poweroff_work, 5 * HZ); |
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ret = 0; out: return ret; } static inline int calib_to_sysfs(u32 calib) { return (int) (((calib * CALIB_BASE_SYSFS) + CALIB_FRAC_HALF) >> CALIB_FRAC_BITS); } static inline u32 calib_from_sysfs(int value) { return (((u32) value) << CALIB_FRAC_BITS) / CALIB_BASE_SYSFS; } /* * Conversions between lux and ADC values. * * The basic formula is lux = c0 * adc0 - c1 * adc1, where c0 and c1 are * appropriate constants. Different constants are needed for different * kinds of light, determined by the ratio adc1/adc0 (basically the ratio * of the intensities in infrared and visible wavelengths). lux_table below * lists the upper threshold of the adc1/adc0 ratio and the corresponding * constants. */ struct tsl2563_lux_coeff { unsigned long ch_ratio; unsigned long ch0_coeff; unsigned long ch1_coeff; }; static const struct tsl2563_lux_coeff lux_table[] = { { .ch_ratio = FRAC10K(1300), .ch0_coeff = FRAC10K(315), .ch1_coeff = FRAC10K(262), }, { .ch_ratio = FRAC10K(2600), .ch0_coeff = FRAC10K(337), .ch1_coeff = FRAC10K(430), }, { .ch_ratio = FRAC10K(3900), .ch0_coeff = FRAC10K(363), .ch1_coeff = FRAC10K(529), }, { .ch_ratio = FRAC10K(5200), .ch0_coeff = FRAC10K(392), .ch1_coeff = FRAC10K(605), }, { .ch_ratio = FRAC10K(6500), .ch0_coeff = FRAC10K(229), .ch1_coeff = FRAC10K(291), }, { .ch_ratio = FRAC10K(8000), .ch0_coeff = FRAC10K(157), .ch1_coeff = FRAC10K(180), }, { .ch_ratio = FRAC10K(13000), .ch0_coeff = FRAC10K(34), .ch1_coeff = FRAC10K(26), }, { .ch_ratio = ULONG_MAX, .ch0_coeff = 0, .ch1_coeff = 0, }, }; |
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/* Convert normalized, scaled ADC values to lux. */ |
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static unsigned int adc_to_lux(u32 adc0, u32 adc1) { const struct tsl2563_lux_coeff *lp = lux_table; unsigned long ratio, lux, ch0 = adc0, ch1 = adc1; ratio = ch0 ? ((ch1 << ADC_FRAC_BITS) / ch0) : ULONG_MAX; while (lp->ch_ratio < ratio) lp++; lux = ch0 * lp->ch0_coeff - ch1 * lp->ch1_coeff; return (unsigned int) (lux >> ADC_FRAC_BITS); } |
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/* Apply calibration coefficient to ADC count. */ static u32 calib_adc(u32 adc, u32 calib) { unsigned long scaled = adc; scaled *= calib; scaled >>= CALIB_FRAC_BITS; return (u32) scaled; } |
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static int tsl2563_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) |
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{ |
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struct tsl2563_chip *chip = iio_priv(indio_dev); |
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if (mask != IIO_CHAN_INFO_CALIBSCALE) return -EINVAL; if (chan->channel2 == IIO_MOD_LIGHT_BOTH) |
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chip->calib0 = calib_from_sysfs(val); |
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else if (chan->channel2 == IIO_MOD_LIGHT_IR) |
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chip->calib1 = calib_from_sysfs(val); |
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else return -EINVAL; |
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return 0; |
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} |
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static int tsl2563_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, |
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long mask) |
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{ |
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int ret = -EINVAL; u32 calib0, calib1; struct tsl2563_chip *chip = iio_priv(indio_dev); |
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mutex_lock(&chip->lock); |
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switch (mask) { |
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case IIO_CHAN_INFO_RAW: case IIO_CHAN_INFO_PROCESSED: |
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switch (chan->type) { case IIO_LIGHT: ret = tsl2563_get_adc(chip); if (ret) goto error_ret; calib0 = calib_adc(chip->data0, chip->calib0) * chip->cover_comp_gain; calib1 = calib_adc(chip->data1, chip->calib1) * chip->cover_comp_gain; *val = adc_to_lux(calib0, calib1); ret = IIO_VAL_INT; break; case IIO_INTENSITY: ret = tsl2563_get_adc(chip); if (ret) goto error_ret; |
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if (chan->channel2 == IIO_MOD_LIGHT_BOTH) |
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*val = chip->data0; else *val = chip->data1; ret = IIO_VAL_INT; break; default: break; } |
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break; |
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case IIO_CHAN_INFO_CALIBSCALE: |
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if (chan->channel2 == IIO_MOD_LIGHT_BOTH) |
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*val = calib_to_sysfs(chip->calib0); else *val = calib_to_sysfs(chip->calib1); ret = IIO_VAL_INT; |
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break; default: |
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ret = -EINVAL; goto error_ret; |
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} |
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error_ret: mutex_unlock(&chip->lock); return ret; |
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} |
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static const struct iio_event_spec tsl2563_events[] = { { .type = IIO_EV_TYPE_THRESH, .dir = IIO_EV_DIR_RISING, .mask_separate = BIT(IIO_EV_INFO_VALUE) | BIT(IIO_EV_INFO_ENABLE), }, { .type = IIO_EV_TYPE_THRESH, .dir = IIO_EV_DIR_FALLING, .mask_separate = BIT(IIO_EV_INFO_VALUE) | BIT(IIO_EV_INFO_ENABLE), }, }; |
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static const struct iio_chan_spec tsl2563_channels[] = { |
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{ .type = IIO_LIGHT, .indexed = 1, |
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.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), |
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.channel = 0, }, { .type = IIO_INTENSITY, .modified = 1, .channel2 = IIO_MOD_LIGHT_BOTH, |
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_CALIBSCALE), |
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.event_spec = tsl2563_events, .num_event_specs = ARRAY_SIZE(tsl2563_events), |
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}, { .type = IIO_INTENSITY, .modified = 1, |
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.channel2 = IIO_MOD_LIGHT_IR, |
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_CALIBSCALE), |
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} |
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}; |
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static int tsl2563_read_thresh(struct iio_dev *indio_dev, |
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const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, enum iio_event_info info, int *val, int *val2) |
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{ |
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struct tsl2563_chip *chip = iio_priv(indio_dev); |
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switch (dir) { |
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case IIO_EV_DIR_RISING: *val = chip->high_thres; |
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break; |
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case IIO_EV_DIR_FALLING: *val = chip->low_thres; |
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break; |
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default: return -EINVAL; |
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} |
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return IIO_VAL_INT; |
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} |
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static int tsl2563_write_thresh(struct iio_dev *indio_dev, |
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const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, enum iio_event_info info, int val, int val2) |
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{ |
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struct tsl2563_chip *chip = iio_priv(indio_dev); |
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int ret; |
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578 |
u8 address; |
388be4883
|
579 |
|
6d59747eb
|
580 |
if (dir == IIO_EV_DIR_RISING) |
cbcdf4dd4
|
581 582 583 |
address = TSL2563_REG_HIGHLOW; else address = TSL2563_REG_LOWLOW; |
388be4883
|
584 |
mutex_lock(&chip->lock); |
d9b42c01a
|
585 586 |
ret = i2c_smbus_write_byte_data(chip->client, TSL2563_CMD | address, val & 0xFF); |
388be4883
|
587 588 |
if (ret) goto error_ret; |
d9b42c01a
|
589 590 591 |
ret = i2c_smbus_write_byte_data(chip->client, TSL2563_CMD | (address + 1), (val >> 8) & 0xFF); |
6d59747eb
|
592 |
if (dir == IIO_EV_DIR_RISING) |
388be4883
|
593 |
chip->high_thres = val; |
cbcdf4dd4
|
594 |
else |
388be4883
|
595 |
chip->low_thres = val; |
388be4883
|
596 597 598 |
error_ret: mutex_unlock(&chip->lock); |
cbcdf4dd4
|
599 |
return ret; |
388be4883
|
600 |
} |
bdab10017
|
601 |
static irqreturn_t tsl2563_event_handler(int irq, void *private) |
388be4883
|
602 |
{ |
bdab10017
|
603 |
struct iio_dev *dev_info = private; |
33789dce5
|
604 |
struct tsl2563_chip *chip = iio_priv(dev_info); |
388be4883
|
605 |
|
5aa961889
|
606 |
iio_push_event(dev_info, |
c4b14d99b
|
607 |
IIO_UNMOD_EVENT_CODE(IIO_LIGHT, |
da1d8b68a
|
608 609 610 |
0, IIO_EV_TYPE_THRESH, IIO_EV_DIR_EITHER), |
bdab10017
|
611 |
iio_get_time_ns()); |
388be4883
|
612 |
|
388be4883
|
613 |
/* clear the interrupt and push the event */ |
d9b42c01a
|
614 |
i2c_smbus_write_byte(chip->client, TSL2563_CMD | TSL2563_CLEARINT); |
bdab10017
|
615 |
return IRQ_HANDLED; |
388be4883
|
616 |
} |
cbcdf4dd4
|
617 |
static int tsl2563_write_interrupt_config(struct iio_dev *indio_dev, |
6d59747eb
|
618 619 |
const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, int state) |
388be4883
|
620 |
{ |
33789dce5
|
621 |
struct tsl2563_chip *chip = iio_priv(indio_dev); |
cbcdf4dd4
|
622 |
int ret = 0; |
388be4883
|
623 |
|
388be4883
|
624 |
mutex_lock(&chip->lock); |
cbcdf4dd4
|
625 |
if (state && !(chip->intr & 0x30)) { |
388be4883
|
626 627 628 629 630 631 632 633 634 635 636 637 |
chip->intr &= ~0x30; chip->intr |= 0x10; /* ensure the chip is actually on */ cancel_delayed_work(&chip->poweroff_work); if (!tsl2563_get_power(chip)) { ret = tsl2563_set_power(chip, 1); if (ret) goto out; ret = tsl2563_configure(chip); if (ret) goto out; } |
d9b42c01a
|
638 639 640 |
ret = i2c_smbus_write_byte_data(chip->client, TSL2563_CMD | TSL2563_REG_INT, chip->intr); |
388be4883
|
641 642 |
chip->int_enabled = true; } |
cbcdf4dd4
|
643 |
if (!state && (chip->intr & 0x30)) { |
95273f895
|
644 |
chip->intr &= ~0x30; |
d9b42c01a
|
645 646 647 |
ret = i2c_smbus_write_byte_data(chip->client, TSL2563_CMD | TSL2563_REG_INT, chip->intr); |
388be4883
|
648 649 650 651 652 653 |
chip->int_enabled = false; /* now the interrupt is not enabled, we can go to sleep */ schedule_delayed_work(&chip->poweroff_work, 5 * HZ); } out: mutex_unlock(&chip->lock); |
cbcdf4dd4
|
654 |
return ret; |
388be4883
|
655 |
} |
cbcdf4dd4
|
656 |
static int tsl2563_read_interrupt_config(struct iio_dev *indio_dev, |
6d59747eb
|
657 658 |
const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir) |
388be4883
|
659 |
{ |
cbcdf4dd4
|
660 |
struct tsl2563_chip *chip = iio_priv(indio_dev); |
cbcdf4dd4
|
661 |
int ret; |
388be4883
|
662 663 |
mutex_lock(&chip->lock); |
d9b42c01a
|
664 665 |
ret = i2c_smbus_read_byte_data(chip->client, TSL2563_CMD | TSL2563_REG_INT); |
388be4883
|
666 667 |
mutex_unlock(&chip->lock); if (ret < 0) |
a722dcca4
|
668 |
return ret; |
388be4883
|
669 |
|
a722dcca4
|
670 |
return !!(ret & 0x30); |
388be4883
|
671 |
} |
388be4883
|
672 |
|
6fe8135fc
|
673 674 |
static const struct iio_info tsl2563_info_no_irq = { .driver_module = THIS_MODULE, |
9e4216fd6
|
675 676 |
.read_raw = &tsl2563_read_raw, .write_raw = &tsl2563_write_raw, |
6fe8135fc
|
677 678 679 680 |
}; static const struct iio_info tsl2563_info = { .driver_module = THIS_MODULE, |
6fe8135fc
|
681 682 |
.read_raw = &tsl2563_read_raw, .write_raw = &tsl2563_write_raw, |
cb955852a
|
683 684 685 686 |
.read_event_value = &tsl2563_read_thresh, .write_event_value = &tsl2563_write_thresh, .read_event_config = &tsl2563_read_interrupt_config, .write_event_config = &tsl2563_write_interrupt_config, |
6fe8135fc
|
687 |
}; |
4ae1c61ff
|
688 |
static int tsl2563_probe(struct i2c_client *client, |
ee1f1fa40
|
689 690 |
const struct i2c_device_id *device_id) { |
33789dce5
|
691 |
struct iio_dev *indio_dev; |
ee1f1fa40
|
692 693 |
struct tsl2563_chip *chip; struct tsl2563_platform_data *pdata = client->dev.platform_data; |
8175bff5b
|
694 |
struct device_node *np = client->dev.of_node; |
ee1f1fa40
|
695 |
int err = 0; |
deda386de
|
696 |
u8 id = 0; |
ee1f1fa40
|
697 |
|
bace48f44
|
698 |
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip)); |
33789dce5
|
699 |
if (!indio_dev) |
ee1f1fa40
|
700 |
return -ENOMEM; |
33789dce5
|
701 |
chip = iio_priv(indio_dev); |
ee1f1fa40
|
702 703 704 705 706 |
i2c_set_clientdata(client, chip); chip->client = client; err = tsl2563_detect(chip); if (err) { |
dbf717fd9
|
707 708 |
dev_err(&client->dev, "detect error %d ", -err); |
bace48f44
|
709 |
return err; |
ee1f1fa40
|
710 711 712 |
} err = tsl2563_read_id(chip, &id); |
dbf717fd9
|
713 714 715 |
if (err) { dev_err(&client->dev, "read id error %d ", -err); |
bace48f44
|
716 |
return err; |
dbf717fd9
|
717 |
} |
ee1f1fa40
|
718 719 720 721 722 723 724 725 726 727 728 729 730 |
mutex_init(&chip->lock); /* Default values used until userspace says otherwise */ chip->low_thres = 0x0; chip->high_thres = 0xffff; chip->gainlevel = tsl2563_gainlevel_table; chip->intr = TSL2563_INT_PERSIST(4); chip->calib0 = calib_from_sysfs(CALIB_BASE_SYSFS); chip->calib1 = calib_from_sysfs(CALIB_BASE_SYSFS); if (pdata) chip->cover_comp_gain = pdata->cover_comp_gain; |
8175bff5b
|
731 732 733 |
else if (np) of_property_read_u32(np, "amstaos,cover-comp-gain", &chip->cover_comp_gain); |
ee1f1fa40
|
734 735 736 737 738 |
else chip->cover_comp_gain = 1; dev_info(&client->dev, "model %d, rev. %d ", id >> 4, id & 0x0f); |
cbcdf4dd4
|
739 740 741 |
indio_dev->name = client->name; indio_dev->channels = tsl2563_channels; indio_dev->num_channels = ARRAY_SIZE(tsl2563_channels); |
33789dce5
|
742 |
indio_dev->dev.parent = &client->dev; |
33789dce5
|
743 |
indio_dev->modes = INDIO_DIRECT_MODE; |
dbf717fd9
|
744 |
|
cbcdf4dd4
|
745 |
if (client->irq) |
6fe8135fc
|
746 747 748 |
indio_dev->info = &tsl2563_info; else indio_dev->info = &tsl2563_info_no_irq; |
dbf717fd9
|
749 |
|
388be4883
|
750 |
if (client->irq) { |
bace48f44
|
751 |
err = devm_request_threaded_irq(&client->dev, client->irq, |
bdab10017
|
752 753 754 755 756 |
NULL, &tsl2563_event_handler, IRQF_TRIGGER_RISING | IRQF_ONESHOT, "tsl2563_event", indio_dev); |
dbf717fd9
|
757 758 759 |
if (err) { dev_err(&client->dev, "irq request error %d ", -err); |
bace48f44
|
760 |
return err; |
dbf717fd9
|
761 |
} |
388be4883
|
762 |
} |
dbf717fd9
|
763 |
|
ee1f1fa40
|
764 |
err = tsl2563_configure(chip); |
dbf717fd9
|
765 766 767 |
if (err) { dev_err(&client->dev, "configure error %d ", -err); |
bace48f44
|
768 |
return err; |
dbf717fd9
|
769 |
} |
ee1f1fa40
|
770 771 |
INIT_DELAYED_WORK(&chip->poweroff_work, tsl2563_poweroff_work); |
dbf717fd9
|
772 |
|
388be4883
|
773 |
/* The interrupt cannot yet be enabled so this is fine without lock */ |
ee1f1fa40
|
774 |
schedule_delayed_work(&chip->poweroff_work, 5 * HZ); |
dbf717fd9
|
775 776 777 778 |
err = iio_device_register(indio_dev); if (err) { dev_err(&client->dev, "iio registration error %d ", -err); |
bace48f44
|
779 |
goto fail; |
dbf717fd9
|
780 |
} |
26d25ae3f
|
781 |
|
ee1f1fa40
|
782 |
return 0; |
dbf717fd9
|
783 |
|
bace48f44
|
784 |
fail: |
dbf717fd9
|
785 786 |
cancel_delayed_work(&chip->poweroff_work); flush_scheduled_work(); |
ee1f1fa40
|
787 788 |
return err; } |
447d4f29e
|
789 |
static int tsl2563_remove(struct i2c_client *client) |
ee1f1fa40
|
790 791 |
{ struct tsl2563_chip *chip = i2c_get_clientdata(client); |
33789dce5
|
792 |
struct iio_dev *indio_dev = iio_priv_to_dev(chip); |
d2fffd6c2
|
793 794 |
iio_device_unregister(indio_dev); |
388be4883
|
795 796 797 |
if (!chip->int_enabled) cancel_delayed_work(&chip->poweroff_work); /* Ensure that interrupts are disabled - then flush any bottom halves */ |
95273f895
|
798 |
chip->intr &= ~0x30; |
d9b42c01a
|
799 800 |
i2c_smbus_write_byte_data(chip->client, TSL2563_CMD | TSL2563_REG_INT, chip->intr); |
388be4883
|
801 802 |
flush_scheduled_work(); tsl2563_set_power(chip, 0); |
ee1f1fa40
|
803 |
|
ee1f1fa40
|
804 805 |
return 0; } |
01788c533
|
806 807 |
#ifdef CONFIG_PM_SLEEP static int tsl2563_suspend(struct device *dev) |
ee1f1fa40
|
808 |
{ |
01788c533
|
809 |
struct tsl2563_chip *chip = i2c_get_clientdata(to_i2c_client(dev)); |
ee1f1fa40
|
810 811 812 813 814 815 816 |
int ret; mutex_lock(&chip->lock); ret = tsl2563_set_power(chip, 0); if (ret) goto out; |
01788c533
|
817 |
chip->suspended = true; |
ee1f1fa40
|
818 819 820 821 822 |
out: mutex_unlock(&chip->lock); return ret; } |
01788c533
|
823 |
static int tsl2563_resume(struct device *dev) |
ee1f1fa40
|
824 |
{ |
01788c533
|
825 |
struct tsl2563_chip *chip = i2c_get_clientdata(to_i2c_client(dev)); |
ee1f1fa40
|
826 827 828 829 830 831 832 833 834 835 836 |
int ret; mutex_lock(&chip->lock); ret = tsl2563_set_power(chip, 1); if (ret) goto out; ret = tsl2563_configure(chip); if (ret) goto out; |
01788c533
|
837 |
chip->suspended = false; |
ee1f1fa40
|
838 839 840 841 842 |
out: mutex_unlock(&chip->lock); return ret; } |
01788c533
|
843 844 845 846 847 |
static SIMPLE_DEV_PM_OPS(tsl2563_pm_ops, tsl2563_suspend, tsl2563_resume); #define TSL2563_PM_OPS (&tsl2563_pm_ops) #else #define TSL2563_PM_OPS NULL #endif |
ee1f1fa40
|
848 |
static const struct i2c_device_id tsl2563_id[] = { |
dbd5d239e
|
849 850 851 852 853 |
{ "tsl2560", 0 }, { "tsl2561", 1 }, { "tsl2562", 2 }, { "tsl2563", 3 }, {} |
ee1f1fa40
|
854 855 856 857 858 |
}; MODULE_DEVICE_TABLE(i2c, tsl2563_id); static struct i2c_driver tsl2563_i2c_driver = { .driver = { |
dbd5d239e
|
859 |
.name = "tsl2563", |
01788c533
|
860 |
.pm = TSL2563_PM_OPS, |
ee1f1fa40
|
861 |
}, |
ee1f1fa40
|
862 |
.probe = tsl2563_probe, |
e543acf07
|
863 |
.remove = tsl2563_remove, |
ee1f1fa40
|
864 865 |
.id_table = tsl2563_id, }; |
6e5af184f
|
866 |
module_i2c_driver(tsl2563_i2c_driver); |
ee1f1fa40
|
867 868 869 870 |
MODULE_AUTHOR("Nokia Corporation"); MODULE_DESCRIPTION("tsl2563 light sensor driver"); MODULE_LICENSE("GPL"); |