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Commit 13b2e3a5c422daa63f1e913cf25462cb9c40dcd0

Authored by Lars-Peter Clausen
Committed by Greg Kroah-Hartman
1 parent 8d622085d6

iio: ad799x: Fix ad7991/ad7995/ad7999 config setup 

commit 2eacc608b3bf3519fc353c558454873f4589146d upstream.

The ad7991/ad7995/ad7999 does not have a configuration register like the
other devices that can be written and read. The configuration is written as
part of the conversion sequence.

Fixes: 0f7ddcc1bff1 ("iio:adc:ad799x: Write default config on probe and reset alert status on probe")
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Tested-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Showing 1 changed file with 13 additions and 2 deletions Inline Diff

drivers/iio/adc/ad799x.c
Diff comments   View file @ 13b2e3a
1 /* 1 /*
2 * iio/adc/ad799x.c 2 * iio/adc/ad799x.c
3 * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc. 3 * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc.
4 * 4 *
5 * based on iio/adc/max1363 5 * based on iio/adc/max1363
6 * Copyright (C) 2008-2010 Jonathan Cameron 6 * Copyright (C) 2008-2010 Jonathan Cameron
7 * 7 *
8 * based on linux/drivers/i2c/chips/max123x 8 * based on linux/drivers/i2c/chips/max123x
9 * Copyright (C) 2002-2004 Stefan Eletzhofer 9 * Copyright (C) 2002-2004 Stefan Eletzhofer
10 * 10 *
11 * based on linux/drivers/acron/char/pcf8583.c 11 * based on linux/drivers/acron/char/pcf8583.c
12 * Copyright (C) 2000 Russell King 12 * Copyright (C) 2000 Russell King
13 * 13 *
14 * This program is free software; you can redistribute it and/or modify 14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as 15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation. 16 * published by the Free Software Foundation.
17 * 17 *
18 * ad799x.c 18 * ad799x.c
19 * 19 *
20 * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997, 20 * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997,
21 * ad7998 and similar chips. 21 * ad7998 and similar chips.
22 * 22 *
23 */ 23 */
24 24
25 #include <linux/interrupt.h> 25 #include <linux/interrupt.h>
26 #include <linux/device.h> 26 #include <linux/device.h>
27 #include <linux/kernel.h> 27 #include <linux/kernel.h>
28 #include <linux/sysfs.h> 28 #include <linux/sysfs.h>
29 #include <linux/i2c.h> 29 #include <linux/i2c.h>
30 #include <linux/regulator/consumer.h> 30 #include <linux/regulator/consumer.h>
31 #include <linux/slab.h> 31 #include <linux/slab.h>
32 #include <linux/types.h> 32 #include <linux/types.h>
33 #include <linux/err.h> 33 #include <linux/err.h>
34 #include <linux/module.h> 34 #include <linux/module.h>
35 #include <linux/bitops.h> 35 #include <linux/bitops.h>
36 36
37 #include <linux/iio/iio.h> 37 #include <linux/iio/iio.h>
38 #include <linux/iio/sysfs.h> 38 #include <linux/iio/sysfs.h>
39 #include <linux/iio/events.h> 39 #include <linux/iio/events.h>
40 #include <linux/iio/buffer.h> 40 #include <linux/iio/buffer.h>
41 #include <linux/iio/trigger_consumer.h> 41 #include <linux/iio/trigger_consumer.h>
42 #include <linux/iio/triggered_buffer.h> 42 #include <linux/iio/triggered_buffer.h>
43 43
44 #define AD799X_CHANNEL_SHIFT 4 44 #define AD799X_CHANNEL_SHIFT 4
45 45
46 /* 46 /*
47 * AD7991, AD7995 and AD7999 defines 47 * AD7991, AD7995 and AD7999 defines
48 */ 48 */
49 49
50 #define AD7991_REF_SEL 0x08 50 #define AD7991_REF_SEL 0x08
51 #define AD7991_FLTR 0x04 51 #define AD7991_FLTR 0x04
52 #define AD7991_BIT_TRIAL_DELAY 0x02 52 #define AD7991_BIT_TRIAL_DELAY 0x02
53 #define AD7991_SAMPLE_DELAY 0x01 53 #define AD7991_SAMPLE_DELAY 0x01
54 54
55 /* 55 /*
56 * AD7992, AD7993, AD7994, AD7997 and AD7998 defines 56 * AD7992, AD7993, AD7994, AD7997 and AD7998 defines
57 */ 57 */
58 58
59 #define AD7998_FLTR BIT(3) 59 #define AD7998_FLTR BIT(3)
60 #define AD7998_ALERT_EN BIT(2) 60 #define AD7998_ALERT_EN BIT(2)
61 #define AD7998_BUSY_ALERT BIT(1) 61 #define AD7998_BUSY_ALERT BIT(1)
62 #define AD7998_BUSY_ALERT_POL BIT(0) 62 #define AD7998_BUSY_ALERT_POL BIT(0)
63 63
64 #define AD7998_CONV_RES_REG 0x0 64 #define AD7998_CONV_RES_REG 0x0
65 #define AD7998_ALERT_STAT_REG 0x1 65 #define AD7998_ALERT_STAT_REG 0x1
66 #define AD7998_CONF_REG 0x2 66 #define AD7998_CONF_REG 0x2
67 #define AD7998_CYCLE_TMR_REG 0x3 67 #define AD7998_CYCLE_TMR_REG 0x3
68 68
69 #define AD7998_DATALOW_REG(x) ((x) * 3 + 0x4) 69 #define AD7998_DATALOW_REG(x) ((x) * 3 + 0x4)
70 #define AD7998_DATAHIGH_REG(x) ((x) * 3 + 0x5) 70 #define AD7998_DATAHIGH_REG(x) ((x) * 3 + 0x5)
71 #define AD7998_HYST_REG(x) ((x) * 3 + 0x6) 71 #define AD7998_HYST_REG(x) ((x) * 3 + 0x6)
72 72
73 #define AD7998_CYC_MASK GENMASK(2, 0) 73 #define AD7998_CYC_MASK GENMASK(2, 0)
74 #define AD7998_CYC_DIS 0x0 74 #define AD7998_CYC_DIS 0x0
75 #define AD7998_CYC_TCONF_32 0x1 75 #define AD7998_CYC_TCONF_32 0x1
76 #define AD7998_CYC_TCONF_64 0x2 76 #define AD7998_CYC_TCONF_64 0x2
77 #define AD7998_CYC_TCONF_128 0x3 77 #define AD7998_CYC_TCONF_128 0x3
78 #define AD7998_CYC_TCONF_256 0x4 78 #define AD7998_CYC_TCONF_256 0x4
79 #define AD7998_CYC_TCONF_512 0x5 79 #define AD7998_CYC_TCONF_512 0x5
80 #define AD7998_CYC_TCONF_1024 0x6 80 #define AD7998_CYC_TCONF_1024 0x6
81 #define AD7998_CYC_TCONF_2048 0x7 81 #define AD7998_CYC_TCONF_2048 0x7
82 82
83 #define AD7998_ALERT_STAT_CLEAR 0xFF 83 #define AD7998_ALERT_STAT_CLEAR 0xFF
84 84
85 /* 85 /*
86 * AD7997 and AD7997 defines 86 * AD7997 and AD7997 defines
87 */ 87 */
88 88
89 #define AD7997_8_READ_SINGLE BIT(7) 89 #define AD7997_8_READ_SINGLE BIT(7)
90 #define AD7997_8_READ_SEQUENCE (BIT(6) | BIT(5) | BIT(4)) 90 #define AD7997_8_READ_SEQUENCE (BIT(6) | BIT(5) | BIT(4))
91 91
92 enum { 92 enum {
93 ad7991, 93 ad7991,
94 ad7995, 94 ad7995,
95 ad7999, 95 ad7999,
96 ad7992, 96 ad7992,
97 ad7993, 97 ad7993,
98 ad7994, 98 ad7994,
99 ad7997, 99 ad7997,
100 ad7998 100 ad7998
101 }; 101 };
102 102
103 /** 103 /**
104 * struct ad799x_chip_config - chip specific information 104 * struct ad799x_chip_config - chip specific information
105 * @channel: channel specification 105 * @channel: channel specification
106 * @default_config: device default configuration 106 * @default_config: device default configuration
107 * @info: pointer to iio_info struct 107 * @info: pointer to iio_info struct
108 */ 108 */
109 struct ad799x_chip_config { 109 struct ad799x_chip_config {
110 const struct iio_chan_spec channel[9]; 110 const struct iio_chan_spec channel[9];
111 u16 default_config; 111 u16 default_config;
112 const struct iio_info *info; 112 const struct iio_info *info;
113 }; 113 };
114 114
115 /** 115 /**
116 * struct ad799x_chip_info - chip specific information 116 * struct ad799x_chip_info - chip specific information
117 * @num_channels: number of channels 117 * @num_channels: number of channels
118 * @noirq_config: device configuration w/o IRQ 118 * @noirq_config: device configuration w/o IRQ
119 * @irq_config: device configuration w/IRQ 119 * @irq_config: device configuration w/IRQ
120 */ 120 */
121 struct ad799x_chip_info { 121 struct ad799x_chip_info {
122 int num_channels; 122 int num_channels;
123 const struct ad799x_chip_config noirq_config; 123 const struct ad799x_chip_config noirq_config;
124 const struct ad799x_chip_config irq_config; 124 const struct ad799x_chip_config irq_config;
125 }; 125 };
126 126
127 struct ad799x_state { 127 struct ad799x_state {
128 struct i2c_client *client; 128 struct i2c_client *client;
129 const struct ad799x_chip_config *chip_config; 129 const struct ad799x_chip_config *chip_config;
130 struct regulator *reg; 130 struct regulator *reg;
131 struct regulator *vref; 131 struct regulator *vref;
132 unsigned id; 132 unsigned id;
133 u16 config; 133 u16 config;
134 134
135 u8 *rx_buf; 135 u8 *rx_buf;
136 unsigned int transfer_size; 136 unsigned int transfer_size;
137 }; 137 };
138 138
139 static int ad799x_write_config(struct ad799x_state *st, u16 val) 139 static int ad799x_write_config(struct ad799x_state *st, u16 val)
140 { 140 {
141 switch (st->id) { 141 switch (st->id) {
142 case ad7997: 142 case ad7997:
143 case ad7998: 143 case ad7998:
144 return i2c_smbus_write_word_swapped(st->client, AD7998_CONF_REG, 144 return i2c_smbus_write_word_swapped(st->client, AD7998_CONF_REG,
145 val); 145 val);
146 default: 146 case ad7992:
147 case ad7993:
148 case ad7994:
147 return i2c_smbus_write_byte_data(st->client, AD7998_CONF_REG, 149 return i2c_smbus_write_byte_data(st->client, AD7998_CONF_REG,
148 val); 150 val);
151 default:
152 /* Will be written when doing a conversion */
153 st->config = val;
154 return 0;
149 } 155 }
150 } 156 }
151 157
152 static int ad799x_read_config(struct ad799x_state *st) 158 static int ad799x_read_config(struct ad799x_state *st)
153 { 159 {
154 switch (st->id) { 160 switch (st->id) {
155 case ad7997: 161 case ad7997:
156 case ad7998: 162 case ad7998:
157 return i2c_smbus_read_word_swapped(st->client, AD7998_CONF_REG); 163 return i2c_smbus_read_word_swapped(st->client, AD7998_CONF_REG);
158 default: 164 case ad7992:
165 case ad7993:
166 case ad7994:
159 return i2c_smbus_read_byte_data(st->client, AD7998_CONF_REG); 167 return i2c_smbus_read_byte_data(st->client, AD7998_CONF_REG);
168 default:
169 /* No readback support */
170 return st->config;
160 } 171 }
161 } 172 }
162 173
163 /** 174 /**
164 * ad799x_trigger_handler() bh of trigger launched polling to ring buffer 175 * ad799x_trigger_handler() bh of trigger launched polling to ring buffer
165 * 176 *
166 * Currently there is no option in this driver to disable the saving of 177 * Currently there is no option in this driver to disable the saving of
167 * timestamps within the ring. 178 * timestamps within the ring.
168 **/ 179 **/
169 static irqreturn_t ad799x_trigger_handler(int irq, void *p) 180 static irqreturn_t ad799x_trigger_handler(int irq, void *p)
170 { 181 {
171 struct iio_poll_func *pf = p; 182 struct iio_poll_func *pf = p;
172 struct iio_dev *indio_dev = pf->indio_dev; 183 struct iio_dev *indio_dev = pf->indio_dev;
173 struct ad799x_state *st = iio_priv(indio_dev); 184 struct ad799x_state *st = iio_priv(indio_dev);
174 int b_sent; 185 int b_sent;
175 u8 cmd; 186 u8 cmd;
176 187
177 switch (st->id) { 188 switch (st->id) {
178 case ad7991: 189 case ad7991:
179 case ad7995: 190 case ad7995:
180 case ad7999: 191 case ad7999:
181 cmd = st->config | 192 cmd = st->config |
182 (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT); 193 (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT);
183 break; 194 break;
184 case ad7992: 195 case ad7992:
185 case ad7993: 196 case ad7993:
186 case ad7994: 197 case ad7994:
187 cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) | 198 cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) |
188 AD7998_CONV_RES_REG; 199 AD7998_CONV_RES_REG;
189 break; 200 break;
190 case ad7997: 201 case ad7997:
191 case ad7998: 202 case ad7998:
192 cmd = AD7997_8_READ_SEQUENCE | AD7998_CONV_RES_REG; 203 cmd = AD7997_8_READ_SEQUENCE | AD7998_CONV_RES_REG;
193 break; 204 break;
194 default: 205 default:
195 cmd = 0; 206 cmd = 0;
196 } 207 }
197 208
198 b_sent = i2c_smbus_read_i2c_block_data(st->client, 209 b_sent = i2c_smbus_read_i2c_block_data(st->client,
199 cmd, st->transfer_size, st->rx_buf); 210 cmd, st->transfer_size, st->rx_buf);
200 if (b_sent < 0) 211 if (b_sent < 0)
201 goto out; 212 goto out;
202 213
203 iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf, 214 iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
204 iio_get_time_ns()); 215 iio_get_time_ns());
205 out: 216 out:
206 iio_trigger_notify_done(indio_dev->trig); 217 iio_trigger_notify_done(indio_dev->trig);
207 218
208 return IRQ_HANDLED; 219 return IRQ_HANDLED;
209 } 220 }
210 221
211 static int ad799x_update_scan_mode(struct iio_dev *indio_dev, 222 static int ad799x_update_scan_mode(struct iio_dev *indio_dev,
212 const unsigned long *scan_mask) 223 const unsigned long *scan_mask)
213 { 224 {
214 struct ad799x_state *st = iio_priv(indio_dev); 225 struct ad799x_state *st = iio_priv(indio_dev);
215 226
216 kfree(st->rx_buf); 227 kfree(st->rx_buf);
217 st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL); 228 st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
218 if (!st->rx_buf) 229 if (!st->rx_buf)
219 return -ENOMEM; 230 return -ENOMEM;
220 231
221 st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2; 232 st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2;
222 233
223 switch (st->id) { 234 switch (st->id) {
224 case ad7992: 235 case ad7992:
225 case ad7993: 236 case ad7993:
226 case ad7994: 237 case ad7994:
227 case ad7997: 238 case ad7997:
228 case ad7998: 239 case ad7998:
229 st->config &= ~(GENMASK(7, 0) << AD799X_CHANNEL_SHIFT); 240 st->config &= ~(GENMASK(7, 0) << AD799X_CHANNEL_SHIFT);
230 st->config |= (*scan_mask << AD799X_CHANNEL_SHIFT); 241 st->config |= (*scan_mask << AD799X_CHANNEL_SHIFT);
231 return ad799x_write_config(st, st->config); 242 return ad799x_write_config(st, st->config);
232 default: 243 default:
233 return 0; 244 return 0;
234 } 245 }
235 } 246 }
236 247
237 static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch) 248 static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch)
238 { 249 {
239 u8 cmd; 250 u8 cmd;
240 251
241 switch (st->id) { 252 switch (st->id) {
242 case ad7991: 253 case ad7991:
243 case ad7995: 254 case ad7995:
244 case ad7999: 255 case ad7999:
245 cmd = st->config | (BIT(ch) << AD799X_CHANNEL_SHIFT); 256 cmd = st->config | (BIT(ch) << AD799X_CHANNEL_SHIFT);
246 break; 257 break;
247 case ad7992: 258 case ad7992:
248 case ad7993: 259 case ad7993:
249 case ad7994: 260 case ad7994:
250 cmd = BIT(ch) << AD799X_CHANNEL_SHIFT; 261 cmd = BIT(ch) << AD799X_CHANNEL_SHIFT;
251 break; 262 break;
252 case ad7997: 263 case ad7997:
253 case ad7998: 264 case ad7998:
254 cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE; 265 cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE;
255 break; 266 break;
256 default: 267 default:
257 return -EINVAL; 268 return -EINVAL;
258 } 269 }
259 270
260 return i2c_smbus_read_word_swapped(st->client, cmd); 271 return i2c_smbus_read_word_swapped(st->client, cmd);
261 } 272 }
262 273
263 static int ad799x_read_raw(struct iio_dev *indio_dev, 274 static int ad799x_read_raw(struct iio_dev *indio_dev,
264 struct iio_chan_spec const *chan, 275 struct iio_chan_spec const *chan,
265 int *val, 276 int *val,
266 int *val2, 277 int *val2,
267 long m) 278 long m)
268 { 279 {
269 int ret; 280 int ret;
270 struct ad799x_state *st = iio_priv(indio_dev); 281 struct ad799x_state *st = iio_priv(indio_dev);
271 282
272 switch (m) { 283 switch (m) {
273 case IIO_CHAN_INFO_RAW: 284 case IIO_CHAN_INFO_RAW:
274 mutex_lock(&indio_dev->mlock); 285 mutex_lock(&indio_dev->mlock);
275 if (iio_buffer_enabled(indio_dev)) 286 if (iio_buffer_enabled(indio_dev))
276 ret = -EBUSY; 287 ret = -EBUSY;
277 else 288 else
278 ret = ad799x_scan_direct(st, chan->scan_index); 289 ret = ad799x_scan_direct(st, chan->scan_index);
279 mutex_unlock(&indio_dev->mlock); 290 mutex_unlock(&indio_dev->mlock);
280 291
281 if (ret < 0) 292 if (ret < 0)
282 return ret; 293 return ret;
283 *val = (ret >> chan->scan_type.shift) & 294 *val = (ret >> chan->scan_type.shift) &
284 GENMASK(chan->scan_type.realbits - 1, 0); 295 GENMASK(chan->scan_type.realbits - 1, 0);
285 return IIO_VAL_INT; 296 return IIO_VAL_INT;
286 case IIO_CHAN_INFO_SCALE: 297 case IIO_CHAN_INFO_SCALE:
287 ret = regulator_get_voltage(st->vref); 298 ret = regulator_get_voltage(st->vref);
288 if (ret < 0) 299 if (ret < 0)
289 return ret; 300 return ret;
290 *val = ret / 1000; 301 *val = ret / 1000;
291 *val2 = chan->scan_type.realbits; 302 *val2 = chan->scan_type.realbits;
292 return IIO_VAL_FRACTIONAL_LOG2; 303 return IIO_VAL_FRACTIONAL_LOG2;
293 } 304 }
294 return -EINVAL; 305 return -EINVAL;
295 } 306 }
296 static const unsigned int ad7998_frequencies[] = { 307 static const unsigned int ad7998_frequencies[] = {
297 [AD7998_CYC_DIS] = 0, 308 [AD7998_CYC_DIS] = 0,
298 [AD7998_CYC_TCONF_32] = 15625, 309 [AD7998_CYC_TCONF_32] = 15625,
299 [AD7998_CYC_TCONF_64] = 7812, 310 [AD7998_CYC_TCONF_64] = 7812,
300 [AD7998_CYC_TCONF_128] = 3906, 311 [AD7998_CYC_TCONF_128] = 3906,
301 [AD7998_CYC_TCONF_512] = 976, 312 [AD7998_CYC_TCONF_512] = 976,
302 [AD7998_CYC_TCONF_1024] = 488, 313 [AD7998_CYC_TCONF_1024] = 488,
303 [AD7998_CYC_TCONF_2048] = 244, 314 [AD7998_CYC_TCONF_2048] = 244,
304 }; 315 };
305 316
306 static ssize_t ad799x_read_frequency(struct device *dev, 317 static ssize_t ad799x_read_frequency(struct device *dev,
307 struct device_attribute *attr, 318 struct device_attribute *attr,
308 char *buf) 319 char *buf)
309 { 320 {
310 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 321 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
311 struct ad799x_state *st = iio_priv(indio_dev); 322 struct ad799x_state *st = iio_priv(indio_dev);
312 323
313 int ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG); 324 int ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
314 if (ret < 0) 325 if (ret < 0)
315 return ret; 326 return ret;
316 327
317 return sprintf(buf, "%u\n", ad7998_frequencies[ret & AD7998_CYC_MASK]); 328 return sprintf(buf, "%u\n", ad7998_frequencies[ret & AD7998_CYC_MASK]);
318 } 329 }
319 330
320 static ssize_t ad799x_write_frequency(struct device *dev, 331 static ssize_t ad799x_write_frequency(struct device *dev,
321 struct device_attribute *attr, 332 struct device_attribute *attr,
322 const char *buf, 333 const char *buf,
323 size_t len) 334 size_t len)
324 { 335 {
325 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 336 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
326 struct ad799x_state *st = iio_priv(indio_dev); 337 struct ad799x_state *st = iio_priv(indio_dev);
327 338
328 long val; 339 long val;
329 int ret, i; 340 int ret, i;
330 341
331 ret = kstrtol(buf, 10, &val); 342 ret = kstrtol(buf, 10, &val);
332 if (ret) 343 if (ret)
333 return ret; 344 return ret;
334 345
335 mutex_lock(&indio_dev->mlock); 346 mutex_lock(&indio_dev->mlock);
336 ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG); 347 ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
337 if (ret < 0) 348 if (ret < 0)
338 goto error_ret_mutex; 349 goto error_ret_mutex;
339 /* Wipe the bits clean */ 350 /* Wipe the bits clean */
340 ret &= ~AD7998_CYC_MASK; 351 ret &= ~AD7998_CYC_MASK;
341 352
342 for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++) 353 for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++)
343 if (val == ad7998_frequencies[i]) 354 if (val == ad7998_frequencies[i])
344 break; 355 break;
345 if (i == ARRAY_SIZE(ad7998_frequencies)) { 356 if (i == ARRAY_SIZE(ad7998_frequencies)) {
346 ret = -EINVAL; 357 ret = -EINVAL;
347 goto error_ret_mutex; 358 goto error_ret_mutex;
348 } 359 }
349 360
350 ret = i2c_smbus_write_byte_data(st->client, AD7998_CYCLE_TMR_REG, 361 ret = i2c_smbus_write_byte_data(st->client, AD7998_CYCLE_TMR_REG,
351 ret | i); 362 ret | i);
352 if (ret < 0) 363 if (ret < 0)
353 goto error_ret_mutex; 364 goto error_ret_mutex;
354 ret = len; 365 ret = len;
355 366
356 error_ret_mutex: 367 error_ret_mutex:
357 mutex_unlock(&indio_dev->mlock); 368 mutex_unlock(&indio_dev->mlock);
358 369
359 return ret; 370 return ret;
360 } 371 }
361 372
362 static int ad799x_read_event_config(struct iio_dev *indio_dev, 373 static int ad799x_read_event_config(struct iio_dev *indio_dev,
363 const struct iio_chan_spec *chan, 374 const struct iio_chan_spec *chan,
364 enum iio_event_type type, 375 enum iio_event_type type,
365 enum iio_event_direction dir) 376 enum iio_event_direction dir)
366 { 377 {
367 struct ad799x_state *st = iio_priv(indio_dev); 378 struct ad799x_state *st = iio_priv(indio_dev);
368 379
369 if (!(st->config & AD7998_ALERT_EN)) 380 if (!(st->config & AD7998_ALERT_EN))
370 return 0; 381 return 0;
371 382
372 if ((st->config >> AD799X_CHANNEL_SHIFT) & BIT(chan->scan_index)) 383 if ((st->config >> AD799X_CHANNEL_SHIFT) & BIT(chan->scan_index))
373 return 1; 384 return 1;
374 385
375 return 0; 386 return 0;
376 } 387 }
377 388
378 static int ad799x_write_event_config(struct iio_dev *indio_dev, 389 static int ad799x_write_event_config(struct iio_dev *indio_dev,
379 const struct iio_chan_spec *chan, 390 const struct iio_chan_spec *chan,
380 enum iio_event_type type, 391 enum iio_event_type type,
381 enum iio_event_direction dir, 392 enum iio_event_direction dir,
382 int state) 393 int state)
383 { 394 {
384 struct ad799x_state *st = iio_priv(indio_dev); 395 struct ad799x_state *st = iio_priv(indio_dev);
385 int ret; 396 int ret;
386 397
387 mutex_lock(&indio_dev->mlock); 398 mutex_lock(&indio_dev->mlock);
388 if (iio_buffer_enabled(indio_dev)) { 399 if (iio_buffer_enabled(indio_dev)) {
389 ret = -EBUSY; 400 ret = -EBUSY;
390 goto done; 401 goto done;
391 } 402 }
392 403
393 if (state) 404 if (state)
394 st->config |= BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT; 405 st->config |= BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT;
395 else 406 else
396 st->config &= ~(BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT); 407 st->config &= ~(BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT);
397 408
398 if (st->config >> AD799X_CHANNEL_SHIFT) 409 if (st->config >> AD799X_CHANNEL_SHIFT)
399 st->config |= AD7998_ALERT_EN; 410 st->config |= AD7998_ALERT_EN;
400 else 411 else
401 st->config &= ~AD7998_ALERT_EN; 412 st->config &= ~AD7998_ALERT_EN;
402 413
403 ret = ad799x_write_config(st, st->config); 414 ret = ad799x_write_config(st, st->config);
404 415
405 done: 416 done:
406 mutex_unlock(&indio_dev->mlock); 417 mutex_unlock(&indio_dev->mlock);
407 418
408 return ret; 419 return ret;
409 } 420 }
410 421
411 static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan, 422 static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan,
412 enum iio_event_direction dir, 423 enum iio_event_direction dir,
413 enum iio_event_info info) 424 enum iio_event_info info)
414 { 425 {
415 switch (info) { 426 switch (info) {
416 case IIO_EV_INFO_VALUE: 427 case IIO_EV_INFO_VALUE:
417 if (dir == IIO_EV_DIR_FALLING) 428 if (dir == IIO_EV_DIR_FALLING)
418 return AD7998_DATALOW_REG(chan->channel); 429 return AD7998_DATALOW_REG(chan->channel);
419 else 430 else
420 return AD7998_DATAHIGH_REG(chan->channel); 431 return AD7998_DATAHIGH_REG(chan->channel);
421 case IIO_EV_INFO_HYSTERESIS: 432 case IIO_EV_INFO_HYSTERESIS:
422 return AD7998_HYST_REG(chan->channel); 433 return AD7998_HYST_REG(chan->channel);
423 default: 434 default:
424 return -EINVAL; 435 return -EINVAL;
425 } 436 }
426 437
427 return 0; 438 return 0;
428 } 439 }
429 440
430 static int ad799x_write_event_value(struct iio_dev *indio_dev, 441 static int ad799x_write_event_value(struct iio_dev *indio_dev,
431 const struct iio_chan_spec *chan, 442 const struct iio_chan_spec *chan,
432 enum iio_event_type type, 443 enum iio_event_type type,
433 enum iio_event_direction dir, 444 enum iio_event_direction dir,
434 enum iio_event_info info, 445 enum iio_event_info info,
435 int val, int val2) 446 int val, int val2)
436 { 447 {
437 int ret; 448 int ret;
438 struct ad799x_state *st = iio_priv(indio_dev); 449 struct ad799x_state *st = iio_priv(indio_dev);
439 450
440 if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0)) 451 if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0))
441 return -EINVAL; 452 return -EINVAL;
442 453
443 mutex_lock(&indio_dev->mlock); 454 mutex_lock(&indio_dev->mlock);
444 ret = i2c_smbus_write_word_swapped(st->client, 455 ret = i2c_smbus_write_word_swapped(st->client,
445 ad799x_threshold_reg(chan, dir, info), 456 ad799x_threshold_reg(chan, dir, info),
446 val << chan->scan_type.shift); 457 val << chan->scan_type.shift);
447 mutex_unlock(&indio_dev->mlock); 458 mutex_unlock(&indio_dev->mlock);
448 459
449 return ret; 460 return ret;
450 } 461 }
451 462
452 static int ad799x_read_event_value(struct iio_dev *indio_dev, 463 static int ad799x_read_event_value(struct iio_dev *indio_dev,
453 const struct iio_chan_spec *chan, 464 const struct iio_chan_spec *chan,
454 enum iio_event_type type, 465 enum iio_event_type type,
455 enum iio_event_direction dir, 466 enum iio_event_direction dir,
456 enum iio_event_info info, 467 enum iio_event_info info,
457 int *val, int *val2) 468 int *val, int *val2)
458 { 469 {
459 int ret; 470 int ret;
460 struct ad799x_state *st = iio_priv(indio_dev); 471 struct ad799x_state *st = iio_priv(indio_dev);
461 472
462 mutex_lock(&indio_dev->mlock); 473 mutex_lock(&indio_dev->mlock);
463 ret = i2c_smbus_read_word_swapped(st->client, 474 ret = i2c_smbus_read_word_swapped(st->client,
464 ad799x_threshold_reg(chan, dir, info)); 475 ad799x_threshold_reg(chan, dir, info));
465 mutex_unlock(&indio_dev->mlock); 476 mutex_unlock(&indio_dev->mlock);
466 if (ret < 0) 477 if (ret < 0)
467 return ret; 478 return ret;
468 *val = (ret >> chan->scan_type.shift) & 479 *val = (ret >> chan->scan_type.shift) &
469 GENMASK(chan->scan_type.realbits - 1 , 0); 480 GENMASK(chan->scan_type.realbits - 1 , 0);
470 481
471 return IIO_VAL_INT; 482 return IIO_VAL_INT;
472 } 483 }
473 484
474 static irqreturn_t ad799x_event_handler(int irq, void *private) 485 static irqreturn_t ad799x_event_handler(int irq, void *private)
475 { 486 {
476 struct iio_dev *indio_dev = private; 487 struct iio_dev *indio_dev = private;
477 struct ad799x_state *st = iio_priv(private); 488 struct ad799x_state *st = iio_priv(private);
478 int i, ret; 489 int i, ret;
479 490
480 ret = i2c_smbus_read_byte_data(st->client, AD7998_ALERT_STAT_REG); 491 ret = i2c_smbus_read_byte_data(st->client, AD7998_ALERT_STAT_REG);
481 if (ret <= 0) 492 if (ret <= 0)
482 goto done; 493 goto done;
483 494
484 if (i2c_smbus_write_byte_data(st->client, AD7998_ALERT_STAT_REG, 495 if (i2c_smbus_write_byte_data(st->client, AD7998_ALERT_STAT_REG,
485 AD7998_ALERT_STAT_CLEAR) < 0) 496 AD7998_ALERT_STAT_CLEAR) < 0)
486 goto done; 497 goto done;
487 498
488 for (i = 0; i < 8; i++) { 499 for (i = 0; i < 8; i++) {
489 if (ret & BIT(i)) 500 if (ret & BIT(i))
490 iio_push_event(indio_dev, 501 iio_push_event(indio_dev,
491 i & 0x1 ? 502 i & 0x1 ?
492 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 503 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
493 (i >> 1), 504 (i >> 1),
494 IIO_EV_TYPE_THRESH, 505 IIO_EV_TYPE_THRESH,
495 IIO_EV_DIR_RISING) : 506 IIO_EV_DIR_RISING) :
496 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 507 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
497 (i >> 1), 508 (i >> 1),
498 IIO_EV_TYPE_THRESH, 509 IIO_EV_TYPE_THRESH,
499 IIO_EV_DIR_FALLING), 510 IIO_EV_DIR_FALLING),
500 iio_get_time_ns()); 511 iio_get_time_ns());
501 } 512 }
502 513
503 done: 514 done:
504 return IRQ_HANDLED; 515 return IRQ_HANDLED;
505 } 516 }
506 517
507 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO, 518 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
508 ad799x_read_frequency, 519 ad799x_read_frequency,
509 ad799x_write_frequency); 520 ad799x_write_frequency);
510 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0"); 521 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0");
511 522
512 static struct attribute *ad799x_event_attributes[] = { 523 static struct attribute *ad799x_event_attributes[] = {
513 &iio_dev_attr_sampling_frequency.dev_attr.attr, 524 &iio_dev_attr_sampling_frequency.dev_attr.attr,
514 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 525 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
515 NULL, 526 NULL,
516 }; 527 };
517 528
518 static struct attribute_group ad799x_event_attrs_group = { 529 static struct attribute_group ad799x_event_attrs_group = {
519 .attrs = ad799x_event_attributes, 530 .attrs = ad799x_event_attributes,
520 .name = "events", 531 .name = "events",
521 }; 532 };
522 533
523 static const struct iio_info ad7991_info = { 534 static const struct iio_info ad7991_info = {
524 .read_raw = &ad799x_read_raw, 535 .read_raw = &ad799x_read_raw,
525 .driver_module = THIS_MODULE, 536 .driver_module = THIS_MODULE,
526 }; 537 };
527 538
528 static const struct iio_info ad7993_4_7_8_noirq_info = { 539 static const struct iio_info ad7993_4_7_8_noirq_info = {
529 .read_raw = &ad799x_read_raw, 540 .read_raw = &ad799x_read_raw,
530 .driver_module = THIS_MODULE, 541 .driver_module = THIS_MODULE,
531 .update_scan_mode = ad799x_update_scan_mode, 542 .update_scan_mode = ad799x_update_scan_mode,
532 }; 543 };
533 544
534 static const struct iio_info ad7993_4_7_8_irq_info = { 545 static const struct iio_info ad7993_4_7_8_irq_info = {
535 .read_raw = &ad799x_read_raw, 546 .read_raw = &ad799x_read_raw,
536 .event_attrs = &ad799x_event_attrs_group, 547 .event_attrs = &ad799x_event_attrs_group,
537 .read_event_config = &ad799x_read_event_config, 548 .read_event_config = &ad799x_read_event_config,
538 .write_event_config = &ad799x_write_event_config, 549 .write_event_config = &ad799x_write_event_config,
539 .read_event_value = &ad799x_read_event_value, 550 .read_event_value = &ad799x_read_event_value,
540 .write_event_value = &ad799x_write_event_value, 551 .write_event_value = &ad799x_write_event_value,
541 .driver_module = THIS_MODULE, 552 .driver_module = THIS_MODULE,
542 .update_scan_mode = ad799x_update_scan_mode, 553 .update_scan_mode = ad799x_update_scan_mode,
543 }; 554 };
544 555
545 static const struct iio_event_spec ad799x_events[] = { 556 static const struct iio_event_spec ad799x_events[] = {
546 { 557 {
547 .type = IIO_EV_TYPE_THRESH, 558 .type = IIO_EV_TYPE_THRESH,
548 .dir = IIO_EV_DIR_RISING, 559 .dir = IIO_EV_DIR_RISING,
549 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 560 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
550 BIT(IIO_EV_INFO_ENABLE), 561 BIT(IIO_EV_INFO_ENABLE),
551 }, { 562 }, {
552 .type = IIO_EV_TYPE_THRESH, 563 .type = IIO_EV_TYPE_THRESH,
553 .dir = IIO_EV_DIR_FALLING, 564 .dir = IIO_EV_DIR_FALLING,
554 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 565 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
555 BIT(IIO_EV_INFO_ENABLE), 566 BIT(IIO_EV_INFO_ENABLE),
556 }, { 567 }, {
557 .type = IIO_EV_TYPE_THRESH, 568 .type = IIO_EV_TYPE_THRESH,
558 .dir = IIO_EV_DIR_EITHER, 569 .dir = IIO_EV_DIR_EITHER,
559 .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS), 570 .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
560 }, 571 },
561 }; 572 };
562 573
563 #define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \ 574 #define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \
564 .type = IIO_VOLTAGE, \ 575 .type = IIO_VOLTAGE, \
565 .indexed = 1, \ 576 .indexed = 1, \
566 .channel = (_index), \ 577 .channel = (_index), \
567 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 578 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
568 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 579 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
569 .scan_index = (_index), \ 580 .scan_index = (_index), \
570 .scan_type = { \ 581 .scan_type = { \
571 .sign = 'u', \ 582 .sign = 'u', \
572 .realbits = (_realbits), \ 583 .realbits = (_realbits), \
573 .storagebits = 16, \ 584 .storagebits = 16, \
574 .shift = 12 - (_realbits), \ 585 .shift = 12 - (_realbits), \
575 .endianness = IIO_BE, \ 586 .endianness = IIO_BE, \
576 }, \ 587 }, \
577 .event_spec = _ev_spec, \ 588 .event_spec = _ev_spec, \
578 .num_event_specs = _num_ev_spec, \ 589 .num_event_specs = _num_ev_spec, \
579 } 590 }
580 591
581 #define AD799X_CHANNEL(_index, _realbits) \ 592 #define AD799X_CHANNEL(_index, _realbits) \
582 _AD799X_CHANNEL(_index, _realbits, NULL, 0) 593 _AD799X_CHANNEL(_index, _realbits, NULL, 0)
583 594
584 #define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \ 595 #define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \
585 _AD799X_CHANNEL(_index, _realbits, ad799x_events, \ 596 _AD799X_CHANNEL(_index, _realbits, ad799x_events, \
586 ARRAY_SIZE(ad799x_events)) 597 ARRAY_SIZE(ad799x_events))
587 598
588 static const struct ad799x_chip_info ad799x_chip_info_tbl[] = { 599 static const struct ad799x_chip_info ad799x_chip_info_tbl[] = {
589 [ad7991] = { 600 [ad7991] = {
590 .num_channels = 5, 601 .num_channels = 5,
591 .noirq_config = { 602 .noirq_config = {
592 .channel = { 603 .channel = {
593 AD799X_CHANNEL(0, 12), 604 AD799X_CHANNEL(0, 12),
594 AD799X_CHANNEL(1, 12), 605 AD799X_CHANNEL(1, 12),
595 AD799X_CHANNEL(2, 12), 606 AD799X_CHANNEL(2, 12),
596 AD799X_CHANNEL(3, 12), 607 AD799X_CHANNEL(3, 12),
597 IIO_CHAN_SOFT_TIMESTAMP(4), 608 IIO_CHAN_SOFT_TIMESTAMP(4),
598 }, 609 },
599 .info = &ad7991_info, 610 .info = &ad7991_info,
600 }, 611 },
601 }, 612 },
602 [ad7995] = { 613 [ad7995] = {
603 .num_channels = 5, 614 .num_channels = 5,
604 .noirq_config = { 615 .noirq_config = {
605 .channel = { 616 .channel = {
606 AD799X_CHANNEL(0, 10), 617 AD799X_CHANNEL(0, 10),
607 AD799X_CHANNEL(1, 10), 618 AD799X_CHANNEL(1, 10),
608 AD799X_CHANNEL(2, 10), 619 AD799X_CHANNEL(2, 10),
609 AD799X_CHANNEL(3, 10), 620 AD799X_CHANNEL(3, 10),
610 IIO_CHAN_SOFT_TIMESTAMP(4), 621 IIO_CHAN_SOFT_TIMESTAMP(4),
611 }, 622 },
612 .info = &ad7991_info, 623 .info = &ad7991_info,
613 }, 624 },
614 }, 625 },
615 [ad7999] = { 626 [ad7999] = {
616 .num_channels = 5, 627 .num_channels = 5,
617 .noirq_config = { 628 .noirq_config = {
618 .channel = { 629 .channel = {
619 AD799X_CHANNEL(0, 8), 630 AD799X_CHANNEL(0, 8),
620 AD799X_CHANNEL(1, 8), 631 AD799X_CHANNEL(1, 8),
621 AD799X_CHANNEL(2, 8), 632 AD799X_CHANNEL(2, 8),
622 AD799X_CHANNEL(3, 8), 633 AD799X_CHANNEL(3, 8),
623 IIO_CHAN_SOFT_TIMESTAMP(4), 634 IIO_CHAN_SOFT_TIMESTAMP(4),
624 }, 635 },
625 .info = &ad7991_info, 636 .info = &ad7991_info,
626 }, 637 },
627 }, 638 },
628 [ad7992] = { 639 [ad7992] = {
629 .num_channels = 3, 640 .num_channels = 3,
630 .noirq_config = { 641 .noirq_config = {
631 .channel = { 642 .channel = {
632 AD799X_CHANNEL(0, 12), 643 AD799X_CHANNEL(0, 12),
633 AD799X_CHANNEL(1, 12), 644 AD799X_CHANNEL(1, 12),
634 IIO_CHAN_SOFT_TIMESTAMP(3), 645 IIO_CHAN_SOFT_TIMESTAMP(3),
635 }, 646 },
636 .info = &ad7993_4_7_8_noirq_info, 647 .info = &ad7993_4_7_8_noirq_info,
637 }, 648 },
638 .irq_config = { 649 .irq_config = {
639 .channel = { 650 .channel = {
640 AD799X_CHANNEL_WITH_EVENTS(0, 12), 651 AD799X_CHANNEL_WITH_EVENTS(0, 12),
641 AD799X_CHANNEL_WITH_EVENTS(1, 12), 652 AD799X_CHANNEL_WITH_EVENTS(1, 12),
642 IIO_CHAN_SOFT_TIMESTAMP(3), 653 IIO_CHAN_SOFT_TIMESTAMP(3),
643 }, 654 },
644 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT, 655 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
645 .info = &ad7993_4_7_8_irq_info, 656 .info = &ad7993_4_7_8_irq_info,
646 }, 657 },
647 }, 658 },
648 [ad7993] = { 659 [ad7993] = {
649 .num_channels = 5, 660 .num_channels = 5,
650 .noirq_config = { 661 .noirq_config = {
651 .channel = { 662 .channel = {
652 AD799X_CHANNEL(0, 10), 663 AD799X_CHANNEL(0, 10),
653 AD799X_CHANNEL(1, 10), 664 AD799X_CHANNEL(1, 10),
654 AD799X_CHANNEL(2, 10), 665 AD799X_CHANNEL(2, 10),
655 AD799X_CHANNEL(3, 10), 666 AD799X_CHANNEL(3, 10),
656 IIO_CHAN_SOFT_TIMESTAMP(4), 667 IIO_CHAN_SOFT_TIMESTAMP(4),
657 }, 668 },
658 .info = &ad7993_4_7_8_noirq_info, 669 .info = &ad7993_4_7_8_noirq_info,
659 }, 670 },
660 .irq_config = { 671 .irq_config = {
661 .channel = { 672 .channel = {
662 AD799X_CHANNEL_WITH_EVENTS(0, 10), 673 AD799X_CHANNEL_WITH_EVENTS(0, 10),
663 AD799X_CHANNEL_WITH_EVENTS(1, 10), 674 AD799X_CHANNEL_WITH_EVENTS(1, 10),
664 AD799X_CHANNEL_WITH_EVENTS(2, 10), 675 AD799X_CHANNEL_WITH_EVENTS(2, 10),
665 AD799X_CHANNEL_WITH_EVENTS(3, 10), 676 AD799X_CHANNEL_WITH_EVENTS(3, 10),
666 IIO_CHAN_SOFT_TIMESTAMP(4), 677 IIO_CHAN_SOFT_TIMESTAMP(4),
667 }, 678 },
668 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT, 679 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
669 .info = &ad7993_4_7_8_irq_info, 680 .info = &ad7993_4_7_8_irq_info,
670 }, 681 },
671 }, 682 },
672 [ad7994] = { 683 [ad7994] = {
673 .num_channels = 5, 684 .num_channels = 5,
674 .noirq_config = { 685 .noirq_config = {
675 .channel = { 686 .channel = {
676 AD799X_CHANNEL(0, 12), 687 AD799X_CHANNEL(0, 12),
677 AD799X_CHANNEL(1, 12), 688 AD799X_CHANNEL(1, 12),
678 AD799X_CHANNEL(2, 12), 689 AD799X_CHANNEL(2, 12),
679 AD799X_CHANNEL(3, 12), 690 AD799X_CHANNEL(3, 12),
680 IIO_CHAN_SOFT_TIMESTAMP(4), 691 IIO_CHAN_SOFT_TIMESTAMP(4),
681 }, 692 },
682 .info = &ad7993_4_7_8_noirq_info, 693 .info = &ad7993_4_7_8_noirq_info,
683 }, 694 },
684 .irq_config = { 695 .irq_config = {
685 .channel = { 696 .channel = {
686 AD799X_CHANNEL_WITH_EVENTS(0, 12), 697 AD799X_CHANNEL_WITH_EVENTS(0, 12),
687 AD799X_CHANNEL_WITH_EVENTS(1, 12), 698 AD799X_CHANNEL_WITH_EVENTS(1, 12),
688 AD799X_CHANNEL_WITH_EVENTS(2, 12), 699 AD799X_CHANNEL_WITH_EVENTS(2, 12),
689 AD799X_CHANNEL_WITH_EVENTS(3, 12), 700 AD799X_CHANNEL_WITH_EVENTS(3, 12),
690 IIO_CHAN_SOFT_TIMESTAMP(4), 701 IIO_CHAN_SOFT_TIMESTAMP(4),
691 }, 702 },
692 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT, 703 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
693 .info = &ad7993_4_7_8_irq_info, 704 .info = &ad7993_4_7_8_irq_info,
694 }, 705 },
695 }, 706 },
696 [ad7997] = { 707 [ad7997] = {
697 .num_channels = 9, 708 .num_channels = 9,
698 .noirq_config = { 709 .noirq_config = {
699 .channel = { 710 .channel = {
700 AD799X_CHANNEL(0, 10), 711 AD799X_CHANNEL(0, 10),
701 AD799X_CHANNEL(1, 10), 712 AD799X_CHANNEL(1, 10),
702 AD799X_CHANNEL(2, 10), 713 AD799X_CHANNEL(2, 10),
703 AD799X_CHANNEL(3, 10), 714 AD799X_CHANNEL(3, 10),
704 AD799X_CHANNEL(4, 10), 715 AD799X_CHANNEL(4, 10),
705 AD799X_CHANNEL(5, 10), 716 AD799X_CHANNEL(5, 10),
706 AD799X_CHANNEL(6, 10), 717 AD799X_CHANNEL(6, 10),
707 AD799X_CHANNEL(7, 10), 718 AD799X_CHANNEL(7, 10),
708 IIO_CHAN_SOFT_TIMESTAMP(8), 719 IIO_CHAN_SOFT_TIMESTAMP(8),
709 }, 720 },
710 .info = &ad7993_4_7_8_noirq_info, 721 .info = &ad7993_4_7_8_noirq_info,
711 }, 722 },
712 .irq_config = { 723 .irq_config = {
713 .channel = { 724 .channel = {
714 AD799X_CHANNEL_WITH_EVENTS(0, 10), 725 AD799X_CHANNEL_WITH_EVENTS(0, 10),
715 AD799X_CHANNEL_WITH_EVENTS(1, 10), 726 AD799X_CHANNEL_WITH_EVENTS(1, 10),
716 AD799X_CHANNEL_WITH_EVENTS(2, 10), 727 AD799X_CHANNEL_WITH_EVENTS(2, 10),
717 AD799X_CHANNEL_WITH_EVENTS(3, 10), 728 AD799X_CHANNEL_WITH_EVENTS(3, 10),
718 AD799X_CHANNEL(4, 10), 729 AD799X_CHANNEL(4, 10),
719 AD799X_CHANNEL(5, 10), 730 AD799X_CHANNEL(5, 10),
720 AD799X_CHANNEL(6, 10), 731 AD799X_CHANNEL(6, 10),
721 AD799X_CHANNEL(7, 10), 732 AD799X_CHANNEL(7, 10),
722 IIO_CHAN_SOFT_TIMESTAMP(8), 733 IIO_CHAN_SOFT_TIMESTAMP(8),
723 }, 734 },
724 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT, 735 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
725 .info = &ad7993_4_7_8_irq_info, 736 .info = &ad7993_4_7_8_irq_info,
726 }, 737 },
727 }, 738 },
728 [ad7998] = { 739 [ad7998] = {
729 .num_channels = 9, 740 .num_channels = 9,
730 .noirq_config = { 741 .noirq_config = {
731 .channel = { 742 .channel = {
732 AD799X_CHANNEL(0, 12), 743 AD799X_CHANNEL(0, 12),
733 AD799X_CHANNEL(1, 12), 744 AD799X_CHANNEL(1, 12),
734 AD799X_CHANNEL(2, 12), 745 AD799X_CHANNEL(2, 12),
735 AD799X_CHANNEL(3, 12), 746 AD799X_CHANNEL(3, 12),
736 AD799X_CHANNEL(4, 12), 747 AD799X_CHANNEL(4, 12),
737 AD799X_CHANNEL(5, 12), 748 AD799X_CHANNEL(5, 12),
738 AD799X_CHANNEL(6, 12), 749 AD799X_CHANNEL(6, 12),
739 AD799X_CHANNEL(7, 12), 750 AD799X_CHANNEL(7, 12),
740 IIO_CHAN_SOFT_TIMESTAMP(8), 751 IIO_CHAN_SOFT_TIMESTAMP(8),
741 }, 752 },
742 .info = &ad7993_4_7_8_noirq_info, 753 .info = &ad7993_4_7_8_noirq_info,
743 }, 754 },
744 .irq_config = { 755 .irq_config = {
745 .channel = { 756 .channel = {
746 AD799X_CHANNEL_WITH_EVENTS(0, 12), 757 AD799X_CHANNEL_WITH_EVENTS(0, 12),
747 AD799X_CHANNEL_WITH_EVENTS(1, 12), 758 AD799X_CHANNEL_WITH_EVENTS(1, 12),
748 AD799X_CHANNEL_WITH_EVENTS(2, 12), 759 AD799X_CHANNEL_WITH_EVENTS(2, 12),
749 AD799X_CHANNEL_WITH_EVENTS(3, 12), 760 AD799X_CHANNEL_WITH_EVENTS(3, 12),
750 AD799X_CHANNEL(4, 12), 761 AD799X_CHANNEL(4, 12),
751 AD799X_CHANNEL(5, 12), 762 AD799X_CHANNEL(5, 12),
752 AD799X_CHANNEL(6, 12), 763 AD799X_CHANNEL(6, 12),
753 AD799X_CHANNEL(7, 12), 764 AD799X_CHANNEL(7, 12),
754 IIO_CHAN_SOFT_TIMESTAMP(8), 765 IIO_CHAN_SOFT_TIMESTAMP(8),
755 }, 766 },
756 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT, 767 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
757 .info = &ad7993_4_7_8_irq_info, 768 .info = &ad7993_4_7_8_irq_info,
758 }, 769 },
759 }, 770 },
760 }; 771 };
761 772
762 static int ad799x_probe(struct i2c_client *client, 773 static int ad799x_probe(struct i2c_client *client,
763 const struct i2c_device_id *id) 774 const struct i2c_device_id *id)
764 { 775 {
765 int ret; 776 int ret;
766 struct ad799x_state *st; 777 struct ad799x_state *st;
767 struct iio_dev *indio_dev; 778 struct iio_dev *indio_dev;
768 const struct ad799x_chip_info *chip_info = 779 const struct ad799x_chip_info *chip_info =
769 &ad799x_chip_info_tbl[id->driver_data]; 780 &ad799x_chip_info_tbl[id->driver_data];
770 781
771 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st)); 782 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
772 if (indio_dev == NULL) 783 if (indio_dev == NULL)
773 return -ENOMEM; 784 return -ENOMEM;
774 785
775 st = iio_priv(indio_dev); 786 st = iio_priv(indio_dev);
776 /* this is only used for device removal purposes */ 787 /* this is only used for device removal purposes */
777 i2c_set_clientdata(client, indio_dev); 788 i2c_set_clientdata(client, indio_dev);
778 789
779 st->id = id->driver_data; 790 st->id = id->driver_data;
780 if (client->irq > 0 && chip_info->irq_config.info) 791 if (client->irq > 0 && chip_info->irq_config.info)
781 st->chip_config = &chip_info->irq_config; 792 st->chip_config = &chip_info->irq_config;
782 else 793 else
783 st->chip_config = &chip_info->noirq_config; 794 st->chip_config = &chip_info->noirq_config;
784 795
785 /* TODO: Add pdata options for filtering and bit delay */ 796 /* TODO: Add pdata options for filtering and bit delay */
786 797
787 st->reg = devm_regulator_get(&client->dev, "vcc"); 798 st->reg = devm_regulator_get(&client->dev, "vcc");
788 if (IS_ERR(st->reg)) 799 if (IS_ERR(st->reg))
789 return PTR_ERR(st->reg); 800 return PTR_ERR(st->reg);
790 ret = regulator_enable(st->reg); 801 ret = regulator_enable(st->reg);
791 if (ret) 802 if (ret)
792 return ret; 803 return ret;
793 st->vref = devm_regulator_get(&client->dev, "vref"); 804 st->vref = devm_regulator_get(&client->dev, "vref");
794 if (IS_ERR(st->vref)) { 805 if (IS_ERR(st->vref)) {
795 ret = PTR_ERR(st->vref); 806 ret = PTR_ERR(st->vref);
796 goto error_disable_reg; 807 goto error_disable_reg;
797 } 808 }
798 ret = regulator_enable(st->vref); 809 ret = regulator_enable(st->vref);
799 if (ret) 810 if (ret)
800 goto error_disable_reg; 811 goto error_disable_reg;
801 812
802 st->client = client; 813 st->client = client;
803 814
804 indio_dev->dev.parent = &client->dev; 815 indio_dev->dev.parent = &client->dev;
805 indio_dev->name = id->name; 816 indio_dev->name = id->name;
806 indio_dev->info = st->chip_config->info; 817 indio_dev->info = st->chip_config->info;
807 818
808 indio_dev->modes = INDIO_DIRECT_MODE; 819 indio_dev->modes = INDIO_DIRECT_MODE;
809 indio_dev->channels = st->chip_config->channel; 820 indio_dev->channels = st->chip_config->channel;
810 indio_dev->num_channels = chip_info->num_channels; 821 indio_dev->num_channels = chip_info->num_channels;
811 822
812 ret = ad799x_write_config(st, st->chip_config->default_config); 823 ret = ad799x_write_config(st, st->chip_config->default_config);
813 if (ret < 0) 824 if (ret < 0)
814 goto error_disable_reg; 825 goto error_disable_reg;
815 ret = ad799x_read_config(st); 826 ret = ad799x_read_config(st);
816 if (ret < 0) 827 if (ret < 0)
817 goto error_disable_reg; 828 goto error_disable_reg;
818 st->config = ret; 829 st->config = ret;
819 830
820 ret = iio_triggered_buffer_setup(indio_dev, NULL, 831 ret = iio_triggered_buffer_setup(indio_dev, NULL,
821 &ad799x_trigger_handler, NULL); 832 &ad799x_trigger_handler, NULL);
822 if (ret) 833 if (ret)
823 goto error_disable_vref; 834 goto error_disable_vref;
824 835
825 if (client->irq > 0) { 836 if (client->irq > 0) {
826 ret = devm_request_threaded_irq(&client->dev, 837 ret = devm_request_threaded_irq(&client->dev,
827 client->irq, 838 client->irq,
828 NULL, 839 NULL,
829 ad799x_event_handler, 840 ad799x_event_handler,
830 IRQF_TRIGGER_FALLING | 841 IRQF_TRIGGER_FALLING |
831 IRQF_ONESHOT, 842 IRQF_ONESHOT,
832 client->name, 843 client->name,
833 indio_dev); 844 indio_dev);
834 if (ret) 845 if (ret)
835 goto error_cleanup_ring; 846 goto error_cleanup_ring;
836 } 847 }
837 ret = iio_device_register(indio_dev); 848 ret = iio_device_register(indio_dev);
838 if (ret) 849 if (ret)
839 goto error_cleanup_ring; 850 goto error_cleanup_ring;
840 851
841 return 0; 852 return 0;
842 853
843 error_cleanup_ring: 854 error_cleanup_ring:
844 iio_triggered_buffer_cleanup(indio_dev); 855 iio_triggered_buffer_cleanup(indio_dev);
845 error_disable_vref: 856 error_disable_vref:
846 regulator_disable(st->vref); 857 regulator_disable(st->vref);
847 error_disable_reg: 858 error_disable_reg:
848 regulator_disable(st->reg); 859 regulator_disable(st->reg);
849 860
850 return ret; 861 return ret;
851 } 862 }
852 863
853 static int ad799x_remove(struct i2c_client *client) 864 static int ad799x_remove(struct i2c_client *client)
854 { 865 {
855 struct iio_dev *indio_dev = i2c_get_clientdata(client); 866 struct iio_dev *indio_dev = i2c_get_clientdata(client);
856 struct ad799x_state *st = iio_priv(indio_dev); 867 struct ad799x_state *st = iio_priv(indio_dev);
857 868
858 iio_device_unregister(indio_dev); 869 iio_device_unregister(indio_dev);
859 870
860 iio_triggered_buffer_cleanup(indio_dev); 871 iio_triggered_buffer_cleanup(indio_dev);
861 regulator_disable(st->vref); 872 regulator_disable(st->vref);
862 regulator_disable(st->reg); 873 regulator_disable(st->reg);
863 kfree(st->rx_buf); 874 kfree(st->rx_buf);
864 875
865 return 0; 876 return 0;
866 } 877 }
867 878
868 static const struct i2c_device_id ad799x_id[] = { 879 static const struct i2c_device_id ad799x_id[] = {
869 { "ad7991", ad7991 }, 880 { "ad7991", ad7991 },
870 { "ad7995", ad7995 }, 881 { "ad7995", ad7995 },
871 { "ad7999", ad7999 }, 882 { "ad7999", ad7999 },
872 { "ad7992", ad7992 }, 883 { "ad7992", ad7992 },
873 { "ad7993", ad7993 }, 884 { "ad7993", ad7993 },
874 { "ad7994", ad7994 }, 885 { "ad7994", ad7994 },
875 { "ad7997", ad7997 }, 886 { "ad7997", ad7997 },
876 { "ad7998", ad7998 }, 887 { "ad7998", ad7998 },
877 {} 888 {}
878 }; 889 };
879 890
880 MODULE_DEVICE_TABLE(i2c, ad799x_id); 891 MODULE_DEVICE_TABLE(i2c, ad799x_id);
881 892
882 static struct i2c_driver ad799x_driver = { 893 static struct i2c_driver ad799x_driver = {
883 .driver = { 894 .driver = {
884 .name = "ad799x", 895 .name = "ad799x",
885 }, 896 },
886 .probe = ad799x_probe, 897 .probe = ad799x_probe,
887 .remove = ad799x_remove, 898 .remove = ad799x_remove,
888 .id_table = ad799x_id, 899 .id_table = ad799x_id,
889 }; 900 };
890 module_i2c_driver(ad799x_driver); 901 module_i2c_driver(ad799x_driver);
891 902
892 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 903 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
893 MODULE_DESCRIPTION("Analog Devices AD799x ADC"); 904 MODULE_DESCRIPTION("Analog Devices AD799x ADC");
894 MODULE_LICENSE("GPL v2"); 905 MODULE_LICENSE("GPL v2");
895 906