Commit 4e5a37c49665fffa4ce2251da79cda4ed2f86b9a

Authored by Felipe Balbi
Committed by Greg Kroah-Hartman
1 parent 170f69f4cf

ARM: dts: am437x-sk: fix lcd enable pin mux data

commit 58230c2c443bc9801293f6535144d04ceaf731e0 upstream.

Caused by a copy & paste error. Note that even with
this bug AM437x SK display still works because GPIO
mux mode is always enabled. It's still wrong to mux
somebody else's pin.

Luckily ball D25 (offset 0x238 - gpio5_8) on AM437x
isn't used for anything.

While at that, also replace a pullup with a pulldown
as that gpio should be normally low, not high.

Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Showing 1 changed file with 1 additions and 2 deletions Inline Diff

arch/arm/boot/dts/am437x-sk-evm.dts
1 /* 1 /*
2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as 5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 */ 7 */
8 8
9 /* AM437x SK EVM */ 9 /* AM437x SK EVM */
10 10
11 /dts-v1/; 11 /dts-v1/;
12 12
13 #include "am4372.dtsi" 13 #include "am4372.dtsi"
14 #include <dt-bindings/pinctrl/am43xx.h> 14 #include <dt-bindings/pinctrl/am43xx.h>
15 #include <dt-bindings/pwm/pwm.h> 15 #include <dt-bindings/pwm/pwm.h>
16 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h> 17 #include <dt-bindings/input/input.h>
18 18
19 / { 19 / {
20 model = "TI AM437x SK EVM"; 20 model = "TI AM437x SK EVM";
21 compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43"; 21 compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";
22 22
23 aliases { 23 aliases {
24 display0 = &lcd0; 24 display0 = &lcd0;
25 }; 25 };
26 26
27 backlight { 27 backlight {
28 compatible = "pwm-backlight"; 28 compatible = "pwm-backlight";
29 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>; 29 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
30 brightness-levels = <0 51 53 56 62 75 101 152 255>; 30 brightness-levels = <0 51 53 56 62 75 101 152 255>;
31 default-brightness-level = <8>; 31 default-brightness-level = <8>;
32 }; 32 };
33 33
34 sound { 34 sound {
35 compatible = "ti,da830-evm-audio"; 35 compatible = "ti,da830-evm-audio";
36 ti,model = "AM437x-SK-EVM"; 36 ti,model = "AM437x-SK-EVM";
37 ti,audio-codec = <&tlv320aic3106>; 37 ti,audio-codec = <&tlv320aic3106>;
38 ti,mcasp-controller = <&mcasp1>; 38 ti,mcasp-controller = <&mcasp1>;
39 ti,codec-clock-rate = <24000000>; 39 ti,codec-clock-rate = <24000000>;
40 ti,audio-routing = 40 ti,audio-routing =
41 "Headphone Jack", "HPLOUT", 41 "Headphone Jack", "HPLOUT",
42 "Headphone Jack", "HPROUT"; 42 "Headphone Jack", "HPROUT";
43 }; 43 };
44 44
45 matrix_keypad: matrix_keypad@0 { 45 matrix_keypad: matrix_keypad@0 {
46 compatible = "gpio-matrix-keypad"; 46 compatible = "gpio-matrix-keypad";
47 47
48 pinctrl-names = "default"; 48 pinctrl-names = "default";
49 pinctrl-0 = <&matrix_keypad_pins>; 49 pinctrl-0 = <&matrix_keypad_pins>;
50 50
51 debounce-delay-ms = <5>; 51 debounce-delay-ms = <5>;
52 col-scan-delay-us = <1500>; 52 col-scan-delay-us = <1500>;
53 53
54 row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */ 54 row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */
55 &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */ 55 &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */
56 56
57 col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */ 57 col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */
58 &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */ 58 &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */
59 59
60 linux,keymap = < 60 linux,keymap = <
61 MATRIX_KEY(0, 0, KEY_DOWN) 61 MATRIX_KEY(0, 0, KEY_DOWN)
62 MATRIX_KEY(0, 1, KEY_RIGHT) 62 MATRIX_KEY(0, 1, KEY_RIGHT)
63 MATRIX_KEY(1, 0, KEY_LEFT) 63 MATRIX_KEY(1, 0, KEY_LEFT)
64 MATRIX_KEY(1, 1, KEY_UP) 64 MATRIX_KEY(1, 1, KEY_UP)
65 >; 65 >;
66 }; 66 };
67 67
68 leds { 68 leds {
69 compatible = "gpio-leds"; 69 compatible = "gpio-leds";
70 70
71 pinctrl-names = "default"; 71 pinctrl-names = "default";
72 pinctrl-0 = <&leds_pins>; 72 pinctrl-0 = <&leds_pins>;
73 73
74 led@0 { 74 led@0 {
75 label = "am437x-sk:red:heartbeat"; 75 label = "am437x-sk:red:heartbeat";
76 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */ 76 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
77 linux,default-trigger = "heartbeat"; 77 linux,default-trigger = "heartbeat";
78 default-state = "off"; 78 default-state = "off";
79 }; 79 };
80 80
81 led@1 { 81 led@1 {
82 label = "am437x-sk:green:mmc1"; 82 label = "am437x-sk:green:mmc1";
83 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */ 83 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */
84 linux,default-trigger = "mmc0"; 84 linux,default-trigger = "mmc0";
85 default-state = "off"; 85 default-state = "off";
86 }; 86 };
87 87
88 led@2 { 88 led@2 {
89 label = "am437x-sk:blue:cpu0"; 89 label = "am437x-sk:blue:cpu0";
90 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */ 90 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */
91 linux,default-trigger = "cpu0"; 91 linux,default-trigger = "cpu0";
92 default-state = "off"; 92 default-state = "off";
93 }; 93 };
94 94
95 led@3 { 95 led@3 {
96 label = "am437x-sk:blue:usr3"; 96 label = "am437x-sk:blue:usr3";
97 gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */ 97 gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */
98 default-state = "off"; 98 default-state = "off";
99 }; 99 };
100 }; 100 };
101 101
102 lcd0: display { 102 lcd0: display {
103 compatible = "osddisplays,osd057T0559-34ts", "panel-dpi"; 103 compatible = "osddisplays,osd057T0559-34ts", "panel-dpi";
104 label = "lcd"; 104 label = "lcd";
105 105
106 pinctrl-names = "default"; 106 pinctrl-names = "default";
107 pinctrl-0 = <&lcd_pins>; 107 pinctrl-0 = <&lcd_pins>;
108 108
109 enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 109 enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
110 110
111 panel-timing { 111 panel-timing {
112 clock-frequency = <9000000>; 112 clock-frequency = <9000000>;
113 hactive = <480>; 113 hactive = <480>;
114 vactive = <272>; 114 vactive = <272>;
115 hfront-porch = <8>; 115 hfront-porch = <8>;
116 hback-porch = <43>; 116 hback-porch = <43>;
117 hsync-len = <4>; 117 hsync-len = <4>;
118 vback-porch = <12>; 118 vback-porch = <12>;
119 vfront-porch = <4>; 119 vfront-porch = <4>;
120 vsync-len = <10>; 120 vsync-len = <10>;
121 hsync-active = <0>; 121 hsync-active = <0>;
122 vsync-active = <0>; 122 vsync-active = <0>;
123 de-active = <1>; 123 de-active = <1>;
124 pixelclk-active = <1>; 124 pixelclk-active = <1>;
125 }; 125 };
126 126
127 port { 127 port {
128 lcd_in: endpoint { 128 lcd_in: endpoint {
129 remote-endpoint = <&dpi_out>; 129 remote-endpoint = <&dpi_out>;
130 }; 130 };
131 }; 131 };
132 }; 132 };
133 }; 133 };
134 134
135 &am43xx_pinmux { 135 &am43xx_pinmux {
136 matrix_keypad_pins: matrix_keypad_pins { 136 matrix_keypad_pins: matrix_keypad_pins {
137 pinctrl-single,pins = < 137 pinctrl-single,pins = <
138 0x24c (PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */ 138 0x24c (PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */
139 0x250 (PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */ 139 0x250 (PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */
140 0x254 (PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */ 140 0x254 (PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */
141 0x258 (PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */ 141 0x258 (PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */
142 >; 142 >;
143 }; 143 };
144 144
145 leds_pins: leds_pins { 145 leds_pins: leds_pins {
146 pinctrl-single,pins = < 146 pinctrl-single,pins = <
147 0x228 (PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */ 147 0x228 (PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */
148 0x22c (PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */ 148 0x22c (PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */
149 0x230 (PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */ 149 0x230 (PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */
150 0x234 (PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */ 150 0x234 (PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */
151 >; 151 >;
152 }; 152 };
153 153
154 i2c0_pins: i2c0_pins { 154 i2c0_pins: i2c0_pins {
155 pinctrl-single,pins = < 155 pinctrl-single,pins = <
156 0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 156 0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
157 0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 157 0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
158 >; 158 >;
159 }; 159 };
160 160
161 i2c1_pins: i2c1_pins { 161 i2c1_pins: i2c1_pins {
162 pinctrl-single,pins = < 162 pinctrl-single,pins = <
163 0x15c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */ 163 0x15c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
164 0x158 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */ 164 0x158 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
165 >; 165 >;
166 }; 166 };
167 167
168 mmc1_pins: pinmux_mmc1_pins { 168 mmc1_pins: pinmux_mmc1_pins {
169 pinctrl-single,pins = < 169 pinctrl-single,pins = <
170 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ 170 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
171 >; 171 >;
172 }; 172 };
173 173
174 ecap0_pins: backlight_pins { 174 ecap0_pins: backlight_pins {
175 pinctrl-single,pins = < 175 pinctrl-single,pins = <
176 0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */ 176 0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
177 >; 177 >;
178 }; 178 };
179 179
180 edt_ft5306_ts_pins: edt_ft5306_ts_pins { 180 edt_ft5306_ts_pins: edt_ft5306_ts_pins {
181 pinctrl-single,pins = < 181 pinctrl-single,pins = <
182 0x74 (PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */ 182 0x74 (PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
183 0x78 (PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */ 183 0x78 (PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */
184 >; 184 >;
185 }; 185 };
186 186
187 cpsw_default: cpsw_default { 187 cpsw_default: cpsw_default {
188 pinctrl-single,pins = < 188 pinctrl-single,pins = <
189 /* Slave 1 */ 189 /* Slave 1 */
190 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */ 190 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
191 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ 191 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
192 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ 192 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
193 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ 193 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
194 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ 194 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
195 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ 195 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
196 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ 196 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
197 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ 197 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
198 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ 198 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
199 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ 199 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
200 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ 200 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
201 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ 201 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
202 202
203 /* Slave 2 */ 203 /* Slave 2 */
204 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ 204 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
205 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ 205 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
206 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ 206 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
207 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ 207 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
208 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ 208 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
209 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ 209 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
210 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ 210 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
211 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */ 211 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */
212 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ 212 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
213 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ 213 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
214 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ 214 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
215 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ 215 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
216 >; 216 >;
217 }; 217 };
218 218
219 cpsw_sleep: cpsw_sleep { 219 cpsw_sleep: cpsw_sleep {
220 pinctrl-single,pins = < 220 pinctrl-single,pins = <
221 /* Slave 1 reset value */ 221 /* Slave 1 reset value */
222 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) 222 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
223 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) 223 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
224 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) 224 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
225 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) 225 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
226 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) 226 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
227 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) 227 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
228 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) 228 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
229 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) 229 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
230 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) 230 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
231 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) 231 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
232 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) 232 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
233 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) 233 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
234 234
235 /* Slave 2 reset value */ 235 /* Slave 2 reset value */
236 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) 236 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
237 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) 237 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
238 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) 238 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
239 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) 239 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
240 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) 240 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
241 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) 241 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
242 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) 242 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
243 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) 243 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
244 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) 244 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
245 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) 245 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
246 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) 246 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
247 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) 247 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
248 >; 248 >;
249 }; 249 };
250 250
251 davinci_mdio_default: davinci_mdio_default { 251 davinci_mdio_default: davinci_mdio_default {
252 pinctrl-single,pins = < 252 pinctrl-single,pins = <
253 /* MDIO */ 253 /* MDIO */
254 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 254 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
255 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ 255 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
256 >; 256 >;
257 }; 257 };
258 258
259 davinci_mdio_sleep: davinci_mdio_sleep { 259 davinci_mdio_sleep: davinci_mdio_sleep {
260 pinctrl-single,pins = < 260 pinctrl-single,pins = <
261 /* MDIO reset value */ 261 /* MDIO reset value */
262 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) 262 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
263 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) 263 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
264 >; 264 >;
265 }; 265 };
266 266
267 dss_pins: dss_pins { 267 dss_pins: dss_pins {
268 pinctrl-single,pins = < 268 pinctrl-single,pins = <
269 0x020 (PIN_OUTPUT_PULLUP | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */ 269 0x020 (PIN_OUTPUT_PULLUP | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */
270 0x024 (PIN_OUTPUT_PULLUP | MUX_MODE1) 270 0x024 (PIN_OUTPUT_PULLUP | MUX_MODE1)
271 0x028 (PIN_OUTPUT_PULLUP | MUX_MODE1) 271 0x028 (PIN_OUTPUT_PULLUP | MUX_MODE1)
272 0x02c (PIN_OUTPUT_PULLUP | MUX_MODE1) 272 0x02c (PIN_OUTPUT_PULLUP | MUX_MODE1)
273 0x030 (PIN_OUTPUT_PULLUP | MUX_MODE1) 273 0x030 (PIN_OUTPUT_PULLUP | MUX_MODE1)
274 0x034 (PIN_OUTPUT_PULLUP | MUX_MODE1) 274 0x034 (PIN_OUTPUT_PULLUP | MUX_MODE1)
275 0x038 (PIN_OUTPUT_PULLUP | MUX_MODE1) 275 0x038 (PIN_OUTPUT_PULLUP | MUX_MODE1)
276 0x03c (PIN_OUTPUT_PULLUP | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */ 276 0x03c (PIN_OUTPUT_PULLUP | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */
277 0x0a0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */ 277 0x0a0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
278 0x0a4 (PIN_OUTPUT_PULLUP | MUX_MODE0) 278 0x0a4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
279 0x0a8 (PIN_OUTPUT_PULLUP | MUX_MODE0) 279 0x0a8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
280 0x0ac (PIN_OUTPUT_PULLUP | MUX_MODE0) 280 0x0ac (PIN_OUTPUT_PULLUP | MUX_MODE0)
281 0x0b0 (PIN_OUTPUT_PULLUP | MUX_MODE0) 281 0x0b0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
282 0x0b4 (PIN_OUTPUT_PULLUP | MUX_MODE0) 282 0x0b4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
283 0x0b8 (PIN_OUTPUT_PULLUP | MUX_MODE0) 283 0x0b8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
284 0x0bc (PIN_OUTPUT_PULLUP | MUX_MODE0) 284 0x0bc (PIN_OUTPUT_PULLUP | MUX_MODE0)
285 0x0c0 (PIN_OUTPUT_PULLUP | MUX_MODE0) 285 0x0c0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
286 0x0c4 (PIN_OUTPUT_PULLUP | MUX_MODE0) 286 0x0c4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
287 0x0c8 (PIN_OUTPUT_PULLUP | MUX_MODE0) 287 0x0c8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
288 0x0cc (PIN_OUTPUT_PULLUP | MUX_MODE0) 288 0x0cc (PIN_OUTPUT_PULLUP | MUX_MODE0)
289 0x0d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) 289 0x0d0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
290 0x0d4 (PIN_OUTPUT_PULLUP | MUX_MODE0) 290 0x0d4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
291 0x0d8 (PIN_OUTPUT_PULLUP | MUX_MODE0) 291 0x0d8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
292 0x0dc (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */ 292 0x0dc (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
293 0x0e0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */ 293 0x0e0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
294 0x0e4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */ 294 0x0e4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
295 0x0e8 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */ 295 0x0e8 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
296 0x0ec (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */ 296 0x0ec (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
297 297
298 >; 298 >;
299 }; 299 };
300 300
301 qspi_pins: qspi_pins { 301 qspi_pins: qspi_pins {
302 pinctrl-single,pins = < 302 pinctrl-single,pins = <
303 0x7c (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */ 303 0x7c (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */
304 0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */ 304 0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
305 0x90 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */ 305 0x90 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
306 0x94 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */ 306 0x94 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
307 0x98 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */ 307 0x98 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */
308 0x9c (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */ 308 0x9c (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
309 >; 309 >;
310 }; 310 };
311 311
312 mcasp1_pins: mcasp1_pins { 312 mcasp1_pins: mcasp1_pins {
313 pinctrl-single,pins = < 313 pinctrl-single,pins = <
314 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ 314 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
315 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ 315 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
316 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ 316 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
317 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ 317 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
318 >; 318 >;
319 }; 319 };
320 320
321 lcd_pins: lcd_pins { 321 lcd_pins: lcd_pins {
322 pinctrl-single,pins = < 322 pinctrl-single,pins = <
323 /* GPIO 5_8 to select LCD / HDMI */ 323 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
324 0x238 (PIN_OUTPUT_PULLUP | MUX_MODE7)
325 >; 324 >;
326 }; 325 };
327 }; 326 };
328 327
329 &i2c0 { 328 &i2c0 {
330 status = "okay"; 329 status = "okay";
331 pinctrl-names = "default"; 330 pinctrl-names = "default";
332 pinctrl-0 = <&i2c0_pins>; 331 pinctrl-0 = <&i2c0_pins>;
333 clock-frequency = <400000>; 332 clock-frequency = <400000>;
334 333
335 tps@24 { 334 tps@24 {
336 compatible = "ti,tps65218"; 335 compatible = "ti,tps65218";
337 reg = <0x24>; 336 reg = <0x24>;
338 interrupt-parent = <&gic>; 337 interrupt-parent = <&gic>;
339 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 338 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
340 interrupt-controller; 339 interrupt-controller;
341 #interrupt-cells = <2>; 340 #interrupt-cells = <2>;
342 341
343 dcdc1: regulator-dcdc1 { 342 dcdc1: regulator-dcdc1 {
344 compatible = "ti,tps65218-dcdc1"; 343 compatible = "ti,tps65218-dcdc1";
345 /* VDD_CORE limits min of OPP50 and max of OPP100 */ 344 /* VDD_CORE limits min of OPP50 and max of OPP100 */
346 regulator-name = "vdd_core"; 345 regulator-name = "vdd_core";
347 regulator-min-microvolt = <912000>; 346 regulator-min-microvolt = <912000>;
348 regulator-max-microvolt = <1144000>; 347 regulator-max-microvolt = <1144000>;
349 regulator-boot-on; 348 regulator-boot-on;
350 regulator-always-on; 349 regulator-always-on;
351 }; 350 };
352 351
353 dcdc2: regulator-dcdc2 { 352 dcdc2: regulator-dcdc2 {
354 compatible = "ti,tps65218-dcdc2"; 353 compatible = "ti,tps65218-dcdc2";
355 /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */ 354 /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
356 regulator-name = "vdd_mpu"; 355 regulator-name = "vdd_mpu";
357 regulator-min-microvolt = <912000>; 356 regulator-min-microvolt = <912000>;
358 regulator-max-microvolt = <1378000>; 357 regulator-max-microvolt = <1378000>;
359 regulator-boot-on; 358 regulator-boot-on;
360 regulator-always-on; 359 regulator-always-on;
361 }; 360 };
362 361
363 dcdc3: regulator-dcdc3 { 362 dcdc3: regulator-dcdc3 {
364 compatible = "ti,tps65218-dcdc3"; 363 compatible = "ti,tps65218-dcdc3";
365 regulator-name = "vdds_ddr"; 364 regulator-name = "vdds_ddr";
366 regulator-min-microvolt = <1500000>; 365 regulator-min-microvolt = <1500000>;
367 regulator-max-microvolt = <1500000>; 366 regulator-max-microvolt = <1500000>;
368 regulator-boot-on; 367 regulator-boot-on;
369 regulator-always-on; 368 regulator-always-on;
370 }; 369 };
371 370
372 dcdc4: regulator-dcdc4 { 371 dcdc4: regulator-dcdc4 {
373 compatible = "ti,tps65218-dcdc4"; 372 compatible = "ti,tps65218-dcdc4";
374 regulator-name = "v3_3d"; 373 regulator-name = "v3_3d";
375 regulator-min-microvolt = <3300000>; 374 regulator-min-microvolt = <3300000>;
376 regulator-max-microvolt = <3300000>; 375 regulator-max-microvolt = <3300000>;
377 regulator-boot-on; 376 regulator-boot-on;
378 regulator-always-on; 377 regulator-always-on;
379 }; 378 };
380 379
381 ldo1: regulator-ldo1 { 380 ldo1: regulator-ldo1 {
382 compatible = "ti,tps65218-ldo1"; 381 compatible = "ti,tps65218-ldo1";
383 regulator-name = "v1_8d"; 382 regulator-name = "v1_8d";
384 regulator-min-microvolt = <1800000>; 383 regulator-min-microvolt = <1800000>;
385 regulator-max-microvolt = <1800000>; 384 regulator-max-microvolt = <1800000>;
386 regulator-boot-on; 385 regulator-boot-on;
387 regulator-always-on; 386 regulator-always-on;
388 }; 387 };
389 388
390 }; 389 };
391 390
392 at24@50 { 391 at24@50 {
393 compatible = "at24,24c256"; 392 compatible = "at24,24c256";
394 pagesize = <64>; 393 pagesize = <64>;
395 reg = <0x50>; 394 reg = <0x50>;
396 }; 395 };
397 }; 396 };
398 397
399 &i2c1 { 398 &i2c1 {
400 status = "okay"; 399 status = "okay";
401 pinctrl-names = "default"; 400 pinctrl-names = "default";
402 pinctrl-0 = <&i2c1_pins>; 401 pinctrl-0 = <&i2c1_pins>;
403 clock-frequency = <400000>; 402 clock-frequency = <400000>;
404 403
405 edt-ft5306@38 { 404 edt-ft5306@38 {
406 status = "okay"; 405 status = "okay";
407 compatible = "edt,edt-ft5306", "edt,edt-ft5x06"; 406 compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
408 pinctrl-names = "default"; 407 pinctrl-names = "default";
409 pinctrl-0 = <&edt_ft5306_ts_pins>; 408 pinctrl-0 = <&edt_ft5306_ts_pins>;
410 409
411 reg = <0x38>; 410 reg = <0x38>;
412 interrupt-parent = <&gpio0>; 411 interrupt-parent = <&gpio0>;
413 interrupts = <31 0>; 412 interrupts = <31 0>;
414 413
415 wake-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; 414 wake-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
416 415
417 touchscreen-size-x = <480>; 416 touchscreen-size-x = <480>;
418 touchscreen-size-y = <272>; 417 touchscreen-size-y = <272>;
419 }; 418 };
420 419
421 tlv320aic3106: tlv320aic3106@1b { 420 tlv320aic3106: tlv320aic3106@1b {
422 compatible = "ti,tlv320aic3106"; 421 compatible = "ti,tlv320aic3106";
423 reg = <0x1b>; 422 reg = <0x1b>;
424 status = "okay"; 423 status = "okay";
425 424
426 /* Regulators */ 425 /* Regulators */
427 AVDD-supply = <&dcdc4>; 426 AVDD-supply = <&dcdc4>;
428 IOVDD-supply = <&dcdc4>; 427 IOVDD-supply = <&dcdc4>;
429 DRVDD-supply = <&dcdc4>; 428 DRVDD-supply = <&dcdc4>;
430 DVDD-supply = <&ldo1>; 429 DVDD-supply = <&ldo1>;
431 }; 430 };
432 431
433 lis331dlh@18 { 432 lis331dlh@18 {
434 compatible = "st,lis331dlh"; 433 compatible = "st,lis331dlh";
435 reg = <0x18>; 434 reg = <0x18>;
436 status = "okay"; 435 status = "okay";
437 436
438 Vdd-supply = <&dcdc4>; 437 Vdd-supply = <&dcdc4>;
439 Vdd_IO-supply = <&dcdc4>; 438 Vdd_IO-supply = <&dcdc4>;
440 interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>; 439 interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
441 }; 440 };
442 }; 441 };
443 442
444 &epwmss0 { 443 &epwmss0 {
445 status = "okay"; 444 status = "okay";
446 }; 445 };
447 446
448 &ecap0 { 447 &ecap0 {
449 status = "okay"; 448 status = "okay";
450 pinctrl-names = "default"; 449 pinctrl-names = "default";
451 pinctrl-0 = <&ecap0_pins>; 450 pinctrl-0 = <&ecap0_pins>;
452 }; 451 };
453 452
454 &gpio0 { 453 &gpio0 {
455 status = "okay"; 454 status = "okay";
456 }; 455 };
457 456
458 &gpio1 { 457 &gpio1 {
459 status = "okay"; 458 status = "okay";
460 }; 459 };
461 460
462 &gpio5 { 461 &gpio5 {
463 status = "okay"; 462 status = "okay";
464 }; 463 };
465 464
466 &mmc1 { 465 &mmc1 {
467 status = "okay"; 466 status = "okay";
468 pinctrl-names = "default"; 467 pinctrl-names = "default";
469 pinctrl-0 = <&mmc1_pins>; 468 pinctrl-0 = <&mmc1_pins>;
470 469
471 vmmc-supply = <&dcdc4>; 470 vmmc-supply = <&dcdc4>;
472 bus-width = <4>; 471 bus-width = <4>;
473 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 472 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
474 }; 473 };
475 474
476 &usb2_phy1 { 475 &usb2_phy1 {
477 status = "okay"; 476 status = "okay";
478 }; 477 };
479 478
480 &usb1 { 479 &usb1 {
481 dr_mode = "peripheral"; 480 dr_mode = "peripheral";
482 status = "okay"; 481 status = "okay";
483 }; 482 };
484 483
485 &usb2_phy2 { 484 &usb2_phy2 {
486 status = "okay"; 485 status = "okay";
487 }; 486 };
488 487
489 &usb2 { 488 &usb2 {
490 dr_mode = "host"; 489 dr_mode = "host";
491 status = "okay"; 490 status = "okay";
492 }; 491 };
493 492
494 &qspi { 493 &qspi {
495 status = "okay"; 494 status = "okay";
496 pinctrl-names = "default"; 495 pinctrl-names = "default";
497 pinctrl-0 = <&qspi_pins>; 496 pinctrl-0 = <&qspi_pins>;
498 497
499 spi-max-frequency = <48000000>; 498 spi-max-frequency = <48000000>;
500 m25p80@0 { 499 m25p80@0 {
501 compatible = "mx66l51235l"; 500 compatible = "mx66l51235l";
502 spi-max-frequency = <48000000>; 501 spi-max-frequency = <48000000>;
503 reg = <0>; 502 reg = <0>;
504 spi-cpol; 503 spi-cpol;
505 spi-cpha; 504 spi-cpha;
506 spi-tx-bus-width = <1>; 505 spi-tx-bus-width = <1>;
507 spi-rx-bus-width = <4>; 506 spi-rx-bus-width = <4>;
508 #address-cells = <1>; 507 #address-cells = <1>;
509 #size-cells = <1>; 508 #size-cells = <1>;
510 509
511 /* MTD partition table. 510 /* MTD partition table.
512 * The ROM checks the first 512KiB 511 * The ROM checks the first 512KiB
513 * for a valid file to boot(XIP). 512 * for a valid file to boot(XIP).
514 */ 513 */
515 partition@0 { 514 partition@0 {
516 label = "QSPI.U_BOOT"; 515 label = "QSPI.U_BOOT";
517 reg = <0x00000000 0x000080000>; 516 reg = <0x00000000 0x000080000>;
518 }; 517 };
519 partition@1 { 518 partition@1 {
520 label = "QSPI.U_BOOT.backup"; 519 label = "QSPI.U_BOOT.backup";
521 reg = <0x00080000 0x00080000>; 520 reg = <0x00080000 0x00080000>;
522 }; 521 };
523 partition@2 { 522 partition@2 {
524 label = "QSPI.U-BOOT-SPL_OS"; 523 label = "QSPI.U-BOOT-SPL_OS";
525 reg = <0x00100000 0x00010000>; 524 reg = <0x00100000 0x00010000>;
526 }; 525 };
527 partition@3 { 526 partition@3 {
528 label = "QSPI.U_BOOT_ENV"; 527 label = "QSPI.U_BOOT_ENV";
529 reg = <0x00110000 0x00010000>; 528 reg = <0x00110000 0x00010000>;
530 }; 529 };
531 partition@4 { 530 partition@4 {
532 label = "QSPI.U-BOOT-ENV.backup"; 531 label = "QSPI.U-BOOT-ENV.backup";
533 reg = <0x00120000 0x00010000>; 532 reg = <0x00120000 0x00010000>;
534 }; 533 };
535 partition@5 { 534 partition@5 {
536 label = "QSPI.KERNEL"; 535 label = "QSPI.KERNEL";
537 reg = <0x00130000 0x0800000>; 536 reg = <0x00130000 0x0800000>;
538 }; 537 };
539 partition@6 { 538 partition@6 {
540 label = "QSPI.FILESYSTEM"; 539 label = "QSPI.FILESYSTEM";
541 reg = <0x00930000 0x36D0000>; 540 reg = <0x00930000 0x36D0000>;
542 }; 541 };
543 }; 542 };
544 }; 543 };
545 544
546 &mac { 545 &mac {
547 pinctrl-names = "default", "sleep"; 546 pinctrl-names = "default", "sleep";
548 pinctrl-0 = <&cpsw_default>; 547 pinctrl-0 = <&cpsw_default>;
549 pinctrl-1 = <&cpsw_sleep>; 548 pinctrl-1 = <&cpsw_sleep>;
550 dual_emac = <1>; 549 dual_emac = <1>;
551 status = "okay"; 550 status = "okay";
552 }; 551 };
553 552
554 &davinci_mdio { 553 &davinci_mdio {
555 pinctrl-names = "default", "sleep"; 554 pinctrl-names = "default", "sleep";
556 pinctrl-0 = <&davinci_mdio_default>; 555 pinctrl-0 = <&davinci_mdio_default>;
557 pinctrl-1 = <&davinci_mdio_sleep>; 556 pinctrl-1 = <&davinci_mdio_sleep>;
558 status = "okay"; 557 status = "okay";
559 }; 558 };
560 559
561 &cpsw_emac0 { 560 &cpsw_emac0 {
562 phy_id = <&davinci_mdio>, <4>; 561 phy_id = <&davinci_mdio>, <4>;
563 phy-mode = "rgmii"; 562 phy-mode = "rgmii";
564 dual_emac_res_vlan = <1>; 563 dual_emac_res_vlan = <1>;
565 }; 564 };
566 565
567 &cpsw_emac1 { 566 &cpsw_emac1 {
568 phy_id = <&davinci_mdio>, <5>; 567 phy_id = <&davinci_mdio>, <5>;
569 phy-mode = "rgmii"; 568 phy-mode = "rgmii";
570 dual_emac_res_vlan = <2>; 569 dual_emac_res_vlan = <2>;
571 }; 570 };
572 571
573 &elm { 572 &elm {
574 status = "okay"; 573 status = "okay";
575 }; 574 };
576 575
577 &mcasp1 { 576 &mcasp1 {
578 pinctrl-names = "default"; 577 pinctrl-names = "default";
579 pinctrl-0 = <&mcasp1_pins>; 578 pinctrl-0 = <&mcasp1_pins>;
580 579
581 status = "okay"; 580 status = "okay";
582 581
583 op-mode = <0>; 582 op-mode = <0>;
584 tdm-slots = <2>; 583 tdm-slots = <2>;
585 serial-dir = < 584 serial-dir = <
586 0 0 1 2 585 0 0 1 2
587 >; 586 >;
588 587
589 tx-num-evt = <1>; 588 tx-num-evt = <1>;
590 rx-num-evt = <1>; 589 rx-num-evt = <1>;
591 }; 590 };
592 591
593 &dss { 592 &dss {
594 status = "okay"; 593 status = "okay";
595 594
596 pinctrl-names = "default"; 595 pinctrl-names = "default";
597 pinctrl-0 = <&dss_pins>; 596 pinctrl-0 = <&dss_pins>;
598 597
599 port { 598 port {
600 dpi_out: endpoint@0 { 599 dpi_out: endpoint@0 {
601 remote-endpoint = <&lcd_in>; 600 remote-endpoint = <&lcd_in>;
602 data-lines = <24>; 601 data-lines = <24>;
603 }; 602 };
604 }; 603 };
605 }; 604 };
606 605
607 &rtc { 606 &rtc {
608 status = "okay"; 607 status = "okay";
609 }; 608 };
610 609
611 &wdt { 610 &wdt {
612 status = "okay"; 611 status = "okay";
613 }; 612 };
614 613