Eric Lee / smarc-ti-linux-kernel

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Commit 81cff8a160cb4b8941b4bbf8dbb7d2697d5da905

Authored by Eric Lee
1 parent c0b8b686a0
Exists in smarct3x-processor-sdk-04.01.00.06

Make default blue-and-red-wiring propertity to crossed instead of straight

Showing 1 changed file with 3 additions and 2 deletions Inline Diff

arch/arm/boot/dts/am335x-smarc-common.dtsi
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1 /* 1 /*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as 5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 */ 7 */
8 8
9 /* state the resources this carrier uses for audio function*/ 9 /* state the resources this carrier uses for audio function*/
10 /* the pin header uses for Audio*/ 10 /* the pin header uses for Audio*/
11 /* 11 /*
12 "S.39", mcasp1: mcasp0_fsr.mcasp1_fsx mode3 12 "S.39", mcasp1: mcasp0_fsr.mcasp1_fsx mode3
13 "S.40", mcasp1: mcasp0_axr1.mcasp1_axr0 mode3 13 "S.40", mcasp1: mcasp0_axr1.mcasp1_axr0 mode3
14 "S.41", mcasp1: mcasp0_ahclkx.mcasp1_axr1 mode3 14 "S.41", mcasp1: mcasp0_ahclkx.mcasp1_axr1 mode3
15 "S.42", mcasp1: mcasp0_aclkr.mcasp1_aclkx mode3 15 "S.42", mcasp1: mcasp0_aclkr.mcasp1_aclkx mode3
16 */ 16 */
17 /* the pin header uses for SPI1*/ 17 /* the pin header uses for SPI1*/
18 /* 18 /*
19 "P.54", spi1: mcasp0_ahclkr.spi1_cs0n mode3 19 "P.54", spi1: mcasp0_ahclkr.spi1_cs0n mode3
20 "P.55", spi1: xdma_event_intro0.spi1_cs1n mode4 20 "P.55", spi1: xdma_event_intro0.spi1_cs1n mode4
21 "P.56", spi1: mcasp0_aclkx.spi1_sclk mode3 21 "P.56", spi1: mcasp0_aclkx.spi1_sclk mode3
22 "P.57", spi1: mcasp0_fsx.spi1_d0 mode3 22 "P.57", spi1: mcasp0_fsx.spi1_d0 mode3
23 "P.58", spi1: mcasp0_axr0.spi1_d1 mode3 23 "P.58", spi1: mcasp0_axr0.spi1_d1 mode3
24 */ 24 */
25 /* the pin header uses for LCD*/ 25 /* the pin header uses for LCD*/
26 /* 26 /*
27 "S.114", lcd: lcd_data0.lcd_data0 mode0 27 "S.114", lcd: lcd_data0.lcd_data0 mode0
28 "S.115", lcd: lcd_data1.lcd_data1 mode0 28 "S.115", lcd: lcd_data1.lcd_data1 mode0
29 "S.116", lcd: lcd_data2.lcd_data2 mode0 29 "S.116", lcd: lcd_data2.lcd_data2 mode0
30 "S.117", lcd: lcd_data3.lcd_data3 mode0 30 "S.117", lcd: lcd_data3.lcd_data3 mode0
31 "S.118", lcd: lcd_data4.lcd_data4 mode0 31 "S.118", lcd: lcd_data4.lcd_data4 mode0
32 "S.104", lcd: lcd_data5.lcd_data5 mode0 32 "S.104", lcd: lcd_data5.lcd_data5 mode0
33 "S.105", lcd: lcd_data6.lcd_data6 mode0 33 "S.105", lcd: lcd_data6.lcd_data6 mode0
34 "S.106", lcd: lcd_data7.lcd_data7 mode0 34 "S.106", lcd: lcd_data7.lcd_data7 mode0
35 "S.107", lcd: lcd_data8.lcd_data8 mode0 35 "S.107", lcd: lcd_data8.lcd_data8 mode0
36 "S.108", lcd: lcd_data9.lcd_data9 mode0 36 "S.108", lcd: lcd_data9.lcd_data9 mode0
37 "S.109", lcd: lcd_data10.lcd_data10 mode0 37 "S.109", lcd: lcd_data10.lcd_data10 mode0
38 "S.96", lcd: lcd_data11.lcd_data11 mode0 38 "S.96", lcd: lcd_data11.lcd_data11 mode0
39 "S.97", lcd: lcd_data12.lcd_data12 mode0 39 "S.97", lcd: lcd_data12.lcd_data12 mode0
40 "S.98", lcd: lcd_data13.lcd_data13 mode0 40 "S.98", lcd: lcd_data13.lcd_data13 mode0
41 "S.99", lcd: lcd_data14.lcd_data14 mode0 41 "S.99", lcd: lcd_data14.lcd_data14 mode0
42 "S.100", lcd: lcd_data15.lcd_data15 mode0 42 "S.100", lcd: lcd_data15.lcd_data15 mode0
43 "S.113", lcd: lcd_data16.gpmc_ad15 mode0 43 "S.113", lcd: lcd_data16.gpmc_ad15 mode0
44 "S.95", lcd: lcd_data17.gpmc_ad14 mode0 44 "S.95", lcd: lcd_data17.gpmc_ad14 mode0
45 "S.112", lcd: lcd_data18.gpmc_ad13 mode0 45 "S.112", lcd: lcd_data18.gpmc_ad13 mode0
46 "S.103", lcd: lcd_data19.gpmc_ad12 mode0 46 "S.103", lcd: lcd_data19.gpmc_ad12 mode0
47 "S.94", lcd: lcd_data20.gpmc_ad11 mode0 47 "S.94", lcd: lcd_data20.gpmc_ad11 mode0
48 "S.111", lcd: lcd_data21.gpmc_ad10 mode0 48 "S.111", lcd: lcd_data21.gpmc_ad10 mode0
49 "S.102", lcd: lcd_data22.gpmc_ad9 mode0 49 "S.102", lcd: lcd_data22.gpmc_ad9 mode0
50 "S.93", lcd: lcd_data23.gpmc_ad8 mode0 50 "S.93", lcd: lcd_data23.gpmc_ad8 mode0
51 "S.121", lcd: lcd_vsync.lcd_vsync mode0 51 "S.121", lcd: lcd_vsync.lcd_vsync mode0
52 "S.122", lcd: lcd_hsync.lcd_hsync mode0 52 "S.122", lcd: lcd_hsync.lcd_hsync mode0
53 "S.123", lcd: lcd_pclk.lcd_pclk mode0 53 "S.123", lcd: lcd_pclk.lcd_pclk mode0
54 "S.120", lcd_de: lcd_ac_bias_en.lcd_ac_bias_en mode0 54 "S.120", lcd_de: lcd_ac_bias_en.lcd_ac_bias_en mode0
55 "S.133", lcd_vdd_en: gpmc_a7.gpio1_23 mode7 55 "S.133", lcd_vdd_en: gpmc_a7.gpio1_23 mode7
56 "S.127", lcd_bklt_en: gpmc_a6.gpio1_22 mode7 56 "S.127", lcd_bklt_en: gpmc_a6.gpio1_22 mode7
57 ` */ 57 ` */
58 /* the pin header uses for DCAN0*/ 58 /* the pin header uses for DCAN0*/
59 /* 59 /*
60 "P.143", dcan0_tx: gmii1_txd3.dcan0_tx mode1 60 "P.143", dcan0_tx: gmii1_txd3.dcan0_tx mode1
61 "P.144", dcan0_rx: gmii1_txd2.dcan0_rx mode1 61 "P.144", dcan0_rx: gmii1_txd2.dcan0_rx mode1
62 */ 62 */
63 /* the hardware ip uses */ 63 /* the hardware ip uses */
64 /* 64 /*
65 "mcasp1", 65 "mcasp1",
66 "i2c0", 66 "i2c0",
67 "i2c1", 67 "i2c1",
68 "i2c2", 68 "i2c2",
69 "uart0", 69 "uart0",
70 "uart2", 70 "uart2",
71 "uart3", 71 "uart3",
72 "touch", 72 "touch",
73 "mmc0/SD", 73 "mmc0/SD",
74 "emmc", 74 "emmc",
75 "ecap0/backlight", 75 "ecap0/backlight",
76 "emac0", 76 "emac0",
77 "emac1", 77 "emac1",
78 "gpio1_22", 78 "gpio1_22",
79 "gpio1_23", 79 "gpio1_23",
80 "gpio1_19", 80 "gpio1_19",
81 "lcd", 81 "lcd",
82 "dcan0", 82 "dcan0",
83 "spi0", 83 "spi0",
84 "spi1"; 84 "spi1";
85 */ 85 */
86 86
87 87
88 / { 88 / {
89 model = "TI AM335x SMARCT335X"; 89 model = "TI AM335x SMARCT335X";
90 compatible = "ti,am335x-smarct335x", "ti,am33xx"; 90 compatible = "ti,am335x-smarct335x", "ti,am33xx";
91 91
92 aliases { 92 aliases {
93 rtc0 = &s35390a; 93 rtc0 = &s35390a;
94 rtc1 = &rtc; 94 rtc1 = &rtc;
95 mmc0 = &mmc2; /* Fixed to mmcblk0 for &mmc2 */ 95 mmc0 = &mmc2; /* Fixed to mmcblk0 for &mmc2 */
96 mmc1 = &mmc1; /* Fixed to mmcblk1 for &mmc1 */ 96 mmc1 = &mmc1; /* Fixed to mmcblk1 for &mmc1 */
97 }; 97 };
98 98
99 cpus { 99 cpus {
100 cpu@0 { 100 cpu@0 {
101 cpu0-supply = <&dcdc2_reg>; 101 cpu0-supply = <&dcdc2_reg>;
102 }; 102 };
103 }; 103 };
104 104
105 memory@80000000 { 105 memory@80000000 {
106 device_type = "memory"; 106 device_type = "memory";
107 reg = <0x80000000 0x20000000>; /* 512 MB */ 107 reg = <0x80000000 0x20000000>; /* 512 MB */
108 }; 108 };
109 109
110 vmmcsd_fixed: fixedregulator@0 { 110 vmmcsd_fixed: fixedregulator@0 {
111 compatible = "regulator-fixed"; 111 compatible = "regulator-fixed";
112 regulator-name = "vmmcsd_fixed"; 112 regulator-name = "vmmcsd_fixed";
113 regulator-min-microvolt = <3300000>; 113 regulator-min-microvolt = <3300000>;
114 regulator-max-microvolt = <3300000>; 114 regulator-max-microvolt = <3300000>;
115 }; 115 };
116 116
117 backlight { 117 backlight {
118 compatible = "pwm-backlight"; 118 compatible = "pwm-backlight";
119 enable-gpios = <&gpio1 22 0>; /* Backlight Enable Pin*/ 119 enable-gpios = <&gpio1 22 0>; /* Backlight Enable Pin*/
120 pwms = <&ecap0 0 50000 0>; 120 pwms = <&ecap0 0 50000 0>;
121 brightness-levels = <0 51 53 56 62 75 101 152 255>; 121 brightness-levels = <0 51 53 56 62 75 101 152 255>;
122 default-brightness-level = <8>; 122 default-brightness-level = <8>;
123 }; 123 };
124 124
125 panel { 125 panel {
126 compatible = "ti,tilcdc,panel"; 126 compatible = "ti,tilcdc,panel";
127 status = "okay"; 127 status = "okay";
128 pinctrl-names = "default"; 128 pinctrl-names = "default";
129 pinctrl-0 = <&lcd_pins_default>; 129 pinctrl-0 = <&lcd_pins_default>;
130 enable-gpios = <&gpio1 23 0>; /* Enable LCD_VDD_EN pin */ 130 enable-gpios = <&gpio1 23 0>; /* Enable LCD_VDD_EN pin */
131 panel-info { 131 panel-info {
132 ac-bias = <255>; 132 ac-bias = <255>;
133 ac-bias-intrpt = <0>; 133 ac-bias-intrpt = <0>;
134 dma-burst-sz = <16>; 134 dma-burst-sz = <16>;
135 bpp = <32>; 135 bpp = <32>;
136 fdd = <0x80>; 136 fdd = <0x80>;
137 sync-edge = <0>; 137 sync-edge = <0>;
138 sync-ctrl = <1>; 138 sync-ctrl = <1>;
139 raster-order = <0>; 139 raster-order = <0>;
140 fifo-th = <0>; 140 fifo-th = <0>;
141 /*invert-pxl-clk;*/ /*pixel clock polarity*/ 141 /*invert-pxl-clk;*/ /*pixel clock polarity*/
142 }; 142 };
143 143
144 display-timings { 144 display-timings {
145 800x480p60 { 145 800x480p60 {
146 clock-frequency = <33200000>; 146 clock-frequency = <33200000>;
147 hactive = <800>; 147 hactive = <800>;
148 vactive = <480>; 148 vactive = <480>;
149 hfront-porch = <42>; 149 hfront-porch = <42>;
150 hback-porch = <84>; 150 hback-porch = <84>;
151 hsync-len = <128>; 151 hsync-len = <128>;
152 vback-porch = <33>; 152 vback-porch = <33>;
153 vfront-porch = <10>; 153 vfront-porch = <10>;
154 vsync-len = <2>; 154 vsync-len = <2>;
155 hsync-active = <0>; 155 hsync-active = <0>;
156 vsync-active = <0>; 156 vsync-active = <0>;
157 }; 157 };
158 }; 158 };
159 }; 159 };
160 160
161 sound { 161 sound {
162 compatible = "ti,da830-evm-audio"; 162 compatible = "ti,da830-evm-audio";
163 ti,model = "TLV320AIC3X SOUND CARD"; 163 ti,model = "TLV320AIC3X SOUND CARD";
164 ti,audio-codec = <&tlv320aic3106>; 164 ti,audio-codec = <&tlv320aic3106>;
165 ti,mcasp-controller = <&mcasp1>; 165 ti,mcasp-controller = <&mcasp1>;
166 ti,codec-clock-rate = <24576000>; 166 ti,codec-clock-rate = <24576000>;
167 ti,audio-routing = 167 ti,audio-routing =
168 "Headphone Jack", "HPLOUT", 168 "Headphone Jack", "HPLOUT",
169 "Headphone Jack", "HPROUT", 169 "Headphone Jack", "HPROUT",
170 "LINE1L", "Line In", 170 "LINE1L", "Line In",
171 "LINE1R", "Line In"; 171 "LINE1R", "Line In";
172 }; 172 };
173 }; 173 };
174 174
175 175
176 &am33xx_pinmux { 176 &am33xx_pinmux {
177 pinctrl-names = "default"; 177 pinctrl-names = "default";
178 pinctrl-0 = <&clkout2_pin &gpio_pins_default>; 178 pinctrl-0 = <&clkout2_pin &gpio_pins_default>;
179 179
180 i2c0_pins: pinmux_i2c0_pins { 180 i2c0_pins: pinmux_i2c0_pins {
181 pinctrl-single,pins = < 181 pinctrl-single,pins = <
182 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 182 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
183 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 183 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
184 >; 184 >;
185 }; 185 };
186 186
187 i2c1_pins: pinmux_i2c1_pins { 187 i2c1_pins: pinmux_i2c1_pins {
188 pinctrl-single,pins = < 188 pinctrl-single,pins = <
189 AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rxd.i2c1_sda */ 189 AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rxd.i2c1_sda */
190 AM33XX_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_txd.i2c1_scl */ 190 AM33XX_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_txd.i2c1_scl */
191 >; 191 >;
192 }; 192 };
193 193
194 i2c2_pins: pinmux_i2c2_pins { 194 i2c2_pins: pinmux_i2c2_pins {
195 pinctrl-single,pins = < 195 pinctrl-single,pins = <
196 AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */ 196 AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
197 AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */ 197 AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
198 >; 198 >;
199 }; 199 };
200 200
201 uart0_pins: pinmux_uart0_pins { 201 uart0_pins: pinmux_uart0_pins {
202 pinctrl-single,pins = < 202 pinctrl-single,pins = <
203 AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE6) /* uart0_ctsn.uart0_ctsn */ 203 AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE6) /* uart0_ctsn.uart0_ctsn */
204 AM33XX_IOPAD(0x96c, PIN_OUTPUT | MUX_MODE6) /* uart0_rtsn.uart0_rtsn */ 204 AM33XX_IOPAD(0x96c, PIN_OUTPUT | MUX_MODE6) /* uart0_rtsn.uart0_rtsn */
205 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ 205 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
206 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ 206 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
207 >; 207 >;
208 }; 208 };
209 209
210 uart0_pins_sleep: pinmux_uart0_pins_sleep { 210 uart0_pins_sleep: pinmux_uart0_pins_sleep {
211 pinctrl-single,pins = < 211 pinctrl-single,pins = <
212 AM33XX_IOPAD(0x968, PIN_INPUT_PULLDOWN | MUX_MODE7) 212 AM33XX_IOPAD(0x968, PIN_INPUT_PULLDOWN | MUX_MODE7)
213 AM33XX_IOPAD(0x96c, PIN_INPUT_PULLDOWN | MUX_MODE7) 213 AM33XX_IOPAD(0x96c, PIN_INPUT_PULLDOWN | MUX_MODE7)
214 AM33XX_IOPAD(0x970, PIN_INPUT_PULLDOWN | MUX_MODE7) 214 AM33XX_IOPAD(0x970, PIN_INPUT_PULLDOWN | MUX_MODE7)
215 AM33XX_IOPAD(0x974, PIN_INPUT_PULLDOWN | MUX_MODE7) 215 AM33XX_IOPAD(0x974, PIN_INPUT_PULLDOWN | MUX_MODE7)
216 >; 216 >;
217 }; 217 };
218 218
219 219
220 uart2_pins: pinmux_uart2_pins { 220 uart2_pins: pinmux_uart2_pins {
221 pinctrl-single,pins = < 221 pinctrl-single,pins = <
222 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_txclk.uart2_rxd */ 222 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_txclk.uart2_rxd */
223 AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_rxclk.uart2_txd */ 223 AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_rxclk.uart2_txd */
224 >; 224 >;
225 }; 225 };
226 226
227 uart3_pins: pinmux_uart3_pins { 227 uart3_pins: pinmux_uart3_pins {
228 pinctrl-single,pins = < 228 pinctrl-single,pins = <
229 AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd3.uart3_rxd */ 229 AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd3.uart3_rxd */
230 AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd2.uart3_txd */ 230 AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd2.uart3_txd */
231 >; 231 >;
232 }; 232 };
233 233
234 clkout2_pin: pinmux_clkout2_pin { 234 clkout2_pin: pinmux_clkout2_pin {
235 pinctrl-single,pins = < 235 pinctrl-single,pins = <
236 AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ 236 AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
237 >; 237 >;
238 }; 238 };
239 239
240 /*GPIO0-GPIO11, GPIO0-5 is input and GPIO6-11 is output by default.*/ 240 /*GPIO0-GPIO11, GPIO0-5 is input and GPIO6-11 is output by default.*/
241 gpio_pins_default: pinmux_gpio_pin { 241 gpio_pins_default: pinmux_gpio_pin {
242 pinctrl-single,pins = < 242 pinctrl-single,pins = <
243 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gmii1_rx_dv.gpio3_4 */ 243 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gmii1_rx_dv.gpio3_4 */
244 AM33XX_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */ 244 AM33XX_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
245 AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */ 245 AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
246 AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a8.gpio1_24 */ 246 AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a8.gpio1_24 */
247 AM33XX_IOPAD(0x898, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wen.gpio2_4 */ 247 AM33XX_IOPAD(0x898, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wen.gpio2_4 */
248 AM33XX_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oenren.gpio2_3 */ 248 AM33XX_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oenren.gpio2_3 */
249 AM33XX_IOPAD(0x878, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben1.gpio1_28 */ 249 AM33XX_IOPAD(0x878, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben1.gpio1_28 */
250 AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn0.gpio1_29 */ 250 AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn0.gpio1_29 */
251 AM33XX_IOPAD(0x888, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn3.gpio2_0 */ 251 AM33XX_IOPAD(0x888, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn3.gpio2_0 */
252 AM33XX_IOPAD(0x88c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_clk.gpio2_1 */ 252 AM33XX_IOPAD(0x88c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_clk.gpio2_1 */
253 AM33XX_IOPAD(0x9e4, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* emu0.gpio3_7 */ 253 AM33XX_IOPAD(0x9e4, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* emu0.gpio3_7 */
254 AM33XX_IOPAD(0x9e8, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* emu1.gpio3_8 */ 254 AM33XX_IOPAD(0x9e8, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* emu1.gpio3_8 */
255 >; 255 >;
256 }; 256 };
257 257
258 ecap0_pins: backlight_pins { 258 ecap0_pins: backlight_pins {
259 pinctrl-single,pins = < 259 pinctrl-single,pins = <
260 AM33XX_IOPAD(0x964, MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */ 260 AM33XX_IOPAD(0x964, MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
261 >; 261 >;
262 }; 262 };
263 263
264 cpsw_default: cpsw_default { 264 cpsw_default: cpsw_default {
265 pinctrl-single,pins = < 265 pinctrl-single,pins = <
266 /* Slave 1 */ 266 /* Slave 1 */
267 AM33XX_IOPAD(0x90c, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */ 267 AM33XX_IOPAD(0x90c, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
268 AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */ 268 AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
269 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */ 269 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */
270 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */ 270 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
271 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */ 271 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
272 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */ 272 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
273 AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */ 273 AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
274 AM33XX_IOPAD(0x944, PIN_INPUT_PULLUP | MUX_MODE0) /* rmii1_ref_clk.rmii1_ref_clk */ 274 AM33XX_IOPAD(0x944, PIN_INPUT_PULLUP | MUX_MODE0) /* rmii1_ref_clk.rmii1_ref_clk */
275 275
276 /* Slave 2 */ 276 /* Slave 2 */
277 AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wait0.rmii2_crs_dv */ 277 AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wait0.rmii2_crs_dv */
278 AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wpn.rmii2_rxerr */ 278 AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wpn.rmii2_rxerr */
279 AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a0.rmii2_txen */ 279 AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a0.rmii2_txen */
280 AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a4.rmii2_txd1 */ 280 AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a4.rmii2_txd1 */
281 AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a5.rmii2_txd0 */ 281 AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a5.rmii2_txd0 */
282 AM33XX_IOPAD(0x868, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a10.rmii2_rxd1 */ 282 AM33XX_IOPAD(0x868, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a10.rmii2_rxd1 */
283 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a11.rmii2_rxd0 */ 283 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a11.rmii2_rxd0 */
284 AM33XX_IOPAD(0x908, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_col.rmii2_ref_clk */ 284 AM33XX_IOPAD(0x908, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_col.rmii2_ref_clk */
285 >; 285 >;
286 }; 286 };
287 287
288 cpsw_sleep: cpsw_sleep { 288 cpsw_sleep: cpsw_sleep {
289 pinctrl-single,pins = < 289 pinctrl-single,pins = <
290 /* Slave 1 reset value */ 290 /* Slave 1 reset value */
291 AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7) 291 AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
292 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7) 292 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
293 AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) 293 AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
294 AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) 294 AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
295 AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) 295 AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
296 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) 296 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
297 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) 297 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
298 AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) 298 AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
299 299
300 /* Slave 2 reset value */ 300 /* Slave 2 reset value */
301 AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE7) 301 AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE7)
302 AM33XX_IOPAD(0x874, PIN_INPUT_PULLDOWN | MUX_MODE7) 302 AM33XX_IOPAD(0x874, PIN_INPUT_PULLDOWN | MUX_MODE7)
303 AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7) 303 AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
304 AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7) 304 AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
305 AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7) 305 AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
306 AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7) 306 AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
307 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7) 307 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
308 AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7) 308 AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
309 >; 309 >;
310 }; 310 };
311 311
312 davinci_mdio_default: davinci_mdio_default { 312 davinci_mdio_default: davinci_mdio_default {
313 pinctrl-single,pins = < 313 pinctrl-single,pins = <
314 /* MDIO */ 314 /* MDIO */
315 AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 315 AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
316 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ 316 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
317 >; 317 >;
318 }; 318 };
319 319
320 davinci_mdio_sleep: davinci_mdio_sleep { 320 davinci_mdio_sleep: davinci_mdio_sleep {
321 pinctrl-single,pins = < 321 pinctrl-single,pins = <
322 /* MDIO reset value */ 322 /* MDIO reset value */
323 AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) 323 AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
324 AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) 324 AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
325 >; 325 >;
326 }; 326 };
327 327
328 mmc1_pins: pinmux_mmc1_pins { 328 mmc1_pins: pinmux_mmc1_pins {
329 pinctrl-single,pins = < 329 pinctrl-single,pins = <
330 AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ 330 AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
331 AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ 331 AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
332 AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ 332 AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
333 AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ 333 AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
334 AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */ 334 AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
335 AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ 335 AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
336 AM33XX_IOPAD(0x848, PIN_INPUT | MUX_MODE7) /* GPIO1_18, MMC0_CD */ 336 AM33XX_IOPAD(0x848, PIN_INPUT | MUX_MODE7) /* GPIO1_18, MMC0_CD */
337 AM33XX_IOPAD(0x844, PIN_INPUT | MUX_MODE7) /* GPIO1_17, MMC0_WP */ 337 AM33XX_IOPAD(0x844, PIN_INPUT | MUX_MODE7) /* GPIO1_17, MMC0_WP */
338 >; 338 >;
339 }; 339 };
340 340
341 mmc1_pins_sleep: pinmux_mmc1_pins_sleep { 341 mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
342 pinctrl-single,pins = < 342 pinctrl-single,pins = <
343 AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLDOWN | MUX_MODE7) 343 AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLDOWN | MUX_MODE7)
344 AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLDOWN | MUX_MODE7) 344 AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLDOWN | MUX_MODE7)
345 AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLDOWN | MUX_MODE7) 345 AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLDOWN | MUX_MODE7)
346 AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLDOWN | MUX_MODE7) 346 AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLDOWN | MUX_MODE7)
347 AM33XX_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7) 347 AM33XX_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7)
348 AM33XX_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7) 348 AM33XX_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7)
349 AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7) 349 AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
350 AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7) 350 AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
351 >; 351 >;
352 }; 352 };
353 353
354 emmc_pins: pinmux_emmc_pins { 354 emmc_pins: pinmux_emmc_pins {
355 pinctrl-single,pins = < 355 pinctrl-single,pins = <
356 AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ 356 AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
357 AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ 357 AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
358 AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ 358 AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
359 AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ 359 AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
360 AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ 360 AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
361 AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ 361 AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
362 AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ 362 AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
363 AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ 363 AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
364 AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ 364 AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
365 AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ 365 AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
366 >; 366 >;
367 }; 367 };
368 368
369 lcd_pins_default: lcd_pins_default { 369 lcd_pins_default: lcd_pins_default {
370 pinctrl-single,pins = < 370 pinctrl-single,pins = <
371 AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data16, OUTPUT | MODE1 */ 371 AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data16, OUTPUT | MODE1 */
372 AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data17, OUTPUT | MODE1 */ 372 AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data17, OUTPUT | MODE1 */
373 AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data18, OUTPUT | MODE1 */ 373 AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data18, OUTPUT | MODE1 */
374 AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data19, OUTPUT | MODE1 */ 374 AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data19, OUTPUT | MODE1 */
375 AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data20, OUTPUT | MODE1 */ 375 AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data20, OUTPUT | MODE1 */
376 AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21, OUTPUT | MODE1 */ 376 AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21, OUTPUT | MODE1 */
377 AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data22, OUTPUT | MODE1 */ 377 AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data22, OUTPUT | MODE1 */
378 AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23, OUTPUT | MODE1 */ 378 AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23, OUTPUT | MODE1 */
379 AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0, OUTPUT | MODE0 */ 379 AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0, OUTPUT | MODE0 */
380 AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1, OUTPUT | MODE0 */ 380 AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1, OUTPUT | MODE0 */
381 AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2, OUTPUT | MODE0 */ 381 AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2, OUTPUT | MODE0 */
382 AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3, OUTPUT | MODE0 */ 382 AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3, OUTPUT | MODE0 */
383 AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4, OUTPUT | MODE0 */ 383 AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4, OUTPUT | MODE0 */
384 AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5, OUTPUT | MODE0 */ 384 AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5, OUTPUT | MODE0 */
385 AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6, OUTPUT | MODE0 */ 385 AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6, OUTPUT | MODE0 */
386 AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7, OUTPUT | MODE0 */ 386 AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7, OUTPUT | MODE0 */
387 AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8, OUTPUT | MODE0 */ 387 AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8, OUTPUT | MODE0 */
388 AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9, OUTPUT | MODE0 */ 388 AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9, OUTPUT | MODE0 */
389 AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10, OUTPUT | MODE0 */ 389 AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10, OUTPUT | MODE0 */
390 AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11, OUTPUT | MODE0 */ 390 AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11, OUTPUT | MODE0 */
391 AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12, OUTPUT | MODE0 */ 391 AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12, OUTPUT | MODE0 */
392 AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13, OUTPUT | MODE0 */ 392 AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13, OUTPUT | MODE0 */
393 AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14, OUTPUT | MODE0 */ 393 AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14, OUTPUT | MODE0 */
394 AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15, OUTPUT | MODE0 */ 394 AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15, OUTPUT | MODE0 */
395 AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */ 395 AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */
396 AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */ 396 AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */
397 AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */ 397 AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */
398 AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */ 398 AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */
399 AM33XX_IOPAD(0x85c, PIN_OUTPUT | MUX_MODE7) /* gpmc_a7.gpio1_23, MODE7 - LCD_VDD_EN */ 399 AM33XX_IOPAD(0x85c, PIN_OUTPUT | MUX_MODE7) /* gpmc_a7.gpio1_23, MODE7 - LCD_VDD_EN */
400 >; 400 >;
401 }; 401 };
402 402
403 mcasp1_pins: mcasp1_pins { 403 mcasp1_pins: mcasp1_pins {
404 pinctrl-single,pins = < 404 pinctrl-single,pins = <
405 AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_aclkr.mcasp1_aclkx */ 405 AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_aclkr.mcasp1_aclkx */
406 AM33XX_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_fsr.mcasp1_fsx */ 406 AM33XX_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_fsr.mcasp1_fsx */
407 AM33XX_IOPAD(0x9a8, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* mcasp0_axr1.mcasp1_axr0 */ 407 AM33XX_IOPAD(0x9a8, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* mcasp0_axr1.mcasp1_axr0 */
408 AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_ahclkx.mcasp1_axr1 */ 408 AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_ahclkx.mcasp1_axr1 */
409 >; 409 >;
410 }; 410 };
411 411
412 mcasp1_sleep_pins: mcasp1_sleep_pins { 412 mcasp1_sleep_pins: mcasp1_sleep_pins {
413 pinctrl-single,pins = < 413 pinctrl-single,pins = <
414 AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7) 414 AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7)
415 AM33XX_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE7) 415 AM33XX_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE7)
416 AM33XX_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7) 416 AM33XX_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7)
417 AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7) 417 AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7)
418 >; 418 >;
419 }; 419 };
420 420
421 spi0_pins: pinmux_spi0_pins { 421 spi0_pins: pinmux_spi0_pins {
422 pinctrl-single,pins = < 422 pinctrl-single,pins = <
423 AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */ 423 AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */
424 AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */ 424 AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
425 AM33XX_IOPAD(0x958, PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */ 425 AM33XX_IOPAD(0x958, PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
426 AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */ 426 AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
427 AM33XX_IOPAD(0x960, PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_cs1.spi0_cs1 */ 427 AM33XX_IOPAD(0x960, PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_cs1.spi0_cs1 */
428 >; 428 >;
429 }; 429 };
430 430
431 spi1_pins: pinmux_spi1_pins { 431 spi1_pins: pinmux_spi1_pins {
432 pinctrl-single,pins = < 432 pinctrl-single,pins = <
433 AM33XX_IOPAD(0x990, PIN_INPUT_PULLUP | MUX_MODE3) /* mcasp0_aclkx.spi1_sclk */ 433 AM33XX_IOPAD(0x990, PIN_INPUT_PULLUP | MUX_MODE3) /* mcasp0_aclkx.spi1_sclk */
434 AM33XX_IOPAD(0x994, PIN_INPUT_PULLUP | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */ 434 AM33XX_IOPAD(0x994, PIN_INPUT_PULLUP | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */
435 AM33XX_IOPAD(0x998, PIN_OUTPUT_PULLUP | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */ 435 AM33XX_IOPAD(0x998, PIN_OUTPUT_PULLUP | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */
436 AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLUP | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */ 436 AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLUP | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */
437 AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLUP | MUX_MODE4) /* xdma_event_intr0.spi1_cs1 */ 437 AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLUP | MUX_MODE4) /* xdma_event_intr0.spi1_cs1 */
438 >; 438 >;
439 }; 439 };
440 dcan0_default: dcan0_default_pins { 440 dcan0_default: dcan0_default_pins {
441 pinctrl-single,pins = < 441 pinctrl-single,pins = <
442 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gmii1_txd3.dcan0_tx */ 442 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gmii1_txd3.dcan0_tx */
443 AM33XX_IOPAD(0x920, PIN_INPUT_PULLUP | MUX_MODE1) /* gmii1_txd2.dcan0_rx */ 443 AM33XX_IOPAD(0x920, PIN_INPUT_PULLUP | MUX_MODE1) /* gmii1_txd2.dcan0_rx */
444 >; 444 >;
445 }; 445 };
446 }; 446 };
447 447
448 &uart0 { 448 &uart0 {
449 pinctrl-names = "default"; 449 pinctrl-names = "default";
450 pinctrl-0 = <&uart0_pins>; 450 pinctrl-0 = <&uart0_pins>;
451 pinctrl-1 = <&uart0_pins_sleep>; 451 pinctrl-1 = <&uart0_pins_sleep>;
452 452
453 status = "okay"; 453 status = "okay";
454 }; 454 };
455 455
456 &uart2 { 456 &uart2 {
457 pinctrl-names = "default"; 457 pinctrl-names = "default";
458 pinctrl-0 = <&uart2_pins>; 458 pinctrl-0 = <&uart2_pins>;
459 459
460 status = "okay"; 460 status = "okay";
461 }; 461 };
462 462
463 &uart3 { 463 &uart3 {
464 pinctrl-names = "default"; 464 pinctrl-names = "default";
465 pinctrl-0 = <&uart3_pins>; 465 pinctrl-0 = <&uart3_pins>;
466 466
467 status = "okay"; 467 status = "okay";
468 }; 468 };
469 469
470 &i2c0 { 470 &i2c0 {
471 pinctrl-names = "default"; 471 pinctrl-names = "default";
472 pinctrl-0 = <&i2c0_pins>; 472 pinctrl-0 = <&i2c0_pins>;
473 473
474 status = "okay"; 474 status = "okay";
475 clock-frequency = <100000>; 475 clock-frequency = <100000>;
476 476
477 tps: tps@24 { 477 tps: tps@24 {
478 reg = <0x24>; 478 reg = <0x24>;
479 }; 479 };
480 480
481 s35390a: s35390a@30 { 481 s35390a: s35390a@30 {
482 compatible = "s35390a"; 482 compatible = "s35390a";
483 reg = <0x30>; 483 reg = <0x30>;
484 }; 484 };
485 485
486 baseboard_eeprom: baseboard_eeprom@50 { 486 baseboard_eeprom: baseboard_eeprom@50 {
487 compatible = "at,24c256"; 487 compatible = "at,24c256";
488 reg = <0x50>; 488 reg = <0x50>;
489 }; 489 };
490 490
491 cape_eeprom0: cape_eeprom@57 { 491 cape_eeprom0: cape_eeprom@57 {
492 compatible = "at,24c256"; 492 compatible = "at,24c256";
493 reg = <0x57>; 493 reg = <0x57>;
494 }; 494 };
495 495
496 tlv320aic3106: tlv320aic3106@1b { 496 tlv320aic3106: tlv320aic3106@1b {
497 compatible = "ti,tlv320aic3106"; 497 compatible = "ti,tlv320aic3106";
498 reg = <0x1b>; 498 reg = <0x1b>;
499 status = "okay"; 499 status = "okay";
500 }; 500 };
501 501
502 }; 502 };
503 503
504 &i2c1 { 504 &i2c1 {
505 pinctrl-names = "default"; 505 pinctrl-names = "default";
506 pinctrl-0 = <&i2c1_pins>; 506 pinctrl-0 = <&i2c1_pins>;
507 status = "okay"; 507 status = "okay";
508 clock-frequency = <100000>; 508 clock-frequency = <100000>;
509 }; 509 };
510 510
511 &i2c2 { 511 &i2c2 {
512 pinctrl-names = "default"; 512 pinctrl-names = "default";
513 pinctrl-0 = <&i2c2_pins>; 513 pinctrl-0 = <&i2c2_pins>;
514 status = "okay"; 514 status = "okay";
515 clock-frequency = <100000>; 515 clock-frequency = <100000>;
516 }; 516 };
517 517
518 &spi0 { 518 &spi0 {
519 pinctrl-names = "default"; 519 pinctrl-names = "default";
520 pinctrl-0 = <&spi0_pins>; 520 pinctrl-0 = <&spi0_pins>;
521 status = "okay"; 521 status = "okay";
522 522
523 spidev0: spi@0 { 523 spidev0: spi@0 {
524 compatible = "spidev"; 524 compatible = "spidev";
525 reg = <0>; 525 reg = <0>;
526 spi-max-frequency = <20000000>; 526 spi-max-frequency = <20000000>;
527 spi-cpha; 527 spi-cpha;
528 }; 528 };
529 529
530 spidev2: spi@1 { 530 spidev2: spi@1 {
531 compatible = "spidev"; 531 compatible = "spidev";
532 reg = <1>; 532 reg = <1>;
533 spi-max-frequency = <20000000>; 533 spi-max-frequency = <20000000>;
534 }; 534 };
535 }; 535 };
536 536
537 &spi1 { 537 &spi1 {
538 pinctrl-names = "default"; 538 pinctrl-names = "default";
539 pinctrl-0 = <&spi1_pins>; 539 pinctrl-0 = <&spi1_pins>;
540 status = "okay"; 540 status = "okay";
541 541
542 spidev1: spi@0 { 542 spidev1: spi@0 {
543 compatible = "spidev"; 543 compatible = "spidev";
544 reg = <0>; 544 reg = <0>;
545 spi-max-frequency = <20000000>; 545 spi-max-frequency = <20000000>;
546 spi-cpha; 546 spi-cpha;
547 }; 547 };
548 548
549 spidev3: spi@1 { 549 spidev3: spi@1 {
550 compatible = "spidev"; 550 compatible = "spidev";
551 reg = <1>; 551 reg = <1>;
552 spi-max-frequency = <20000000>; 552 spi-max-frequency = <20000000>;
553 }; 553 };
554 }; 554 };
555 555
556 &lcdc { 556 &lcdc {
557 status = "okay"; 557 status = "okay";
558 558
559 /* If you want to get 24 bit RGB and 16 BGR mode instead of 559 /* If you want to get 24 bit RGB and 16 BGR mode instead of
560 * current 16 bit RGB and 24 BGR modes, set the propety 560 * current 16 bit RGB and 24 BGR modes, set the propety
561 * below to "crossed". 561 * below to "straight".
562 */ 562 */
563 blue-and-red-wiring = "straight"; 563 /*blue-and-red-wiring = "straight";*/
564 blue-and-red-wiring = "crossed";
564 }; 565 };
565 566
566 &elm { 567 &elm {
567 status = "okay"; 568 status = "okay";
568 }; 569 };
569 570
570 &epwmss0 { 571 &epwmss0 {
571 status = "okay"; 572 status = "okay";
572 573
573 ecap0: ecap@48300100 { 574 ecap0: ecap@48300100 {
574 status = "okay"; 575 status = "okay";
575 pinctrl-names = "default"; 576 pinctrl-names = "default";
576 pinctrl-0 = <&ecap0_pins>; 577 pinctrl-0 = <&ecap0_pins>;
577 }; 578 };
578 }; 579 };
579 580
580 /include/ "tps65217.dtsi" 581 /include/ "tps65217.dtsi"
581 582
582 &mcasp1 { 583 &mcasp1 {
583 pinctrl-names = "default"; 584 pinctrl-names = "default";
584 pinctrl-0 = <&mcasp1_pins>; 585 pinctrl-0 = <&mcasp1_pins>;
585 pinctrl-1 = <&mcasp1_sleep_pins>; 586 pinctrl-1 = <&mcasp1_sleep_pins>;
586 587
587 status = "okay"; 588 status = "okay";
588 589
589 op-mode = <0>; /* MCASP_IIS_MODE */ 590 op-mode = <0>; /* MCASP_IIS_MODE */
590 tdm-slots = <2>; 591 tdm-slots = <2>;
591 /* 4 serializers */ 592 /* 4 serializers */
592 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 593 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
593 1 2 0 0 594 1 2 0 0
594 >; 595 >;
595 tx-num-evt = <1>; 596 tx-num-evt = <1>;
596 rx-num-evt = <1>; 597 rx-num-evt = <1>;
597 }; 598 };
598 599
599 &tps { 600 &tps {
600 /* 601 /*
601 * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only 602 * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
602 * mode") at poweroff. Most BeagleBone versions do not support RTC-only 603 * mode") at poweroff. Most BeagleBone versions do not support RTC-only
603 * mode and risk hardware damage if this mode is entered. 604 * mode and risk hardware damage if this mode is entered.
604 * 605 *
605 * For details, see linux-omap mailing list May 2015 thread 606 * For details, see linux-omap mailing list May 2015 thread
606 * [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller 607 * [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
607 * In particular, messages: 608 * In particular, messages:
608 * http://www.spinics.net/lists/linux-omap/msg118585.html 609 * http://www.spinics.net/lists/linux-omap/msg118585.html
609 * http://www.spinics.net/lists/linux-omap/msg118615.html 610 * http://www.spinics.net/lists/linux-omap/msg118615.html
610 * 611 *
611 * You can override this later with 612 * You can override this later with
612 * &tps { /delete-property/ ti,pmic-shutdown-controller; } 613 * &tps { /delete-property/ ti,pmic-shutdown-controller; }
613 * if you want to use RTC-only mode and made sure you are not affected 614 * if you want to use RTC-only mode and made sure you are not affected
614 * by the hardware problems. (Tip: double-check by performing a current 615 * by the hardware problems. (Tip: double-check by performing a current
615 * measurement after shutdown: it should be less than 1 mA.) 616 * measurement after shutdown: it should be less than 1 mA.)
616 */ 617 */
617 ti,pmic-shutdown-controller; 618 ti,pmic-shutdown-controller;
618 619
619 regulators { 620 regulators {
620 dcdc1_reg: regulator@0 { 621 dcdc1_reg: regulator@0 {
621 regulator-name = "vdds_dpr"; 622 regulator-name = "vdds_dpr";
622 regulator-always-on; 623 regulator-always-on;
623 }; 624 };
624 625
625 dcdc2_reg: regulator@1 { 626 dcdc2_reg: regulator@1 {
626 /* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */ 627 /* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */
627 regulator-name = "vdd_mpu"; 628 regulator-name = "vdd_mpu";
628 regulator-min-microvolt = <925000>; 629 regulator-min-microvolt = <925000>;
629 regulator-max-microvolt = <1351500>; 630 regulator-max-microvolt = <1351500>;
630 regulator-boot-on; 631 regulator-boot-on;
631 regulator-always-on; 632 regulator-always-on;
632 }; 633 };
633 634
634 dcdc3_reg: regulator@2 { 635 dcdc3_reg: regulator@2 {
635 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ 636 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
636 regulator-name = "vdd_core"; 637 regulator-name = "vdd_core";
637 regulator-min-microvolt = <925000>; 638 regulator-min-microvolt = <925000>;
638 regulator-max-microvolt = <1150000>; 639 regulator-max-microvolt = <1150000>;
639 regulator-boot-on; 640 regulator-boot-on;
640 regulator-always-on; 641 regulator-always-on;
641 }; 642 };
642 643
643 ldo1_reg: regulator@3 { 644 ldo1_reg: regulator@3 {
644 regulator-name = "vio,vrtc,vdds"; 645 regulator-name = "vio,vrtc,vdds";
645 regulator-always-on; 646 regulator-always-on;
646 }; 647 };
647 648
648 ldo2_reg: regulator@4 { 649 ldo2_reg: regulator@4 {
649 regulator-name = "vdd_3v3aux"; 650 regulator-name = "vdd_3v3aux";
650 regulator-always-on; 651 regulator-always-on;
651 }; 652 };
652 653
653 ldo3_reg: regulator@5 { 654 ldo3_reg: regulator@5 {
654 regulator-name = "vdd_1v8"; 655 regulator-name = "vdd_1v8";
655 regulator-always-on; 656 regulator-always-on;
656 }; 657 };
657 658
658 ldo4_reg: regulator@6 { 659 ldo4_reg: regulator@6 {
659 regulator-name = "vdd_3v3a"; 660 regulator-name = "vdd_3v3a";
660 regulator-always-on; 661 regulator-always-on;
661 }; 662 };
662 }; 663 };
663 }; 664 };
664 665
665 &mac { 666 &mac {
666 pinctrl-names = "default", "sleep"; 667 pinctrl-names = "default", "sleep";
667 pinctrl-0 = <&cpsw_default>; 668 pinctrl-0 = <&cpsw_default>;
668 pinctrl-1 = <&cpsw_sleep>; 669 pinctrl-1 = <&cpsw_sleep>;
669 dual_emac = <1>; 670 dual_emac = <1>;
670 status = "okay"; 671 status = "okay";
671 }; 672 };
672 673
673 &davinci_mdio { 674 &davinci_mdio {
674 pinctrl-names = "default", "sleep"; 675 pinctrl-names = "default", "sleep";
675 pinctrl-0 = <&davinci_mdio_default>; 676 pinctrl-0 = <&davinci_mdio_default>;
676 pinctrl-1 = <&davinci_mdio_sleep>; 677 pinctrl-1 = <&davinci_mdio_sleep>;
677 status = "okay"; 678 status = "okay";
678 }; 679 };
679 680
680 &cpsw_emac0 { 681 &cpsw_emac0 {
681 phy_id = <&davinci_mdio>, <0>; 682 phy_id = <&davinci_mdio>, <0>;
682 phy-mode = "rmii"; 683 phy-mode = "rmii";
683 dual_emac_res_vlan = <1>; 684 dual_emac_res_vlan = <1>;
684 }; 685 };
685 686
686 &cpsw_emac1 { 687 &cpsw_emac1 {
687 phy_id = <&davinci_mdio>, <1>; 688 phy_id = <&davinci_mdio>, <1>;
688 phy-mode = "rmii"; 689 phy-mode = "rmii";
689 dual_emac_res_vlan = <2>; 690 dual_emac_res_vlan = <2>;
690 }; 691 };
691 692
692 &phy_sel { 693 &phy_sel {
693 reg= <0x44e10650 0xf5>; 694 reg= <0x44e10650 0xf5>;
694 rmii-clock-ext; 695 rmii-clock-ext;
695 }; 696 };
696 697
697 &usb { 698 &usb {
698 status = "okay"; 699 status = "okay";
699 }; 700 };
700 701
701 &usb_ctrl_mod { 702 &usb_ctrl_mod {
702 status = "okay"; 703 status = "okay";
703 }; 704 };
704 705
705 &usb0_phy { 706 &usb0_phy {
706 status = "okay"; 707 status = "okay";
707 }; 708 };
708 709
709 &usb1_phy { 710 &usb1_phy {
710 status = "okay"; 711 status = "okay";
711 }; 712 };
712 713
713 &usb0 { 714 &usb0 {
714 status = "okay"; 715 status = "okay";
715 dr_mode = "host"; 716 dr_mode = "host";
716 }; 717 };
717 718
718 &usb1 { 719 &usb1 {
719 status = "okay"; 720 status = "okay";
720 dr_mode = "host"; 721 dr_mode = "host";
721 }; 722 };
722 723
723 &cppi41dma { 724 &cppi41dma {
724 status = "okay"; 725 status = "okay";
725 }; 726 };
726 727
727 &tscadc { 728 &tscadc {
728 status = "disabled"; 729 status = "disabled";
729 tsc { 730 tsc {
730 ti,wires = <4>; 731 ti,wires = <4>;
731 ti,x-plate-resistance = <200>; 732 ti,x-plate-resistance = <200>;
732 ti,coordinate-readouts = <5>; 733 ti,coordinate-readouts = <5>;
733 ti,wire-config = <0x00 0x11 0x22 0x33>; 734 ti,wire-config = <0x00 0x11 0x22 0x33>;
734 ti,charge-delay = <0x400>; 735 ti,charge-delay = <0x400>;
735 }; 736 };
736 737
737 adc { 738 adc {
738 ti,adc-channels = <0 1 2 3>; 739 ti,adc-channels = <0 1 2 3>;
739 }; 740 };
740 }; 741 };
741 742
742 &mmc2 { 743 &mmc2 {
743 vmmc-supply = <&vmmcsd_fixed>; 744 vmmc-supply = <&vmmcsd_fixed>;
744 pinctrl-names = "default"; 745 pinctrl-names = "default";
745 pinctrl-0 = <&emmc_pins>; 746 pinctrl-0 = <&emmc_pins>;
746 bus-width = <8>; 747 bus-width = <8>;
747 status = "okay"; 748 status = "okay";
748 ti,non-removable; 749 ti,non-removable;
749 }; 750 };
750 751
751 752
752 &mmc1 { 753 &mmc1 {
753 vmmc-supply = <&vmmcsd_fixed>; 754 vmmc-supply = <&vmmcsd_fixed>;
754 status = "okay"; 755 status = "okay";
755 bus-width = <0x4>; 756 bus-width = <0x4>;
756 pinctrl-names = "default"; 757 pinctrl-names = "default";
757 pinctrl-0 = <&mmc1_pins>; 758 pinctrl-0 = <&mmc1_pins>;
758 gpios = <&gpio1 19 1>; /* mmc0 power enable*/ 759 gpios = <&gpio1 19 1>; /* mmc0 power enable*/
759 cd-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>; 760 cd-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
760 wp-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; 761 wp-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
761 cd-inverted; 762 cd-inverted;
762 }; 763 };
763 764
764 &dcan0 { 765 &dcan0 {
765 pinctrl-names = "default"; 766 pinctrl-names = "default";
766 pinctrl-0 = <&dcan0_default>; 767 pinctrl-0 = <&dcan0_default>;
767 status = "okay"; 768 status = "okay";
768 }; 769 };
769 770
770 &sham { 771 &sham {
771 status = "okay"; 772 status = "okay";
772 }; 773 };
773 774
774 &aes { 775 &aes {
775 status = "okay"; 776 status = "okay";
776 }; 777 };
777 778
778 &gpio0 { 779 &gpio0 {
779 ti,no-reset-on-init; 780 ti,no-reset-on-init;
780 }; 781 };
781 782
782 &wkup_m3_ipc { 783 &wkup_m3_ipc {
783 ti,scale-data-fw = "am335x-evm-scale-data.bin"; 784 ti,scale-data-fw = "am335x-evm-scale-data.bin";
784 }; 785 };
785 786
786 &rtc { 787 &rtc {
787 ext-clk-src; 788 ext-clk-src;
788 }; 789 };
789 790