Eric Lee / smarc-ti-linux-kernel

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Commit 9c754c8ad1219522274a95101d231ab9c9ed08b1

Authored by Suman Anna
1 parent eb11cef1d1
Exists in smarct4x-processor-sdk-linux-02.00.01 and in 3 other branches processor-sdk-linux-02.00.01, smarct3x-processor-sdk-linux-02.00.01, smarct4x-800-processor-sdk-linux-02.00.01

TEMP: ARM: dts: k2g-evm: Add dspmem node 

Add a dspmem node on the K2 Galileo EVM board. The node
allows the entire MSM RAM (1 MB) to be mapped to userspace
to enable the Keystone Multi Proc Manager (MPM) based
usecases.

Signed-off-by: Suman Anna <s-anna@ti.com>

Showing 1 changed file with 7 additions and 0 deletions Inline Diff

arch/arm/boot/dts/k2g-evm.dts
Diff comments   View file @ 9c754c8
1 /* 1 /*
2 * Device Tree Source for K2G EVM 2 * Device Tree Source for K2G EVM
3 * 3 *
4 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ 4 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 * 9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty 11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 */ 14 */
15 /dts-v1/; 15 /dts-v1/;
16 16
17 #include "k2g.dtsi" 17 #include "k2g.dtsi"
18 18
19 / { 19 / {
20 compatible = "ti,k2g-evm", "ti,k2g", "ti,keystone"; 20 compatible = "ti,k2g-evm", "ti,k2g", "ti,keystone";
21 model = "Texas Instruments K2G General Purpose EVM"; 21 model = "Texas Instruments K2G General Purpose EVM";
22 22
23 memory { 23 memory {
24 device_type = "memory"; 24 device_type = "memory";
25 reg = <0x00000008 0x00000000 0x00000000 0x80000000>; 25 reg = <0x00000008 0x00000000 0x00000000 0x80000000>;
26 }; 26 };
27 27
28 mmc0_reg: fixedregulator-mmc0 { 28 mmc0_reg: fixedregulator-mmc0 {
29 compatible = "regulator-fixed"; 29 compatible = "regulator-fixed";
30 regulator-name = "mmc0_fixed"; 30 regulator-name = "mmc0_fixed";
31 regulator-min-microvolt = <3300000>; 31 regulator-min-microvolt = <3300000>;
32 regulator-max-microvolt = <3300000>; 32 regulator-max-microvolt = <3300000>;
33 regulator-always-on; 33 regulator-always-on;
34 }; 34 };
35 35
36 mmc1_reg: fixedregulator-mmc1 { 36 mmc1_reg: fixedregulator-mmc1 {
37 compatible = "regulator-fixed"; 37 compatible = "regulator-fixed";
38 regulator-name = "mmc1_fixed"; 38 regulator-name = "mmc1_fixed";
39 regulator-min-microvolt = <1800000>; 39 regulator-min-microvolt = <1800000>;
40 regulator-max-microvolt = <1800000>; 40 regulator-max-microvolt = <1800000>;
41 regulator-always-on; 41 regulator-always-on;
42 }; 42 };
43
44 soc {
45 mpm_mem: dspmem {
46 compatible = "ti,keystone-dsp-mem";
47 reg = <0x0c000000 0x00100000>;
48 };
49 };
43 }; 50 };
44 51
45 &k2g_pinctrl { 52 &k2g_pinctrl {
46 uart0_pins: pinmux_uart0_pins { 53 uart0_pins: pinmux_uart0_pins {
47 pinctrl-single,pins = < 54 pinctrl-single,pins = <
48 K2G_CORE_IOPAD(0x11cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* uart0_rxd.uart0_rxd */ 55 K2G_CORE_IOPAD(0x11cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* uart0_rxd.uart0_rxd */
49 K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ 56 K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
50 >; 57 >;
51 }; 58 };
52 59
53 i2c0_pins: pinmux_i2c0_pins { 60 i2c0_pins: pinmux_i2c0_pins {
54 pinctrl-single,pins = < 61 pinctrl-single,pins = <
55 K2G_CORE_IOPAD(0x137c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 62 K2G_CORE_IOPAD(0x137c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
56 K2G_CORE_IOPAD(0x1380) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 63 K2G_CORE_IOPAD(0x1380) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
57 >; 64 >;
58 }; 65 };
59 66
60 mmc0_pins: pinmux_mmc0_pins { 67 mmc0_pins: pinmux_mmc0_pins {
61 pinctrl-single,pins = < 68 pinctrl-single,pins = <
62 K2G_CORE_IOPAD(0x1300) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat3.mmc0_dat3 */ 69 K2G_CORE_IOPAD(0x1300) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat3.mmc0_dat3 */
63 K2G_CORE_IOPAD(0x1304) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat2.mmc0_dat2 */ 70 K2G_CORE_IOPAD(0x1304) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat2.mmc0_dat2 */
64 K2G_CORE_IOPAD(0x1308) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat1.mmc0_dat1 */ 71 K2G_CORE_IOPAD(0x1308) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat1.mmc0_dat1 */
65 K2G_CORE_IOPAD(0x130c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat0.mmc0_dat0 */ 72 K2G_CORE_IOPAD(0x130c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat0.mmc0_dat0 */
66 K2G_CORE_IOPAD(0x1310) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_clk.mmc0_clk */ 73 K2G_CORE_IOPAD(0x1310) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_clk.mmc0_clk */
67 K2G_CORE_IOPAD(0x1314) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_cmd.mmc0_cmd */ 74 K2G_CORE_IOPAD(0x1314) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_cmd.mmc0_cmd */
68 K2G_CORE_IOPAD(0x12ec) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_sdcd.mmc0_sdcd */ 75 K2G_CORE_IOPAD(0x12ec) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_sdcd.mmc0_sdcd */
69 >; 76 >;
70 }; 77 };
71 78
72 mmc1_pins: pinmux_mmc1_pins { 79 mmc1_pins: pinmux_mmc1_pins {
73 pinctrl-single,pins = < 80 pinctrl-single,pins = <
74 K2G_CORE_IOPAD(0x10ec) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat7.mmc1_dat7 */ 81 K2G_CORE_IOPAD(0x10ec) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat7.mmc1_dat7 */
75 K2G_CORE_IOPAD(0x10f0) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat6.mmc1_dat6 */ 82 K2G_CORE_IOPAD(0x10f0) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat6.mmc1_dat6 */
76 K2G_CORE_IOPAD(0x10f4) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat5.mmc1_dat5 */ 83 K2G_CORE_IOPAD(0x10f4) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat5.mmc1_dat5 */
77 K2G_CORE_IOPAD(0x10f8) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat4.mmc1_dat4 */ 84 K2G_CORE_IOPAD(0x10f8) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat4.mmc1_dat4 */
78 K2G_CORE_IOPAD(0x10fc) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat3.mmc1_dat3 */ 85 K2G_CORE_IOPAD(0x10fc) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat3.mmc1_dat3 */
79 K2G_CORE_IOPAD(0x1100) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat2.mmc1_dat2 */ 86 K2G_CORE_IOPAD(0x1100) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat2.mmc1_dat2 */
80 K2G_CORE_IOPAD(0x1104) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat1.mmc1_dat1 */ 87 K2G_CORE_IOPAD(0x1104) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat1.mmc1_dat1 */
81 K2G_CORE_IOPAD(0x1108) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat0.mmc1_dat0 */ 88 K2G_CORE_IOPAD(0x1108) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat0.mmc1_dat0 */
82 K2G_CORE_IOPAD(0x110c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_clk.mmc1_clk */ 89 K2G_CORE_IOPAD(0x110c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_clk.mmc1_clk */
83 K2G_CORE_IOPAD(0x1110) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_cmd.mmc1_cmd */ 90 K2G_CORE_IOPAD(0x1110) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_cmd.mmc1_cmd */
84 >; 91 >;
85 }; 92 };
86 93
87 spi1_pins: pinmux_spi1_pins { 94 spi1_pins: pinmux_spi1_pins {
88 pinctrl-single,pins = < 95 pinctrl-single,pins = <
89 K2G_CORE_IOPAD(0x11a4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_scs0.spi1_scs0 */ 96 K2G_CORE_IOPAD(0x11a4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_scs0.spi1_scs0 */
90 K2G_CORE_IOPAD(0x11ac) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_clk.spi1_clk */ 97 K2G_CORE_IOPAD(0x11ac) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_clk.spi1_clk */
91 K2G_CORE_IOPAD(0x11b0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_miso.spi1_miso */ 98 K2G_CORE_IOPAD(0x11b0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_miso.spi1_miso */
92 K2G_CORE_IOPAD(0x11b4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_mosi.spi1_mosi */ 99 K2G_CORE_IOPAD(0x11b4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_mosi.spi1_mosi */
93 >; 100 >;
94 }; 101 };
95 102
96 dcan0_pins: pinmux_dcan0_pins { 103 dcan0_pins: pinmux_dcan0_pins {
97 pinctrl-single,pins = < 104 pinctrl-single,pins = <
98 K2G_CORE_IOPAD(0x11fc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dcan0tx.dcan0tx */ 105 K2G_CORE_IOPAD(0x11fc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dcan0tx.dcan0tx */
99 K2G_CORE_IOPAD(0x1200) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* dcan0rx.dcan0rx */ 106 K2G_CORE_IOPAD(0x1200) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* dcan0rx.dcan0rx */
100 >; 107 >;
101 }; 108 };
102 109
103 dcan1_pins: pinmux_dcan1_pins { 110 dcan1_pins: pinmux_dcan1_pins {
104 pinctrl-single,pins = < 111 pinctrl-single,pins = <
105 K2G_CORE_IOPAD(0x1224) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE1) /* qspicsn2.dcan1tx */ 112 K2G_CORE_IOPAD(0x1224) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE1) /* qspicsn2.dcan1tx */
106 K2G_CORE_IOPAD(0x1228) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE1) /* qspicsn3.dcan1rx */ 113 K2G_CORE_IOPAD(0x1228) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE1) /* qspicsn3.dcan1rx */
107 >; 114 >;
108 }; 115 };
109 116
110 nand_pins: pinmux_nand_pins { 117 nand_pins: pinmux_nand_pins {
111 pinctrl-single,pins = < 118 pinctrl-single,pins = <
112 K2G_CORE_IOPAD(0x1000) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ 119 K2G_CORE_IOPAD(0x1000) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
113 K2G_CORE_IOPAD(0x1004) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ 120 K2G_CORE_IOPAD(0x1004) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
114 K2G_CORE_IOPAD(0x1008) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ 121 K2G_CORE_IOPAD(0x1008) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
115 K2G_CORE_IOPAD(0x100c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ 122 K2G_CORE_IOPAD(0x100c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
116 K2G_CORE_IOPAD(0x1010) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ 123 K2G_CORE_IOPAD(0x1010) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
117 K2G_CORE_IOPAD(0x1014) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ 124 K2G_CORE_IOPAD(0x1014) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
118 K2G_CORE_IOPAD(0x1018) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ 125 K2G_CORE_IOPAD(0x1018) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
119 K2G_CORE_IOPAD(0x101c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ 126 K2G_CORE_IOPAD(0x101c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
120 K2G_CORE_IOPAD(0x1020) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad8.gpmc_ad8 */ 127 K2G_CORE_IOPAD(0x1020) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad8.gpmc_ad8 */
121 K2G_CORE_IOPAD(0x1024) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad9.gpmc_ad9 */ 128 K2G_CORE_IOPAD(0x1024) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad9.gpmc_ad9 */
122 K2G_CORE_IOPAD(0x1028) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad10.gpmc_ad10 */ 129 K2G_CORE_IOPAD(0x1028) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad10.gpmc_ad10 */
123 K2G_CORE_IOPAD(0x102c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad11.gpmc_ad11 */ 130 K2G_CORE_IOPAD(0x102c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad11.gpmc_ad11 */
124 K2G_CORE_IOPAD(0x1030) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad12.gpmc_ad12 */ 131 K2G_CORE_IOPAD(0x1030) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad12.gpmc_ad12 */
125 K2G_CORE_IOPAD(0x1034) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad13.gpmc_ad13 */ 132 K2G_CORE_IOPAD(0x1034) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad13.gpmc_ad13 */
126 K2G_CORE_IOPAD(0x1038) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad14.gpmc_ad14 */ 133 K2G_CORE_IOPAD(0x1038) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad14.gpmc_ad14 */
127 K2G_CORE_IOPAD(0x103c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad15.gpmc_ad15 */ 134 K2G_CORE_IOPAD(0x103c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_ad15.gpmc_ad15 */
128 K2G_CORE_IOPAD(0x1044) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_advnale.gpmc_advnale */ 135 K2G_CORE_IOPAD(0x1044) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_advnale.gpmc_advnale */
129 K2G_CORE_IOPAD(0x1048) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_oenren.gpmc_oenren */ 136 K2G_CORE_IOPAD(0x1048) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_oenren.gpmc_oenren */
130 K2G_CORE_IOPAD(0x104c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_wen.gpmc_wen */ 137 K2G_CORE_IOPAD(0x104c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_wen.gpmc_wen */
131 K2G_CORE_IOPAD(0x1050) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_beoncle.gpmc_beoncle */ 138 K2G_CORE_IOPAD(0x1050) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_beoncle.gpmc_beoncle */
132 K2G_CORE_IOPAD(0x1058) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ 139 K2G_CORE_IOPAD(0x1058) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
133 K2G_CORE_IOPAD(0x1060) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* gpmc_wpn.gpmc_wpn */ 140 K2G_CORE_IOPAD(0x1060) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* gpmc_wpn.gpmc_wpn */
134 K2G_CORE_IOPAD(0x1068) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ 141 K2G_CORE_IOPAD(0x1068) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
135 >; 142 >;
136 }; 143 };
137 }; 144 };
138 145
139 &elm { 146 &elm {
140 status = "okay"; 147 status = "okay";
141 }; 148 };
142 149
143 &gpmc { 150 &gpmc {
144 pinctrl-names = "default"; 151 pinctrl-names = "default";
145 pinctrl-0 = <&nand_pins>; 152 pinctrl-0 = <&nand_pins>;
146 status = "okay"; 153 status = "okay";
147 ranges = <0 0 0x30000000 0x01000000>; /* CS0 space. Min partition = 16MB */ 154 ranges = <0 0 0x30000000 0x01000000>; /* CS0 space. Min partition = 16MB */
148 nand@0,0 { 155 nand@0,0 {
149 compatible = "ti,omap2-nand"; 156 compatible = "ti,omap2-nand";
150 reg = <0 0 4>; /* CS0, I/O window 4 bytes */ 157 reg = <0 0 4>; /* CS0, I/O window 4 bytes */
151 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; 158 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
152 ti,nand-ecc-opt = "bch16"; 159 ti,nand-ecc-opt = "bch16";
153 ti,elm-id = <&elm>; 160 ti,elm-id = <&elm>;
154 nand-bus-width = <16>; 161 nand-bus-width = <16>;
155 gpmc,device-width = <2>; 162 gpmc,device-width = <2>;
156 gpmc,sync-clk-ps = <0>; 163 gpmc,sync-clk-ps = <0>;
157 gpmc,cs-on-ns = <0>; 164 gpmc,cs-on-ns = <0>;
158 gpmc,cs-rd-off-ns = <40>; 165 gpmc,cs-rd-off-ns = <40>;
159 gpmc,cs-wr-off-ns = <40>; 166 gpmc,cs-wr-off-ns = <40>;
160 gpmc,adv-on-ns = <0>; 167 gpmc,adv-on-ns = <0>;
161 gpmc,adv-rd-off-ns = <25>; 168 gpmc,adv-rd-off-ns = <25>;
162 gpmc,adv-wr-off-ns = <25>; 169 gpmc,adv-wr-off-ns = <25>;
163 gpmc,we-on-ns = <0>; 170 gpmc,we-on-ns = <0>;
164 gpmc,we-off-ns = <20>; 171 gpmc,we-off-ns = <20>;
165 gpmc,oe-on-ns = <3>; 172 gpmc,oe-on-ns = <3>;
166 gpmc,oe-off-ns = <30>; 173 gpmc,oe-off-ns = <30>;
167 gpmc,access-ns = <30>; 174 gpmc,access-ns = <30>;
168 gpmc,rd-cycle-ns = <40>; 175 gpmc,rd-cycle-ns = <40>;
169 gpmc,wr-cycle-ns = <40>; 176 gpmc,wr-cycle-ns = <40>;
170 gpmc,wait-pin = <0>; 177 gpmc,wait-pin = <0>;
171 gpmc,bus-turnaround-ns = <0>; 178 gpmc,bus-turnaround-ns = <0>;
172 gpmc,cycle2cycle-delay-ns = <0>; 179 gpmc,cycle2cycle-delay-ns = <0>;
173 gpmc,clk-activation-ns = <0>; 180 gpmc,clk-activation-ns = <0>;
174 gpmc,wait-monitoring-ns = <0>; 181 gpmc,wait-monitoring-ns = <0>;
175 gpmc,wr-access-ns = <40>; 182 gpmc,wr-access-ns = <40>;
176 gpmc,wr-data-mux-bus-ns = <0>; 183 gpmc,wr-data-mux-bus-ns = <0>;
177 /* MTD partition table */ 184 /* MTD partition table */
178 /* All SPL-* partitions are sized to minimal length 185 /* All SPL-* partitions are sized to minimal length
179 * which can be independently programmable. For 186 * which can be independently programmable. For
180 * NAND flash this is equal to size of erase-block 187 * NAND flash this is equal to size of erase-block
181 */ 188 */
182 #address-cells = <1>; 189 #address-cells = <1>;
183 #size-cells = <1>; 190 #size-cells = <1>;
184 191
185 nand-on-flash-bbt; 192 nand-on-flash-bbt;
186 /* MT29F2G16ABAFAWP - 256MB */ 193 /* MT29F2G16ABAFAWP - 256MB */
187 partition@0 { 194 partition@0 {
188 label = "u-boot"; 195 label = "u-boot";
189 reg = <0x0 0x100000>; 196 reg = <0x0 0x100000>;
190 read-only; 197 read-only;
191 }; 198 };
192 199
193 partition@100000 { 200 partition@100000 {
194 label = "params"; 201 label = "params";
195 reg = <0x100000 0x80000>; 202 reg = <0x100000 0x80000>;
196 }; 203 };
197 204
198 partition@180000 { 205 partition@180000 {
199 label = "ubifs"; 206 label = "ubifs";
200 reg = <0x180000 0xfe80000>; 207 reg = <0x180000 0xfe80000>;
201 }; 208 };
202 }; 209 };
203 }; 210 };
204 211
205 &uart0 { 212 &uart0 {
206 pinctrl-names = "default"; 213 pinctrl-names = "default";
207 pinctrl-0 = <&uart0_pins>; 214 pinctrl-0 = <&uart0_pins>;
208 status = "okay"; 215 status = "okay";
209 }; 216 };
210 217
211 &dcan0 { 218 &dcan0 {
212 pinctrl-names = "default"; 219 pinctrl-names = "default";
213 pinctrl-0 = <&dcan0_pins>; 220 pinctrl-0 = <&dcan0_pins>;
214 status = "okay"; 221 status = "okay";
215 }; 222 };
216 223
217 &dcan1 { 224 &dcan1 {
218 pinctrl-names = "default"; 225 pinctrl-names = "default";
219 pinctrl-0 = <&dcan1_pins>; 226 pinctrl-0 = <&dcan1_pins>;
220 status = "okay"; 227 status = "okay";
221 }; 228 };
222 229
223 &i2c0 { 230 &i2c0 {
224 pinctrl-names = "default"; 231 pinctrl-names = "default";
225 pinctrl-0 = <&i2c0_pins>; 232 pinctrl-0 = <&i2c0_pins>;
226 status = "okay"; 233 status = "okay";
227 234
228 eeprom@50 { 235 eeprom@50 {
229 compatible = "at,24c1024"; 236 compatible = "at,24c1024";
230 reg = <0x50>; 237 reg = <0x50>;
231 }; 238 };
232 }; 239 };
233 240
234 &mmc0 { 241 &mmc0 {
235 pinctrl-names = "default"; 242 pinctrl-names = "default";
236 pinctrl-0 = <&mmc0_pins>; 243 pinctrl-0 = <&mmc0_pins>;
237 vmmc-supply = <&mmc0_reg>; 244 vmmc-supply = <&mmc0_reg>;
238 status = "okay"; 245 status = "okay";
239 }; 246 };
240 247
241 &mmc1 { 248 &mmc1 {
242 pinctrl-names = "default"; 249 pinctrl-names = "default";
243 pinctrl-0 = <&mmc1_pins>; 250 pinctrl-0 = <&mmc1_pins>;
244 vmmc-supply = <&mmc1_reg>; 251 vmmc-supply = <&mmc1_reg>;
245 status = "okay"; 252 status = "okay";
246 }; 253 };
247 254
248 &spi1 { 255 &spi1 {
249 pinctrl-names = "default"; 256 pinctrl-names = "default";
250 pinctrl-0 = <&spi1_pins>; 257 pinctrl-0 = <&spi1_pins>;
251 status = "okay"; 258 status = "okay";
252 259
253 spi_nor: flash@0 { 260 spi_nor: flash@0 {
254 #address-cells = <1>; 261 #address-cells = <1>;
255 #size-cells = <1>; 262 #size-cells = <1>;
256 compatible = "jedec,spi-nor"; 263 compatible = "jedec,spi-nor";
257 spi-max-frequency = <5000000>; 264 spi-max-frequency = <5000000>;
258 m25p,fast-read; 265 m25p,fast-read;
259 reg = <0>; 266 reg = <0>;
260 267
261 partition@0 { 268 partition@0 {
262 label = "u-boot-spl"; 269 label = "u-boot-spl";
263 reg = <0x0 0x80000>; 270 reg = <0x0 0x80000>;
264 read-only; 271 read-only;
265 }; 272 };
266 273
267 partition@1 { 274 partition@1 {
268 label = "misc"; 275 label = "misc";
269 reg = <0x80000 0xf80000>; 276 reg = <0x80000 0xf80000>;
270 }; 277 };
271 }; 278 };
272 }; 279 };
273 280
274 &keystone_usb0 { 281 &keystone_usb0 {
275 status = "okay"; 282 status = "okay";
276 }; 283 };
277 284
278 &usb0_phy { 285 &usb0_phy {
279 status = "okay"; 286 status = "okay";
280 }; 287 };
281 288
282 &usb0 { 289 &usb0 {
283 dr_mode = "host"; 290 dr_mode = "host";
284 status = "okay"; 291 status = "okay";
285 }; 292 };
286 293