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Commit 9e5cee313366d72939f6991ef0a265c8c8da6404

Authored by Daniel Mack
Committed by Jiri Slaby
1 parent 109275a6d6
Exists in ti-linux-3.12.y and in 2 other branches newt-ti-linux-3.12.y, smarc-ti-linux-3.12.y

ASoC: adau1701: fix adau1701_reg_read() 

commit 3ad80b828b2533f37c221e2df155774efd6ed814 upstream.

Fix a long standing bug in the read register routing of adau1701.
The bytes arrive in the buffer in big-endian, so the result has to be
shifted before and-ing the bytes in the loop.

Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>

Showing 1 changed file with 4 additions and 2 deletions Inline Diff

sound/soc/codecs/adau1701.c
Diff comments   View file @ 9e5cee3
1 /* 1 /*
2 * Driver for ADAU1701 SigmaDSP processor 2 * Driver for ADAU1701 SigmaDSP processor
3 * 3 *
4 * Copyright 2011 Analog Devices Inc. 4 * Copyright 2011 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de> 5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 * based on an inital version by Cliff Cai <cliff.cai@analog.com> 6 * based on an inital version by Cliff Cai <cliff.cai@analog.com>
7 * 7 *
8 * Licensed under the GPL-2 or later. 8 * Licensed under the GPL-2 or later.
9 */ 9 */
10 10
11 #include <linux/module.h> 11 #include <linux/module.h>
12 #include <linux/init.h> 12 #include <linux/init.h>
13 #include <linux/i2c.h> 13 #include <linux/i2c.h>
14 #include <linux/delay.h> 14 #include <linux/delay.h>
15 #include <linux/slab.h> 15 #include <linux/slab.h>
16 #include <linux/of.h> 16 #include <linux/of.h>
17 #include <linux/of_gpio.h> 17 #include <linux/of_gpio.h>
18 #include <linux/of_device.h> 18 #include <linux/of_device.h>
19 #include <linux/regmap.h> 19 #include <linux/regmap.h>
20 #include <sound/core.h> 20 #include <sound/core.h>
21 #include <sound/pcm.h> 21 #include <sound/pcm.h>
22 #include <sound/pcm_params.h> 22 #include <sound/pcm_params.h>
23 #include <sound/soc.h> 23 #include <sound/soc.h>
24 24
25 #include "sigmadsp.h" 25 #include "sigmadsp.h"
26 #include "adau1701.h" 26 #include "adau1701.h"
27 27
28 #define ADAU1701_DSPCTRL 0x081c 28 #define ADAU1701_DSPCTRL 0x081c
29 #define ADAU1701_SEROCTL 0x081e 29 #define ADAU1701_SEROCTL 0x081e
30 #define ADAU1701_SERICTL 0x081f 30 #define ADAU1701_SERICTL 0x081f
31 31
32 #define ADAU1701_AUXNPOW 0x0822 32 #define ADAU1701_AUXNPOW 0x0822
33 #define ADAU1701_PINCONF_0 0x0820 33 #define ADAU1701_PINCONF_0 0x0820
34 #define ADAU1701_PINCONF_1 0x0821 34 #define ADAU1701_PINCONF_1 0x0821
35 #define ADAU1701_AUXNPOW 0x0822 35 #define ADAU1701_AUXNPOW 0x0822
36 36
37 #define ADAU1701_OSCIPOW 0x0826 37 #define ADAU1701_OSCIPOW 0x0826
38 #define ADAU1701_DACSET 0x0827 38 #define ADAU1701_DACSET 0x0827
39 39
40 #define ADAU1701_MAX_REGISTER 0x0828 40 #define ADAU1701_MAX_REGISTER 0x0828
41 41
42 #define ADAU1701_DSPCTRL_CR (1 << 2) 42 #define ADAU1701_DSPCTRL_CR (1 << 2)
43 #define ADAU1701_DSPCTRL_DAM (1 << 3) 43 #define ADAU1701_DSPCTRL_DAM (1 << 3)
44 #define ADAU1701_DSPCTRL_ADM (1 << 4) 44 #define ADAU1701_DSPCTRL_ADM (1 << 4)
45 #define ADAU1701_DSPCTRL_SR_48 0x00 45 #define ADAU1701_DSPCTRL_SR_48 0x00
46 #define ADAU1701_DSPCTRL_SR_96 0x01 46 #define ADAU1701_DSPCTRL_SR_96 0x01
47 #define ADAU1701_DSPCTRL_SR_192 0x02 47 #define ADAU1701_DSPCTRL_SR_192 0x02
48 #define ADAU1701_DSPCTRL_SR_MASK 0x03 48 #define ADAU1701_DSPCTRL_SR_MASK 0x03
49 49
50 #define ADAU1701_SEROCTL_INV_LRCLK 0x2000 50 #define ADAU1701_SEROCTL_INV_LRCLK 0x2000
51 #define ADAU1701_SEROCTL_INV_BCLK 0x1000 51 #define ADAU1701_SEROCTL_INV_BCLK 0x1000
52 #define ADAU1701_SEROCTL_MASTER 0x0800 52 #define ADAU1701_SEROCTL_MASTER 0x0800
53 53
54 #define ADAU1701_SEROCTL_OBF16 0x0000 54 #define ADAU1701_SEROCTL_OBF16 0x0000
55 #define ADAU1701_SEROCTL_OBF8 0x0200 55 #define ADAU1701_SEROCTL_OBF8 0x0200
56 #define ADAU1701_SEROCTL_OBF4 0x0400 56 #define ADAU1701_SEROCTL_OBF4 0x0400
57 #define ADAU1701_SEROCTL_OBF2 0x0600 57 #define ADAU1701_SEROCTL_OBF2 0x0600
58 #define ADAU1701_SEROCTL_OBF_MASK 0x0600 58 #define ADAU1701_SEROCTL_OBF_MASK 0x0600
59 59
60 #define ADAU1701_SEROCTL_OLF1024 0x0000 60 #define ADAU1701_SEROCTL_OLF1024 0x0000
61 #define ADAU1701_SEROCTL_OLF512 0x0080 61 #define ADAU1701_SEROCTL_OLF512 0x0080
62 #define ADAU1701_SEROCTL_OLF256 0x0100 62 #define ADAU1701_SEROCTL_OLF256 0x0100
63 #define ADAU1701_SEROCTL_OLF_MASK 0x0180 63 #define ADAU1701_SEROCTL_OLF_MASK 0x0180
64 64
65 #define ADAU1701_SEROCTL_MSB_DEALY1 0x0000 65 #define ADAU1701_SEROCTL_MSB_DEALY1 0x0000
66 #define ADAU1701_SEROCTL_MSB_DEALY0 0x0004 66 #define ADAU1701_SEROCTL_MSB_DEALY0 0x0004
67 #define ADAU1701_SEROCTL_MSB_DEALY8 0x0008 67 #define ADAU1701_SEROCTL_MSB_DEALY8 0x0008
68 #define ADAU1701_SEROCTL_MSB_DEALY12 0x000c 68 #define ADAU1701_SEROCTL_MSB_DEALY12 0x000c
69 #define ADAU1701_SEROCTL_MSB_DEALY16 0x0010 69 #define ADAU1701_SEROCTL_MSB_DEALY16 0x0010
70 #define ADAU1701_SEROCTL_MSB_DEALY_MASK 0x001c 70 #define ADAU1701_SEROCTL_MSB_DEALY_MASK 0x001c
71 71
72 #define ADAU1701_SEROCTL_WORD_LEN_24 0x0000 72 #define ADAU1701_SEROCTL_WORD_LEN_24 0x0000
73 #define ADAU1701_SEROCTL_WORD_LEN_20 0x0001 73 #define ADAU1701_SEROCTL_WORD_LEN_20 0x0001
74 #define ADAU1701_SEROCTL_WORD_LEN_16 0x0002 74 #define ADAU1701_SEROCTL_WORD_LEN_16 0x0002
75 #define ADAU1701_SEROCTL_WORD_LEN_MASK 0x0003 75 #define ADAU1701_SEROCTL_WORD_LEN_MASK 0x0003
76 76
77 #define ADAU1701_AUXNPOW_VBPD 0x40 77 #define ADAU1701_AUXNPOW_VBPD 0x40
78 #define ADAU1701_AUXNPOW_VRPD 0x20 78 #define ADAU1701_AUXNPOW_VRPD 0x20
79 79
80 #define ADAU1701_SERICTL_I2S 0 80 #define ADAU1701_SERICTL_I2S 0
81 #define ADAU1701_SERICTL_LEFTJ 1 81 #define ADAU1701_SERICTL_LEFTJ 1
82 #define ADAU1701_SERICTL_TDM 2 82 #define ADAU1701_SERICTL_TDM 2
83 #define ADAU1701_SERICTL_RIGHTJ_24 3 83 #define ADAU1701_SERICTL_RIGHTJ_24 3
84 #define ADAU1701_SERICTL_RIGHTJ_20 4 84 #define ADAU1701_SERICTL_RIGHTJ_20 4
85 #define ADAU1701_SERICTL_RIGHTJ_18 5 85 #define ADAU1701_SERICTL_RIGHTJ_18 5
86 #define ADAU1701_SERICTL_RIGHTJ_16 6 86 #define ADAU1701_SERICTL_RIGHTJ_16 6
87 #define ADAU1701_SERICTL_MODE_MASK 7 87 #define ADAU1701_SERICTL_MODE_MASK 7
88 #define ADAU1701_SERICTL_INV_BCLK BIT(3) 88 #define ADAU1701_SERICTL_INV_BCLK BIT(3)
89 #define ADAU1701_SERICTL_INV_LRCLK BIT(4) 89 #define ADAU1701_SERICTL_INV_LRCLK BIT(4)
90 90
91 #define ADAU1701_OSCIPOW_OPD 0x04 91 #define ADAU1701_OSCIPOW_OPD 0x04
92 #define ADAU1701_DACSET_DACINIT 1 92 #define ADAU1701_DACSET_DACINIT 1
93 93
94 #define ADAU1707_CLKDIV_UNSET (-1U) 94 #define ADAU1707_CLKDIV_UNSET (-1U)
95 95
96 #define ADAU1701_FIRMWARE "adau1701.bin" 96 #define ADAU1701_FIRMWARE "adau1701.bin"
97 97
98 struct adau1701 { 98 struct adau1701 {
99 int gpio_nreset; 99 int gpio_nreset;
100 int gpio_pll_mode[2]; 100 int gpio_pll_mode[2];
101 unsigned int dai_fmt; 101 unsigned int dai_fmt;
102 unsigned int pll_clkdiv; 102 unsigned int pll_clkdiv;
103 unsigned int sysclk; 103 unsigned int sysclk;
104 struct regmap *regmap; 104 struct regmap *regmap;
105 u8 pin_config[12]; 105 u8 pin_config[12];
106 }; 106 };
107 107
108 static const struct snd_kcontrol_new adau1701_controls[] = { 108 static const struct snd_kcontrol_new adau1701_controls[] = {
109 SOC_SINGLE("Master Capture Switch", ADAU1701_DSPCTRL, 4, 1, 0), 109 SOC_SINGLE("Master Capture Switch", ADAU1701_DSPCTRL, 4, 1, 0),
110 }; 110 };
111 111
112 static const struct snd_soc_dapm_widget adau1701_dapm_widgets[] = { 112 static const struct snd_soc_dapm_widget adau1701_dapm_widgets[] = {
113 SND_SOC_DAPM_DAC("DAC0", "Playback", ADAU1701_AUXNPOW, 3, 1), 113 SND_SOC_DAPM_DAC("DAC0", "Playback", ADAU1701_AUXNPOW, 3, 1),
114 SND_SOC_DAPM_DAC("DAC1", "Playback", ADAU1701_AUXNPOW, 2, 1), 114 SND_SOC_DAPM_DAC("DAC1", "Playback", ADAU1701_AUXNPOW, 2, 1),
115 SND_SOC_DAPM_DAC("DAC2", "Playback", ADAU1701_AUXNPOW, 1, 1), 115 SND_SOC_DAPM_DAC("DAC2", "Playback", ADAU1701_AUXNPOW, 1, 1),
116 SND_SOC_DAPM_DAC("DAC3", "Playback", ADAU1701_AUXNPOW, 0, 1), 116 SND_SOC_DAPM_DAC("DAC3", "Playback", ADAU1701_AUXNPOW, 0, 1),
117 SND_SOC_DAPM_ADC("ADC", "Capture", ADAU1701_AUXNPOW, 7, 1), 117 SND_SOC_DAPM_ADC("ADC", "Capture", ADAU1701_AUXNPOW, 7, 1),
118 118
119 SND_SOC_DAPM_OUTPUT("OUT0"), 119 SND_SOC_DAPM_OUTPUT("OUT0"),
120 SND_SOC_DAPM_OUTPUT("OUT1"), 120 SND_SOC_DAPM_OUTPUT("OUT1"),
121 SND_SOC_DAPM_OUTPUT("OUT2"), 121 SND_SOC_DAPM_OUTPUT("OUT2"),
122 SND_SOC_DAPM_OUTPUT("OUT3"), 122 SND_SOC_DAPM_OUTPUT("OUT3"),
123 SND_SOC_DAPM_INPUT("IN0"), 123 SND_SOC_DAPM_INPUT("IN0"),
124 SND_SOC_DAPM_INPUT("IN1"), 124 SND_SOC_DAPM_INPUT("IN1"),
125 }; 125 };
126 126
127 static const struct snd_soc_dapm_route adau1701_dapm_routes[] = { 127 static const struct snd_soc_dapm_route adau1701_dapm_routes[] = {
128 { "OUT0", NULL, "DAC0" }, 128 { "OUT0", NULL, "DAC0" },
129 { "OUT1", NULL, "DAC1" }, 129 { "OUT1", NULL, "DAC1" },
130 { "OUT2", NULL, "DAC2" }, 130 { "OUT2", NULL, "DAC2" },
131 { "OUT3", NULL, "DAC3" }, 131 { "OUT3", NULL, "DAC3" },
132 132
133 { "ADC", NULL, "IN0" }, 133 { "ADC", NULL, "IN0" },
134 { "ADC", NULL, "IN1" }, 134 { "ADC", NULL, "IN1" },
135 }; 135 };
136 136
137 static unsigned int adau1701_register_size(struct device *dev, 137 static unsigned int adau1701_register_size(struct device *dev,
138 unsigned int reg) 138 unsigned int reg)
139 { 139 {
140 switch (reg) { 140 switch (reg) {
141 case ADAU1701_PINCONF_0: 141 case ADAU1701_PINCONF_0:
142 case ADAU1701_PINCONF_1: 142 case ADAU1701_PINCONF_1:
143 return 3; 143 return 3;
144 case ADAU1701_DSPCTRL: 144 case ADAU1701_DSPCTRL:
145 case ADAU1701_SEROCTL: 145 case ADAU1701_SEROCTL:
146 case ADAU1701_AUXNPOW: 146 case ADAU1701_AUXNPOW:
147 case ADAU1701_OSCIPOW: 147 case ADAU1701_OSCIPOW:
148 case ADAU1701_DACSET: 148 case ADAU1701_DACSET:
149 return 2; 149 return 2;
150 case ADAU1701_SERICTL: 150 case ADAU1701_SERICTL:
151 return 1; 151 return 1;
152 } 152 }
153 153
154 dev_err(dev, "Unsupported register address: %d\n", reg); 154 dev_err(dev, "Unsupported register address: %d\n", reg);
155 return 0; 155 return 0;
156 } 156 }
157 157
158 static bool adau1701_volatile_reg(struct device *dev, unsigned int reg) 158 static bool adau1701_volatile_reg(struct device *dev, unsigned int reg)
159 { 159 {
160 switch (reg) { 160 switch (reg) {
161 case ADAU1701_DACSET: 161 case ADAU1701_DACSET:
162 return true; 162 return true;
163 default: 163 default:
164 return false; 164 return false;
165 } 165 }
166 } 166 }
167 167
168 static int adau1701_reg_write(void *context, unsigned int reg, 168 static int adau1701_reg_write(void *context, unsigned int reg,
169 unsigned int value) 169 unsigned int value)
170 { 170 {
171 struct i2c_client *client = context; 171 struct i2c_client *client = context;
172 unsigned int i; 172 unsigned int i;
173 unsigned int size; 173 unsigned int size;
174 uint8_t buf[5]; 174 uint8_t buf[5];
175 int ret; 175 int ret;
176 176
177 size = adau1701_register_size(&client->dev, reg); 177 size = adau1701_register_size(&client->dev, reg);
178 if (size == 0) 178 if (size == 0)
179 return -EINVAL; 179 return -EINVAL;
180 180
181 buf[0] = reg >> 8; 181 buf[0] = reg >> 8;
182 buf[1] = reg & 0xff; 182 buf[1] = reg & 0xff;
183 183
184 for (i = size + 1; i >= 2; --i) { 184 for (i = size + 1; i >= 2; --i) {
185 buf[i] = value; 185 buf[i] = value;
186 value >>= 8; 186 value >>= 8;
187 } 187 }
188 188
189 ret = i2c_master_send(client, buf, size + 2); 189 ret = i2c_master_send(client, buf, size + 2);
190 if (ret == size + 2) 190 if (ret == size + 2)
191 return 0; 191 return 0;
192 else if (ret < 0) 192 else if (ret < 0)
193 return ret; 193 return ret;
194 else 194 else
195 return -EIO; 195 return -EIO;
196 } 196 }
197 197
198 static int adau1701_reg_read(void *context, unsigned int reg, 198 static int adau1701_reg_read(void *context, unsigned int reg,
199 unsigned int *value) 199 unsigned int *value)
200 { 200 {
201 int ret; 201 int ret;
202 unsigned int i; 202 unsigned int i;
203 unsigned int size; 203 unsigned int size;
204 uint8_t send_buf[2], recv_buf[3]; 204 uint8_t send_buf[2], recv_buf[3];
205 struct i2c_client *client = context; 205 struct i2c_client *client = context;
206 struct i2c_msg msgs[2]; 206 struct i2c_msg msgs[2];
207 207
208 size = adau1701_register_size(&client->dev, reg); 208 size = adau1701_register_size(&client->dev, reg);
209 if (size == 0) 209 if (size == 0)
210 return -EINVAL; 210 return -EINVAL;
211 211
212 send_buf[0] = reg >> 8; 212 send_buf[0] = reg >> 8;
213 send_buf[1] = reg & 0xff; 213 send_buf[1] = reg & 0xff;
214 214
215 msgs[0].addr = client->addr; 215 msgs[0].addr = client->addr;
216 msgs[0].len = sizeof(send_buf); 216 msgs[0].len = sizeof(send_buf);
217 msgs[0].buf = send_buf; 217 msgs[0].buf = send_buf;
218 msgs[0].flags = 0; 218 msgs[0].flags = 0;
219 219
220 msgs[1].addr = client->addr; 220 msgs[1].addr = client->addr;
221 msgs[1].len = size; 221 msgs[1].len = size;
222 msgs[1].buf = recv_buf; 222 msgs[1].buf = recv_buf;
223 msgs[1].flags = I2C_M_RD; 223 msgs[1].flags = I2C_M_RD;
224 224
225 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 225 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
226 if (ret < 0) 226 if (ret < 0)
227 return ret; 227 return ret;
228 else if (ret != ARRAY_SIZE(msgs)) 228 else if (ret != ARRAY_SIZE(msgs))
229 return -EIO; 229 return -EIO;
230 230
231 *value = 0; 231 *value = 0;
232 232
233 for (i = 0; i < size; i++) 233 for (i = 0; i < size; i++) {
234 *value |= recv_buf[i] << (i * 8); 234 *value <<= 8;
235 *value |= recv_buf[i];
236 }
235 237
236 return 0; 238 return 0;
237 } 239 }
238 240
239 static int adau1701_reset(struct snd_soc_codec *codec, unsigned int clkdiv) 241 static int adau1701_reset(struct snd_soc_codec *codec, unsigned int clkdiv)
240 { 242 {
241 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); 243 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
242 struct i2c_client *client = to_i2c_client(codec->dev); 244 struct i2c_client *client = to_i2c_client(codec->dev);
243 int ret; 245 int ret;
244 246
245 if (clkdiv != ADAU1707_CLKDIV_UNSET && 247 if (clkdiv != ADAU1707_CLKDIV_UNSET &&
246 gpio_is_valid(adau1701->gpio_pll_mode[0]) && 248 gpio_is_valid(adau1701->gpio_pll_mode[0]) &&
247 gpio_is_valid(adau1701->gpio_pll_mode[1])) { 249 gpio_is_valid(adau1701->gpio_pll_mode[1])) {
248 switch (clkdiv) { 250 switch (clkdiv) {
249 case 64: 251 case 64:
250 gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 0); 252 gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 0);
251 gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 0); 253 gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 0);
252 break; 254 break;
253 case 256: 255 case 256:
254 gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 0); 256 gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 0);
255 gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 1); 257 gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 1);
256 break; 258 break;
257 case 384: 259 case 384:
258 gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 1); 260 gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 1);
259 gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 0); 261 gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 0);
260 break; 262 break;
261 case 0: /* fallback */ 263 case 0: /* fallback */
262 case 512: 264 case 512:
263 gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 1); 265 gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 1);
264 gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 1); 266 gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 1);
265 break; 267 break;
266 } 268 }
267 } 269 }
268 270
269 adau1701->pll_clkdiv = clkdiv; 271 adau1701->pll_clkdiv = clkdiv;
270 272
271 if (gpio_is_valid(adau1701->gpio_nreset)) { 273 if (gpio_is_valid(adau1701->gpio_nreset)) {
272 gpio_set_value_cansleep(adau1701->gpio_nreset, 0); 274 gpio_set_value_cansleep(adau1701->gpio_nreset, 0);
273 /* minimum reset time is 20ns */ 275 /* minimum reset time is 20ns */
274 udelay(1); 276 udelay(1);
275 gpio_set_value_cansleep(adau1701->gpio_nreset, 1); 277 gpio_set_value_cansleep(adau1701->gpio_nreset, 1);
276 /* power-up time may be as long as 85ms */ 278 /* power-up time may be as long as 85ms */
277 mdelay(85); 279 mdelay(85);
278 } 280 }
279 281
280 /* 282 /*
281 * Postpone the firmware download to a point in time when we 283 * Postpone the firmware download to a point in time when we
282 * know the correct PLL setup 284 * know the correct PLL setup
283 */ 285 */
284 if (clkdiv != ADAU1707_CLKDIV_UNSET) { 286 if (clkdiv != ADAU1707_CLKDIV_UNSET) {
285 ret = process_sigma_firmware(client, ADAU1701_FIRMWARE); 287 ret = process_sigma_firmware(client, ADAU1701_FIRMWARE);
286 if (ret) { 288 if (ret) {
287 dev_warn(codec->dev, "Failed to load firmware\n"); 289 dev_warn(codec->dev, "Failed to load firmware\n");
288 return ret; 290 return ret;
289 } 291 }
290 } 292 }
291 293
292 regmap_write(adau1701->regmap, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT); 294 regmap_write(adau1701->regmap, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT);
293 regmap_write(adau1701->regmap, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR); 295 regmap_write(adau1701->regmap, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR);
294 296
295 regcache_mark_dirty(adau1701->regmap); 297 regcache_mark_dirty(adau1701->regmap);
296 regcache_sync(adau1701->regmap); 298 regcache_sync(adau1701->regmap);
297 299
298 return 0; 300 return 0;
299 } 301 }
300 302
301 static int adau1701_set_capture_pcm_format(struct snd_soc_codec *codec, 303 static int adau1701_set_capture_pcm_format(struct snd_soc_codec *codec,
302 snd_pcm_format_t format) 304 snd_pcm_format_t format)
303 { 305 {
304 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); 306 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
305 unsigned int mask = ADAU1701_SEROCTL_WORD_LEN_MASK; 307 unsigned int mask = ADAU1701_SEROCTL_WORD_LEN_MASK;
306 unsigned int val; 308 unsigned int val;
307 309
308 switch (format) { 310 switch (format) {
309 case SNDRV_PCM_FORMAT_S16_LE: 311 case SNDRV_PCM_FORMAT_S16_LE:
310 val = ADAU1701_SEROCTL_WORD_LEN_16; 312 val = ADAU1701_SEROCTL_WORD_LEN_16;
311 break; 313 break;
312 case SNDRV_PCM_FORMAT_S20_3LE: 314 case SNDRV_PCM_FORMAT_S20_3LE:
313 val = ADAU1701_SEROCTL_WORD_LEN_20; 315 val = ADAU1701_SEROCTL_WORD_LEN_20;
314 break; 316 break;
315 case SNDRV_PCM_FORMAT_S24_LE: 317 case SNDRV_PCM_FORMAT_S24_LE:
316 val = ADAU1701_SEROCTL_WORD_LEN_24; 318 val = ADAU1701_SEROCTL_WORD_LEN_24;
317 break; 319 break;
318 default: 320 default:
319 return -EINVAL; 321 return -EINVAL;
320 } 322 }
321 323
322 if (adau1701->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) { 324 if (adau1701->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) {
323 switch (format) { 325 switch (format) {
324 case SNDRV_PCM_FORMAT_S16_LE: 326 case SNDRV_PCM_FORMAT_S16_LE:
325 val |= ADAU1701_SEROCTL_MSB_DEALY16; 327 val |= ADAU1701_SEROCTL_MSB_DEALY16;
326 break; 328 break;
327 case SNDRV_PCM_FORMAT_S20_3LE: 329 case SNDRV_PCM_FORMAT_S20_3LE:
328 val |= ADAU1701_SEROCTL_MSB_DEALY12; 330 val |= ADAU1701_SEROCTL_MSB_DEALY12;
329 break; 331 break;
330 case SNDRV_PCM_FORMAT_S24_LE: 332 case SNDRV_PCM_FORMAT_S24_LE:
331 val |= ADAU1701_SEROCTL_MSB_DEALY8; 333 val |= ADAU1701_SEROCTL_MSB_DEALY8;
332 break; 334 break;
333 } 335 }
334 mask |= ADAU1701_SEROCTL_MSB_DEALY_MASK; 336 mask |= ADAU1701_SEROCTL_MSB_DEALY_MASK;
335 } 337 }
336 338
337 regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, mask, val); 339 regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, mask, val);
338 340
339 return 0; 341 return 0;
340 } 342 }
341 343
342 static int adau1701_set_playback_pcm_format(struct snd_soc_codec *codec, 344 static int adau1701_set_playback_pcm_format(struct snd_soc_codec *codec,
343 snd_pcm_format_t format) 345 snd_pcm_format_t format)
344 { 346 {
345 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); 347 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
346 unsigned int val; 348 unsigned int val;
347 349
348 if (adau1701->dai_fmt != SND_SOC_DAIFMT_RIGHT_J) 350 if (adau1701->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
349 return 0; 351 return 0;
350 352
351 switch (format) { 353 switch (format) {
352 case SNDRV_PCM_FORMAT_S16_LE: 354 case SNDRV_PCM_FORMAT_S16_LE:
353 val = ADAU1701_SERICTL_RIGHTJ_16; 355 val = ADAU1701_SERICTL_RIGHTJ_16;
354 break; 356 break;
355 case SNDRV_PCM_FORMAT_S20_3LE: 357 case SNDRV_PCM_FORMAT_S20_3LE:
356 val = ADAU1701_SERICTL_RIGHTJ_20; 358 val = ADAU1701_SERICTL_RIGHTJ_20;
357 break; 359 break;
358 case SNDRV_PCM_FORMAT_S24_LE: 360 case SNDRV_PCM_FORMAT_S24_LE:
359 val = ADAU1701_SERICTL_RIGHTJ_24; 361 val = ADAU1701_SERICTL_RIGHTJ_24;
360 break; 362 break;
361 default: 363 default:
362 return -EINVAL; 364 return -EINVAL;
363 } 365 }
364 366
365 regmap_update_bits(adau1701->regmap, ADAU1701_SERICTL, 367 regmap_update_bits(adau1701->regmap, ADAU1701_SERICTL,
366 ADAU1701_SERICTL_MODE_MASK, val); 368 ADAU1701_SERICTL_MODE_MASK, val);
367 369
368 return 0; 370 return 0;
369 } 371 }
370 372
371 static int adau1701_hw_params(struct snd_pcm_substream *substream, 373 static int adau1701_hw_params(struct snd_pcm_substream *substream,
372 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 374 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
373 { 375 {
374 struct snd_soc_codec *codec = dai->codec; 376 struct snd_soc_codec *codec = dai->codec;
375 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); 377 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
376 unsigned int clkdiv = adau1701->sysclk / params_rate(params); 378 unsigned int clkdiv = adau1701->sysclk / params_rate(params);
377 snd_pcm_format_t format; 379 snd_pcm_format_t format;
378 unsigned int val; 380 unsigned int val;
379 int ret; 381 int ret;
380 382
381 /* 383 /*
382 * If the mclk/lrclk ratio changes, the chip needs updated PLL 384 * If the mclk/lrclk ratio changes, the chip needs updated PLL
383 * mode GPIO settings, and a full reset cycle, including a new 385 * mode GPIO settings, and a full reset cycle, including a new
384 * firmware upload. 386 * firmware upload.
385 */ 387 */
386 if (clkdiv != adau1701->pll_clkdiv) { 388 if (clkdiv != adau1701->pll_clkdiv) {
387 ret = adau1701_reset(codec, clkdiv); 389 ret = adau1701_reset(codec, clkdiv);
388 if (ret < 0) 390 if (ret < 0)
389 return ret; 391 return ret;
390 } 392 }
391 393
392 switch (params_rate(params)) { 394 switch (params_rate(params)) {
393 case 192000: 395 case 192000:
394 val = ADAU1701_DSPCTRL_SR_192; 396 val = ADAU1701_DSPCTRL_SR_192;
395 break; 397 break;
396 case 96000: 398 case 96000:
397 val = ADAU1701_DSPCTRL_SR_96; 399 val = ADAU1701_DSPCTRL_SR_96;
398 break; 400 break;
399 case 48000: 401 case 48000:
400 val = ADAU1701_DSPCTRL_SR_48; 402 val = ADAU1701_DSPCTRL_SR_48;
401 break; 403 break;
402 default: 404 default:
403 return -EINVAL; 405 return -EINVAL;
404 } 406 }
405 407
406 regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, 408 regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
407 ADAU1701_DSPCTRL_SR_MASK, val); 409 ADAU1701_DSPCTRL_SR_MASK, val);
408 410
409 format = params_format(params); 411 format = params_format(params);
410 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 412 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
411 return adau1701_set_playback_pcm_format(codec, format); 413 return adau1701_set_playback_pcm_format(codec, format);
412 else 414 else
413 return adau1701_set_capture_pcm_format(codec, format); 415 return adau1701_set_capture_pcm_format(codec, format);
414 } 416 }
415 417
416 static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai, 418 static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai,
417 unsigned int fmt) 419 unsigned int fmt)
418 { 420 {
419 struct snd_soc_codec *codec = codec_dai->codec; 421 struct snd_soc_codec *codec = codec_dai->codec;
420 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); 422 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
421 unsigned int serictl = 0x00, seroctl = 0x00; 423 unsigned int serictl = 0x00, seroctl = 0x00;
422 bool invert_lrclk; 424 bool invert_lrclk;
423 425
424 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 426 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
425 case SND_SOC_DAIFMT_CBM_CFM: 427 case SND_SOC_DAIFMT_CBM_CFM:
426 /* master, 64-bits per sample, 1 frame per sample */ 428 /* master, 64-bits per sample, 1 frame per sample */
427 seroctl |= ADAU1701_SEROCTL_MASTER | ADAU1701_SEROCTL_OBF16 429 seroctl |= ADAU1701_SEROCTL_MASTER | ADAU1701_SEROCTL_OBF16
428 | ADAU1701_SEROCTL_OLF1024; 430 | ADAU1701_SEROCTL_OLF1024;
429 break; 431 break;
430 case SND_SOC_DAIFMT_CBS_CFS: 432 case SND_SOC_DAIFMT_CBS_CFS:
431 break; 433 break;
432 default: 434 default:
433 return -EINVAL; 435 return -EINVAL;
434 } 436 }
435 437
436 /* clock inversion */ 438 /* clock inversion */
437 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 439 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
438 case SND_SOC_DAIFMT_NB_NF: 440 case SND_SOC_DAIFMT_NB_NF:
439 invert_lrclk = false; 441 invert_lrclk = false;
440 break; 442 break;
441 case SND_SOC_DAIFMT_NB_IF: 443 case SND_SOC_DAIFMT_NB_IF:
442 invert_lrclk = true; 444 invert_lrclk = true;
443 break; 445 break;
444 case SND_SOC_DAIFMT_IB_NF: 446 case SND_SOC_DAIFMT_IB_NF:
445 invert_lrclk = false; 447 invert_lrclk = false;
446 serictl |= ADAU1701_SERICTL_INV_BCLK; 448 serictl |= ADAU1701_SERICTL_INV_BCLK;
447 seroctl |= ADAU1701_SEROCTL_INV_BCLK; 449 seroctl |= ADAU1701_SEROCTL_INV_BCLK;
448 break; 450 break;
449 case SND_SOC_DAIFMT_IB_IF: 451 case SND_SOC_DAIFMT_IB_IF:
450 invert_lrclk = true; 452 invert_lrclk = true;
451 serictl |= ADAU1701_SERICTL_INV_BCLK; 453 serictl |= ADAU1701_SERICTL_INV_BCLK;
452 seroctl |= ADAU1701_SEROCTL_INV_BCLK; 454 seroctl |= ADAU1701_SEROCTL_INV_BCLK;
453 break; 455 break;
454 default: 456 default:
455 return -EINVAL; 457 return -EINVAL;
456 } 458 }
457 459
458 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 460 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
459 case SND_SOC_DAIFMT_I2S: 461 case SND_SOC_DAIFMT_I2S:
460 break; 462 break;
461 case SND_SOC_DAIFMT_LEFT_J: 463 case SND_SOC_DAIFMT_LEFT_J:
462 serictl |= ADAU1701_SERICTL_LEFTJ; 464 serictl |= ADAU1701_SERICTL_LEFTJ;
463 seroctl |= ADAU1701_SEROCTL_MSB_DEALY0; 465 seroctl |= ADAU1701_SEROCTL_MSB_DEALY0;
464 invert_lrclk = !invert_lrclk; 466 invert_lrclk = !invert_lrclk;
465 break; 467 break;
466 case SND_SOC_DAIFMT_RIGHT_J: 468 case SND_SOC_DAIFMT_RIGHT_J:
467 serictl |= ADAU1701_SERICTL_RIGHTJ_24; 469 serictl |= ADAU1701_SERICTL_RIGHTJ_24;
468 seroctl |= ADAU1701_SEROCTL_MSB_DEALY8; 470 seroctl |= ADAU1701_SEROCTL_MSB_DEALY8;
469 invert_lrclk = !invert_lrclk; 471 invert_lrclk = !invert_lrclk;
470 break; 472 break;
471 default: 473 default:
472 return -EINVAL; 474 return -EINVAL;
473 } 475 }
474 476
475 if (invert_lrclk) { 477 if (invert_lrclk) {
476 seroctl |= ADAU1701_SEROCTL_INV_LRCLK; 478 seroctl |= ADAU1701_SEROCTL_INV_LRCLK;
477 serictl |= ADAU1701_SERICTL_INV_LRCLK; 479 serictl |= ADAU1701_SERICTL_INV_LRCLK;
478 } 480 }
479 481
480 adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK; 482 adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
481 483
482 regmap_write(adau1701->regmap, ADAU1701_SERICTL, serictl); 484 regmap_write(adau1701->regmap, ADAU1701_SERICTL, serictl);
483 regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, 485 regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL,
484 ~ADAU1701_SEROCTL_WORD_LEN_MASK, seroctl); 486 ~ADAU1701_SEROCTL_WORD_LEN_MASK, seroctl);
485 487
486 return 0; 488 return 0;
487 } 489 }
488 490
489 static int adau1701_set_bias_level(struct snd_soc_codec *codec, 491 static int adau1701_set_bias_level(struct snd_soc_codec *codec,
490 enum snd_soc_bias_level level) 492 enum snd_soc_bias_level level)
491 { 493 {
492 unsigned int mask = ADAU1701_AUXNPOW_VBPD | ADAU1701_AUXNPOW_VRPD; 494 unsigned int mask = ADAU1701_AUXNPOW_VBPD | ADAU1701_AUXNPOW_VRPD;
493 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); 495 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
494 496
495 switch (level) { 497 switch (level) {
496 case SND_SOC_BIAS_ON: 498 case SND_SOC_BIAS_ON:
497 break; 499 break;
498 case SND_SOC_BIAS_PREPARE: 500 case SND_SOC_BIAS_PREPARE:
499 break; 501 break;
500 case SND_SOC_BIAS_STANDBY: 502 case SND_SOC_BIAS_STANDBY:
501 /* Enable VREF and VREF buffer */ 503 /* Enable VREF and VREF buffer */
502 regmap_update_bits(adau1701->regmap, 504 regmap_update_bits(adau1701->regmap,
503 ADAU1701_AUXNPOW, mask, 0x00); 505 ADAU1701_AUXNPOW, mask, 0x00);
504 break; 506 break;
505 case SND_SOC_BIAS_OFF: 507 case SND_SOC_BIAS_OFF:
506 /* Disable VREF and VREF buffer */ 508 /* Disable VREF and VREF buffer */
507 regmap_update_bits(adau1701->regmap, 509 regmap_update_bits(adau1701->regmap,
508 ADAU1701_AUXNPOW, mask, mask); 510 ADAU1701_AUXNPOW, mask, mask);
509 break; 511 break;
510 } 512 }
511 513
512 codec->dapm.bias_level = level; 514 codec->dapm.bias_level = level;
513 return 0; 515 return 0;
514 } 516 }
515 517
516 static int adau1701_digital_mute(struct snd_soc_dai *dai, int mute) 518 static int adau1701_digital_mute(struct snd_soc_dai *dai, int mute)
517 { 519 {
518 struct snd_soc_codec *codec = dai->codec; 520 struct snd_soc_codec *codec = dai->codec;
519 unsigned int mask = ADAU1701_DSPCTRL_DAM; 521 unsigned int mask = ADAU1701_DSPCTRL_DAM;
520 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); 522 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
521 unsigned int val; 523 unsigned int val;
522 524
523 if (mute) 525 if (mute)
524 val = 0; 526 val = 0;
525 else 527 else
526 val = mask; 528 val = mask;
527 529
528 regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, mask, val); 530 regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, mask, val);
529 531
530 return 0; 532 return 0;
531 } 533 }
532 534
533 static int adau1701_set_sysclk(struct snd_soc_codec *codec, int clk_id, 535 static int adau1701_set_sysclk(struct snd_soc_codec *codec, int clk_id,
534 int source, unsigned int freq, int dir) 536 int source, unsigned int freq, int dir)
535 { 537 {
536 unsigned int val; 538 unsigned int val;
537 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); 539 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
538 540
539 switch (clk_id) { 541 switch (clk_id) {
540 case ADAU1701_CLK_SRC_OSC: 542 case ADAU1701_CLK_SRC_OSC:
541 val = 0x0; 543 val = 0x0;
542 break; 544 break;
543 case ADAU1701_CLK_SRC_MCLK: 545 case ADAU1701_CLK_SRC_MCLK:
544 val = ADAU1701_OSCIPOW_OPD; 546 val = ADAU1701_OSCIPOW_OPD;
545 break; 547 break;
546 default: 548 default:
547 return -EINVAL; 549 return -EINVAL;
548 } 550 }
549 551
550 regmap_update_bits(adau1701->regmap, ADAU1701_OSCIPOW, 552 regmap_update_bits(adau1701->regmap, ADAU1701_OSCIPOW,
551 ADAU1701_OSCIPOW_OPD, val); 553 ADAU1701_OSCIPOW_OPD, val);
552 adau1701->sysclk = freq; 554 adau1701->sysclk = freq;
553 555
554 return 0; 556 return 0;
555 } 557 }
556 558
557 #define ADAU1701_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | \ 559 #define ADAU1701_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | \
558 SNDRV_PCM_RATE_192000) 560 SNDRV_PCM_RATE_192000)
559 561
560 #define ADAU1701_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 562 #define ADAU1701_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
561 SNDRV_PCM_FMTBIT_S24_LE) 563 SNDRV_PCM_FMTBIT_S24_LE)
562 564
563 static const struct snd_soc_dai_ops adau1701_dai_ops = { 565 static const struct snd_soc_dai_ops adau1701_dai_ops = {
564 .set_fmt = adau1701_set_dai_fmt, 566 .set_fmt = adau1701_set_dai_fmt,
565 .hw_params = adau1701_hw_params, 567 .hw_params = adau1701_hw_params,
566 .digital_mute = adau1701_digital_mute, 568 .digital_mute = adau1701_digital_mute,
567 }; 569 };
568 570
569 static struct snd_soc_dai_driver adau1701_dai = { 571 static struct snd_soc_dai_driver adau1701_dai = {
570 .name = "adau1701", 572 .name = "adau1701",
571 .playback = { 573 .playback = {
572 .stream_name = "Playback", 574 .stream_name = "Playback",
573 .channels_min = 2, 575 .channels_min = 2,
574 .channels_max = 8, 576 .channels_max = 8,
575 .rates = ADAU1701_RATES, 577 .rates = ADAU1701_RATES,
576 .formats = ADAU1701_FORMATS, 578 .formats = ADAU1701_FORMATS,
577 }, 579 },
578 .capture = { 580 .capture = {
579 .stream_name = "Capture", 581 .stream_name = "Capture",
580 .channels_min = 2, 582 .channels_min = 2,
581 .channels_max = 8, 583 .channels_max = 8,
582 .rates = ADAU1701_RATES, 584 .rates = ADAU1701_RATES,
583 .formats = ADAU1701_FORMATS, 585 .formats = ADAU1701_FORMATS,
584 }, 586 },
585 .ops = &adau1701_dai_ops, 587 .ops = &adau1701_dai_ops,
586 .symmetric_rates = 1, 588 .symmetric_rates = 1,
587 }; 589 };
588 590
589 #ifdef CONFIG_OF 591 #ifdef CONFIG_OF
590 static const struct of_device_id adau1701_dt_ids[] = { 592 static const struct of_device_id adau1701_dt_ids[] = {
591 { .compatible = "adi,adau1701", }, 593 { .compatible = "adi,adau1701", },
592 { } 594 { }
593 }; 595 };
594 MODULE_DEVICE_TABLE(of, adau1701_dt_ids); 596 MODULE_DEVICE_TABLE(of, adau1701_dt_ids);
595 #endif 597 #endif
596 598
597 static int adau1701_probe(struct snd_soc_codec *codec) 599 static int adau1701_probe(struct snd_soc_codec *codec)
598 { 600 {
599 int i, ret; 601 int i, ret;
600 unsigned int val; 602 unsigned int val;
601 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); 603 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
602 604
603 /* 605 /*
604 * Let the pll_clkdiv variable default to something that won't happen 606 * Let the pll_clkdiv variable default to something that won't happen
605 * at runtime. That way, we can postpone the firmware download from 607 * at runtime. That way, we can postpone the firmware download from
606 * adau1701_reset() to a point in time when we know the correct PLL 608 * adau1701_reset() to a point in time when we know the correct PLL
607 * mode parameters. 609 * mode parameters.
608 */ 610 */
609 adau1701->pll_clkdiv = ADAU1707_CLKDIV_UNSET; 611 adau1701->pll_clkdiv = ADAU1707_CLKDIV_UNSET;
610 612
611 /* initalize with pre-configured pll mode settings */ 613 /* initalize with pre-configured pll mode settings */
612 ret = adau1701_reset(codec, adau1701->pll_clkdiv); 614 ret = adau1701_reset(codec, adau1701->pll_clkdiv);
613 if (ret < 0) 615 if (ret < 0)
614 return ret; 616 return ret;
615 617
616 /* set up pin config */ 618 /* set up pin config */
617 val = 0; 619 val = 0;
618 for (i = 0; i < 6; i++) 620 for (i = 0; i < 6; i++)
619 val |= adau1701->pin_config[i] << (i * 4); 621 val |= adau1701->pin_config[i] << (i * 4);
620 622
621 regmap_write(adau1701->regmap, ADAU1701_PINCONF_0, val); 623 regmap_write(adau1701->regmap, ADAU1701_PINCONF_0, val);
622 624
623 val = 0; 625 val = 0;
624 for (i = 0; i < 6; i++) 626 for (i = 0; i < 6; i++)
625 val |= adau1701->pin_config[i + 6] << (i * 4); 627 val |= adau1701->pin_config[i + 6] << (i * 4);
626 628
627 regmap_write(adau1701->regmap, ADAU1701_PINCONF_1, val); 629 regmap_write(adau1701->regmap, ADAU1701_PINCONF_1, val);
628 630
629 return 0; 631 return 0;
630 } 632 }
631 633
632 static struct snd_soc_codec_driver adau1701_codec_drv = { 634 static struct snd_soc_codec_driver adau1701_codec_drv = {
633 .probe = adau1701_probe, 635 .probe = adau1701_probe,
634 .set_bias_level = adau1701_set_bias_level, 636 .set_bias_level = adau1701_set_bias_level,
635 .idle_bias_off = true, 637 .idle_bias_off = true,
636 638
637 .controls = adau1701_controls, 639 .controls = adau1701_controls,
638 .num_controls = ARRAY_SIZE(adau1701_controls), 640 .num_controls = ARRAY_SIZE(adau1701_controls),
639 .dapm_widgets = adau1701_dapm_widgets, 641 .dapm_widgets = adau1701_dapm_widgets,
640 .num_dapm_widgets = ARRAY_SIZE(adau1701_dapm_widgets), 642 .num_dapm_widgets = ARRAY_SIZE(adau1701_dapm_widgets),
641 .dapm_routes = adau1701_dapm_routes, 643 .dapm_routes = adau1701_dapm_routes,
642 .num_dapm_routes = ARRAY_SIZE(adau1701_dapm_routes), 644 .num_dapm_routes = ARRAY_SIZE(adau1701_dapm_routes),
643 645
644 .set_sysclk = adau1701_set_sysclk, 646 .set_sysclk = adau1701_set_sysclk,
645 }; 647 };
646 648
647 static const struct regmap_config adau1701_regmap = { 649 static const struct regmap_config adau1701_regmap = {
648 .reg_bits = 16, 650 .reg_bits = 16,
649 .val_bits = 32, 651 .val_bits = 32,
650 .max_register = ADAU1701_MAX_REGISTER, 652 .max_register = ADAU1701_MAX_REGISTER,
651 .cache_type = REGCACHE_RBTREE, 653 .cache_type = REGCACHE_RBTREE,
652 .volatile_reg = adau1701_volatile_reg, 654 .volatile_reg = adau1701_volatile_reg,
653 .reg_write = adau1701_reg_write, 655 .reg_write = adau1701_reg_write,
654 .reg_read = adau1701_reg_read, 656 .reg_read = adau1701_reg_read,
655 }; 657 };
656 658
657 static int adau1701_i2c_probe(struct i2c_client *client, 659 static int adau1701_i2c_probe(struct i2c_client *client,
658 const struct i2c_device_id *id) 660 const struct i2c_device_id *id)
659 { 661 {
660 struct adau1701 *adau1701; 662 struct adau1701 *adau1701;
661 struct device *dev = &client->dev; 663 struct device *dev = &client->dev;
662 int gpio_nreset = -EINVAL; 664 int gpio_nreset = -EINVAL;
663 int gpio_pll_mode[2] = { -EINVAL, -EINVAL }; 665 int gpio_pll_mode[2] = { -EINVAL, -EINVAL };
664 int ret; 666 int ret;
665 667
666 adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL); 668 adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL);
667 if (!adau1701) 669 if (!adau1701)
668 return -ENOMEM; 670 return -ENOMEM;
669 671
670 adau1701->regmap = devm_regmap_init(dev, NULL, client, 672 adau1701->regmap = devm_regmap_init(dev, NULL, client,
671 &adau1701_regmap); 673 &adau1701_regmap);
672 if (IS_ERR(adau1701->regmap)) 674 if (IS_ERR(adau1701->regmap))
673 return PTR_ERR(adau1701->regmap); 675 return PTR_ERR(adau1701->regmap);
674 676
675 if (dev->of_node) { 677 if (dev->of_node) {
676 gpio_nreset = of_get_named_gpio(dev->of_node, "reset-gpio", 0); 678 gpio_nreset = of_get_named_gpio(dev->of_node, "reset-gpio", 0);
677 if (gpio_nreset < 0 && gpio_nreset != -ENOENT) 679 if (gpio_nreset < 0 && gpio_nreset != -ENOENT)
678 return gpio_nreset; 680 return gpio_nreset;
679 681
680 gpio_pll_mode[0] = of_get_named_gpio(dev->of_node, 682 gpio_pll_mode[0] = of_get_named_gpio(dev->of_node,
681 "adi,pll-mode-gpios", 0); 683 "adi,pll-mode-gpios", 0);
682 if (gpio_pll_mode[0] < 0 && gpio_pll_mode[0] != -ENOENT) 684 if (gpio_pll_mode[0] < 0 && gpio_pll_mode[0] != -ENOENT)
683 return gpio_pll_mode[0]; 685 return gpio_pll_mode[0];
684 686
685 gpio_pll_mode[1] = of_get_named_gpio(dev->of_node, 687 gpio_pll_mode[1] = of_get_named_gpio(dev->of_node,
686 "adi,pll-mode-gpios", 1); 688 "adi,pll-mode-gpios", 1);
687 if (gpio_pll_mode[1] < 0 && gpio_pll_mode[1] != -ENOENT) 689 if (gpio_pll_mode[1] < 0 && gpio_pll_mode[1] != -ENOENT)
688 return gpio_pll_mode[1]; 690 return gpio_pll_mode[1];
689 691
690 of_property_read_u32(dev->of_node, "adi,pll-clkdiv", 692 of_property_read_u32(dev->of_node, "adi,pll-clkdiv",
691 &adau1701->pll_clkdiv); 693 &adau1701->pll_clkdiv);
692 694
693 of_property_read_u8_array(dev->of_node, "adi,pin-config", 695 of_property_read_u8_array(dev->of_node, "adi,pin-config",
694 adau1701->pin_config, 696 adau1701->pin_config,
695 ARRAY_SIZE(adau1701->pin_config)); 697 ARRAY_SIZE(adau1701->pin_config));
696 } 698 }
697 699
698 if (gpio_is_valid(gpio_nreset)) { 700 if (gpio_is_valid(gpio_nreset)) {
699 ret = devm_gpio_request_one(dev, gpio_nreset, GPIOF_OUT_INIT_LOW, 701 ret = devm_gpio_request_one(dev, gpio_nreset, GPIOF_OUT_INIT_LOW,
700 "ADAU1701 Reset"); 702 "ADAU1701 Reset");
701 if (ret < 0) 703 if (ret < 0)
702 return ret; 704 return ret;
703 } 705 }
704 706
705 if (gpio_is_valid(gpio_pll_mode[0]) && 707 if (gpio_is_valid(gpio_pll_mode[0]) &&
706 gpio_is_valid(gpio_pll_mode[1])) { 708 gpio_is_valid(gpio_pll_mode[1])) {
707 ret = devm_gpio_request_one(dev, gpio_pll_mode[0], 709 ret = devm_gpio_request_one(dev, gpio_pll_mode[0],
708 GPIOF_OUT_INIT_LOW, 710 GPIOF_OUT_INIT_LOW,
709 "ADAU1701 PLL mode 0"); 711 "ADAU1701 PLL mode 0");
710 if (ret < 0) 712 if (ret < 0)
711 return ret; 713 return ret;
712 714
713 ret = devm_gpio_request_one(dev, gpio_pll_mode[1], 715 ret = devm_gpio_request_one(dev, gpio_pll_mode[1],
714 GPIOF_OUT_INIT_LOW, 716 GPIOF_OUT_INIT_LOW,
715 "ADAU1701 PLL mode 1"); 717 "ADAU1701 PLL mode 1");
716 if (ret < 0) 718 if (ret < 0)
717 return ret; 719 return ret;
718 } 720 }
719 721
720 adau1701->gpio_nreset = gpio_nreset; 722 adau1701->gpio_nreset = gpio_nreset;
721 adau1701->gpio_pll_mode[0] = gpio_pll_mode[0]; 723 adau1701->gpio_pll_mode[0] = gpio_pll_mode[0];
722 adau1701->gpio_pll_mode[1] = gpio_pll_mode[1]; 724 adau1701->gpio_pll_mode[1] = gpio_pll_mode[1];
723 725
724 i2c_set_clientdata(client, adau1701); 726 i2c_set_clientdata(client, adau1701);
725 ret = snd_soc_register_codec(&client->dev, &adau1701_codec_drv, 727 ret = snd_soc_register_codec(&client->dev, &adau1701_codec_drv,
726 &adau1701_dai, 1); 728 &adau1701_dai, 1);
727 return ret; 729 return ret;
728 } 730 }
729 731
730 static int adau1701_i2c_remove(struct i2c_client *client) 732 static int adau1701_i2c_remove(struct i2c_client *client)
731 { 733 {
732 snd_soc_unregister_codec(&client->dev); 734 snd_soc_unregister_codec(&client->dev);
733 return 0; 735 return 0;
734 } 736 }
735 737
736 static const struct i2c_device_id adau1701_i2c_id[] = { 738 static const struct i2c_device_id adau1701_i2c_id[] = {
737 { "adau1401", 0 }, 739 { "adau1401", 0 },
738 { "adau1401a", 0 }, 740 { "adau1401a", 0 },
739 { "adau1701", 0 }, 741 { "adau1701", 0 },
740 { "adau1702", 0 }, 742 { "adau1702", 0 },
741 { } 743 { }
742 }; 744 };
743 MODULE_DEVICE_TABLE(i2c, adau1701_i2c_id); 745 MODULE_DEVICE_TABLE(i2c, adau1701_i2c_id);
744 746
745 static struct i2c_driver adau1701_i2c_driver = { 747 static struct i2c_driver adau1701_i2c_driver = {
746 .driver = { 748 .driver = {
747 .name = "adau1701", 749 .name = "adau1701",
748 .owner = THIS_MODULE, 750 .owner = THIS_MODULE,
749 .of_match_table = of_match_ptr(adau1701_dt_ids), 751 .of_match_table = of_match_ptr(adau1701_dt_ids),
750 }, 752 },
751 .probe = adau1701_i2c_probe, 753 .probe = adau1701_i2c_probe,
752 .remove = adau1701_i2c_remove, 754 .remove = adau1701_i2c_remove,
753 .id_table = adau1701_i2c_id, 755 .id_table = adau1701_i2c_id,
754 }; 756 };
755 757
756 module_i2c_driver(adau1701_i2c_driver); 758 module_i2c_driver(adau1701_i2c_driver);
757 759
758 MODULE_DESCRIPTION("ASoC ADAU1701 SigmaDSP driver"); 760 MODULE_DESCRIPTION("ASoC ADAU1701 SigmaDSP driver");
759 MODULE_AUTHOR("Cliff Cai <cliff.cai@analog.com>"); 761 MODULE_AUTHOR("Cliff Cai <cliff.cai@analog.com>");
760 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); 762 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
761 MODULE_LICENSE("GPL"); 763 MODULE_LICENSE("GPL");
762 764