Eric Lee / smarc-ti-linux-kernel

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Commit a81260738c943b13c31d3627faff98284a0da5d0

Authored by Eric Lee
1 parent ee02bdddf7
Exists in smarct4x-processor-sdk-04.01.00.06

Fix boot time Tux logo doesn't show up and eth1 does not bring up problem

Showing 2 changed files with 3 additions and 2 deletions Inline Diff

arch/arm/boot/dts/am437x-smarct437x.dts
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1 /* 1 /*
2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as 5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 */ 7 */
8 8
9 /* AM437x SMARC-T437X */ 9 /* AM437x SMARC-T437X */
10 10
11 /dts-v1/; 11 /dts-v1/;
12 12
13 #include "am4372.dtsi" 13 #include "am4372.dtsi"
14 #include <dt-bindings/pinctrl/am43xx.h> 14 #include <dt-bindings/pinctrl/am43xx.h>
15 #include <dt-bindings/pwm/pwm.h> 15 #include <dt-bindings/pwm/pwm.h>
16 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h> 17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/interrupt-controller/irq.h> 18 #include <dt-bindings/interrupt-controller/irq.h>
19 19
20 / { 20 / {
21 model = "TI AM437x SMARCT437X"; 21 model = "TI AM437x SMARCT437X";
22 compatible = "ti,am437x-smarct437x","ti,am4372","ti,am43"; 22 compatible = "ti,am437x-smarct437x","ti,am4372","ti,am43";
23 23
24 aliases { 24 aliases {
25 display0 = &lcd0; 25 display0 = &lcd0;
26 rtc0 = &s35390a; 26 rtc0 = &s35390a;
27 rtc1 = &rtc; 27 rtc1 = &rtc;
28 }; 28 };
29 29
30 vmmcwl_fixed: fixedregulator-mmcwl { 30 vmmcwl_fixed: fixedregulator-mmcwl {
31 compatible = "regulator-fixed"; 31 compatible = "regulator-fixed";
32 regulator-name = "vmmcwl_fixed"; 32 regulator-name = "vmmcwl_fixed";
33 regulator-min-microvolt = <1800000>; 33 regulator-min-microvolt = <1800000>;
34 regulator-max-microvolt = <1800000>; 34 regulator-max-microvolt = <1800000>;
35 }; 35 };
36 36
37 /* fixed 32k external oscillator clock */ 37 /* fixed 32k external oscillator clock */
38 clk_32k_rtc: clk_32k_rtc { 38 clk_32k_rtc: clk_32k_rtc {
39 #clock-cells = <0>; 39 #clock-cells = <0>;
40 compatible = "fixed-clock"; 40 compatible = "fixed-clock";
41 clock-frequency = <32768>; 41 clock-frequency = <32768>;
42 }; 42 };
43 43
44 backlight { 44 backlight {
45 compatible = "pwm-backlight"; 45 compatible = "pwm-backlight";
46 enable-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; /* Backlight Enable Pin*/ 46 enable-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; /* Backlight Enable Pin*/
47 pwms = <&ehrpwm0 1 250000 PWM_POLARITY_INVERTED>; 47 pwms = <&ehrpwm0 1 250000 PWM_POLARITY_INVERTED>;
48 brightness-levels = <255 212 128 56 75 62 53 51 0>; 48 brightness-levels = <255 212 128 56 75 62 53 51 0>;
49 default-brightness-level = <8>; /* 8 is the brightest */ 49 default-brightness-level = <8>; /* 8 is the brightest */
50 }; 50 };
51 51
52 sound { 52 sound {
53 compatible = "simple-audio-card"; 53 compatible = "simple-audio-card";
54 simple-audio-card,name = "SMARCT437X SOUND CARD"; 54 simple-audio-card,name = "SMARCT437X SOUND CARD";
55 simple-audio-card,widgets = 55 simple-audio-card,widgets =
56 "Headphone", "Headphone Jack", 56 "Headphone", "Headphone Jack",
57 "Line", "Line In"; 57 "Line", "Line In";
58 simple-audio-card,routing = 58 simple-audio-card,routing =
59 "Headphone Jack", "HPLOUT", 59 "Headphone Jack", "HPLOUT",
60 "Headphone Jack", "HPROUT", 60 "Headphone Jack", "HPROUT",
61 "LINE1L", "Line In", 61 "LINE1L", "Line In",
62 "LINE1R", "Line In"; 62 "LINE1R", "Line In";
63 simple-audio-card,format = "dsp_b"; 63 simple-audio-card,format = "dsp_b";
64 simple-audio-card,bitclock-master = <&sound_master>; 64 simple-audio-card,bitclock-master = <&sound_master>;
65 simple-audio-card,frame-master = <&sound_master>; 65 simple-audio-card,frame-master = <&sound_master>;
66 simple-audio-card,bitclock-inversion; 66 simple-audio-card,bitclock-inversion;
67 67
68 simple-audio-card,cpu { 68 simple-audio-card,cpu {
69 sound-dai = <&mcasp1>; 69 sound-dai = <&mcasp1>;
70 system-clock-frequency = <12000000>; 70 system-clock-frequency = <12000000>;
71 }; 71 };
72 72
73 /* For TI TLV320AIC3106 Audio Codec */ 73 /* For TI TLV320AIC3106 Audio Codec */
74 /*sound_master: simple-audio-card,codec { 74 /*sound_master: simple-audio-card,codec {
75 sound-dai = <&tlv320aic3106>; 75 sound-dai = <&tlv320aic3106>;
76 system-clock-frequency = <24576000>;*/ 76 system-clock-frequency = <24576000>;*/
77 77
78 /* For Freescale SGTL5000 Audio Codec */ 78 /* For Freescale SGTL5000 Audio Codec */
79 sound_master: simple-audio-card,codec { 79 sound_master: simple-audio-card,codec {
80 sound-dai = <&sgtl5000>; 80 sound-dai = <&sgtl5000>;
81 system-clock-frequency = <24000000>; 81 system-clock-frequency = <24000000>;
82 }; 82 };
83 }; 83 };
84 84
85 audio_mstrclk: mclk_osc { 85 audio_mstrclk: mclk_osc {
86 compatible = "fixed-clock"; 86 compatible = "fixed-clock";
87 #clock-cells = <0>; 87 #clock-cells = <0>;
88 clock-frequency = <24000000>; 88 clock-frequency = <24000000>;
89 }; 89 };
90 90
91 lcd0: display { 91 lcd0: display {
92 compatible = "primeview,pm070wl4", "panel-dpi"; 92 compatible = "primeview,pm070wl4", "panel-dpi";
93 label = "lcd"; 93 label = "lcd";
94 94
95 pinctrl-names = "default"; 95 pinctrl-names = "default";
96 pinctrl-0 = <&lcd_pins>; 96 pinctrl-0 = <&lcd_pins>;
97 97
98 enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* Enable LCD_VDD_EN pin */ 98 enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* Enable LCD_VDD_EN pin */
99 99
100 panel-timing { 100 panel-timing {
101 clock-frequency = <33200000>; 101 clock-frequency = <33200000>;
102 hactive = <800>; 102 hactive = <800>;
103 vactive = <480>; 103 vactive = <480>;
104 hfront-porch = <42>; 104 hfront-porch = <42>;
105 hback-porch = <84>; 105 hback-porch = <84>;
106 hsync-len = <128>; 106 hsync-len = <128>;
107 vback-porch = <33>; 107 vback-porch = <33>;
108 vfront-porch = <10>; 108 vfront-porch = <10>;
109 vsync-len = <2>; 109 vsync-len = <2>;
110 hsync-active = <0>; 110 hsync-active = <0>;
111 vsync-active = <0>; 111 vsync-active = <0>;
112 de-active = <1>; 112 de-active = <1>;
113 pixelclk-active = <1>; 113 pixelclk-active = <1>;
114 }; 114 };
115 115
116 port { 116 port {
117 lcd_in: endpoint { 117 lcd_in: endpoint {
118 remote-endpoint = <&dpi_out>; 118 remote-endpoint = <&dpi_out>;
119 }; 119 };
120 }; 120 };
121 }; 121 };
122 }; 122 };
123 123
124 &am43xx_pinmux { 124 &am43xx_pinmux {
125 pinctrl-names = "default"; 125 pinctrl-names = "default";
126 pinctrl-0 = <&clkout1_pin &clkout2_pin &gpio_pins_default &wdt_time_out_pins_default &debugss_pins>; 126 pinctrl-0 = <&clkout1_pin &clkout2_pin &gpio_pins_default &wdt_time_out_pins_default &debugss_pins>;
127 127
128 i2c0_pins: i2c0_pins { 128 i2c0_pins: i2c0_pins {
129 pinctrl-single,pins = < 129 pinctrl-single,pins = <
130 AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 130 AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
131 AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 131 AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
132 >; 132 >;
133 }; 133 };
134 134
135 i2c1_pins: i2c1_pins { 135 i2c1_pins: i2c1_pins {
136 pinctrl-single,pins = < 136 pinctrl-single,pins = <
137 AM4372_IOPAD(0x910, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* mii1_rxerr.i2c1_scl */ 137 AM4372_IOPAD(0x910, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* mii1_rxerr.i2c1_scl */
138 AM4372_IOPAD(0x90c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* mii1_crs.i2c1_sda */ 138 AM4372_IOPAD(0x90c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* mii1_crs.i2c1_sda */
139 >; 139 >;
140 }; 140 };
141 141
142 i2c2_pins: i2c2_pins { 142 i2c2_pins: i2c2_pins {
143 pinctrl-single,pins = < 143 pinctrl-single,pins = <
144 AM4372_IOPAD(0x9ec, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */ 144 AM4372_IOPAD(0x9ec, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */
145 AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */ 145 AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */
146 >; 146 >;
147 }; 147 };
148 148
149 mmc1_pins: pinmux_mmc1_pins { 149 mmc1_pins: pinmux_mmc1_pins {
150 pinctrl-single,pins = < 150 pinctrl-single,pins = <
151 AM4372_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ 151 AM4372_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
152 AM4372_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ 152 AM4372_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
153 AM4372_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ 153 AM4372_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
154 AM4372_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ 154 AM4372_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
155 AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ 155 AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
156 AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ 156 AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
157 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ 157 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
158 >; 158 >;
159 }; 159 };
160 160
161 emmc_pins: pinmux_emmc_pins { 161 emmc_pins: pinmux_emmc_pins {
162 pinctrl-single,pins = < 162 pinctrl-single,pins = <
163 AM4372_IOPAD(0x880, PIN_INPUT | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ 163 AM4372_IOPAD(0x880, PIN_INPUT | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
164 AM4372_IOPAD(0x884, PIN_INPUT | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ 164 AM4372_IOPAD(0x884, PIN_INPUT | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
165 AM4372_IOPAD(0x800, PIN_INPUT | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ 165 AM4372_IOPAD(0x800, PIN_INPUT | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
166 AM4372_IOPAD(0x804, PIN_INPUT | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ 166 AM4372_IOPAD(0x804, PIN_INPUT | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
167 AM4372_IOPAD(0x808, PIN_INPUT | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ 167 AM4372_IOPAD(0x808, PIN_INPUT | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
168 AM4372_IOPAD(0x80c, PIN_INPUT | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ 168 AM4372_IOPAD(0x80c, PIN_INPUT | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
169 AM4372_IOPAD(0x810, PIN_INPUT | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ 169 AM4372_IOPAD(0x810, PIN_INPUT | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
170 AM4372_IOPAD(0x814, PIN_INPUT | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ 170 AM4372_IOPAD(0x814, PIN_INPUT | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
171 AM4372_IOPAD(0x818, PIN_INPUT | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ 171 AM4372_IOPAD(0x818, PIN_INPUT | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
172 AM4372_IOPAD(0x81c, PIN_INPUT | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ 172 AM4372_IOPAD(0x81c, PIN_INPUT | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
173 >; 173 >;
174 }; 174 };
175 175
176 sdmmc_pins: pinmux_sdmmc_pins { 176 sdmmc_pins: pinmux_sdmmc_pins {
177 pinctrl-single,pins = < 177 pinctrl-single,pins = <
178 AM4372_IOPAD(0x88c, PIN_INPUT | MUX_MODE3) /* gpmc_clk.mmc2_clk */ 178 AM4372_IOPAD(0x88c, PIN_INPUT | MUX_MODE3) /* gpmc_clk.mmc2_clk */
179 AM4372_IOPAD(0x888, PIN_INPUT | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */ 179 AM4372_IOPAD(0x888, PIN_INPUT | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */
180 AM4372_IOPAD(0x830, PIN_INPUT | MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */ 180 AM4372_IOPAD(0x830, PIN_INPUT | MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */
181 AM4372_IOPAD(0x834, PIN_INPUT | MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */ 181 AM4372_IOPAD(0x834, PIN_INPUT | MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */
182 AM4372_IOPAD(0x838, PIN_INPUT | MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */ 182 AM4372_IOPAD(0x838, PIN_INPUT | MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */
183 AM4372_IOPAD(0x83c, PIN_INPUT | MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */ 183 AM4372_IOPAD(0x83c, PIN_INPUT | MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */
184 AM4372_IOPAD(0x820, PIN_INPUT | MUX_MODE3) /* gpmc_ad8.mmc2_dat4 */ 184 AM4372_IOPAD(0x820, PIN_INPUT | MUX_MODE3) /* gpmc_ad8.mmc2_dat4 */
185 AM4372_IOPAD(0x824, PIN_INPUT | MUX_MODE3) /* gpmc_ad9.mmc2_dat5 */ 185 AM4372_IOPAD(0x824, PIN_INPUT | MUX_MODE3) /* gpmc_ad9.mmc2_dat5 */
186 AM4372_IOPAD(0x828, PIN_INPUT | MUX_MODE3) /* gpmc_ad10.mmc2_dat6 */ 186 AM4372_IOPAD(0x828, PIN_INPUT | MUX_MODE3) /* gpmc_ad10.mmc2_dat6 */
187 AM4372_IOPAD(0x82c, PIN_INPUT | MUX_MODE3) /* gpmc_ad11.mmc2_dat7 */ 187 AM4372_IOPAD(0x82c, PIN_INPUT | MUX_MODE3) /* gpmc_ad11.mmc2_dat7 */
188 >; 188 >;
189 }; 189 };
190 190
191 ehrpwm0b_pins: backlight_pins { 191 ehrpwm0b_pins: backlight_pins {
192 pinctrl-single,pins = < 192 pinctrl-single,pins = <
193 AM4372_IOPAD(0x9d8, PIN_OUTPUT | MUX_MODE6) /* cam1_vd.ehrpwm0B */ 193 AM4372_IOPAD(0x9d8, PIN_OUTPUT | MUX_MODE6) /* cam1_vd.ehrpwm0B */
194 >; 194 >;
195 }; 195 };
196 196
197 clkout1_pin: pinmux_clkout1_pin { 197 clkout1_pin: pinmux_clkout1_pin {
198 pinctrl-single,pins = < 198 pinctrl-single,pins = <
199 AM4372_IOPAD(0xa70, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* XDMA_EVENT_INTR0/CLKOUT1 */ 199 AM4372_IOPAD(0xa70, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* XDMA_EVENT_INTR0/CLKOUT1 */
200 >; 200 >;
201 }; 201 };
202 202
203 clkout2_pin: pinmux_clkout2_pin { 203 clkout2_pin: pinmux_clkout2_pin {
204 pinctrl-single,pins = < 204 pinctrl-single,pins = <
205 AM4372_IOPAD(0xa74, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* XDMA_EVENT_INTR1/CLKOUT2 */ 205 AM4372_IOPAD(0xa74, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* XDMA_EVENT_INTR1/CLKOUT2 */
206 >; 206 >;
207 }; 207 };
208 208
209 dcan0_default: dcan0_default_pins { 209 dcan0_default: dcan0_default_pins {
210 pinctrl-single,pins = < 210 pinctrl-single,pins = <
211 AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_rtsn.dcan0_rx */ 211 AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_rtsn.dcan0_rx */
212 AM4372_IOPAD(0x978, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* uart1_ctsn.dcan0_tx */ 212 AM4372_IOPAD(0x978, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* uart1_ctsn.dcan0_tx */
213 >; 213 >;
214 }; 214 };
215 215
216 dcan1_default: dcan1_default_pins { 216 dcan1_default: dcan1_default_pins {
217 pinctrl-single,pins = < 217 pinctrl-single,pins = <
218 AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.dcan1_rx */ 218 AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.dcan1_rx */
219 AM4372_IOPAD(0x980, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* uart1_rxd.dcan1_tx */ 219 AM4372_IOPAD(0x980, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* uart1_rxd.dcan1_tx */
220 >; 220 >;
221 }; 221 };
222 222
223 uart0_pins: pinmux_uart0_pins { 223 uart0_pins: pinmux_uart0_pins {
224 pinctrl-single,pins = < 224 pinctrl-single,pins = <
225 AM4372_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */ 225 AM4372_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */
226 AM4372_IOPAD(0x96c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */ 226 AM4372_IOPAD(0x96c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */
227 AM4372_IOPAD(0x970, PIN_INPUT | MUX_MODE0) /* uart0_rxd.uart0_rxd */ 227 AM4372_IOPAD(0x970, PIN_INPUT | MUX_MODE0) /* uart0_rxd.uart0_rxd */
228 AM4372_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ 228 AM4372_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
229 >; 229 >;
230 }; 230 };
231 231
232 uart0_pins_sleep: pinmux_uart0_pins_sleep { 232 uart0_pins_sleep: pinmux_uart0_pins_sleep {
233 pinctrl-single,pins = < 233 pinctrl-single,pins = <
234 AM4372_IOPAD(0x968, PIN_INPUT_PULLDOWN | MUX_MODE7) 234 AM4372_IOPAD(0x968, PIN_INPUT_PULLDOWN | MUX_MODE7)
235 AM4372_IOPAD(0x96c, PIN_INPUT_PULLDOWN | MUX_MODE7) 235 AM4372_IOPAD(0x96c, PIN_INPUT_PULLDOWN | MUX_MODE7)
236 AM4372_IOPAD(0x970, PIN_INPUT_PULLDOWN | MUX_MODE7) 236 AM4372_IOPAD(0x970, PIN_INPUT_PULLDOWN | MUX_MODE7)
237 AM4372_IOPAD(0x974, PIN_INPUT_PULLDOWN | MUX_MODE7) 237 AM4372_IOPAD(0x974, PIN_INPUT_PULLDOWN | MUX_MODE7)
238 >; 238 >;
239 }; 239 };
240 240
241 uart3_pins: pinmux_uart3_pins { 241 uart3_pins: pinmux_uart3_pins {
242 pinctrl-single,pins = < 242 pinctrl-single,pins = <
243 AM4372_IOPAD(0xa28, PIN_INPUT | MUX_MODE0) /* uart3_rxd.uart3_rxd */ 243 AM4372_IOPAD(0xa28, PIN_INPUT | MUX_MODE0) /* uart3_rxd.uart3_rxd */
244 AM4372_IOPAD(0xa2c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_txd.uart3_txd */ 244 AM4372_IOPAD(0xa2c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_txd.uart3_txd */
245 >; 245 >;
246 }; 246 };
247 247
248 uart3_pins_sleep: pinmux_uart3_pins_sleep { 248 uart3_pins_sleep: pinmux_uart3_pins_sleep {
249 pinctrl-single,pins = < 249 pinctrl-single,pins = <
250 AM4372_IOPAD(0xa28, PIN_INPUT_PULLDOWN | MUX_MODE7) 250 AM4372_IOPAD(0xa28, PIN_INPUT_PULLDOWN | MUX_MODE7)
251 AM4372_IOPAD(0xa2c, PIN_INPUT_PULLDOWN | MUX_MODE7) 251 AM4372_IOPAD(0xa2c, PIN_INPUT_PULLDOWN | MUX_MODE7)
252 >; 252 >;
253 }; 253 };
254 254
255 uart2_pins: pinmux_uart2_pins { 255 uart2_pins: pinmux_uart2_pins {
256 pinctrl-single,pins = < 256 pinctrl-single,pins = <
257 AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE2) /* cam1_data6.uart2_ctsn */ 257 AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE2) /* cam1_data6.uart2_ctsn */
258 AM4372_IOPAD(0xa04, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* cam1_data7_rtsn.uart2_rtsn */ 258 AM4372_IOPAD(0xa04, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* cam1_data7_rtsn.uart2_rtsn */
259 AM4372_IOPAD(0x9f8, PIN_INPUT | MUX_MODE2) /* cam1_data4_uart2_rxd */ 259 AM4372_IOPAD(0x9f8, PIN_INPUT | MUX_MODE2) /* cam1_data4_uart2_rxd */
260 AM4372_IOPAD(0x9fc, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* cam1_data5.uart2_txd */ 260 AM4372_IOPAD(0x9fc, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* cam1_data5.uart2_txd */
261 >; 261 >;
262 }; 262 };
263 263
264 uart2_pins_sleep: pinmux_uart2_pins_sleep { 264 uart2_pins_sleep: pinmux_uart2_pins_sleep {
265 pinctrl-single,pins = < 265 pinctrl-single,pins = <
266 AM4372_IOPAD(0xa00, PIN_INPUT_PULLDOWN | MUX_MODE7) 266 AM4372_IOPAD(0xa00, PIN_INPUT_PULLDOWN | MUX_MODE7)
267 AM4372_IOPAD(0xa04, PIN_INPUT_PULLDOWN | MUX_MODE7) 267 AM4372_IOPAD(0xa04, PIN_INPUT_PULLDOWN | MUX_MODE7)
268 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7) 268 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7)
269 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7) 269 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7)
270 >; 270 >;
271 }; 271 };
272 272
273 uart4_pins: pinmux_uart4_pins { 273 uart4_pins: pinmux_uart4_pins {
274 pinctrl-single,pins = < 274 pinctrl-single,pins = <
275 AM4372_IOPAD(0x870, PIN_INPUT | MUX_MODE6) /* gpmc_wait0.uart4_rxd */ 275 AM4372_IOPAD(0x870, PIN_INPUT | MUX_MODE6) /* gpmc_wait0.uart4_rxd */
276 AM4372_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* gpmc_wpn.uart4_txd */ 276 AM4372_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* gpmc_wpn.uart4_txd */
277 >; 277 >;
278 }; 278 };
279 279
280 uart4_pins_sleep: pinmux_uart4_pins_sleep { 280 uart4_pins_sleep: pinmux_uart4_pins_sleep {
281 pinctrl-single,pins = < 281 pinctrl-single,pins = <
282 AM4372_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE7) 282 AM4372_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE7)
283 AM4372_IOPAD(0x974, PIN_INPUT_PULLDOWN | MUX_MODE7) 283 AM4372_IOPAD(0x974, PIN_INPUT_PULLDOWN | MUX_MODE7)
284 >; 284 >;
285 }; 285 };
286 286
287 /*GPIO0-GPIO11, GPIO0-5 is input and GPIO6-11 is output by default.*/ 287 /*GPIO0-GPIO11, GPIO0-5 is input and GPIO6-11 is output by default.*/
288 gpio_pins_default: pinmux_gpio_pin { 288 gpio_pins_default: pinmux_gpio_pin {
289 pinctrl-single,pins = < 289 pinctrl-single,pins = <
290 AM4372_IOPAD(0xa6c, PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_cs0.gpio0_23 */ 290 AM4372_IOPAD(0xa6c, PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_cs0.gpio0_23 */
291 AM4372_IOPAD(0xa64, PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_d0.gpio0_20 */ 291 AM4372_IOPAD(0xa64, PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_d0.gpio0_20 */
292 AM4372_IOPAD(0xa68, PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_d1.gpio0_21 */ 292 AM4372_IOPAD(0xa68, PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_d1.gpio0_21 */
293 AM4372_IOPAD(0xa60, PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_sclk.gpio0_22 */ 293 AM4372_IOPAD(0xa60, PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_sclk.gpio0_22 */
294 AM4372_IOPAD(0xa1c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* cam0_data5.gpio4_27 */ 294 AM4372_IOPAD(0xa1c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* cam0_data5.gpio4_27 */
295 AM4372_IOPAD(0xa24, PIN_INPUT_PULLDOWN | MUX_MODE7) /* cam0_data7.gpio4_29 */ 295 AM4372_IOPAD(0xa24, PIN_INPUT_PULLDOWN | MUX_MODE7) /* cam0_data7.gpio4_29 */
296 AM4372_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkr.gpio3_17 */ 296 AM4372_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkr.gpio3_17 */
297 AM4372_IOPAD(0x998, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_axr0.gpio3_16 */ 297 AM4372_IOPAD(0x998, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_axr0.gpio3_16 */
298 AM4372_IOPAD(0xa10, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data2.gpio4_24 */ 298 AM4372_IOPAD(0xa10, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data2.gpio4_24 */
299 AM4372_IOPAD(0xa14, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data3.gpio4_25 */ 299 AM4372_IOPAD(0xa14, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data3.gpio4_25 */
300 AM4372_IOPAD(0xa18, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data4.gpio4_26 */ 300 AM4372_IOPAD(0xa18, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data4.gpio4_26 */
301 AM4372_IOPAD(0xa20, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data6.gpio4_28 */ 301 AM4372_IOPAD(0xa20, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data6.gpio4_28 */
302 >; 302 >;
303 }; 303 };
304 304
305 wdt_time_out_pins_default: pinmux_wdt_time_out_pin { 305 wdt_time_out_pins_default: pinmux_wdt_time_out_pin {
306 pinctrl-single,pins = < 306 pinctrl-single,pins = <
307 AM4372_IOPAD(0xa34, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* uart3_rtsn.ehrpwm5B */ 307 AM4372_IOPAD(0xa34, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* uart3_rtsn.ehrpwm5B */
308 >; 308 >;
309 }; 309 };
310 310
311 cpsw_default: cpsw_default { 311 cpsw_default: cpsw_default {
312 pinctrl-single,pins = < 312 pinctrl-single,pins = <
313 /* Slave 1 */ 313 /* Slave 1 */
314 AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */ 314 AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
315 AM4372_IOPAD(0x914, PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ 315 AM4372_IOPAD(0x914, PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
316 AM4372_IOPAD(0x928, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ 316 AM4372_IOPAD(0x928, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
317 AM4372_IOPAD(0x924, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ 317 AM4372_IOPAD(0x924, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
318 AM4372_IOPAD(0x920, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ 318 AM4372_IOPAD(0x920, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
319 AM4372_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ 319 AM4372_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
320 AM4372_IOPAD(0x930, PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ 320 AM4372_IOPAD(0x930, PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
321 AM4372_IOPAD(0x918, PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ 321 AM4372_IOPAD(0x918, PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
322 AM4372_IOPAD(0x940, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ 322 AM4372_IOPAD(0x940, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
323 AM4372_IOPAD(0x93c, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ 323 AM4372_IOPAD(0x93c, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
324 AM4372_IOPAD(0x938, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ 324 AM4372_IOPAD(0x938, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
325 AM4372_IOPAD(0x934, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ 325 AM4372_IOPAD(0x934, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
326 326
327 /* Slave 2 */ 327 /* Slave 2 */
328 AM4372_IOPAD(0x858, PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ 328 AM4372_IOPAD(0x858, PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
329 AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ 329 AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
330 AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ 330 AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
331 AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ 331 AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
332 AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ 332 AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
333 AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ 333 AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
334 AM4372_IOPAD(0x85c, PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ 334 AM4372_IOPAD(0x85c, PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
335 AM4372_IOPAD(0x844, PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */ 335 AM4372_IOPAD(0x844, PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */
336 AM4372_IOPAD(0x86c, PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ 336 AM4372_IOPAD(0x86c, PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
337 AM4372_IOPAD(0x868, PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ 337 AM4372_IOPAD(0x868, PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
338 AM4372_IOPAD(0x864, PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ 338 AM4372_IOPAD(0x864, PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
339 AM4372_IOPAD(0x860, PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ 339 AM4372_IOPAD(0x860, PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
340 >; 340 >;
341 }; 341 };
342 342
343 cpsw_sleep: cpsw_sleep { 343 cpsw_sleep: cpsw_sleep {
344 pinctrl-single,pins = < 344 pinctrl-single,pins = <
345 /* Slave 1 reset value */ 345 /* Slave 1 reset value */
346 AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7) 346 AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
347 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) 347 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
348 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) 348 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
349 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) 349 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
350 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7) 350 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
351 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7) 351 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
352 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7) 352 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
353 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) 353 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
354 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) 354 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
355 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) 355 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
356 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7) 356 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
357 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7) 357 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
358 358
359 /* Slave 2 reset value */ 359 /* Slave 2 reset value */
360 AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7) 360 AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
361 AM4372_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7) 361 AM4372_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
362 AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7) 362 AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
363 AM4372_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7) 363 AM4372_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
364 AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7) 364 AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
365 AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7) 365 AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
366 AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7) 366 AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
367 AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7) 367 AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
368 AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7) 368 AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
369 AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7) 369 AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
370 AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) 370 AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
371 AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7) 371 AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
372 >; 372 >;
373 }; 373 };
374 374
375 davinci_mdio_default: davinci_mdio_default { 375 davinci_mdio_default: davinci_mdio_default {
376 pinctrl-single,pins = < 376 pinctrl-single,pins = <
377 /* MDIO */ 377 /* MDIO */
378 AM4372_IOPAD(0x948, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 378 AM4372_IOPAD(0x948, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
379 AM4372_IOPAD(0x94c, PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */ 379 AM4372_IOPAD(0x94c, PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */
380 >; 380 >;
381 }; 381 };
382 382
383 davinci_mdio_sleep: davinci_mdio_sleep { 383 davinci_mdio_sleep: davinci_mdio_sleep {
384 pinctrl-single,pins = < 384 pinctrl-single,pins = <
385 /* MDIO reset value */ 385 /* MDIO reset value */
386 AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) 386 AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
387 AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) 387 AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
388 >; 388 >;
389 }; 389 };
390 390
391 dss_pins: dss_pins { 391 dss_pins: dss_pins {
392 pinctrl-single,pins = < 392 pinctrl-single,pins = <
393 AM4372_IOPAD(0x9b0, PIN_OUTPUT | MUX_MODE2) /* cam0_hd.dss_data23 */ 393 AM4372_IOPAD(0x9b0, PIN_OUTPUT | MUX_MODE2) /* cam0_hd.dss_data23 */
394 AM4372_IOPAD(0x9b4, PIN_OUTPUT | MUX_MODE2) /* cam0_vd.dss_data22 */ 394 AM4372_IOPAD(0x9b4, PIN_OUTPUT | MUX_MODE2) /* cam0_vd.dss_data22 */
395 AM4372_IOPAD(0x9b8, PIN_OUTPUT | MUX_MODE2) /* cam0_field.dss_data21 */ 395 AM4372_IOPAD(0x9b8, PIN_OUTPUT | MUX_MODE2) /* cam0_field.dss_data21 */
396 AM4372_IOPAD(0x9bc, PIN_OUTPUT | MUX_MODE2) /* cam0_wen.dss_data20 */ 396 AM4372_IOPAD(0x9bc, PIN_OUTPUT | MUX_MODE2) /* cam0_wen.dss_data20 */
397 AM4372_IOPAD(0x9c0, PIN_OUTPUT | MUX_MODE2) /* cam0_pclk.dss_data19 */ 397 AM4372_IOPAD(0x9c0, PIN_OUTPUT | MUX_MODE2) /* cam0_pclk.dss_data19 */
398 AM4372_IOPAD(0x9c4, PIN_OUTPUT | MUX_MODE2) /* cam0_data8.dss_data18 */ 398 AM4372_IOPAD(0x9c4, PIN_OUTPUT | MUX_MODE2) /* cam0_data8.dss_data18 */
399 AM4372_IOPAD(0x9c8, PIN_OUTPUT | MUX_MODE2) /* cam0_data9.dss_data17 */ 399 AM4372_IOPAD(0x9c8, PIN_OUTPUT | MUX_MODE2) /* cam0_data9.dss_data17 */
400 AM4372_IOPAD(0x9cc, PIN_OUTPUT | MUX_MODE2) /* cam1_data9.dss_data16 */ 400 AM4372_IOPAD(0x9cc, PIN_OUTPUT | MUX_MODE2) /* cam1_data9.dss_data16 */
401 AM4372_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */ 401 AM4372_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */
402 AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) 402 AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)
403 AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) 403 AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)
404 AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) 404 AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)
405 AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) 405 AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)
406 AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) 406 AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)
407 AM4372_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) 407 AM4372_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)
408 AM4372_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) 408 AM4372_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)
409 AM4372_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) 409 AM4372_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)
410 AM4372_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) 410 AM4372_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)
411 AM4372_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) 411 AM4372_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)
412 AM4372_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) 412 AM4372_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)
413 AM4372_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) 413 AM4372_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)
414 AM4372_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) 414 AM4372_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)
415 AM4372_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) 415 AM4372_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)
416 AM4372_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */ 416 AM4372_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */
417 AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */ 417 AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */
418 AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */ 418 AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */
419 AM4372_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */ 419 AM4372_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */
420 AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */ 420 AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */
421 421
422 >; 422 >;
423 }; 423 };
424 424
425 /* SPI_NOR Pins */ 425 /* SPI_NOR Pins */
426 spi0_pins: spi0_pins { 426 spi0_pins: spi0_pins {
427 pinctrl-single,pins = < 427 pinctrl-single,pins = <
428 AM4372_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */ 428 AM4372_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
429 AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0) /* spi0_sclk.spi0_sclk */ 429 AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0) /* spi0_sclk.spi0_sclk */
430 AM4372_IOPAD(0x954, PIN_INPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */ 430 AM4372_IOPAD(0x954, PIN_INPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */
431 AM4372_IOPAD(0x958, PIN_OUTPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */ 431 AM4372_IOPAD(0x958, PIN_OUTPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */
432 >; 432 >;
433 }; 433 };
434 434
435 /* SPI0 Pins */ 435 /* SPI0 Pins */
436 spi2_pins: spi2_pins { 436 spi2_pins: spi2_pins {
437 pinctrl-single,pins = < 437 pinctrl-single,pins = <
438 AM4372_IOPAD(0x9d4, PIN_OUTPUT | MUX_MODE7) /* cam1_hd.gpio4_9 */ 438 AM4372_IOPAD(0x9d4, PIN_OUTPUT | MUX_MODE7) /* cam1_hd.gpio4_9 */
439 AM4372_IOPAD(0x9e0, PIN_OUTPUT | MUX_MODE7) /* cam1_field.gpio4_12 */ 439 AM4372_IOPAD(0x9e0, PIN_OUTPUT | MUX_MODE7) /* cam1_field.gpio4_12 */
440 AM4372_IOPAD(0x9dc, PIN_INPUT | MUX_MODE4) /* cam1_pclk.spi2_sclk */ 440 AM4372_IOPAD(0x9dc, PIN_INPUT | MUX_MODE4) /* cam1_pclk.spi2_sclk */
441 AM4372_IOPAD(0x9d0, PIN_INPUT | MUX_MODE4) /* cam1_data8.spi2_d0 */ 441 AM4372_IOPAD(0x9d0, PIN_INPUT | MUX_MODE4) /* cam1_data8.spi2_d0 */
442 AM4372_IOPAD(0x9e4, PIN_OUTPUT | MUX_MODE4) /* cam1_wen.spi2_d1 */ 442 AM4372_IOPAD(0x9e4, PIN_OUTPUT | MUX_MODE4) /* cam1_wen.spi2_d1 */
443 >; 443 >;
444 }; 444 };
445 445
446 /* SPI1 Pins */ 446 /* SPI1 Pins */
447 spi4_pins: spi4_pins { 447 spi4_pins: spi4_pins {
448 pinctrl-single,pins = < 448 pinctrl-single,pins = <
449 AM4372_IOPAD(0xa5c, PIN_OUTPUT | MUX_MODE7) /* spi4_cs0.gpio5_7 */ 449 AM4372_IOPAD(0xa5c, PIN_OUTPUT | MUX_MODE7) /* spi4_cs0.gpio5_7 */
450 AM4372_IOPAD(0xa30, PIN_OUTPUT | MUX_MODE7) /* uart3_cstn.gpio5_0 */ 450 AM4372_IOPAD(0xa30, PIN_OUTPUT | MUX_MODE7) /* uart3_cstn.gpio5_0 */
451 AM4372_IOPAD(0xa50, PIN_INPUT | MUX_MODE0) /* spi4_sclk.spi4_sclk */ 451 AM4372_IOPAD(0xa50, PIN_INPUT | MUX_MODE0) /* spi4_sclk.spi4_sclk */
452 AM4372_IOPAD(0xa54, PIN_INPUT | MUX_MODE0) /* spi4_d0.spi4_d0 */ 452 AM4372_IOPAD(0xa54, PIN_INPUT | MUX_MODE0) /* spi4_d0.spi4_d0 */
453 AM4372_IOPAD(0xa58, PIN_OUTPUT | MUX_MODE0) /* spi4_d1.spi4_d1 */ 453 AM4372_IOPAD(0xa58, PIN_OUTPUT | MUX_MODE0) /* spi4_d1.spi4_d1 */
454 >; 454 >;
455 }; 455 };
456 456
457 mcasp1_pins: mcasp1_pins { 457 mcasp1_pins: mcasp1_pins {
458 pinctrl-single,pins = < 458 pinctrl-single,pins = <
459 AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_aclkr.mcasp1_aclkx */ 459 AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_aclkr.mcasp1_aclkx */
460 AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_fsr.mcasp1_fsx */ 460 AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_fsr.mcasp1_fsx */
461 AM4372_IOPAD(0x9a8, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* mcasp0_axr1.mcasp1_axr0 */ 461 AM4372_IOPAD(0x9a8, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* mcasp0_axr1.mcasp1_axr0 */
462 AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_ahclkx.mcasp1_axr1 */ 462 AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_ahclkx.mcasp1_axr1 */
463 >; 463 >;
464 }; 464 };
465 465
466 mcasp1_sleep_pins: mcasp1_sleep_pins { 466 mcasp1_sleep_pins: mcasp1_sleep_pins {
467 pinctrl-single,pins = < 467 pinctrl-single,pins = <
468 AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7) 468 AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7)
469 AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE7) 469 AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE7)
470 AM4372_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7) 470 AM4372_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7)
471 AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7) 471 AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7)
472 >; 472 >;
473 }; 473 };
474 474
475 lcd_pins: lcd_pins { 475 lcd_pins: lcd_pins {
476 pinctrl-single,pins = < 476 pinctrl-single,pins = <
477 AM4372_IOPAD(0x89c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_be0n_cle.gpio2_5 */ 477 AM4372_IOPAD(0x89c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_be0n_cle.gpio2_5 */
478 >; 478 >;
479 }; 479 };
480 480
481 debugss_pins: pinmux_debugss_pins { 481 debugss_pins: pinmux_debugss_pins {
482 pinctrl-single,pins = < 482 pinctrl-single,pins = <
483 AM4372_IOPAD(0xa90, PIN_INPUT_PULLDOWN) 483 AM4372_IOPAD(0xa90, PIN_INPUT_PULLDOWN)
484 AM4372_IOPAD(0xa94, PIN_INPUT_PULLDOWN) 484 AM4372_IOPAD(0xa94, PIN_INPUT_PULLDOWN)
485 AM4372_IOPAD(0xa98, PIN_INPUT_PULLDOWN) 485 AM4372_IOPAD(0xa98, PIN_INPUT_PULLDOWN)
486 AM4372_IOPAD(0xa9c, PIN_INPUT_PULLDOWN) 486 AM4372_IOPAD(0xa9c, PIN_INPUT_PULLDOWN)
487 AM4372_IOPAD(0xaa0, PIN_INPUT_PULLDOWN) 487 AM4372_IOPAD(0xaa0, PIN_INPUT_PULLDOWN)
488 AM4372_IOPAD(0xaa4, PIN_INPUT_PULLDOWN) 488 AM4372_IOPAD(0xaa4, PIN_INPUT_PULLDOWN)
489 AM4372_IOPAD(0xaa8, PIN_INPUT_PULLDOWN) 489 AM4372_IOPAD(0xaa8, PIN_INPUT_PULLDOWN)
490 >; 490 >;
491 }; 491 };
492 492
493 usb1_pins: usb1_pins { 493 usb1_pins: usb1_pins {
494 pinctrl-single,pins = < 494 pinctrl-single,pins = <
495 AM4372_IOPAD(0xac0, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ 495 AM4372_IOPAD(0xac0, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
496 /* USB0 Over Current */ 496 /* USB0 Over Current */
497 AM4372_IOPAD(0x908, PIN_INPUT | MUX_MODE9) /* mii1_col.gpio0_0 */ 497 AM4372_IOPAD(0x908, PIN_INPUT | MUX_MODE9) /* mii1_col.gpio0_0 */
498 >; 498 >;
499 }; 499 };
500 500
501 usb2_pins: usb2_pins { 501 usb2_pins: usb2_pins {
502 pinctrl-single,pins = < 502 pinctrl-single,pins = <
503 AM4372_IOPAD(0xac4, PIN_OUTPUT | MUX_MODE0) /* usb1_drvvbus.usb1_drvvbus */ 503 AM4372_IOPAD(0xac4, PIN_OUTPUT | MUX_MODE0) /* usb1_drvvbus.usb1_drvvbus */
504 /* USB1 Over Current */ 504 /* USB1 Over Current */
505 AM4372_IOPAD(0x878, PIN_INPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */ 505 AM4372_IOPAD(0x878, PIN_INPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */
506 >; 506 >;
507 }; 507 };
508 }; 508 };
509 509
510 &i2c0 { 510 &i2c0 {
511 status = "okay"; 511 status = "okay";
512 pinctrl-names = "default"; 512 pinctrl-names = "default";
513 pinctrl-0 = <&i2c0_pins>; 513 pinctrl-0 = <&i2c0_pins>;
514 clock-frequency = <100000>; 514 clock-frequency = <100000>;
515 }; 515 };
516 516
517 &i2c1 { 517 &i2c1 {
518 status = "okay"; 518 status = "okay";
519 pinctrl-names = "default"; 519 pinctrl-names = "default";
520 pinctrl-0 = <&i2c1_pins>; 520 pinctrl-0 = <&i2c1_pins>;
521 clock-frequency = <100000>; 521 clock-frequency = <100000>;
522 522
523 tps@24 { 523 tps@24 {
524 compatible = "ti,tps65218"; 524 compatible = "ti,tps65218";
525 reg = <0x24>; 525 reg = <0x24>;
526 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* NMIN */ 526 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* NMIN */
527 interrupt-controller; 527 interrupt-controller;
528 #interrupt-cells = <2>; 528 #interrupt-cells = <2>;
529 529
530 dcdc1: regulator-dcdc1 { 530 dcdc1: regulator-dcdc1 {
531 compatible = "ti,tps65218-dcdc1"; 531 compatible = "ti,tps65218-dcdc1";
532 /* VDD_CORE limits min of OPP50 and max of OPP100 */ 532 /* VDD_CORE limits min of OPP50 and max of OPP100 */
533 regulator-name = "vdd_core"; 533 regulator-name = "vdd_core";
534 regulator-min-microvolt = <912000>; 534 regulator-min-microvolt = <912000>;
535 regulator-max-microvolt = <1144000>; 535 regulator-max-microvolt = <1144000>;
536 regulator-boot-on; 536 regulator-boot-on;
537 regulator-always-on; 537 regulator-always-on;
538 }; 538 };
539 539
540 dcdc2: regulator-dcdc2 { 540 dcdc2: regulator-dcdc2 {
541 compatible = "ti,tps65218-dcdc2"; 541 compatible = "ti,tps65218-dcdc2";
542 /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */ 542 /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
543 regulator-name = "vdd_mpu"; 543 regulator-name = "vdd_mpu";
544 regulator-min-microvolt = <912000>; 544 regulator-min-microvolt = <912000>;
545 regulator-max-microvolt = <1378000>; 545 regulator-max-microvolt = <1378000>;
546 regulator-boot-on; 546 regulator-boot-on;
547 regulator-always-on; 547 regulator-always-on;
548 }; 548 };
549 549
550 dcdc3: regulator-dcdc3 { 550 dcdc3: regulator-dcdc3 {
551 compatible = "ti,tps65218-dcdc3"; 551 compatible = "ti,tps65218-dcdc3";
552 regulator-name = "vdds_ddr"; 552 regulator-name = "vdds_ddr";
553 /*regulator-min-microvolt = <1500000>; 553 /*regulator-min-microvolt = <1500000>;
554 regulator-max-microvolt = <1500000>;*/ 554 regulator-max-microvolt = <1500000>;*/
555 regulator-boot-on; 555 regulator-boot-on;
556 regulator-always-on; 556 regulator-always-on;
557 regulator-state-mem { 557 regulator-state-mem {
558 regulator-on-in-suspend; 558 regulator-on-in-suspend;
559 }; 559 };
560 regulator-state-disk { 560 regulator-state-disk {
561 regulator-off-in-suspend; 561 regulator-off-in-suspend;
562 }; 562 };
563 }; 563 };
564 564
565 dcdc4: regulator-dcdc4 { 565 dcdc4: regulator-dcdc4 {
566 compatible = "ti,tps65218-dcdc4"; 566 compatible = "ti,tps65218-dcdc4";
567 regulator-name = "v3_3d"; 567 regulator-name = "v3_3d";
568 regulator-min-microvolt = <3300000>; 568 regulator-min-microvolt = <3300000>;
569 regulator-max-microvolt = <3300000>; 569 regulator-max-microvolt = <3300000>;
570 regulator-boot-on; 570 regulator-boot-on;
571 regulator-always-on; 571 regulator-always-on;
572 }; 572 };
573 573
574 dcdc5: regulator-dcdc5 { 574 dcdc5: regulator-dcdc5 {
575 compatible = "ti,tps65218-dcdc5"; 575 compatible = "ti,tps65218-dcdc5";
576 regulator-name = "v1_0bat"; 576 regulator-name = "v1_0bat";
577 regulator-min-microvolt = <1000000>; 577 regulator-min-microvolt = <1000000>;
578 regulator-max-microvolt = <1000000>; 578 regulator-max-microvolt = <1000000>;
579 regulator-boot-on; 579 regulator-boot-on;
580 regulator-always-on; 580 regulator-always-on;
581 regulator-state-mem { 581 regulator-state-mem {
582 regulator-on-in-suspend; 582 regulator-on-in-suspend;
583 }; 583 };
584 }; 584 };
585 585
586 dcdc6: regulator-dcdc6 { 586 dcdc6: regulator-dcdc6 {
587 compatible = "ti,tps65218-dcdc6"; 587 compatible = "ti,tps65218-dcdc6";
588 regulator-name = "v1_8bat"; 588 regulator-name = "v1_8bat";
589 regulator-min-microvolt = <1800000>; 589 regulator-min-microvolt = <1800000>;
590 regulator-max-microvolt = <1800000>; 590 regulator-max-microvolt = <1800000>;
591 regulator-boot-on; 591 regulator-boot-on;
592 regulator-always-on; 592 regulator-always-on;
593 regulator-state-mem { 593 regulator-state-mem {
594 regulator-on-in-suspend; 594 regulator-on-in-suspend;
595 }; 595 };
596 }; 596 };
597 597
598 ldo1: regulator-ldo1 { 598 ldo1: regulator-ldo1 {
599 compatible = "ti,tps65218-ldo1"; 599 compatible = "ti,tps65218-ldo1";
600 regulator-name = "v1_8d"; 600 regulator-name = "v1_8d";
601 regulator-min-microvolt = <1800000>; 601 regulator-min-microvolt = <1800000>;
602 regulator-max-microvolt = <1800000>; 602 regulator-max-microvolt = <1800000>;
603 regulator-boot-on; 603 regulator-boot-on;
604 regulator-always-on; 604 regulator-always-on;
605 }; 605 };
606 606
607 power-button { 607 power-button {
608 compatible = "ti,tps65218-pwrbutton"; 608 compatible = "ti,tps65218-pwrbutton";
609 status = "okay"; 609 status = "okay";
610 interrupts = <3 IRQ_TYPE_EDGE_BOTH>; 610 interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
611 }; 611 };
612 }; 612 };
613 613
614 s35390a: s35390a@30 { 614 s35390a: s35390a@30 {
615 compatible = "s35390a"; 615 compatible = "s35390a";
616 reg = <0x30>; 616 reg = <0x30>;
617 }; 617 };
618 618
619 at24@50 { 619 at24@50 {
620 compatible = "at24,24c256"; 620 compatible = "at24,24c256";
621 reg = <0x50>; 621 reg = <0x50>;
622 }; 622 };
623 623
624 at24@57 { 624 at24@57 {
625 compatible = "at24,24c256"; 625 compatible = "at24,24c256";
626 reg = <0x57>; 626 reg = <0x57>;
627 }; 627 };
628 628
629 /* For TI TLV320AIC3106 Audio Codec */ 629 /* For TI TLV320AIC3106 Audio Codec */
630 /*tlv320aic3106: tlv320aic3106@1b { 630 /*tlv320aic3106: tlv320aic3106@1b {
631 #sound-dai-cells = <0>; 631 #sound-dai-cells = <0>;
632 compatible = "ti,tlv320aic3106"; 632 compatible = "ti,tlv320aic3106";
633 reg = <0x1b>; 633 reg = <0x1b>;
634 status = "okay"; 634 status = "okay";
635 635
636 AVDD-supply = <&dcdc4>; 636 AVDD-supply = <&dcdc4>;
637 IOVDD-supply = <&dcdc6>; 637 IOVDD-supply = <&dcdc6>;
638 DRVDD-supply = <&dcdc4>; 638 DRVDD-supply = <&dcdc4>;
639 DVDD-supply = <&ldo1>; 639 DVDD-supply = <&ldo1>;
640 };*/ 640 };*/
641 641
642 /* For Freescale SGTL5000 Audio Codec */ 642 /* For Freescale SGTL5000 Audio Codec */
643 sgtl5000: sgtl5000@0a { 643 sgtl5000: sgtl5000@0a {
644 #sound-dai-cells = <0>; 644 #sound-dai-cells = <0>;
645 compatible = "fsl,sgtl5000"; 645 compatible = "fsl,sgtl5000";
646 reg = <0x0a>; 646 reg = <0x0a>;
647 clocks = <&audio_mstrclk>; 647 clocks = <&audio_mstrclk>;
648 VDDA-supply = <&dcdc4>; 648 VDDA-supply = <&dcdc4>;
649 VDDIO-supply = <&dcdc6>; 649 VDDIO-supply = <&dcdc6>;
650 VDDD-supply = <&ldo1>; 650 VDDD-supply = <&ldo1>;
651 }; 651 };
652 }; 652 };
653 653
654 &i2c2 { 654 &i2c2 {
655 status = "okay"; 655 status = "okay";
656 pinctrl-names = "default"; 656 pinctrl-names = "default";
657 pinctrl-0 = <&i2c2_pins>; 657 pinctrl-0 = <&i2c2_pins>;
658 clock-frequency = <100000>; 658 clock-frequency = <100000>;
659 659
660 /* CH7055A Parallel LCD to VGA D-SUB 15 way */ 660 /* CH7055A Parallel LCD to VGA D-SUB 15 way */
661 eeprom@76 { 661 eeprom@76 {
662 compatible = "at,24c256"; 662 compatible = "at,24c256";
663 reg = <0x76>; 663 reg = <0x76>;
664 }; 664 };
665 }; 665 };
666 666
667 667
668 &epwmss0 { 668 &epwmss0 {
669 status = "okay"; 669 status = "okay";
670 }; 670 };
671 671
672 &ehrpwm0 { 672 &ehrpwm0 {
673 pinctrl-names = "default"; 673 pinctrl-names = "default";
674 pinctrl-0 = <&ehrpwm0b_pins>; 674 pinctrl-0 = <&ehrpwm0b_pins>;
675 status = "okay"; 675 status = "okay";
676 }; 676 };
677 677
678 &gpio0 { 678 &gpio0 {
679 status = "okay"; 679 status = "okay";
680 }; 680 };
681 681
682 &gpio1 { 682 &gpio1 {
683 status = "okay"; 683 status = "okay";
684 }; 684 };
685 685
686 &gpio2 { 686 &gpio2 {
687 status = "okay"; 687 status = "okay";
688 }; 688 };
689 689
690 &gpio3 { 690 &gpio3 {
691 status = "okay"; 691 status = "okay";
692 }; 692 };
693 693
694 &gpio4 { 694 &gpio4 {
695 status = "okay"; 695 status = "okay";
696 }; 696 };
697 697
698 &gpio5 { 698 &gpio5 {
699 status = "okay"; 699 status = "okay";
700 }; 700 };
701 701
702 &mmc1 { 702 &mmc1 {
703 status = "okay"; 703 status = "okay";
704 pinctrl-names = "default"; 704 pinctrl-names = "default";
705 pinctrl-0 = <&mmc1_pins>; 705 pinctrl-0 = <&mmc1_pins>;
706 706
707 vmmc-supply = <&dcdc4>; 707 vmmc-supply = <&dcdc4>;
708 bus-width = <4>; 708 bus-width = <4>;
709 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 709 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
710 }; 710 };
711 711
712 &mmc2 { 712 &mmc2 {
713 pinctrl-names = "default"; 713 pinctrl-names = "default";
714 pinctrl-0 = <&emmc_pins>; 714 pinctrl-0 = <&emmc_pins>;
715 bus-width = <8>; 715 bus-width = <8>;
716 vmmc-supply = <&vmmcwl_fixed>; 716 vmmc-supply = <&vmmcwl_fixed>;
717 status = "okay"; 717 status = "okay";
718 ti,non-removable; 718 ti,non-removable;
719 }; 719 };
720 720
721 /*If carrier board eMMC (or 2nd SD slot) is present and used, un-comment out the following nodes. SD card will be emulated /dev/mmcblk2 instead of /dev/mmcblk1*/ 721 /*If carrier board eMMC (or 2nd SD slot) is present and used, un-comment out the following nodes. SD card will be emulated /dev/mmcblk2 instead of /dev/mmcblk1*/
722 722
723 /*&mmc3 { 723 /*&mmc3 {
724 status = "okay"; 724 status = "okay";
725 dmas = <&edma_xbar 30 0 1>, 725 dmas = <&edma_xbar 30 0 1>,
726 <&edma_xbar 31 0 2>; 726 <&edma_xbar 31 0 2>;
727 dma-names = "tx", "rx"; 727 dma-names = "tx", "rx";
728 vmmc-supply = <&vmmcwl_fixed>; 728 vmmc-supply = <&vmmcwl_fixed>;
729 bus-width = <8>; 729 bus-width = <8>;
730 pinctrl-names = "default"; 730 pinctrl-names = "default";
731 pinctrl-0 = <&sdmmc_pins>; 731 pinctrl-0 = <&sdmmc_pins>;
732 keep-power-in-suspend; 732 keep-power-in-suspend;
733 ti,non-removable; 733 ti,non-removable;
734 };*/ 734 };*/
735 735
736 /* Four-Wire Resistive Touch */ 736 /* Four-Wire Resistive Touch */
737 &tscadc { 737 &tscadc {
738 status = "disabled"; 738 status = "disabled";
739 tsc { 739 tsc {
740 ti,wires = <4>; 740 ti,wires = <4>;
741 ti,x-plate-resistance = <200>; 741 ti,x-plate-resistance = <200>;
742 ti,coordinate-readouts = <5>; 742 ti,coordinate-readouts = <5>;
743 ti,wire-config = <0x00 0x11 0x22 0x33>; 743 ti,wire-config = <0x00 0x11 0x22 0x33>;
744 ti,charge-delay = <0xB000>; 744 ti,charge-delay = <0xB000>;
745 }; 745 };
746 746
747 adc { 747 adc {
748 ti,adc-channels = <0 1 2 3>; 748 ti,adc-channels = <0 1 2 3>;
749 }; 749 };
750 }; 750 };
751 751
752 &usb2_phy1 { 752 &usb2_phy1 {
753 status = "okay"; 753 status = "okay";
754 }; 754 };
755 755
756 &usb1 { 756 &usb1 {
757 dr_mode = "host"; 757 dr_mode = "host";
758 status = "okay"; 758 status = "okay";
759 pinctrl-names = "default"; 759 pinctrl-names = "default";
760 pinctrl-0 = <&usb1_pins>; 760 pinctrl-0 = <&usb1_pins>;
761 }; 761 };
762 762
763 &usb2_phy2 { 763 &usb2_phy2 {
764 status = "okay"; 764 status = "okay";
765 }; 765 };
766 766
767 &usb2 { 767 &usb2 {
768 dr_mode = "host"; 768 dr_mode = "host";
769 status = "okay"; 769 status = "okay";
770 pinctrl-names = "default"; 770 pinctrl-names = "default";
771 pinctrl-0 = <&usb2_pins>; 771 pinctrl-0 = <&usb2_pins>;
772 }; 772 };
773 773
774 &spi0 { 774 &spi0 {
775 ti,spi-num-cs = <1>; 775 ti,spi-num-cs = <1>;
776 status = "okay"; 776 status = "okay";
777 pinctrl-names = "default"; 777 pinctrl-names = "default";
778 pinctrl-0 = <&spi0_pins>; 778 pinctrl-0 = <&spi0_pins>;
779 dmas = <&edma 16 0 779 dmas = <&edma 16 0
780 &edma 17 0>; 780 &edma 17 0>;
781 dma-names = "tx0", "rx0"; 781 dma-names = "tx0", "rx0";
782 782
783 flash: mx25u3235f@0 { 783 flash: mx25u3235f@0 {
784 #address-cells = <1>; 784 #address-cells = <1>;
785 #size-cells = <1>; 785 #size-cells = <1>;
786 compatible = "jedec,spi-nor"; 786 compatible = "jedec,spi-nor";
787 spi-max-frequency = <24000000>; 787 spi-max-frequency = <24000000>;
788 reg = <0>; 788 reg = <0>;
789 789
790 /* MTD partition table. 790 /* MTD partition table.
791 * The ROM checks the first 512KiB 791 * The ROM checks the first 512KiB
792 * for a valid file to boot(XIP). 792 * for a valid file to boot(XIP).
793 */ 793 */
794 partition@0 { 794 partition@0 {
795 label = "U-Boot"; 795 label = "U-Boot";
796 reg = <0x0 0x100000>; 796 reg = <0x0 0x100000>;
797 }; 797 };
798 798
799 partition@100000 { 799 partition@100000 {
800 label = "U-Boot Environment"; 800 label = "U-Boot Environment";
801 reg = <0x100000 0x080000>; 801 reg = <0x100000 0x080000>;
802 }; 802 };
803 803
804 partition@180000 { 804 partition@180000 {
805 label = "Flattened Device Tree"; 805 label = "Flattened Device Tree";
806 reg = <0x180000 0x200000>; 806 reg = <0x180000 0x200000>;
807 }; 807 };
808 808
809 }; 809 };
810 }; 810 };
811 811
812 /* SPI0, spidev2 */ 812 /* SPI0, spidev2 */
813 &spi2 { 813 &spi2 {
814 ti,spi-num-cs = <2>; 814 ti,spi-num-cs = <2>;
815 status = "okay"; 815 status = "okay";
816 pinctrl-names = "default"; 816 pinctrl-names = "default";
817 pinctrl-0 = <&spi2_pins>; 817 pinctrl-0 = <&spi2_pins>;
818 cs-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>,<&gpio4 12 GPIO_ACTIVE_HIGH>; 818 cs-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>,<&gpio4 12 GPIO_ACTIVE_HIGH>;
819 dmas = <&edma 18 0 819 dmas = <&edma 18 0
820 &edma 19 0 820 &edma 19 0
821 &edma 20 0 821 &edma 20 0
822 &edma 21 0>; 822 &edma 21 0>;
823 dma-names = "tx0", "rx0", "tx1", "rx1"; 823 dma-names = "tx0", "rx0", "tx1", "rx1";
824 824
825 spidev1: spidev@0 { 825 spidev1: spidev@0 {
826 #address-cells = <1>; 826 #address-cells = <1>;
827 #size-cells = <0>; 827 #size-cells = <0>;
828 compatible = "spidev"; 828 compatible = "spidev";
829 reg = <0>; 829 reg = <0>;
830 spi-max-frequency = <5000000>; 830 spi-max-frequency = <5000000>;
831 }; 831 };
832 832
833 spidev2: spidev@1 { 833 spidev2: spidev@1 {
834 #address-cells = <1>; 834 #address-cells = <1>;
835 #size-cells = <0>; 835 #size-cells = <0>;
836 compatible = "spidev"; 836 compatible = "spidev";
837 reg = <1>; 837 reg = <1>;
838 spi-max-frequency = <5000000>; 838 spi-max-frequency = <5000000>;
839 }; 839 };
840 }; 840 };
841 841
842 /* SPI1, spidev3 */ 842 /* SPI1, spidev3 */
843 &spi4 { 843 &spi4 {
844 ti,spi-num-cs = <2>; 844 ti,spi-num-cs = <2>;
845 status = "okay"; 845 status = "okay";
846 pinctrl-names = "default"; 846 pinctrl-names = "default";
847 pinctrl-0 = <&spi4_pins>; 847 pinctrl-0 = <&spi4_pins>;
848 cs-gpios = <&gpio5 7 GPIO_ACTIVE_HIGH>,<&gpio5 0 GPIO_ACTIVE_HIGH>; 848 cs-gpios = <&gpio5 7 GPIO_ACTIVE_HIGH>,<&gpio5 0 GPIO_ACTIVE_HIGH>;
849 dmas = <&edma 26 0 849 dmas = <&edma 26 0
850 &edma 27 0 850 &edma 27 0
851 &edma 28 0 851 &edma 28 0
852 &edma 29 0>; 852 &edma 29 0>;
853 dma-names = "tx0", "rx0", "tx1", "rx1"; 853 dma-names = "tx0", "rx0", "tx1", "rx1";
854 854
855 spidev3: spidev@0 { 855 spidev3: spidev@0 {
856 #address-cells = <1>; 856 #address-cells = <1>;
857 #size-cells = <0>; 857 #size-cells = <0>;
858 compatible = "spidev"; 858 compatible = "spidev";
859 reg = <0>; 859 reg = <0>;
860 spi-max-frequency = <5000000>; 860 spi-max-frequency = <5000000>;
861 }; 861 };
862 862
863 spidev4: spidev@1 { 863 spidev4: spidev@1 {
864 #address-cells = <1>; 864 #address-cells = <1>;
865 #size-cells = <0>; 865 #size-cells = <0>;
866 compatible = "spidev"; 866 compatible = "spidev";
867 reg = <1>; 867 reg = <1>;
868 spi-max-frequency = <5000000>; 868 spi-max-frequency = <5000000>;
869 }; 869 };
870 }; 870 };
871 871
872 &uart0 { 872 &uart0 {
873 pinctrl-names = "default"; 873 pinctrl-names = "default";
874 pinctrl-0 = <&uart0_pins>; 874 pinctrl-0 = <&uart0_pins>;
875 pinctrl-1 = <&uart0_pins_sleep>; 875 pinctrl-1 = <&uart0_pins_sleep>;
876 876
877 status = "okay"; 877 status = "okay";
878 }; 878 };
879 879
880 &uart3 { 880 &uart3 {
881 pinctrl-names = "default"; 881 pinctrl-names = "default";
882 pinctrl-0 = <&uart3_pins>; 882 pinctrl-0 = <&uart3_pins>;
883 pinctrl-1 = <&uart3_pins_sleep>; 883 pinctrl-1 = <&uart3_pins_sleep>;
884 884
885 status = "okay"; 885 status = "okay";
886 }; 886 };
887 887
888 &uart2 { 888 &uart2 {
889 pinctrl-names = "default"; 889 pinctrl-names = "default";
890 pinctrl-0 = <&uart2_pins>; 890 pinctrl-0 = <&uart2_pins>;
891 pinctrl-1 = <&uart2_pins_sleep>; 891 pinctrl-1 = <&uart2_pins_sleep>;
892 892
893 status = "okay"; 893 status = "okay";
894 }; 894 };
895 895
896 &uart4 { 896 &uart4 {
897 pinctrl-names = "default"; 897 pinctrl-names = "default";
898 pinctrl-0 = <&uart4_pins>; 898 pinctrl-0 = <&uart4_pins>;
899 pinctrl-1 = <&uart4_pins_sleep>; 899 pinctrl-1 = <&uart4_pins_sleep>;
900 900
901 status = "okay"; 901 status = "okay";
902 }; 902 };
903 903
904 &dcan0 { 904 &dcan0 {
905 pinctrl-names = "default"; 905 pinctrl-names = "default";
906 pinctrl-0 = <&dcan0_default>; 906 pinctrl-0 = <&dcan0_default>;
907 status = "okay"; 907 status = "okay";
908 }; 908 };
909 909
910 &dcan1 { 910 &dcan1 {
911 pinctrl-names = "default"; 911 pinctrl-names = "default";
912 pinctrl-0 = <&dcan1_default>; 912 pinctrl-0 = <&dcan1_default>;
913 status = "okay"; 913 status = "okay";
914 }; 914 };
915 915
916 &mac { 916 &mac {
917 pinctrl-names = "default", "sleep"; 917 pinctrl-names = "default", "sleep";
918 pinctrl-0 = <&cpsw_default>; 918 pinctrl-0 = <&cpsw_default>;
919 pinctrl-1 = <&cpsw_sleep>; 919 pinctrl-1 = <&cpsw_sleep>;
920 dual_emac = <1>; 920 dual_emac = <1>;
921 active_slave = <1>;
921 status = "okay"; 922 status = "okay";
922 }; 923 };
923 924
924 &davinci_mdio { 925 &davinci_mdio {
925 pinctrl-names = "default", "sleep"; 926 pinctrl-names = "default", "sleep";
926 pinctrl-0 = <&davinci_mdio_default>; 927 pinctrl-0 = <&davinci_mdio_default>;
927 pinctrl-1 = <&davinci_mdio_sleep>; 928 pinctrl-1 = <&davinci_mdio_sleep>;
928 status = "okay"; 929 status = "okay";
929 }; 930 };
930 931
931 &cpsw_emac0 { 932 &cpsw_emac0 {
932 phy_id = <&davinci_mdio>, <6>; 933 phy_id = <&davinci_mdio>, <6>;
933 phy-mode = "rgmii-txid"; 934 phy-mode = "rgmii-txid";
934 dual_emac_res_vlan = <1>; 935 dual_emac_res_vlan = <1>;
935 }; 936 };
936 937
937 &cpsw_emac1 { 938 &cpsw_emac1 {
938 phy_id = <&davinci_mdio>, <7>; 939 phy_id = <&davinci_mdio>, <7>;
939 phy-mode = "rgmii"; 940 phy-mode = "rgmii-txid";
940 dual_emac_res_vlan = <2>; 941 dual_emac_res_vlan = <2>;
941 }; 942 };
942 943
943 &elm { 944 &elm {
944 status = "okay"; 945 status = "okay";
945 }; 946 };
946 947
947 &mcasp1 { 948 &mcasp1 {
948 #sound-dai-cells = <0>; 949 #sound-dai-cells = <0>;
949 pinctrl-names = "default", "sleep"; 950 pinctrl-names = "default", "sleep";
950 pinctrl-0 = <&mcasp1_pins>; 951 pinctrl-0 = <&mcasp1_pins>;
951 pinctrl-1 = <&mcasp1_sleep_pins>; 952 pinctrl-1 = <&mcasp1_sleep_pins>;
952 953
953 status = "okay"; 954 status = "okay";
954 955
955 op-mode = <0>; /* MCASP_IIS_MODE */ 956 op-mode = <0>; /* MCASP_IIS_MODE */
956 tdm-slots = <2>; 957 tdm-slots = <2>;
957 /* 4 serializers */ 958 /* 4 serializers */
958 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 959 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
959 1 2 0 0 960 1 2 0 0
960 >; 961 >;
961 962
962 tx-num-evt = <1>; 963 tx-num-evt = <1>;
963 rx-num-evt = <1>; 964 rx-num-evt = <1>;
964 }; 965 };
965 966
966 &dss { 967 &dss {
967 status = "okay"; 968 status = "okay";
968 969
969 pinctrl-names = "default"; 970 pinctrl-names = "default";
970 pinctrl-0 = <&dss_pins>; 971 pinctrl-0 = <&dss_pins>;
971 972
972 port { 973 port {
973 dpi_out: endpoint@0 { 974 dpi_out: endpoint@0 {
974 remote-endpoint = <&lcd_in>; 975 remote-endpoint = <&lcd_in>;
975 data-lines = <24>; 976 data-lines = <24>;
976 }; 977 };
977 }; 978 };
978 }; 979 };
979 980
980 &rtc { 981 &rtc {
981 clocks = <&clk_32k_rtc>, <&clk_32768_ck>; 982 clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
982 clock-names = "ext-clk", "int-clk"; 983 clock-names = "ext-clk", "int-clk";
983 status = "okay"; 984 status = "okay";
984 }; 985 };
985 986
986 &wdt { 987 &wdt {
987 status = "okay"; 988 status = "okay";
988 }; 989 };
989 990
990 &cpu { 991 &cpu {
991 cpu0-supply = <&dcdc2>; 992 cpu0-supply = <&dcdc2>;
992 }; 993 };
993 994
994 &wkup_m3_ipc { 995 &wkup_m3_ipc {
995 ti,scale-data-fw = "am43x-evm-scale-data.bin"; 996 ti,scale-data-fw = "am43x-evm-scale-data.bin";
996 }; 997 };
997 998
998 &pruss_soc_bus { 999 &pruss_soc_bus {
999 status = "okay"; 1000 status = "okay";
1000 1001
1001 pruss1: pruss@54400000 { 1002 pruss1: pruss@54400000 {
1002 status = "okay"; 1003 status = "okay";
1003 1004
1004 pru1_0: pru@54434000 { 1005 pru1_0: pru@54434000 {
1005 status = "okay"; 1006 status = "okay";
1006 }; 1007 };
1007 1008
1008 pru1_1: pru@54438000 { 1009 pru1_1: pru@54438000 {
1009 status = "okay"; 1010 status = "okay";
1010 }; 1011 };
1011 }; 1012 };
1012 1013
1013 pruss0: pruss@54440000 { 1014 pruss0: pruss@54440000 {
1014 status = "okay"; 1015 status = "okay";
1015 1016
1016 pru0_0: pru@54474000 { 1017 pru0_0: pru@54474000 {
1017 status = "okay"; 1018 status = "okay";
1018 }; 1019 };
1019 1020
1020 pru0_1: pru@54478000 { 1021 pru0_1: pru@54478000 {
1021 status = "okay"; 1022 status = "okay";
1022 }; 1023 };
1023 }; 1024 };
1024 }; 1025 };
1025 1026
1026 &sgx { 1027 &sgx {
1027 status = "okay"; 1028 status = "okay";
1028 }; 1029 };
1029 1030
drivers/video/logo/logo.c
Diff comments   View file @ a812607
1 1
2 /* 2 /*
3 * Linux logo to be displayed on boot 3 * Linux logo to be displayed on boot
4 * 4 *
5 * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu) 5 * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
6 * Copyright (C) 1996,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) 6 * Copyright (C) 1996,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
7 * Copyright (C) 2001 Greg Banks <gnb@alphalink.com.au> 7 * Copyright (C) 2001 Greg Banks <gnb@alphalink.com.au>
8 * Copyright (C) 2001 Jan-Benedict Glaw <jbglaw@lug-owl.de> 8 * Copyright (C) 2001 Jan-Benedict Glaw <jbglaw@lug-owl.de>
9 * Copyright (C) 2003 Geert Uytterhoeven <geert@linux-m68k.org> 9 * Copyright (C) 2003 Geert Uytterhoeven <geert@linux-m68k.org>
10 */ 10 */
11 11
12 #include <linux/linux_logo.h> 12 #include <linux/linux_logo.h>
13 #include <linux/stddef.h> 13 #include <linux/stddef.h>
14 #include <linux/module.h> 14 #include <linux/module.h>
15 15
16 #ifdef CONFIG_M68K 16 #ifdef CONFIG_M68K
17 #include <asm/setup.h> 17 #include <asm/setup.h>
18 #endif 18 #endif
19 19
20 static bool nologo; 20 static bool nologo;
21 module_param(nologo, bool, 0); 21 module_param(nologo, bool, 0);
22 MODULE_PARM_DESC(nologo, "Disables startup logo"); 22 MODULE_PARM_DESC(nologo, "Disables startup logo");
23 23
24 /* 24 /*
25 * Logos are located in the initdata, and will be freed in kernel_init. 25 * Logos are located in the initdata, and will be freed in kernel_init.
26 * Use late_init to mark the logos as freed to prevent any further use. 26 * Use late_init to mark the logos as freed to prevent any further use.
27 */ 27 */
28 28
29 static bool logos_freed; 29 static bool logos_freed;
30 30
31 static int __init fb_logo_late_init(void) 31 static int __init fb_logo_late_init(void)
32 { 32 {
33 logos_freed = true; 33 logos_freed = true;
34 return 0; 34 return 0;
35 } 35 }
36 36
37 late_initcall(fb_logo_late_init); 37 late_initcall_sync(fb_logo_late_init);
38 38
39 /* logo's are marked __initdata. Use __ref to tell 39 /* logo's are marked __initdata. Use __ref to tell
40 * modpost that it is intended that this function uses data 40 * modpost that it is intended that this function uses data
41 * marked __initdata. 41 * marked __initdata.
42 */ 42 */
43 const struct linux_logo * __ref fb_find_logo(int depth) 43 const struct linux_logo * __ref fb_find_logo(int depth)
44 { 44 {
45 const struct linux_logo *logo = NULL; 45 const struct linux_logo *logo = NULL;
46 46
47 if (nologo || logos_freed) 47 if (nologo || logos_freed)
48 return NULL; 48 return NULL;
49 49
50 if (depth >= 1) { 50 if (depth >= 1) {
51 #ifdef CONFIG_LOGO_LINUX_MONO 51 #ifdef CONFIG_LOGO_LINUX_MONO
52 /* Generic Linux logo */ 52 /* Generic Linux logo */
53 logo = &logo_linux_mono; 53 logo = &logo_linux_mono;
54 #endif 54 #endif
55 #ifdef CONFIG_LOGO_SUPERH_MONO 55 #ifdef CONFIG_LOGO_SUPERH_MONO
56 /* SuperH Linux logo */ 56 /* SuperH Linux logo */
57 logo = &logo_superh_mono; 57 logo = &logo_superh_mono;
58 #endif 58 #endif
59 } 59 }
60 60
61 if (depth >= 4) { 61 if (depth >= 4) {
62 #ifdef CONFIG_LOGO_LINUX_VGA16 62 #ifdef CONFIG_LOGO_LINUX_VGA16
63 /* Generic Linux logo */ 63 /* Generic Linux logo */
64 logo = &logo_linux_vga16; 64 logo = &logo_linux_vga16;
65 #endif 65 #endif
66 #ifdef CONFIG_LOGO_BLACKFIN_VGA16 66 #ifdef CONFIG_LOGO_BLACKFIN_VGA16
67 /* Blackfin processor logo */ 67 /* Blackfin processor logo */
68 logo = &logo_blackfin_vga16; 68 logo = &logo_blackfin_vga16;
69 #endif 69 #endif
70 #ifdef CONFIG_LOGO_SUPERH_VGA16 70 #ifdef CONFIG_LOGO_SUPERH_VGA16
71 /* SuperH Linux logo */ 71 /* SuperH Linux logo */
72 logo = &logo_superh_vga16; 72 logo = &logo_superh_vga16;
73 #endif 73 #endif
74 } 74 }
75 75
76 if (depth >= 8) { 76 if (depth >= 8) {
77 #ifdef CONFIG_LOGO_LINUX_CLUT224 77 #ifdef CONFIG_LOGO_LINUX_CLUT224
78 /* Generic Linux logo */ 78 /* Generic Linux logo */
79 logo = &logo_linux_clut224; 79 logo = &logo_linux_clut224;
80 #endif 80 #endif
81 #ifdef CONFIG_LOGO_BLACKFIN_CLUT224 81 #ifdef CONFIG_LOGO_BLACKFIN_CLUT224
82 /* Blackfin Linux logo */ 82 /* Blackfin Linux logo */
83 logo = &logo_blackfin_clut224; 83 logo = &logo_blackfin_clut224;
84 #endif 84 #endif
85 #ifdef CONFIG_LOGO_DEC_CLUT224 85 #ifdef CONFIG_LOGO_DEC_CLUT224
86 /* DEC Linux logo on MIPS/MIPS64 or ALPHA */ 86 /* DEC Linux logo on MIPS/MIPS64 or ALPHA */
87 logo = &logo_dec_clut224; 87 logo = &logo_dec_clut224;
88 #endif 88 #endif
89 #ifdef CONFIG_LOGO_MAC_CLUT224 89 #ifdef CONFIG_LOGO_MAC_CLUT224
90 /* Macintosh Linux logo on m68k */ 90 /* Macintosh Linux logo on m68k */
91 if (MACH_IS_MAC) 91 if (MACH_IS_MAC)
92 logo = &logo_mac_clut224; 92 logo = &logo_mac_clut224;
93 #endif 93 #endif
94 #ifdef CONFIG_LOGO_PARISC_CLUT224 94 #ifdef CONFIG_LOGO_PARISC_CLUT224
95 /* PA-RISC Linux logo */ 95 /* PA-RISC Linux logo */
96 logo = &logo_parisc_clut224; 96 logo = &logo_parisc_clut224;
97 #endif 97 #endif
98 #ifdef CONFIG_LOGO_SGI_CLUT224 98 #ifdef CONFIG_LOGO_SGI_CLUT224
99 /* SGI Linux logo on MIPS/MIPS64 */ 99 /* SGI Linux logo on MIPS/MIPS64 */
100 logo = &logo_sgi_clut224; 100 logo = &logo_sgi_clut224;
101 #endif 101 #endif
102 #ifdef CONFIG_LOGO_SUN_CLUT224 102 #ifdef CONFIG_LOGO_SUN_CLUT224
103 /* Sun Linux logo */ 103 /* Sun Linux logo */
104 logo = &logo_sun_clut224; 104 logo = &logo_sun_clut224;
105 #endif 105 #endif
106 #ifdef CONFIG_LOGO_SUPERH_CLUT224 106 #ifdef CONFIG_LOGO_SUPERH_CLUT224
107 /* SuperH Linux logo */ 107 /* SuperH Linux logo */
108 logo = &logo_superh_clut224; 108 logo = &logo_superh_clut224;
109 #endif 109 #endif
110 #ifdef CONFIG_LOGO_M32R_CLUT224 110 #ifdef CONFIG_LOGO_M32R_CLUT224
111 /* M32R Linux logo */ 111 /* M32R Linux logo */
112 logo = &logo_m32r_clut224; 112 logo = &logo_m32r_clut224;
113 #endif 113 #endif
114 } 114 }
115 return logo; 115 return logo;
116 } 116 }
117 EXPORT_SYMBOL_GPL(fb_find_logo); 117 EXPORT_SYMBOL_GPL(fb_find_logo);
118 118