Eric Lee / smarc-ti-linux-kernel

2
Download as
Browse Code ยป

Commit d73f825e6efa723e81d9ffcc4949fe9f03f1df29

Authored by Tomi Valkeinen
Committed by Tony Lindgren
1 parent 70fcaf921c
Exists in ti-lsk-linux-4.1.y and in 10 other branches dlt-processor-sdk-linux-03.00.00.04, processor-sdk-linux-02.00.01, smarc-ti-lsk-linux-4.1.y, smarct3x-processor-sdk-04.01.00.06, smarct3x-processor-sdk-linux-02.00.01, smarct3x-processor-sdk-linux-03.00.00.04, smarct4x-800-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-04.01.00.06, smarct4x-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-linux-03.00.00.04

ARM: dts: am437x-sk-evm.dts: fix LCD timings 

The lcd0 node for am437x-sk-evm.dts contains bad LCD timings, and while
they seem to work with a quick test, doing for example blank/unblank
will give you a black display.

This patch updates the timings to the 'typical' values from the LCD spec
sheet.

Also, the compatible string is completely bogus, as
"osddisplays,osd057T0559-34ts" is _not_ a 480x272 panel. The panel on
the board is a newhaven one. Update the compatible string to reflect
this. Note that this hasn't caused any issues, as the "panel-dpi"
matches the driver.

Cc: <stable@vger.kernel.org> # v3.17+
Tested-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Showing 1 changed file with 6 additions and 6 deletions Inline Diff

arch/arm/boot/dts/am437x-sk-evm.dts
Diff comments   View file @ d73f825
1 /* 1 /*
2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as 5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 */ 7 */
8 8
9 /* AM437x SK EVM */ 9 /* AM437x SK EVM */
10 10
11 /dts-v1/; 11 /dts-v1/;
12 12
13 #include "am4372.dtsi" 13 #include "am4372.dtsi"
14 #include <dt-bindings/pinctrl/am43xx.h> 14 #include <dt-bindings/pinctrl/am43xx.h>
15 #include <dt-bindings/pwm/pwm.h> 15 #include <dt-bindings/pwm/pwm.h>
16 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h> 17 #include <dt-bindings/input/input.h>
18 18
19 / { 19 / {
20 model = "TI AM437x SK EVM"; 20 model = "TI AM437x SK EVM";
21 compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43"; 21 compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";
22 22
23 aliases { 23 aliases {
24 display0 = &lcd0; 24 display0 = &lcd0;
25 }; 25 };
26 26
27 backlight { 27 backlight {
28 compatible = "pwm-backlight"; 28 compatible = "pwm-backlight";
29 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>; 29 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
30 brightness-levels = <0 51 53 56 62 75 101 152 255>; 30 brightness-levels = <0 51 53 56 62 75 101 152 255>;
31 default-brightness-level = <8>; 31 default-brightness-level = <8>;
32 }; 32 };
33 33
34 sound { 34 sound {
35 compatible = "ti,da830-evm-audio"; 35 compatible = "ti,da830-evm-audio";
36 ti,model = "AM437x-SK-EVM"; 36 ti,model = "AM437x-SK-EVM";
37 ti,audio-codec = <&tlv320aic3106>; 37 ti,audio-codec = <&tlv320aic3106>;
38 ti,mcasp-controller = <&mcasp1>; 38 ti,mcasp-controller = <&mcasp1>;
39 ti,codec-clock-rate = <24000000>; 39 ti,codec-clock-rate = <24000000>;
40 ti,audio-routing = 40 ti,audio-routing =
41 "Headphone Jack", "HPLOUT", 41 "Headphone Jack", "HPLOUT",
42 "Headphone Jack", "HPROUT"; 42 "Headphone Jack", "HPROUT";
43 }; 43 };
44 44
45 matrix_keypad: matrix_keypad@0 { 45 matrix_keypad: matrix_keypad@0 {
46 compatible = "gpio-matrix-keypad"; 46 compatible = "gpio-matrix-keypad";
47 47
48 pinctrl-names = "default"; 48 pinctrl-names = "default";
49 pinctrl-0 = <&matrix_keypad_pins>; 49 pinctrl-0 = <&matrix_keypad_pins>;
50 50
51 debounce-delay-ms = <5>; 51 debounce-delay-ms = <5>;
52 col-scan-delay-us = <1500>; 52 col-scan-delay-us = <1500>;
53 53
54 row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */ 54 row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */
55 &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */ 55 &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */
56 56
57 col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */ 57 col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */
58 &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */ 58 &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */
59 59
60 linux,keymap = < 60 linux,keymap = <
61 MATRIX_KEY(0, 0, KEY_DOWN) 61 MATRIX_KEY(0, 0, KEY_DOWN)
62 MATRIX_KEY(0, 1, KEY_RIGHT) 62 MATRIX_KEY(0, 1, KEY_RIGHT)
63 MATRIX_KEY(1, 0, KEY_LEFT) 63 MATRIX_KEY(1, 0, KEY_LEFT)
64 MATRIX_KEY(1, 1, KEY_UP) 64 MATRIX_KEY(1, 1, KEY_UP)
65 >; 65 >;
66 }; 66 };
67 67
68 leds { 68 leds {
69 compatible = "gpio-leds"; 69 compatible = "gpio-leds";
70 70
71 pinctrl-names = "default"; 71 pinctrl-names = "default";
72 pinctrl-0 = <&leds_pins>; 72 pinctrl-0 = <&leds_pins>;
73 73
74 led@0 { 74 led@0 {
75 label = "am437x-sk:red:heartbeat"; 75 label = "am437x-sk:red:heartbeat";
76 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */ 76 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
77 linux,default-trigger = "heartbeat"; 77 linux,default-trigger = "heartbeat";
78 default-state = "off"; 78 default-state = "off";
79 }; 79 };
80 80
81 led@1 { 81 led@1 {
82 label = "am437x-sk:green:mmc1"; 82 label = "am437x-sk:green:mmc1";
83 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */ 83 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */
84 linux,default-trigger = "mmc0"; 84 linux,default-trigger = "mmc0";
85 default-state = "off"; 85 default-state = "off";
86 }; 86 };
87 87
88 led@2 { 88 led@2 {
89 label = "am437x-sk:blue:cpu0"; 89 label = "am437x-sk:blue:cpu0";
90 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */ 90 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */
91 linux,default-trigger = "cpu0"; 91 linux,default-trigger = "cpu0";
92 default-state = "off"; 92 default-state = "off";
93 }; 93 };
94 94
95 led@3 { 95 led@3 {
96 label = "am437x-sk:blue:usr3"; 96 label = "am437x-sk:blue:usr3";
97 gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */ 97 gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */
98 default-state = "off"; 98 default-state = "off";
99 }; 99 };
100 }; 100 };
101 101
102 lcd0: display { 102 lcd0: display {
103 compatible = "osddisplays,osd057T0559-34ts", "panel-dpi"; 103 compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi";
104 label = "lcd"; 104 label = "lcd";
105 105
106 pinctrl-names = "default"; 106 pinctrl-names = "default";
107 pinctrl-0 = <&lcd_pins>; 107 pinctrl-0 = <&lcd_pins>;
108 108
109 enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 109 enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
110 110
111 panel-timing { 111 panel-timing {
112 clock-frequency = <9000000>; 112 clock-frequency = <9000000>;
113 hactive = <480>; 113 hactive = <480>;
114 vactive = <272>; 114 vactive = <272>;
115 hfront-porch = <8>; 115 hfront-porch = <2>;
116 hback-porch = <43>; 116 hback-porch = <2>;
117 hsync-len = <4>; 117 hsync-len = <41>;
118 vback-porch = <12>; 118 vfront-porch = <2>;
119 vfront-porch = <4>; 119 vback-porch = <2>;
120 vsync-len = <10>; 120 vsync-len = <10>;
121 hsync-active = <0>; 121 hsync-active = <0>;
122 vsync-active = <0>; 122 vsync-active = <0>;
123 de-active = <1>; 123 de-active = <1>;
124 pixelclk-active = <1>; 124 pixelclk-active = <1>;
125 }; 125 };
126 126
127 port { 127 port {
128 lcd_in: endpoint { 128 lcd_in: endpoint {
129 remote-endpoint = <&dpi_out>; 129 remote-endpoint = <&dpi_out>;
130 }; 130 };
131 }; 131 };
132 }; 132 };
133 }; 133 };
134 134
135 &am43xx_pinmux { 135 &am43xx_pinmux {
136 matrix_keypad_pins: matrix_keypad_pins { 136 matrix_keypad_pins: matrix_keypad_pins {
137 pinctrl-single,pins = < 137 pinctrl-single,pins = <
138 0x24c (PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */ 138 0x24c (PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */
139 0x250 (PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */ 139 0x250 (PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */
140 0x254 (PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */ 140 0x254 (PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */
141 0x258 (PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */ 141 0x258 (PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */
142 >; 142 >;
143 }; 143 };
144 144
145 leds_pins: leds_pins { 145 leds_pins: leds_pins {
146 pinctrl-single,pins = < 146 pinctrl-single,pins = <
147 0x228 (PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */ 147 0x228 (PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */
148 0x22c (PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */ 148 0x22c (PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */
149 0x230 (PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */ 149 0x230 (PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */
150 0x234 (PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */ 150 0x234 (PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */
151 >; 151 >;
152 }; 152 };
153 153
154 i2c0_pins: i2c0_pins { 154 i2c0_pins: i2c0_pins {
155 pinctrl-single,pins = < 155 pinctrl-single,pins = <
156 0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 156 0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
157 0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 157 0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
158 >; 158 >;
159 }; 159 };
160 160
161 i2c1_pins: i2c1_pins { 161 i2c1_pins: i2c1_pins {
162 pinctrl-single,pins = < 162 pinctrl-single,pins = <
163 0x15c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */ 163 0x15c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
164 0x158 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */ 164 0x158 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
165 >; 165 >;
166 }; 166 };
167 167
168 mmc1_pins: pinmux_mmc1_pins { 168 mmc1_pins: pinmux_mmc1_pins {
169 pinctrl-single,pins = < 169 pinctrl-single,pins = <
170 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ 170 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
171 >; 171 >;
172 }; 172 };
173 173
174 ecap0_pins: backlight_pins { 174 ecap0_pins: backlight_pins {
175 pinctrl-single,pins = < 175 pinctrl-single,pins = <
176 0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */ 176 0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
177 >; 177 >;
178 }; 178 };
179 179
180 edt_ft5306_ts_pins: edt_ft5306_ts_pins { 180 edt_ft5306_ts_pins: edt_ft5306_ts_pins {
181 pinctrl-single,pins = < 181 pinctrl-single,pins = <
182 0x74 (PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */ 182 0x74 (PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
183 0x78 (PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */ 183 0x78 (PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */
184 >; 184 >;
185 }; 185 };
186 186
187 cpsw_default: cpsw_default { 187 cpsw_default: cpsw_default {
188 pinctrl-single,pins = < 188 pinctrl-single,pins = <
189 /* Slave 1 */ 189 /* Slave 1 */
190 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */ 190 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
191 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ 191 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
192 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ 192 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
193 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ 193 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
194 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ 194 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
195 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ 195 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
196 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ 196 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
197 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ 197 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
198 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ 198 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
199 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ 199 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
200 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ 200 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
201 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ 201 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
202 202
203 /* Slave 2 */ 203 /* Slave 2 */
204 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ 204 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
205 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ 205 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
206 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ 206 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
207 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ 207 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
208 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ 208 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
209 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ 209 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
210 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ 210 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
211 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */ 211 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */
212 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ 212 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
213 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ 213 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
214 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ 214 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
215 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ 215 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
216 >; 216 >;
217 }; 217 };
218 218
219 cpsw_sleep: cpsw_sleep { 219 cpsw_sleep: cpsw_sleep {
220 pinctrl-single,pins = < 220 pinctrl-single,pins = <
221 /* Slave 1 reset value */ 221 /* Slave 1 reset value */
222 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) 222 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
223 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) 223 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
224 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) 224 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
225 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) 225 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
226 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) 226 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
227 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) 227 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
228 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) 228 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
229 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) 229 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
230 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) 230 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
231 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) 231 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
232 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) 232 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
233 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) 233 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
234 234
235 /* Slave 2 reset value */ 235 /* Slave 2 reset value */
236 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) 236 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
237 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) 237 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
238 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) 238 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
239 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) 239 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
240 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) 240 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
241 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) 241 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
242 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) 242 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
243 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) 243 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
244 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) 244 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
245 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) 245 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
246 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) 246 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
247 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) 247 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
248 >; 248 >;
249 }; 249 };
250 250
251 davinci_mdio_default: davinci_mdio_default { 251 davinci_mdio_default: davinci_mdio_default {
252 pinctrl-single,pins = < 252 pinctrl-single,pins = <
253 /* MDIO */ 253 /* MDIO */
254 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 254 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
255 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ 255 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
256 >; 256 >;
257 }; 257 };
258 258
259 davinci_mdio_sleep: davinci_mdio_sleep { 259 davinci_mdio_sleep: davinci_mdio_sleep {
260 pinctrl-single,pins = < 260 pinctrl-single,pins = <
261 /* MDIO reset value */ 261 /* MDIO reset value */
262 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) 262 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
263 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) 263 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
264 >; 264 >;
265 }; 265 };
266 266
267 dss_pins: dss_pins { 267 dss_pins: dss_pins {
268 pinctrl-single,pins = < 268 pinctrl-single,pins = <
269 0x020 (PIN_OUTPUT_PULLUP | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */ 269 0x020 (PIN_OUTPUT_PULLUP | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */
270 0x024 (PIN_OUTPUT_PULLUP | MUX_MODE1) 270 0x024 (PIN_OUTPUT_PULLUP | MUX_MODE1)
271 0x028 (PIN_OUTPUT_PULLUP | MUX_MODE1) 271 0x028 (PIN_OUTPUT_PULLUP | MUX_MODE1)
272 0x02c (PIN_OUTPUT_PULLUP | MUX_MODE1) 272 0x02c (PIN_OUTPUT_PULLUP | MUX_MODE1)
273 0x030 (PIN_OUTPUT_PULLUP | MUX_MODE1) 273 0x030 (PIN_OUTPUT_PULLUP | MUX_MODE1)
274 0x034 (PIN_OUTPUT_PULLUP | MUX_MODE1) 274 0x034 (PIN_OUTPUT_PULLUP | MUX_MODE1)
275 0x038 (PIN_OUTPUT_PULLUP | MUX_MODE1) 275 0x038 (PIN_OUTPUT_PULLUP | MUX_MODE1)
276 0x03c (PIN_OUTPUT_PULLUP | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */ 276 0x03c (PIN_OUTPUT_PULLUP | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */
277 0x0a0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */ 277 0x0a0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
278 0x0a4 (PIN_OUTPUT_PULLUP | MUX_MODE0) 278 0x0a4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
279 0x0a8 (PIN_OUTPUT_PULLUP | MUX_MODE0) 279 0x0a8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
280 0x0ac (PIN_OUTPUT_PULLUP | MUX_MODE0) 280 0x0ac (PIN_OUTPUT_PULLUP | MUX_MODE0)
281 0x0b0 (PIN_OUTPUT_PULLUP | MUX_MODE0) 281 0x0b0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
282 0x0b4 (PIN_OUTPUT_PULLUP | MUX_MODE0) 282 0x0b4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
283 0x0b8 (PIN_OUTPUT_PULLUP | MUX_MODE0) 283 0x0b8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
284 0x0bc (PIN_OUTPUT_PULLUP | MUX_MODE0) 284 0x0bc (PIN_OUTPUT_PULLUP | MUX_MODE0)
285 0x0c0 (PIN_OUTPUT_PULLUP | MUX_MODE0) 285 0x0c0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
286 0x0c4 (PIN_OUTPUT_PULLUP | MUX_MODE0) 286 0x0c4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
287 0x0c8 (PIN_OUTPUT_PULLUP | MUX_MODE0) 287 0x0c8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
288 0x0cc (PIN_OUTPUT_PULLUP | MUX_MODE0) 288 0x0cc (PIN_OUTPUT_PULLUP | MUX_MODE0)
289 0x0d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) 289 0x0d0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
290 0x0d4 (PIN_OUTPUT_PULLUP | MUX_MODE0) 290 0x0d4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
291 0x0d8 (PIN_OUTPUT_PULLUP | MUX_MODE0) 291 0x0d8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
292 0x0dc (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */ 292 0x0dc (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
293 0x0e0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */ 293 0x0e0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
294 0x0e4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */ 294 0x0e4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
295 0x0e8 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */ 295 0x0e8 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
296 0x0ec (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */ 296 0x0ec (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
297 297
298 >; 298 >;
299 }; 299 };
300 300
301 qspi_pins: qspi_pins { 301 qspi_pins: qspi_pins {
302 pinctrl-single,pins = < 302 pinctrl-single,pins = <
303 0x7c (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */ 303 0x7c (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */
304 0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */ 304 0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
305 0x90 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */ 305 0x90 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
306 0x94 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */ 306 0x94 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
307 0x98 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */ 307 0x98 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */
308 0x9c (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */ 308 0x9c (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
309 >; 309 >;
310 }; 310 };
311 311
312 mcasp1_pins: mcasp1_pins { 312 mcasp1_pins: mcasp1_pins {
313 pinctrl-single,pins = < 313 pinctrl-single,pins = <
314 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ 314 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
315 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ 315 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
316 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ 316 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
317 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ 317 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
318 >; 318 >;
319 }; 319 };
320 320
321 lcd_pins: lcd_pins { 321 lcd_pins: lcd_pins {
322 pinctrl-single,pins = < 322 pinctrl-single,pins = <
323 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */ 323 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
324 >; 324 >;
325 }; 325 };
326 }; 326 };
327 327
328 &i2c0 { 328 &i2c0 {
329 status = "okay"; 329 status = "okay";
330 pinctrl-names = "default"; 330 pinctrl-names = "default";
331 pinctrl-0 = <&i2c0_pins>; 331 pinctrl-0 = <&i2c0_pins>;
332 clock-frequency = <400000>; 332 clock-frequency = <400000>;
333 333
334 tps@24 { 334 tps@24 {
335 compatible = "ti,tps65218"; 335 compatible = "ti,tps65218";
336 reg = <0x24>; 336 reg = <0x24>;
337 interrupt-parent = <&gic>; 337 interrupt-parent = <&gic>;
338 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 338 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
339 interrupt-controller; 339 interrupt-controller;
340 #interrupt-cells = <2>; 340 #interrupt-cells = <2>;
341 341
342 dcdc1: regulator-dcdc1 { 342 dcdc1: regulator-dcdc1 {
343 compatible = "ti,tps65218-dcdc1"; 343 compatible = "ti,tps65218-dcdc1";
344 /* VDD_CORE limits min of OPP50 and max of OPP100 */ 344 /* VDD_CORE limits min of OPP50 and max of OPP100 */
345 regulator-name = "vdd_core"; 345 regulator-name = "vdd_core";
346 regulator-min-microvolt = <912000>; 346 regulator-min-microvolt = <912000>;
347 regulator-max-microvolt = <1144000>; 347 regulator-max-microvolt = <1144000>;
348 regulator-boot-on; 348 regulator-boot-on;
349 regulator-always-on; 349 regulator-always-on;
350 }; 350 };
351 351
352 dcdc2: regulator-dcdc2 { 352 dcdc2: regulator-dcdc2 {
353 compatible = "ti,tps65218-dcdc2"; 353 compatible = "ti,tps65218-dcdc2";
354 /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */ 354 /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
355 regulator-name = "vdd_mpu"; 355 regulator-name = "vdd_mpu";
356 regulator-min-microvolt = <912000>; 356 regulator-min-microvolt = <912000>;
357 regulator-max-microvolt = <1378000>; 357 regulator-max-microvolt = <1378000>;
358 regulator-boot-on; 358 regulator-boot-on;
359 regulator-always-on; 359 regulator-always-on;
360 }; 360 };
361 361
362 dcdc3: regulator-dcdc3 { 362 dcdc3: regulator-dcdc3 {
363 compatible = "ti,tps65218-dcdc3"; 363 compatible = "ti,tps65218-dcdc3";
364 regulator-name = "vdds_ddr"; 364 regulator-name = "vdds_ddr";
365 regulator-min-microvolt = <1500000>; 365 regulator-min-microvolt = <1500000>;
366 regulator-max-microvolt = <1500000>; 366 regulator-max-microvolt = <1500000>;
367 regulator-boot-on; 367 regulator-boot-on;
368 regulator-always-on; 368 regulator-always-on;
369 }; 369 };
370 370
371 dcdc4: regulator-dcdc4 { 371 dcdc4: regulator-dcdc4 {
372 compatible = "ti,tps65218-dcdc4"; 372 compatible = "ti,tps65218-dcdc4";
373 regulator-name = "v3_3d"; 373 regulator-name = "v3_3d";
374 regulator-min-microvolt = <3300000>; 374 regulator-min-microvolt = <3300000>;
375 regulator-max-microvolt = <3300000>; 375 regulator-max-microvolt = <3300000>;
376 regulator-boot-on; 376 regulator-boot-on;
377 regulator-always-on; 377 regulator-always-on;
378 }; 378 };
379 379
380 ldo1: regulator-ldo1 { 380 ldo1: regulator-ldo1 {
381 compatible = "ti,tps65218-ldo1"; 381 compatible = "ti,tps65218-ldo1";
382 regulator-name = "v1_8d"; 382 regulator-name = "v1_8d";
383 regulator-min-microvolt = <1800000>; 383 regulator-min-microvolt = <1800000>;
384 regulator-max-microvolt = <1800000>; 384 regulator-max-microvolt = <1800000>;
385 regulator-boot-on; 385 regulator-boot-on;
386 regulator-always-on; 386 regulator-always-on;
387 }; 387 };
388 388
389 }; 389 };
390 390
391 at24@50 { 391 at24@50 {
392 compatible = "at24,24c256"; 392 compatible = "at24,24c256";
393 pagesize = <64>; 393 pagesize = <64>;
394 reg = <0x50>; 394 reg = <0x50>;
395 }; 395 };
396 }; 396 };
397 397
398 &i2c1 { 398 &i2c1 {
399 status = "okay"; 399 status = "okay";
400 pinctrl-names = "default"; 400 pinctrl-names = "default";
401 pinctrl-0 = <&i2c1_pins>; 401 pinctrl-0 = <&i2c1_pins>;
402 clock-frequency = <400000>; 402 clock-frequency = <400000>;
403 403
404 edt-ft5306@38 { 404 edt-ft5306@38 {
405 status = "okay"; 405 status = "okay";
406 compatible = "edt,edt-ft5306", "edt,edt-ft5x06"; 406 compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
407 pinctrl-names = "default"; 407 pinctrl-names = "default";
408 pinctrl-0 = <&edt_ft5306_ts_pins>; 408 pinctrl-0 = <&edt_ft5306_ts_pins>;
409 409
410 reg = <0x38>; 410 reg = <0x38>;
411 interrupt-parent = <&gpio0>; 411 interrupt-parent = <&gpio0>;
412 interrupts = <31 0>; 412 interrupts = <31 0>;
413 413
414 wake-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; 414 wake-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
415 415
416 touchscreen-size-x = <480>; 416 touchscreen-size-x = <480>;
417 touchscreen-size-y = <272>; 417 touchscreen-size-y = <272>;
418 }; 418 };
419 419
420 tlv320aic3106: tlv320aic3106@1b { 420 tlv320aic3106: tlv320aic3106@1b {
421 compatible = "ti,tlv320aic3106"; 421 compatible = "ti,tlv320aic3106";
422 reg = <0x1b>; 422 reg = <0x1b>;
423 status = "okay"; 423 status = "okay";
424 424
425 /* Regulators */ 425 /* Regulators */
426 AVDD-supply = <&dcdc4>; 426 AVDD-supply = <&dcdc4>;
427 IOVDD-supply = <&dcdc4>; 427 IOVDD-supply = <&dcdc4>;
428 DRVDD-supply = <&dcdc4>; 428 DRVDD-supply = <&dcdc4>;
429 DVDD-supply = <&ldo1>; 429 DVDD-supply = <&ldo1>;
430 }; 430 };
431 431
432 lis331dlh@18 { 432 lis331dlh@18 {
433 compatible = "st,lis331dlh"; 433 compatible = "st,lis331dlh";
434 reg = <0x18>; 434 reg = <0x18>;
435 status = "okay"; 435 status = "okay";
436 436
437 Vdd-supply = <&dcdc4>; 437 Vdd-supply = <&dcdc4>;
438 Vdd_IO-supply = <&dcdc4>; 438 Vdd_IO-supply = <&dcdc4>;
439 interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>; 439 interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
440 }; 440 };
441 }; 441 };
442 442
443 &epwmss0 { 443 &epwmss0 {
444 status = "okay"; 444 status = "okay";
445 }; 445 };
446 446
447 &ecap0 { 447 &ecap0 {
448 status = "okay"; 448 status = "okay";
449 pinctrl-names = "default"; 449 pinctrl-names = "default";
450 pinctrl-0 = <&ecap0_pins>; 450 pinctrl-0 = <&ecap0_pins>;
451 }; 451 };
452 452
453 &gpio0 { 453 &gpio0 {
454 status = "okay"; 454 status = "okay";
455 }; 455 };
456 456
457 &gpio1 { 457 &gpio1 {
458 status = "okay"; 458 status = "okay";
459 }; 459 };
460 460
461 &gpio5 { 461 &gpio5 {
462 status = "okay"; 462 status = "okay";
463 }; 463 };
464 464
465 &mmc1 { 465 &mmc1 {
466 status = "okay"; 466 status = "okay";
467 pinctrl-names = "default"; 467 pinctrl-names = "default";
468 pinctrl-0 = <&mmc1_pins>; 468 pinctrl-0 = <&mmc1_pins>;
469 469
470 vmmc-supply = <&dcdc4>; 470 vmmc-supply = <&dcdc4>;
471 bus-width = <4>; 471 bus-width = <4>;
472 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 472 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
473 }; 473 };
474 474
475 &usb2_phy1 { 475 &usb2_phy1 {
476 status = "okay"; 476 status = "okay";
477 }; 477 };
478 478
479 &usb1 { 479 &usb1 {
480 dr_mode = "peripheral"; 480 dr_mode = "peripheral";
481 status = "okay"; 481 status = "okay";
482 }; 482 };
483 483
484 &usb2_phy2 { 484 &usb2_phy2 {
485 status = "okay"; 485 status = "okay";
486 }; 486 };
487 487
488 &usb2 { 488 &usb2 {
489 dr_mode = "host"; 489 dr_mode = "host";
490 status = "okay"; 490 status = "okay";
491 }; 491 };
492 492
493 &qspi { 493 &qspi {
494 status = "okay"; 494 status = "okay";
495 pinctrl-names = "default"; 495 pinctrl-names = "default";
496 pinctrl-0 = <&qspi_pins>; 496 pinctrl-0 = <&qspi_pins>;
497 497
498 spi-max-frequency = <48000000>; 498 spi-max-frequency = <48000000>;
499 m25p80@0 { 499 m25p80@0 {
500 compatible = "mx66l51235l"; 500 compatible = "mx66l51235l";
501 spi-max-frequency = <48000000>; 501 spi-max-frequency = <48000000>;
502 reg = <0>; 502 reg = <0>;
503 spi-cpol; 503 spi-cpol;
504 spi-cpha; 504 spi-cpha;
505 spi-tx-bus-width = <1>; 505 spi-tx-bus-width = <1>;
506 spi-rx-bus-width = <4>; 506 spi-rx-bus-width = <4>;
507 #address-cells = <1>; 507 #address-cells = <1>;
508 #size-cells = <1>; 508 #size-cells = <1>;
509 509
510 /* MTD partition table. 510 /* MTD partition table.
511 * The ROM checks the first 512KiB 511 * The ROM checks the first 512KiB
512 * for a valid file to boot(XIP). 512 * for a valid file to boot(XIP).
513 */ 513 */
514 partition@0 { 514 partition@0 {
515 label = "QSPI.U_BOOT"; 515 label = "QSPI.U_BOOT";
516 reg = <0x00000000 0x000080000>; 516 reg = <0x00000000 0x000080000>;
517 }; 517 };
518 partition@1 { 518 partition@1 {
519 label = "QSPI.U_BOOT.backup"; 519 label = "QSPI.U_BOOT.backup";
520 reg = <0x00080000 0x00080000>; 520 reg = <0x00080000 0x00080000>;
521 }; 521 };
522 partition@2 { 522 partition@2 {
523 label = "QSPI.U-BOOT-SPL_OS"; 523 label = "QSPI.U-BOOT-SPL_OS";
524 reg = <0x00100000 0x00010000>; 524 reg = <0x00100000 0x00010000>;
525 }; 525 };
526 partition@3 { 526 partition@3 {
527 label = "QSPI.U_BOOT_ENV"; 527 label = "QSPI.U_BOOT_ENV";
528 reg = <0x00110000 0x00010000>; 528 reg = <0x00110000 0x00010000>;
529 }; 529 };
530 partition@4 { 530 partition@4 {
531 label = "QSPI.U-BOOT-ENV.backup"; 531 label = "QSPI.U-BOOT-ENV.backup";
532 reg = <0x00120000 0x00010000>; 532 reg = <0x00120000 0x00010000>;
533 }; 533 };
534 partition@5 { 534 partition@5 {
535 label = "QSPI.KERNEL"; 535 label = "QSPI.KERNEL";
536 reg = <0x00130000 0x0800000>; 536 reg = <0x00130000 0x0800000>;
537 }; 537 };
538 partition@6 { 538 partition@6 {
539 label = "QSPI.FILESYSTEM"; 539 label = "QSPI.FILESYSTEM";
540 reg = <0x00930000 0x36D0000>; 540 reg = <0x00930000 0x36D0000>;
541 }; 541 };
542 }; 542 };
543 }; 543 };
544 544
545 &mac { 545 &mac {
546 pinctrl-names = "default", "sleep"; 546 pinctrl-names = "default", "sleep";
547 pinctrl-0 = <&cpsw_default>; 547 pinctrl-0 = <&cpsw_default>;
548 pinctrl-1 = <&cpsw_sleep>; 548 pinctrl-1 = <&cpsw_sleep>;
549 dual_emac = <1>; 549 dual_emac = <1>;
550 status = "okay"; 550 status = "okay";
551 }; 551 };
552 552
553 &davinci_mdio { 553 &davinci_mdio {
554 pinctrl-names = "default", "sleep"; 554 pinctrl-names = "default", "sleep";
555 pinctrl-0 = <&davinci_mdio_default>; 555 pinctrl-0 = <&davinci_mdio_default>;
556 pinctrl-1 = <&davinci_mdio_sleep>; 556 pinctrl-1 = <&davinci_mdio_sleep>;
557 status = "okay"; 557 status = "okay";
558 }; 558 };
559 559
560 &cpsw_emac0 { 560 &cpsw_emac0 {
561 phy_id = <&davinci_mdio>, <4>; 561 phy_id = <&davinci_mdio>, <4>;
562 phy-mode = "rgmii"; 562 phy-mode = "rgmii";
563 dual_emac_res_vlan = <1>; 563 dual_emac_res_vlan = <1>;
564 }; 564 };
565 565
566 &cpsw_emac1 { 566 &cpsw_emac1 {
567 phy_id = <&davinci_mdio>, <5>; 567 phy_id = <&davinci_mdio>, <5>;
568 phy-mode = "rgmii"; 568 phy-mode = "rgmii";
569 dual_emac_res_vlan = <2>; 569 dual_emac_res_vlan = <2>;
570 }; 570 };
571 571
572 &elm { 572 &elm {
573 status = "okay"; 573 status = "okay";
574 }; 574 };
575 575
576 &mcasp1 { 576 &mcasp1 {
577 pinctrl-names = "default"; 577 pinctrl-names = "default";
578 pinctrl-0 = <&mcasp1_pins>; 578 pinctrl-0 = <&mcasp1_pins>;
579 579
580 status = "okay"; 580 status = "okay";
581 581
582 op-mode = <0>; 582 op-mode = <0>;
583 tdm-slots = <2>; 583 tdm-slots = <2>;
584 serial-dir = < 584 serial-dir = <
585 0 0 1 2 585 0 0 1 2
586 >; 586 >;
587 587
588 tx-num-evt = <1>; 588 tx-num-evt = <1>;
589 rx-num-evt = <1>; 589 rx-num-evt = <1>;
590 }; 590 };
591 591
592 &dss { 592 &dss {
593 status = "okay"; 593 status = "okay";
594 594
595 pinctrl-names = "default"; 595 pinctrl-names = "default";
596 pinctrl-0 = <&dss_pins>; 596 pinctrl-0 = <&dss_pins>;
597 597
598 port { 598 port {
599 dpi_out: endpoint@0 { 599 dpi_out: endpoint@0 {
600 remote-endpoint = <&lcd_in>; 600 remote-endpoint = <&lcd_in>;
601 data-lines = <24>; 601 data-lines = <24>;
602 }; 602 };
603 }; 603 };
604 }; 604 };
605 605
606 &rtc { 606 &rtc {
607 status = "okay"; 607 status = "okay";
608 }; 608 };
609 609
610 &wdt { 610 &wdt {
611 status = "okay"; 611 status = "okay";
612 }; 612 };
613 613