/* * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ /* state the resources this carrier uses for audio function*/ /* the pin header uses for Audio*/ /* "S.39", mcasp1: mcasp0_fsr.mcasp1_fsx mode3 "S.40", mcasp1: mcasp0_axr1.mcasp1_axr0 mode3 "S.41", mcasp1: mcasp0_ahclkx.mcasp1_axr1 mode3 "S.42", mcasp1: mcasp0_aclkr.mcasp1_aclkx mode3 */ /* the pin header uses for SPI1*/ /* "P.54", spi1: mcasp0_ahclkr.spi1_cs0n mode3 "P.55", spi1: xdma_event_intro0.spi1_cs1n mode4 "P.56", spi1: mcasp0_aclkx.spi1_sclk mode3 "P.57", spi1: mcasp0_fsx.spi1_d0 mode3 "P.58", spi1: mcasp0_axr0.spi1_d1 mode3 */ /* the pin header uses for LCD*/ /* "S.114", lcd: lcd_data0.lcd_data0 mode0 "S.115", lcd: lcd_data1.lcd_data1 mode0 "S.116", lcd: lcd_data2.lcd_data2 mode0 "S.117", lcd: lcd_data3.lcd_data3 mode0 "S.118", lcd: lcd_data4.lcd_data4 mode0 "S.104", lcd: lcd_data5.lcd_data5 mode0 "S.105", lcd: lcd_data6.lcd_data6 mode0 "S.106", lcd: lcd_data7.lcd_data7 mode0 "S.107", lcd: lcd_data8.lcd_data8 mode0 "S.108", lcd: lcd_data9.lcd_data9 mode0 "S.109", lcd: lcd_data10.lcd_data10 mode0 "S.96", lcd: lcd_data11.lcd_data11 mode0 "S.97", lcd: lcd_data12.lcd_data12 mode0 "S.98", lcd: lcd_data13.lcd_data13 mode0 "S.99", lcd: lcd_data14.lcd_data14 mode0 "S.100", lcd: lcd_data15.lcd_data15 mode0 "S.113", lcd: lcd_data16.gpmc_ad15 mode0 "S.95", lcd: lcd_data17.gpmc_ad14 mode0 "S.112", lcd: lcd_data18.gpmc_ad13 mode0 "S.103", lcd: lcd_data19.gpmc_ad12 mode0 "S.94", lcd: lcd_data20.gpmc_ad11 mode0 "S.111", lcd: lcd_data21.gpmc_ad10 mode0 "S.102", lcd: lcd_data22.gpmc_ad9 mode0 "S.93", lcd: lcd_data23.gpmc_ad8 mode0 "S.121", lcd: lcd_vsync.lcd_vsync mode0 "S.122", lcd: lcd_hsync.lcd_hsync mode0 "S.123", lcd: lcd_pclk.lcd_pclk mode0 "S.120", lcd_de: lcd_ac_bias_en.lcd_ac_bias_en mode0 "S.133", lcd_vdd_en: gpmc_a7.gpio1_23 mode7 "S.127", lcd_bklt_en: gpmc_a6.gpio1_22 mode7 ` */ /* the pin header uses for DCAN0*/ /* "P.143", dcan0_tx: gmii1_txd3.dcan0_tx mode1 "P.144", dcan0_rx: gmii1_txd2.dcan0_rx mode1 */ /* the hardware ip uses */ /* "mcasp1", "i2c0", "i2c1", "i2c2", "uart0", "uart2", "uart3", "touch", "mmc0/SD", "emmc", "ecap0/backlight", "emac0", "emac1", "gpio1_22", "gpio1_23", "gpio1_19", "lcd", "dcan0", "spi0", "spi1"; */ / { model = "TI AM335x SMARCT335X"; compatible = "ti,am335x-smarct335x", "ti,am33xx"; cpus { cpu@0 { cpu0-supply = <&dcdc2_reg>; }; }; memory { device_type = "memory"; reg = <0x80000000 0x20000000>; /* 512 MB */ }; am33xx_pinmux: pinmux@44e10800 { pinctrl-names = "default"; pinctrl-0 = <&clkout2_pin &gpio_pins_default>; i2c0_pins: pinmux_i2c0_pins { pinctrl-single,pins = < 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ >; }; i2c1_pins: pinmux_i2c1_pins { pinctrl-single,pins = < 0x180 (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rxd.i2c1_sda */ 0x184 (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_txd.i2c1_scl */ >; }; i2c2_pins: pinmux_i2c2_pins { pinctrl-single,pins = < 0x178 (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */ 0x17c (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */ >; }; uart0_pins: pinmux_uart0_pins { pinctrl-single,pins = < 0x168 (PIN_INPUT_PULLUP | MUX_MODE6) /* uart0_ctsn.uart0_ctsn */ 0x16c (PIN_OUTPUT | MUX_MODE6) /* uart0_rtsn.uart0_rtsn */ 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ >; }; uart2_pins: pinmux_uart2_pins { pinctrl-single,pins = < 0x12c (PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_txclk.uart2_rxd */ 0x130 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_rxclk.uart2_txd */ >; }; uart3_pins: pinmux_uart3_pins { pinctrl-single,pins = < 0x134 (PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd3.uart3_rxd */ 0x138 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd2.uart3_txd */ >; }; clkout2_pin: pinmux_clkout2_pin { pinctrl-single,pins = < 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ >; }; /*GPIO0-GPIO11, GPIO0-5 is input and GPIO6-11 is output by default.*/ gpio_pins_default: pinmux_gpio_pin { pinctrl-single,pins = < 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gmii1_rx_dv.gpio3_4 */ 0x09c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */ 0x064 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */ 0x060 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a8.gpio1_24 */ 0x098 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wen.gpio2_4 */ 0x094 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oenren.gpio2_3 */ 0x078 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben1.gpio1_28 */ 0x07c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn0.gpio1_29 */ 0x088 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn3.gpio2_0 */ 0x08c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_clk.gpio2_1 */ 0x1e4 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* emu0.gpio3_7 */ 0x1e8 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* emu1.gpio3_8 */ >; }; ecap0_pins_default: backlight_pins { pinctrl-single,pins = < 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */ >; }; ecap0_pins_sleep: ecap0_pins_sleep { pinctrl-single,pins = < 0x164 (PULL_DISABLE | MUX_MODE7) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */ >; }; cpsw_default: cpsw_default { pinctrl-single,pins = < /* Slave 1 */ 0x10c (PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */ 0x110 (PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */ 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */ 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */ 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */ 0x13c (PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */ 0x140 (PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */ 0x144 (PIN_INPUT_PULLUP | MUX_MODE0) /* rmii1_ref_clk.rmii1_ref_clk */ /* Slave 2 */ 0x070 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wait0.rmii2_crs_dv */ 0x074 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wpn.rmii2_rxerr */ 0x040 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a0.rmii2_txen */ 0x050 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a4.rmii2_txd1 */ 0x054 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a5.rmii2_txd0 */ 0x068 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a10.rmii2_rxd1 */ 0x06c (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a11.rmii2_rxd0 */ 0x108 (PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_col.rmii2_ref_clk */ >; }; cpsw_sleep: cpsw_sleep { pinctrl-single,pins = < /* Slave 1 reset value */ 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* Slave 2 reset value */ 0x070 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x074 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x040 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x050 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x054 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x068 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x06c (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7) >; }; davinci_mdio_default: davinci_mdio_default { pinctrl-single,pins = < /* MDIO */ 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ >; }; davinci_mdio_sleep: davinci_mdio_sleep { pinctrl-single,pins = < /* MDIO reset value */ 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) >; }; mmc1_pins: pinmux_mmc1_pins { pinctrl-single,pins = < 0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ 0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ 0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ 0x0FC (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ 0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */ 0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ 0x048 (PIN_INPUT | MUX_MODE7) /* GPIO1_18, MMC1_CD */ 0x044 (PIN_INPUT | MUX_MODE7) /* GPIO1_17, MMC1_WP */ >; }; mmc1_pins_sleep: pinmux_mmc1_pins_sleep { pinctrl-single,pins = < 0x0F0 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x0F4 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x0F8 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x0FC (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x104 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x1A0 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x160 (PIN_INPUT_PULLDOWN | MUX_MODE7) >; }; emmc_pins: pinmux_emmc_pins { pinctrl-single,pins = < 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ >; }; lcd_pins_default: lcd_pins_default { pinctrl-single,pins = < 0x3c 0x01 /* gpmc_ad15.lcd_data16, OUTPUT | MODE1 */ 0x38 0x01 /* gpmc_ad14.lcd_data17, OUTPUT | MODE1 */ 0x34 0x01 /* gpmc_ad13.lcd_data18, OUTPUT | MODE1 */ 0x30 0x01 /* gpmc_ad12.lcd_data19, OUTPUT | MODE1 */ 0x2c 0x01 /* gpmc_ad11.lcd_data20, OUTPUT | MODE1 */ 0x28 0x01 /* gpmc_ad10.lcd_data21, OUTPUT | MODE1 */ 0x24 0x01 /* gpmc_ad9.lcd_data22, OUTPUT | MODE1 */ 0x20 0x01 /* gpmc_ad8.lcd_data23, OUTPUT | MODE1 */ 0xa0 0x00 /* lcd_data0.lcd_data0, OUTPUT | MODE0 */ 0xa4 0x00 /* lcd_data1.lcd_data1, OUTPUT | MODE0 */ 0xa8 0x00 /* lcd_data2.lcd_data2, OUTPUT | MODE0 */ 0xac 0x00 /* lcd_data3.lcd_data3, OUTPUT | MODE0 */ 0xb0 0x00 /* lcd_data4.lcd_data4, OUTPUT | MODE0 */ 0xb4 0x00 /* lcd_data5.lcd_data5, OUTPUT | MODE0 */ 0xb8 0x00 /* lcd_data6.lcd_data6, OUTPUT | MODE0 */ 0xbc 0x00 /* lcd_data7.lcd_data7, OUTPUT | MODE0 */ 0xc0 0x00 /* lcd_data8.lcd_data8, OUTPUT | MODE0 */ 0xc4 0x00 /* lcd_data9.lcd_data9, OUTPUT | MODE0 */ 0xc8 0x00 /* lcd_data10.lcd_data10, OUTPUT | MODE0 */ 0xcc 0x00 /* lcd_data11.lcd_data11, OUTPUT | MODE0 */ 0xd0 0x00 /* lcd_data12.lcd_data12, OUTPUT | MODE0 */ 0xd4 0x00 /* lcd_data13.lcd_data13, OUTPUT | MODE0 */ 0xd8 0x00 /* lcd_data14.lcd_data14, OUTPUT | MODE0 */ 0xdc 0x00 /* lcd_data15.lcd_data15, OUTPUT | MODE0 */ 0xe0 0x00 /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */ 0xe4 0x00 /* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */ 0xe8 0x00 /* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */ 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */ 0x5c 0x17 /* gpmc_a7.gpio1_23, MODE7 - LCD_VDD_EN */ >; }; lcd_pins_sleep: lcd_pins_sleep { pinctrl-single,pins = < 0x3c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.lcd_data16, OUTPUT | MODE1 */ 0x38 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.lcd_data17, OUTPUT | MODE1 */ 0x34 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.lcd_data18, OUTPUT | MODE1 */ 0x30 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.lcd_data19, OUTPUT | MODE1 */ 0x2c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad11.lcd_data20, OUTPUT | MODE1 */ 0x28 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.lcd_data21, OUTPUT | MODE1 */ 0x24 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad9.lcd_data22, OUTPUT | MODE1 */ 0x20 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad8.lcd_data23, OUTPUT | MODE1 */ 0xa0 (PULL_DISABLE | MUX_MODE7) /* lcd_data0.lcd_data0, OUTPUT | MODE0 */ 0xa4 (PULL_DISABLE | MUX_MODE7) /* lcd_data1.lcd_data1, OUTPUT | MODE0 */ 0xa8 (PULL_DISABLE | MUX_MODE7) /* lcd_data2.lcd_data2, OUTPUT | MODE0 */ 0xac (PULL_DISABLE | MUX_MODE7) /* lcd_data3.lcd_data3, OUTPUT | MODE0 */ 0xb0 (PULL_DISABLE | MUX_MODE7) /* lcd_data4.lcd_data4, OUTPUT | MODE0 */ 0xb4 (PULL_DISABLE | MUX_MODE7) /* lcd_data5.lcd_data5, OUTPUT | MODE0 */ 0xb8 (PULL_DISABLE | MUX_MODE7) /* lcd_data6.lcd_data6, OUTPUT | MODE0 */ 0xbc (PULL_DISABLE | MUX_MODE7) /* lcd_data7.lcd_data7, OUTPUT | MODE0 */ 0xc0 (PULL_DISABLE | MUX_MODE7) /* lcd_data8.lcd_data8, OUTPUT | MODE0 */ 0xc4 (PULL_DISABLE | MUX_MODE7) /* lcd_data9.lcd_data9, OUTPUT | MODE0 */ 0xc8 (PULL_DISABLE | MUX_MODE7) /* lcd_data10.lcd_data10, OUTPUT | MODE0 */ 0xcc (PULL_DISABLE | MUX_MODE7) /* lcd_data11.lcd_data11, OUTPUT | MODE0 */ 0xd0 (PULL_DISABLE | MUX_MODE7) /* lcd_data12.lcd_data12, OUTPUT | MODE0 */ 0xd4 (PULL_DISABLE | MUX_MODE7) /* lcd_data13.lcd_data13, OUTPUT | MODE0 */ 0xd8 (PULL_DISABLE | MUX_MODE7) /* lcd_data14.lcd_data14, OUTPUT | MODE0 */ 0xdc (PULL_DISABLE | MUX_MODE7) /* lcd_data15.lcd_data15, OUTPUT | MODE0 */ 0xe0 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */ 0xe4 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */ 0xe8 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */ 0xec (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */ >; }; mcasp1_pins: mcasp1_pins { pinctrl-single,pins = < 0x1a0 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_aclkr.mcasp1_aclkx */ 0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_fsr.mcasp1_fsx */ 0x1a8 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* mcasp0_axr1.mcasp1_axr0 */ 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_ahclkx.mcasp1_axr1 */ >; }; mcasp1_sleep_pins: mcasp1_sleep_pins { pinctrl-single,pins = < 0x1a0 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE7) >; }; spi0_pins: pinmux_spi0_pins { pinctrl-single,pins = < 0x150 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */ 0x154 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */ 0x158 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */ 0x15c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */ 0x160 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_cs1.spi0_cs1 */ >; }; spi1_pins: pinmux_spi1_pins { pinctrl-single,pins = < 0x190 (PIN_INPUT_PULLUP | MUX_MODE3) /* mcasp0_aclkx.spi1_sclk */ 0x194 (PIN_INPUT_PULLUP | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */ 0x198 (PIN_OUTPUT_PULLUP | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */ 0x19c (PIN_OUTPUT_PULLUP | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */ 0x1b0 (PIN_OUTPUT_PULLUP | MUX_MODE4) /* xdma_event_intr0.spi1_cs1 */ >; }; dcan0_default: dcan0_default_pins { pinctrl-single,pins = < 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gmii1_txd3.dcan0_tx */ 0x120 (PIN_INPUT_PULLUP | MUX_MODE1) /* gmii1_txd2.dcan0_rx */ >; }; }; ocp { uart0: serial@44e09000 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins>; status = "okay"; }; uart2: serial@48024000 { pinctrl-names = "default"; pinctrl-0 = <&uart2_pins>; status = "okay"; }; uart3: serial@481a6000 { pinctrl-names = "default"; pinctrl-0 = <&uart3_pins>; status = "okay"; }; i2c0: i2c@44e0b000 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; status = "okay"; clock-frequency = <100000>; /* Set OPP50 (0.95V) for VDD core */ sleep-sequence = /bits/ 8 < 0x02 0x24 0x0b 0x6d /* Password unlock 1 */ 0x02 0x24 0x10 0x02 /* Set DCDC3 to 0.95V */ 0x02 0x24 0x0b 0x6d /* Password unlock 2 */ 0x02 0x24 0x10 0x02 /* Set DCDC3 to 0.95V */ 0x02 0x24 0x0b 0x6c /* Password unlock 1 */ 0x02 0x24 0x11 0x86 /* Apply DCDC changes */ 0x02 0x24 0x0b 0x6c /* Password unlock 2 */ 0x02 0x24 0x11 0x86 /* Apply DCDC changes */ >; /* Set OPP100 (1.10V) for VDD core */ wake-sequence = /bits/ 8 < 0x02 0x24 0x0b 0x6d /* Password unlock 1 */ 0x02 0x24 0x10 0x08 /* Set DCDC3 to 1.1V */ 0x02 0x24 0x0b 0x6d /* Password unlock 2 */ 0x02 0x24 0x10 0x08 /* Set DCDC3 to 1.1V */ 0x02 0x24 0x0b 0x6c /* Password unlock 1 */ 0x02 0x24 0x11 0x86 /* Apply DCDC changes */ 0x02 0x24 0x0b 0x6c /* Password unlock 2 */ 0x02 0x24 0x11 0x86 /* Apply DCDC changes */ >; tps: tps@24 { reg = <0x24>; }; baseboard_eeprom: baseboard_eeprom@50 { compatible = "at,24c256"; reg = <0x50>; }; tlv320aic3106: tlv320aic3106@1b { compatible = "ti,tlv320aic3106"; reg = <0x1b>; status = "okay"; /* Regulators */ AVDD-supply = <&vmmcsd_fixed>; IOVDD-supply = <&vmmcsd_fixed>; DRVDD-supply = <&vmmcsd_fixed>; DVDD-supply = <&vdd1v8_fixed>; }; s35390a: s35390a@30 { compatible = "s35390a"; reg = <0x30>; }; cape_eeprom0: cape_eeprom@57 { compatible = "at,24c256"; reg = <0x57>; }; }; i2c1: i2c@4802a000 { pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins>; status = "okay"; clock-frequency = <100000>; }; i2c2: i2c@4819c000 { pinctrl-names = "default"; pinctrl-0 = <&i2c2_pins>; status = "okay"; clock-frequency = <100000>; }; spi0: spi@48030000 { pinctrl-names = "default"; pinctrl-0 = <&spi0_pins>; status = "okay"; spidev0: spi@0 { compatible = "spidev"; reg = <0>; spi-max-frequency = <16000000>; spi-cpha; }; spidev2: spi@1 { compatible = "spidev"; reg = <1>; spi-max-frequency = <16000000>; }; }; spi1: spi@481a0000 { pinctrl-names = "default"; pinctrl-0 = <&spi1_pins>; status = "okay"; spidev1: spi@0 { compatible = "spidev"; reg = <0>; spi-max-frequency = <16000000>; spi-cpha; }; spidev3: spi@1 { compatible = "spidev"; reg = <1>; spi-max-frequency = <16000000>; }; }; rtc@44e3e000 { status = "disabled"; }; musb: usb@47400000 { status = "okay"; control@44e10620 { status = "okay"; }; usb-phy@47401300 { status = "okay"; }; usb@47401000 { status = "okay"; dr_mode = "host"; }; usb-phy@47401b00 { status = "okay"; }; usb@47401800 { status = "okay"; dr_mode = "host"; }; dma-controller@47402000 { status = "okay"; }; }; epwmss0: epwmss@48300000 { status = "okay"; ecap0: ecap@48300100 { status = "okay"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&ecap0_pins_default>; pinctrl-1 = <&ecap0_pins_sleep>; }; }; lcdc: lcdc@0x4830e000 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&lcd_pins_default>; pinctrl-1 = <&lcd_pins_sleep>; status = "okay"; display-timings { 800x480p60 { clock-frequency = <32000000>; hactive = <800>; vactive = <480>; hfront-porch = <42>; hback-porch = <84>; hsync-len = <128>; vback-porch = <33>; vfront-porch = <10>; vsync-len = <2>; hsync-active = <0>; vsync-active = <0>; }; }; }; sound { compatible = "ti,da830-evm-audio"; ti,model = "TLV320AIC3106 SOUND CARD"; ti,audio-codec = <&tlv320aic3106>; ti,mcasp-controller = <&mcasp1>; ti,codec-clock-rate = <24576000>; ti,audio-routing = "Headphone Jack", "HPLOUT", "Headphone Jack", "HPROUT", "LINE1L", "Line In", "LINE1R", "Line In"; }; }; backlight { compatible = "pwm-backlight"; gpios = <&gpio1 22 1>; /* Backlight Enable Pin*/ pwms = <&ecap0 0 50000 0>; brightness-levels = <0 51 53 56 62 75 101 152 255>; default-brightness-level = <8>; }; /* Settings for PVI PM070WL4 800x480 panel*/ panel { compatible = "ti,tilcdc,panel"; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&lcd_pins_default>; panel-info { ac-bias = <255>; ac-bias-intrpt = <0>; dma-burst-sz = <16>; bpp = <32>; fdd = <0x80>; sync-edge = <0>; sync-ctrl = <1>; raster-order = <0>; fifo-th = <0>; /*invert-pxl-clk;*/ /*pixel clock polarity*/ }; display-timings { 800x480p60 { clock-frequency = <32000000>; hactive = <800>; vactive = <480>; hfront-porch = <42>; hback-porch = <84>; hsync-len = <128>; vback-porch = <33>; vfront-porch = <10>; vsync-len = <2>; hsync-active = <0>; vsync-active = <0>; }; }; }; vmmcsd_fixed: fixedregulator@0 { compatible = "regulator-fixed"; regulator-name = "vmmcsd_fixed"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; vdd1v8_fixed: fixedregulator@1 { compatible = "regulator-fixed"; regulator-name = "vdd1v8_fixed"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; }; /include/ "tps65217.dtsi" &tps { compatible = "ti,tps65217"; #address-cells = <1>; #size-cells = <0>; regulators { dcdc1_reg: regulator@0 { regulator-always-on; }; dcdc2_reg: regulator@1 { /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ regulator-name = "vdd_mpu"; regulator-min-microvolt = <912500>; regulator-max-microvolt = <1378000>; regulator-boot-on; regulator-always-on; }; dcdc3_reg: regulator@2 { /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ regulator-name = "vdd_core"; regulator-min-microvolt = <912500>; regulator-max-microvolt = <1150000>; regulator-boot-on; regulator-always-on; }; ldo1_reg: regulator@3 { regulator-always-on; }; ldo2_reg: regulator@4 { regulator-always-on; }; ldo3_reg: regulator@5 { regulator-always-on; }; ldo4_reg: regulator@6 { regulator-always-on; }; }; }; &edma { ti,edma-xbar-event-map = <1 12 2 13>; }; &mmc1 { status = "okay"; bus-width = <0x4>; pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins>; gpios = <&gpio1 19 1>; /* mmc0 power enable*/ cd-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>; cd-inverted; wp-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; }; &mcasp1 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&mcasp1_pins>; pinctrl-1 = <&mcasp1_sleep_pins>; status = "okay"; op-mode = <0>; /* MCASP_IIS_MODE */ tdm-slots = <2>; /* 4 serializers */ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 1 2 0 0 >; tx-num-evt = <1>; rx-num-evt = <1>; }; &mac { pinctrl-names = "default", "sleep"; pinctrl-0 = <&cpsw_default>; pinctrl-1 = <&cpsw_sleep>; dual_emac; }; &davinci_mdio { pinctrl-names = "default", "sleep"; pinctrl-0 = <&davinci_mdio_default>; pinctrl-1 = <&davinci_mdio_sleep>; }; &cpsw_emac0 { phy_id = <&davinci_mdio>, <0>; phy-mode = "rmii"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { phy_id = <&davinci_mdio>, <1>; phy-mode = "rmii"; dual_emac_res_vlan = <2>; }; &phy_sel { reg= <0x44e10650 0xf5>; rmii-clock-ext; }; &tscadc { status = "okay"; tsc { ti,wires = <4>; ti,x-plate-resistance = <200>; ti,coordinate-readouts = <5>; ti,wire-config = <0x00 0x11 0x22 0x33>; }; adc { ti,adc-channels = <0 1 2 3>; }; }; &dcan0 { pinctrl-names = "default"; pinctrl-0 = <&dcan0_default>; status = "okay"; }; &sham { status = "okay"; }; &aes { status = "okay"; }; &mpu_opp_modifier { opp-modifier = < /* kHz Rev offset mask */ 1000000 OPP_REV(2,1) 0 AM33XX_EFUSE_SMA_OPP_NITRO_1GHZ_BIT 800000 OPP_REV(2,1) 0 AM33XX_EFUSE_SMA_OPP_TURBO_800MHZ_BIT 720000 OPP_REV(2,1) 0 AM33XX_EFUSE_SMA_OPP_120_720MHZ_BIT 600000 OPP_REV(2,1) 0 AM33XX_EFUSE_SMA_OPP_100_600MHZ_BIT 300000 (OPP_REV(2,0) | OPP_REV(2,1)) 0 AM33XX_EFUSE_SMA_OPP_100_300MHZ_BIT 1000000 OPP_REV(2,0) 0 0 800000 OPP_REV(2,0) 0 0 720000 (OPP_REV(1,0) | OPP_REV(2,0)) 0 0 600000 (OPP_REV(1,0) | OPP_REV(2,0)) 0 0 500000 (OPP_REV(1,0)) 0 0 275000 (OPP_REV(1,0)) 0 0 >; };