Commit 011d18350f525dfdb1ccbd52019e8c04cadcc222
Committed by
John W. Linville
1 parent
b1a1bcf714
Exists in
master
and in
7 other branches
ssb: reset device only if it was enabled
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Showing 1 changed file with 22 additions and 18 deletions Side-by-side Diff
drivers/ssb/main.c
... | ... | @@ -1226,27 +1226,31 @@ |
1226 | 1226 | return; |
1227 | 1227 | |
1228 | 1228 | reject = ssb_tmslow_reject_bitmask(dev); |
1229 | - ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK); | |
1230 | - ssb_wait_bits(dev, SSB_TMSLOW, reject, 1000, 1); | |
1231 | - ssb_wait_bits(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0); | |
1232 | 1229 | |
1233 | - if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) { | |
1234 | - val = ssb_read32(dev, SSB_IMSTATE); | |
1235 | - val |= SSB_IMSTATE_REJECT; | |
1236 | - ssb_write32(dev, SSB_IMSTATE, val); | |
1237 | - ssb_wait_bits(dev, SSB_IMSTATE, SSB_IMSTATE_BUSY, 1000, 0); | |
1238 | - } | |
1230 | + if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_CLOCK) { | |
1231 | + ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK); | |
1232 | + ssb_wait_bits(dev, SSB_TMSLOW, reject, 1000, 1); | |
1233 | + ssb_wait_bits(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0); | |
1239 | 1234 | |
1240 | - ssb_write32(dev, SSB_TMSLOW, | |
1241 | - SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | | |
1242 | - reject | SSB_TMSLOW_RESET | | |
1243 | - core_specific_flags); | |
1244 | - ssb_flush_tmslow(dev); | |
1235 | + if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) { | |
1236 | + val = ssb_read32(dev, SSB_IMSTATE); | |
1237 | + val |= SSB_IMSTATE_REJECT; | |
1238 | + ssb_write32(dev, SSB_IMSTATE, val); | |
1239 | + ssb_wait_bits(dev, SSB_IMSTATE, SSB_IMSTATE_BUSY, 1000, | |
1240 | + 0); | |
1241 | + } | |
1245 | 1242 | |
1246 | - if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) { | |
1247 | - val = ssb_read32(dev, SSB_IMSTATE); | |
1248 | - val &= ~SSB_IMSTATE_REJECT; | |
1249 | - ssb_write32(dev, SSB_IMSTATE, val); | |
1243 | + ssb_write32(dev, SSB_TMSLOW, | |
1244 | + SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | | |
1245 | + reject | SSB_TMSLOW_RESET | | |
1246 | + core_specific_flags); | |
1247 | + ssb_flush_tmslow(dev); | |
1248 | + | |
1249 | + if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) { | |
1250 | + val = ssb_read32(dev, SSB_IMSTATE); | |
1251 | + val &= ~SSB_IMSTATE_REJECT; | |
1252 | + ssb_write32(dev, SSB_IMSTATE, val); | |
1253 | + } | |
1250 | 1254 | } |
1251 | 1255 | |
1252 | 1256 | ssb_write32(dev, SSB_TMSLOW, |