Doug / smarc-fsl-linux-kernel | Embedian Git Server

Commit 02b2ee16cc31df2b23d6f6c68a597d947f6c10e8

Authored by GuanXuetao 2011-01-15 18:19:03 +0800

Exists in master and in 7 other branches

unicore32 core architecture: timer and time handling

This patch implements timer and time.
RTC and PWM device drivers are also here.

Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn>

Showing 4 changed files with 825 additions and 0 deletions Side-by-side Diff

arch/unicore32/include/asm/timex.h
arch/unicore32/kernel/pwm.c
arch/unicore32/kernel/rtc.c
arch/unicore32/kernel/time.c

arch/unicore32/include/asm/timex.h

Diff comments View file @ 02b2ee1

	1	+/*
	2	+ * linux/arch/unicore32/include/asm/timex.h
	3	+ *
	4	+ * Code specific to PKUnity SoC and UniCore ISA
	5	+ *
	6	+ * Copyright (C) 2001-2010 GUAN Xue-tao
	7	+ *
	8	+ * This program is free software; you can redistribute it and/or modify
	9	+ * it under the terms of the GNU General Public License version 2 as
	10	+ * published by the Free Software Foundation.
	11	+ */
	12	+
	13	+#ifndef __UNICORE_TIMEX_H__
	14	+#define __UNICORE_TIMEX_H__
	15	+
	16	+#ifdef CONFIG_ARCH_FPGA
	17	+
	18	+/* in FPGA, APB clock is 33M, and OST clock is 32K, */
	19	+/* so, 1M is selected for timer interrupt correctly */
	20	+#define CLOCK_TICK_RATE (32*1024)
	21	+
	22	+#endif
	23	+
	24	+#if defined(CONFIG_PUV3_DB0913) \
	25	+ \|\| defined(CONFIG_PUV3_NB0916) \
	26	+ \|\| defined(CONFIG_PUV3_SMW0919)
	27	+
	28	+#define CLOCK_TICK_RATE (14318000)
	29	+
	30	+#endif
	31	+
	32	+#include <asm-generic/timex.h>
	33	+
	34	+#endif

arch/unicore32/kernel/pwm.c

Diff comments View file @ 02b2ee1

	1	+/*
	2	+ * linux/arch/unicore32/kernel/pwm.c
	3	+ *
	4	+ * Code specific to PKUnity SoC and UniCore ISA
	5	+ *
	6	+ * Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn>
	7	+ * Copyright (C) 2001-2010 Guan Xuetao
	8	+ *
	9	+ * This program is free software; you can redistribute it and/or modify
	10	+ * it under the terms of the GNU General Public License version 2 as
	11	+ * published by the Free Software Foundation.
	12	+ */
	13	+
	14	+#include <linux/module.h>
	15	+#include <linux/kernel.h>
	16	+#include <linux/platform_device.h>
	17	+#include <linux/slab.h>
	18	+#include <linux/err.h>
	19	+#include <linux/clk.h>
	20	+#include <linux/io.h>
	21	+#include <linux/pwm.h>
	22	+
	23	+#include <asm/div64.h>
	24	+#include <mach/hardware.h>
	25	+
	26	+struct pwm_device {
	27	+ struct list_head node;
	28	+ struct platform_device *pdev;
	29	+
	30	+ const char *label;
	31	+ struct clk *clk;
	32	+ int clk_enabled;
	33	+
	34	+ unsigned int use_count;
	35	+ unsigned int pwm_id;
	36	+};
	37	+
	38	+/*
	39	+ * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
	40	+ * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
	41	+ */
	42	+int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
	43	+{
	44	+ unsigned long long c;
	45	+ unsigned long period_cycles, prescale, pv, dc;
	46	+
	47	+ if (pwm == NULL \|\| period_ns == 0 \|\| duty_ns > period_ns)
	48	+ return -EINVAL;
	49	+
	50	+ c = clk_get_rate(pwm->clk);
	51	+ c = c * period_ns;
	52	+ do_div(c, 1000000000);
	53	+ period_cycles = c;
	54	+
	55	+ if (period_cycles < 1)
	56	+ period_cycles = 1;
	57	+ prescale = (period_cycles - 1) / 1024;
	58	+ pv = period_cycles / (prescale + 1) - 1;
	59	+
	60	+ if (prescale > 63)
	61	+ return -EINVAL;
	62	+
	63	+ if (duty_ns == period_ns)
	64	+ dc = OST_PWMDCCR_FDCYCLE;
	65	+ else
	66	+ dc = (pv + 1) * duty_ns / period_ns;
	67	+
	68	+ /* NOTE: the clock to PWM has to be enabled first
	69	+ * before writing to the registers
	70	+ */
	71	+ clk_enable(pwm->clk);
	72	+ OST_PWMPWCR = prescale;
	73	+ OST_PWMDCCR = pv - dc;
	74	+ OST_PWMPCR = pv;
	75	+ clk_disable(pwm->clk);
	76	+
	77	+ return 0;
	78	+}
	79	+EXPORT_SYMBOL(pwm_config);
	80	+
	81	+int pwm_enable(struct pwm_device *pwm)
	82	+{
	83	+ int rc = 0;
	84	+
	85	+ if (!pwm->clk_enabled) {
	86	+ rc = clk_enable(pwm->clk);
	87	+ if (!rc)
	88	+ pwm->clk_enabled = 1;
	89	+ }
	90	+ return rc;
	91	+}
	92	+EXPORT_SYMBOL(pwm_enable);
	93	+
	94	+void pwm_disable(struct pwm_device *pwm)
	95	+{
	96	+ if (pwm->clk_enabled) {
	97	+ clk_disable(pwm->clk);
	98	+ pwm->clk_enabled = 0;
	99	+ }
	100	+}
	101	+EXPORT_SYMBOL(pwm_disable);
	102	+
	103	+static DEFINE_MUTEX(pwm_lock);
	104	+static LIST_HEAD(pwm_list);
	105	+
	106	+struct pwm_device pwm_request(int pwm_id, const char label)
	107	+{
	108	+ struct pwm_device *pwm;
	109	+ int found = 0;
	110	+
	111	+ mutex_lock(&pwm_lock);
	112	+
	113	+ list_for_each_entry(pwm, &pwm_list, node) {
	114	+ if (pwm->pwm_id == pwm_id) {
	115	+ found = 1;
	116	+ break;
	117	+ }
	118	+ }
	119	+
	120	+ if (found) {
	121	+ if (pwm->use_count == 0) {
	122	+ pwm->use_count++;
	123	+ pwm->label = label;
	124	+ } else
	125	+ pwm = ERR_PTR(-EBUSY);
	126	+ } else
	127	+ pwm = ERR_PTR(-ENOENT);
	128	+
	129	+ mutex_unlock(&pwm_lock);
	130	+ return pwm;
	131	+}
	132	+EXPORT_SYMBOL(pwm_request);
	133	+
	134	+void pwm_free(struct pwm_device *pwm)
	135	+{
	136	+ mutex_lock(&pwm_lock);
	137	+
	138	+ if (pwm->use_count) {
	139	+ pwm->use_count--;
	140	+ pwm->label = NULL;
	141	+ } else
	142	+ pr_warning("PWM device already freed\n");
	143	+
	144	+ mutex_unlock(&pwm_lock);
	145	+}
	146	+EXPORT_SYMBOL(pwm_free);
	147	+
	148	+static inline void __add_pwm(struct pwm_device *pwm)
	149	+{
	150	+ mutex_lock(&pwm_lock);
	151	+ list_add_tail(&pwm->node, &pwm_list);
	152	+ mutex_unlock(&pwm_lock);
	153	+}
	154	+
	155	+static struct pwm_device pwm_probe(struct platform_device pdev,
	156	+ unsigned int pwm_id, struct pwm_device *parent_pwm)
	157	+{
	158	+ struct pwm_device *pwm;
	159	+ struct resource *r;
	160	+ int ret = 0;
	161	+
	162	+ pwm = kzalloc(sizeof(struct pwm_device), GFP_KERNEL);
	163	+ if (pwm == NULL) {
	164	+ dev_err(&pdev->dev, "failed to allocate memory\n");
	165	+ return ERR_PTR(-ENOMEM);
	166	+ }
	167	+
	168	+ pwm->clk = clk_get(NULL, "OST_CLK");
	169	+ if (IS_ERR(pwm->clk)) {
	170	+ ret = PTR_ERR(pwm->clk);
	171	+ goto err_free;
	172	+ }
	173	+ pwm->clk_enabled = 0;
	174	+
	175	+ pwm->use_count = 0;
	176	+ pwm->pwm_id = pwm_id;
	177	+ pwm->pdev = pdev;
	178	+
	179	+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	180	+ if (r == NULL) {
	181	+ dev_err(&pdev->dev, "no memory resource defined\n");
	182	+ ret = -ENODEV;
	183	+ goto err_free_clk;
	184	+ }
	185	+
	186	+ r = request_mem_region(r->start, resource_size(r), pdev->name);
	187	+ if (r == NULL) {
	188	+ dev_err(&pdev->dev, "failed to request memory resource\n");
	189	+ ret = -EBUSY;
	190	+ goto err_free_clk;
	191	+ }
	192	+
	193	+ __add_pwm(pwm);
	194	+ platform_set_drvdata(pdev, pwm);
	195	+ return pwm;
	196	+
	197	+err_free_clk:
	198	+ clk_put(pwm->clk);
	199	+err_free:
	200	+ kfree(pwm);
	201	+ return ERR_PTR(ret);
	202	+}
	203	+
	204	+static int __devinit puv3_pwm_probe(struct platform_device *pdev)
	205	+{
	206	+ struct pwm_device *pwm = pwm_probe(pdev, pdev->id, NULL);
	207	+
	208	+ if (IS_ERR(pwm))
	209	+ return PTR_ERR(pwm);
	210	+
	211	+ return 0;
	212	+}
	213	+
	214	+static int __devexit pwm_remove(struct platform_device *pdev)
	215	+{
	216	+ struct pwm_device *pwm;
	217	+ struct resource *r;
	218	+
	219	+ pwm = platform_get_drvdata(pdev);
	220	+ if (pwm == NULL)
	221	+ return -ENODEV;
	222	+
	223	+ mutex_lock(&pwm_lock);
	224	+ list_del(&pwm->node);
	225	+ mutex_unlock(&pwm_lock);
	226	+
	227	+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	228	+ release_mem_region(r->start, resource_size(r));
	229	+
	230	+ clk_put(pwm->clk);
	231	+ kfree(pwm);
	232	+ return 0;
	233	+}
	234	+
	235	+static struct platform_driver puv3_pwm_driver = {
	236	+ .driver = {
	237	+ .name = "PKUnity-v3-PWM",
	238	+ },
	239	+ .probe = puv3_pwm_probe,
	240	+ .remove = __devexit_p(pwm_remove),
	241	+};
	242	+
	243	+static int __init pwm_init(void)
	244	+{
	245	+ int ret = 0;
	246	+
	247	+ ret = platform_driver_register(&puv3_pwm_driver);
	248	+ if (ret) {
	249	+ printk(KERN_ERR "failed to register puv3_pwm_driver\n");
	250	+ return ret;
	251	+ }
	252	+
	253	+ return ret;
	254	+}
	255	+arch_initcall(pwm_init);
	256	+
	257	+static void __exit pwm_exit(void)
	258	+{
	259	+ platform_driver_unregister(&puv3_pwm_driver);
	260	+}
	261	+module_exit(pwm_exit);
	262	+
	263	+MODULE_LICENSE("GPL v2");

arch/unicore32/kernel/rtc.c

Diff comments View file @ 02b2ee1

	1	+/*
	2	+ * linux/arch/unicore32/kernel/rtc.c
	3	+ *
	4	+ * Code specific to PKUnity SoC and UniCore ISA
	5	+ *
	6	+ * Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn>
	7	+ * Copyright (C) 2001-2010 Guan Xuetao
	8	+ *
	9	+ * This program is free software; you can redistribute it and/or modify
	10	+ * it under the terms of the GNU General Public License version 2 as
	11	+ * published by the Free Software Foundation.
	12	+ */
	13	+
	14	+#include <linux/module.h>
	15	+#include <linux/fs.h>
	16	+#include <linux/string.h>
	17	+#include <linux/init.h>
	18	+#include <linux/platform_device.h>
	19	+#include <linux/interrupt.h>
	20	+#include <linux/rtc.h>
	21	+#include <linux/bcd.h>
	22	+#include <linux/clk.h>
	23	+#include <linux/log2.h>
	24	+#include <linux/slab.h>
	25	+#include <linux/uaccess.h>
	26	+#include <linux/io.h>
	27	+
	28	+#include <asm/irq.h>
	29	+#include <mach/hardware.h>
	30	+
	31	+static struct resource *puv3_rtc_mem;
	32	+
	33	+static int puv3_rtc_alarmno = IRQ_RTCAlarm;
	34	+static int puv3_rtc_tickno = IRQ_RTC;
	35	+
	36	+static DEFINE_SPINLOCK(puv3_rtc_pie_lock);
	37	+
	38	+/* IRQ Handlers */
	39	+
	40	+static irqreturn_t puv3_rtc_alarmirq(int irq, void *id)
	41	+{
	42	+ struct rtc_device *rdev = id;
	43	+
	44	+ RTC_RTSR \|= RTC_RTSR_AL;
	45	+ rtc_update_irq(rdev, 1, RTC_AF \| RTC_IRQF);
	46	+ return IRQ_HANDLED;
	47	+}
	48	+
	49	+static irqreturn_t puv3_rtc_tickirq(int irq, void *id)
	50	+{
	51	+ struct rtc_device *rdev = id;
	52	+
	53	+ RTC_RTSR \|= RTC_RTSR_HZ;
	54	+ rtc_update_irq(rdev, 1, RTC_PF \| RTC_IRQF);
	55	+ return IRQ_HANDLED;
	56	+}
	57	+
	58	+/* Update control registers */
	59	+static void puv3_rtc_setaie(int to)
	60	+{
	61	+ unsigned int tmp;
	62	+
	63	+ pr_debug("%s: aie=%d\n", __func__, to);
	64	+
	65	+ tmp = RTC_RTSR & ~RTC_RTSR_ALE;
	66	+
	67	+ if (to)
	68	+ tmp \|= RTC_RTSR_ALE;
	69	+
	70	+ RTC_RTSR = tmp;
	71	+}
	72	+
	73	+static int puv3_rtc_setpie(struct device *dev, int enabled)
	74	+{
	75	+ unsigned int tmp;
	76	+
	77	+ pr_debug("%s: pie=%d\n", __func__, enabled);
	78	+
	79	+ spin_lock_irq(&puv3_rtc_pie_lock);
	80	+ tmp = RTC_RTSR & ~RTC_RTSR_HZE;
	81	+
	82	+ if (enabled)
	83	+ tmp \|= RTC_RTSR_HZE;
	84	+
	85	+ RTC_RTSR = tmp;
	86	+ spin_unlock_irq(&puv3_rtc_pie_lock);
	87	+
	88	+ return 0;
	89	+}
	90	+
	91	+static int puv3_rtc_setfreq(struct device *dev, int freq)
	92	+{
	93	+ return 0;
	94	+}
	95	+
	96	+/* Time read/write */
	97	+
	98	+static int puv3_rtc_gettime(struct device dev, struct rtc_time rtc_tm)
	99	+{
	100	+ rtc_time_to_tm(RTC_RCNR, rtc_tm);
	101	+
	102	+ pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n",
	103	+ rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
	104	+ rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
	105	+
	106	+ return 0;
	107	+}
	108	+
	109	+static int puv3_rtc_settime(struct device dev, struct rtc_time tm)
	110	+{
	111	+ unsigned long rtc_count = 0;
	112	+
	113	+ pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n",
	114	+ tm->tm_year, tm->tm_mon, tm->tm_mday,
	115	+ tm->tm_hour, tm->tm_min, tm->tm_sec);
	116	+
	117	+ rtc_tm_to_time(tm, &rtc_count);
	118	+ RTC_RCNR = rtc_count;
	119	+
	120	+ return 0;
	121	+}
	122	+
	123	+static int puv3_rtc_getalarm(struct device dev, struct rtc_wkalrm alrm)
	124	+{
	125	+ struct rtc_time *alm_tm = &alrm->time;
	126	+
	127	+ rtc_time_to_tm(RTC_RTAR, alm_tm);
	128	+
	129	+ alrm->enabled = RTC_RTSR & RTC_RTSR_ALE;
	130	+
	131	+ pr_debug("read alarm %02x %02x.%02x.%02x %02x/%02x/%02x\n",
	132	+ alrm->enabled,
	133	+ alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
	134	+ alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
	135	+
	136	+ return 0;
	137	+}
	138	+
	139	+static int puv3_rtc_setalarm(struct device dev, struct rtc_wkalrm alrm)
	140	+{
	141	+ struct rtc_time *tm = &alrm->time;
	142	+ unsigned long rtcalarm_count = 0;
	143	+
	144	+ pr_debug("puv3_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n",
	145	+ alrm->enabled,
	146	+ tm->tm_mday & 0xff, tm->tm_mon & 0xff, tm->tm_year & 0xff,
	147	+ tm->tm_hour & 0xff, tm->tm_min & 0xff, tm->tm_sec);
	148	+
	149	+ rtc_tm_to_time(tm, &rtcalarm_count);
	150	+ RTC_RTAR = rtcalarm_count;
	151	+
	152	+ puv3_rtc_setaie(alrm->enabled);
	153	+
	154	+ if (alrm->enabled)
	155	+ enable_irq_wake(puv3_rtc_alarmno);
	156	+ else
	157	+ disable_irq_wake(puv3_rtc_alarmno);
	158	+
	159	+ return 0;
	160	+}
	161	+
	162	+static int puv3_rtc_proc(struct device dev, struct seq_file seq)
	163	+{
	164	+ seq_printf(seq, "periodic_IRQ\t: %s\n",
	165	+ (RTC_RTSR & RTC_RTSR_HZE) ? "yes" : "no");
	166	+ return 0;
	167	+}
	168	+
	169	+static int puv3_rtc_open(struct device *dev)
	170	+{
	171	+ struct platform_device *pdev = to_platform_device(dev);
	172	+ struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
	173	+ int ret;
	174	+
	175	+ ret = request_irq(puv3_rtc_alarmno, puv3_rtc_alarmirq,
	176	+ IRQF_DISABLED, "pkunity-rtc alarm", rtc_dev);
	177	+
	178	+ if (ret) {
	179	+ dev_err(dev, "IRQ%d error %d\n", puv3_rtc_alarmno, ret);
	180	+ return ret;
	181	+ }
	182	+
	183	+ ret = request_irq(puv3_rtc_tickno, puv3_rtc_tickirq,
	184	+ IRQF_DISABLED, "pkunity-rtc tick", rtc_dev);
	185	+
	186	+ if (ret) {
	187	+ dev_err(dev, "IRQ%d error %d\n", puv3_rtc_tickno, ret);
	188	+ goto tick_err;
	189	+ }
	190	+
	191	+ return ret;
	192	+
	193	+ tick_err:
	194	+ free_irq(puv3_rtc_alarmno, rtc_dev);
	195	+ return ret;
	196	+}
	197	+
	198	+static void puv3_rtc_release(struct device *dev)
	199	+{
	200	+ struct platform_device *pdev = to_platform_device(dev);
	201	+ struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
	202	+
	203	+ /* do not clear AIE here, it may be needed for wake */
	204	+
	205	+ puv3_rtc_setpie(dev, 0);
	206	+ free_irq(puv3_rtc_alarmno, rtc_dev);
	207	+ free_irq(puv3_rtc_tickno, rtc_dev);
	208	+}
	209	+
	210	+static const struct rtc_class_ops puv3_rtcops = {
	211	+ .open = puv3_rtc_open,
	212	+ .release = puv3_rtc_release,
	213	+ .read_time = puv3_rtc_gettime,
	214	+ .set_time = puv3_rtc_settime,
	215	+ .read_alarm = puv3_rtc_getalarm,
	216	+ .set_alarm = puv3_rtc_setalarm,
	217	+ .irq_set_freq = puv3_rtc_setfreq,
	218	+ .irq_set_state = puv3_rtc_setpie,
	219	+ .proc = puv3_rtc_proc,
	220	+};
	221	+
	222	+static void puv3_rtc_enable(struct platform_device *pdev, int en)
	223	+{
	224	+ if (!en) {
	225	+ RTC_RTSR &= ~RTC_RTSR_HZE;
	226	+ } else {
	227	+ /* re-enable the device, and check it is ok */
	228	+
	229	+ if ((RTC_RTSR & RTC_RTSR_HZE) == 0) {
	230	+ dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
	231	+ RTC_RTSR \|= RTC_RTSR_HZE;
	232	+ }
	233	+ }
	234	+}
	235	+
	236	+static int puv3_rtc_remove(struct platform_device *dev)
	237	+{
	238	+ struct rtc_device *rtc = platform_get_drvdata(dev);
	239	+
	240	+ platform_set_drvdata(dev, NULL);
	241	+ rtc_device_unregister(rtc);
	242	+
	243	+ puv3_rtc_setpie(&dev->dev, 0);
	244	+ puv3_rtc_setaie(0);
	245	+
	246	+ release_resource(puv3_rtc_mem);
	247	+ kfree(puv3_rtc_mem);
	248	+
	249	+ return 0;
	250	+}
	251	+
	252	+static int puv3_rtc_probe(struct platform_device *pdev)
	253	+{
	254	+ struct rtc_device *rtc;
	255	+ struct resource *res;
	256	+ int ret;
	257	+
	258	+ pr_debug("%s: probe=%p\n", __func__, pdev);
	259	+
	260	+ /* find the IRQs */
	261	+
	262	+ puv3_rtc_tickno = platform_get_irq(pdev, 1);
	263	+ if (puv3_rtc_tickno < 0) {
	264	+ dev_err(&pdev->dev, "no irq for rtc tick\n");
	265	+ return -ENOENT;
	266	+ }
	267	+
	268	+ puv3_rtc_alarmno = platform_get_irq(pdev, 0);
	269	+ if (puv3_rtc_alarmno < 0) {
	270	+ dev_err(&pdev->dev, "no irq for alarm\n");
	271	+ return -ENOENT;
	272	+ }
	273	+
	274	+ pr_debug("PKUnity_rtc: tick irq %d, alarm irq %d\n",
	275	+ puv3_rtc_tickno, puv3_rtc_alarmno);
	276	+
	277	+ /* get the memory region */
	278	+
	279	+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	280	+ if (res == NULL) {
	281	+ dev_err(&pdev->dev, "failed to get memory region resource\n");
	282	+ return -ENOENT;
	283	+ }
	284	+
	285	+ puv3_rtc_mem = request_mem_region(res->start,
	286	+ res->end-res->start+1,
	287	+ pdev->name);
	288	+
	289	+ if (puv3_rtc_mem == NULL) {
	290	+ dev_err(&pdev->dev, "failed to reserve memory region\n");
	291	+ ret = -ENOENT;
	292	+ goto err_nores;
	293	+ }
	294	+
	295	+ puv3_rtc_enable(pdev, 1);
	296	+
	297	+ puv3_rtc_setfreq(&pdev->dev, 1);
	298	+
	299	+ /* register RTC and exit */
	300	+
	301	+ rtc = rtc_device_register("pkunity", &pdev->dev, &puv3_rtcops,
	302	+ THIS_MODULE);
	303	+
	304	+ if (IS_ERR(rtc)) {
	305	+ dev_err(&pdev->dev, "cannot attach rtc\n");
	306	+ ret = PTR_ERR(rtc);
	307	+ goto err_nortc;
	308	+ }
	309	+
	310	+ /* platform setup code should have handled this; sigh */
	311	+ if (!device_can_wakeup(&pdev->dev))
	312	+ device_init_wakeup(&pdev->dev, 1);
	313	+
	314	+ platform_set_drvdata(pdev, rtc);
	315	+ return 0;
	316	+
	317	+ err_nortc:
	318	+ puv3_rtc_enable(pdev, 0);
	319	+ release_resource(puv3_rtc_mem);
	320	+
	321	+ err_nores:
	322	+ return ret;
	323	+}
	324	+
	325	+#ifdef CONFIG_PM
	326	+
	327	+/* RTC Power management control */
	328	+
	329	+static int ticnt_save;
	330	+
	331	+static int puv3_rtc_suspend(struct platform_device *pdev, pm_message_t state)
	332	+{
	333	+ /* save RTAR for anyone using periodic interrupts */
	334	+ ticnt_save = RTC_RTAR;
	335	+ puv3_rtc_enable(pdev, 0);
	336	+ return 0;
	337	+}
	338	+
	339	+static int puv3_rtc_resume(struct platform_device *pdev)
	340	+{
	341	+ puv3_rtc_enable(pdev, 1);
	342	+ RTC_RTAR = ticnt_save;
	343	+ return 0;
	344	+}
	345	+#else
	346	+#define puv3_rtc_suspend NULL
	347	+#define puv3_rtc_resume NULL
	348	+#endif
	349	+
	350	+static struct platform_driver puv3_rtcdrv = {
	351	+ .probe = puv3_rtc_probe,
	352	+ .remove = __devexit_p(puv3_rtc_remove),
	353	+ .suspend = puv3_rtc_suspend,
	354	+ .resume = puv3_rtc_resume,
	355	+ .driver = {
	356	+ .name = "PKUnity-v3-RTC",
	357	+ .owner = THIS_MODULE,
	358	+ }
	359	+};
	360	+
	361	+static char __initdata banner[] = "PKUnity-v3 RTC, (c) 2009 PKUnity Co.\n";
	362	+
	363	+static int __init puv3_rtc_init(void)
	364	+{
	365	+ printk(banner);
	366	+ return platform_driver_register(&puv3_rtcdrv);
	367	+}
	368	+
	369	+static void __exit puv3_rtc_exit(void)
	370	+{
	371	+ platform_driver_unregister(&puv3_rtcdrv);
	372	+}
	373	+
	374	+module_init(puv3_rtc_init);
	375	+module_exit(puv3_rtc_exit);
	376	+
	377	+MODULE_DESCRIPTION("RTC Driver for the PKUnity v3 chip");
	378	+MODULE_AUTHOR("Hu Dongliang");
	379	+MODULE_LICENSE("GPL v2");

arch/unicore32/kernel/time.c

Diff comments View file @ 02b2ee1

	1	+/*
	2	+ * linux/arch/unicore32/kernel/time.c
	3	+ *
	4	+ * Code specific to PKUnity SoC and UniCore ISA
	5	+ *
	6	+ * Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn>
	7	+ * Copyright (C) 2001-2010 Guan Xuetao
	8	+ *
	9	+ * This program is free software; you can redistribute it and/or modify
	10	+ * it under the terms of the GNU General Public License version 2 as
	11	+ * published by the Free Software Foundation.
	12	+ */
	13	+#include <linux/init.h>
	14	+#include <linux/errno.h>
	15	+#include <linux/interrupt.h>
	16	+#include <linux/irq.h>
	17	+#include <linux/timex.h>
	18	+#include <linux/clockchips.h>
	19	+
	20	+#include <mach/hardware.h>
	21	+
	22	+#define MIN_OSCR_DELTA 2
	23	+
	24	+static irqreturn_t puv3_ost0_interrupt(int irq, void *dev_id)
	25	+{
	26	+ struct clock_event_device *c = dev_id;
	27	+
	28	+ /* Disarm the compare/match, signal the event. */
	29	+ OST_OIER &= ~OST_OIER_E0;
	30	+ OST_OSSR &= ~OST_OSSR_M0;
	31	+ c->event_handler(c);
	32	+
	33	+ return IRQ_HANDLED;
	34	+}
	35	+
	36	+static int
	37	+puv3_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c)
	38	+{
	39	+ unsigned long next, oscr;
	40	+
	41	+ OST_OIER \|= OST_OIER_E0;
	42	+ next = OST_OSCR + delta;
	43	+ OST_OSMR0 = next;
	44	+ oscr = OST_OSCR;
	45	+
	46	+ return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
	47	+}
	48	+
	49	+static void
	50	+puv3_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c)
	51	+{
	52	+ switch (mode) {
	53	+ case CLOCK_EVT_MODE_ONESHOT:
	54	+ case CLOCK_EVT_MODE_UNUSED:
	55	+ case CLOCK_EVT_MODE_SHUTDOWN:
	56	+ OST_OIER &= ~OST_OIER_E0;
	57	+ OST_OSSR &= ~OST_OSSR_M0;
	58	+ break;
	59	+
	60	+ case CLOCK_EVT_MODE_RESUME:
	61	+ case CLOCK_EVT_MODE_PERIODIC:
	62	+ break;
	63	+ }
	64	+}
	65	+
	66	+static struct clock_event_device ckevt_puv3_osmr0 = {
	67	+ .name = "osmr0",
	68	+ .features = CLOCK_EVT_FEAT_ONESHOT,
	69	+#ifdef CONFIG_ARCH_FPGA
	70	+ .shift = 18, /* correct shift val: 16, but warn_on_slowpath */
	71	+#else
	72	+ .shift = 30,
	73	+#endif
	74	+ .rating = 200,
	75	+ .set_next_event = puv3_osmr0_set_next_event,
	76	+ .set_mode = puv3_osmr0_set_mode,
	77	+};
	78	+
	79	+static cycle_t puv3_read_oscr(struct clocksource *cs)
	80	+{
	81	+ return OST_OSCR;
	82	+}
	83	+
	84	+static struct clocksource cksrc_puv3_oscr = {
	85	+ .name = "oscr",
	86	+ .rating = 200,
	87	+ .read = puv3_read_oscr,
	88	+ .mask = CLOCKSOURCE_MASK(32),
	89	+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
	90	+};
	91	+
	92	+static struct irqaction puv3_timer_irq = {
	93	+ .name = "ost0",
	94	+ .flags = IRQF_DISABLED \| IRQF_TIMER \| IRQF_IRQPOLL,
	95	+ .handler = puv3_ost0_interrupt,
	96	+ .dev_id = &ckevt_puv3_osmr0,
	97	+};
	98	+
	99	+void __init time_init(void)
	100	+{
	101	+ OST_OIER = 0; /* disable any timer interrupts */
	102	+ OST_OSSR = 0; /* clear status on all timers */
	103	+
	104	+ ckevt_puv3_osmr0.mult =
	105	+ div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt_puv3_osmr0.shift);
	106	+ ckevt_puv3_osmr0.max_delta_ns =
	107	+ clockevent_delta2ns(0x7fffffff, &ckevt_puv3_osmr0);
	108	+ ckevt_puv3_osmr0.min_delta_ns =
	109	+ clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_puv3_osmr0) + 1;
	110	+ ckevt_puv3_osmr0.cpumask = cpumask_of(0);
	111	+
	112	+ setup_irq(IRQ_TIMER0, &puv3_timer_irq);
	113	+
	114	+ clocksource_register_hz(&cksrc_puv3_oscr, CLOCK_TICK_RATE);
	115	+ clockevents_register_device(&ckevt_puv3_osmr0);
	116	+}
	117	+
	118	+#ifdef CONFIG_PM
	119	+unsigned long osmr[4], oier;
	120	+
	121	+void puv3_timer_suspend(void)
	122	+{
	123	+ osmr[0] = OST_OSMR0;
	124	+ osmr[1] = OST_OSMR1;
	125	+ osmr[2] = OST_OSMR2;
	126	+ osmr[3] = OST_OSMR3;
	127	+ oier = OST_OIER;
	128	+}
	129	+
	130	+void puv3_timer_resume(void)
	131	+{
	132	+ OST_OSSR = 0;
	133	+ OST_OSMR0 = osmr[0];
	134	+ OST_OSMR1 = osmr[1];
	135	+ OST_OSMR2 = osmr[2];
	136	+ OST_OSMR3 = osmr[3];
	137	+ OST_OIER = oier;
	138	+
	139	+ /*
	140	+ * OSMR0 is the system timer: make sure OSCR is sufficiently behind
	141	+ */
	142	+ OST_OSCR = OST_OSMR0 - LATCH;
	143	+}
	144	+#else
	145	+void puv3_timer_suspend(void) { };
	146	+void puv3_timer_resume(void) { };
	147	+#endif