Commit 030c2a1e515077dbfabe4e43e32d4a7c549d5543

Authored by Tomasz Figa
Committed by Olof Johansson
1 parent 7aac482e62

clocksource: samsung_pwm_timer: Keep all driver data in a structure

This patch modifies the driver to keep all its private data consistently
in a single struct, instead of keeping part as separate variables.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

Showing 1 changed file with 74 additions and 83 deletions Side-by-side Diff

drivers/clocksource/samsung_pwm_timer.c
... ... @@ -52,21 +52,25 @@
52 52 DEFINE_SPINLOCK(samsung_pwm_lock);
53 53 EXPORT_SYMBOL(samsung_pwm_lock);
54 54  
55   -struct samsung_timer_source {
  55 +struct samsung_pwm_clocksource {
  56 + void __iomem *base;
  57 + unsigned int irq[SAMSUNG_PWM_NUM];
  58 + struct samsung_pwm_variant variant;
  59 +
  60 + struct clk *timerclk;
  61 +
56 62 unsigned int event_id;
57 63 unsigned int source_id;
58 64 unsigned int tcnt_max;
59 65 unsigned int tscaler_div;
60 66 unsigned int tdiv;
  67 +
  68 + unsigned long clock_count_per_tick;
61 69 };
62 70  
63   -static struct samsung_pwm *pwm;
64   -static struct clk *timerclk;
65   -static struct samsung_timer_source timer_source;
66   -static unsigned long clock_count_per_tick;
  71 +static struct samsung_pwm_clocksource pwm;
67 72  
68   -static void samsung_timer_set_prescale(struct samsung_pwm *pwm,
69   - unsigned int channel, u16 prescale)
  73 +static void samsung_timer_set_prescale(unsigned int channel, u16 prescale)
70 74 {
71 75 unsigned long flags;
72 76 u8 shift = 0;
73 77  
74 78  
75 79  
76 80  
77 81  
... ... @@ -77,30 +81,29 @@
77 81  
78 82 spin_lock_irqsave(&samsung_pwm_lock, flags);
79 83  
80   - reg = readl(pwm->base + REG_TCFG0);
  84 + reg = readl(pwm.base + REG_TCFG0);
81 85 reg &= ~(TCFG0_PRESCALER_MASK << shift);
82 86 reg |= (prescale - 1) << shift;
83   - writel(reg, pwm->base + REG_TCFG0);
  87 + writel(reg, pwm.base + REG_TCFG0);
84 88  
85 89 spin_unlock_irqrestore(&samsung_pwm_lock, flags);
86 90 }
87 91  
88   -static void samsung_timer_set_divisor(struct samsung_pwm *pwm,
89   - unsigned int channel, u8 divisor)
  92 +static void samsung_timer_set_divisor(unsigned int channel, u8 divisor)
90 93 {
91 94 u8 shift = TCFG1_SHIFT(channel);
92 95 unsigned long flags;
93 96 u32 reg;
94 97 u8 bits;
95 98  
96   - bits = (fls(divisor) - 1) - pwm->variant.div_base;
  99 + bits = (fls(divisor) - 1) - pwm.variant.div_base;
97 100  
98 101 spin_lock_irqsave(&samsung_pwm_lock, flags);
99 102  
100   - reg = readl(pwm->base + REG_TCFG1);
  103 + reg = readl(pwm.base + REG_TCFG1);
101 104 reg &= ~(TCFG1_MUX_MASK << shift);
102 105 reg |= bits << shift;
103   - writel(reg, pwm->base + REG_TCFG1);
  106 + writel(reg, pwm.base + REG_TCFG1);
104 107  
105 108 spin_unlock_irqrestore(&samsung_pwm_lock, flags);
106 109 }
107 110  
... ... @@ -115,9 +118,9 @@
115 118  
116 119 spin_lock_irqsave(&samsung_pwm_lock, flags);
117 120  
118   - tcon = __raw_readl(pwm->base + REG_TCON);
  121 + tcon = __raw_readl(pwm.base + REG_TCON);
119 122 tcon &= ~TCON_START(channel);
120   - __raw_writel(tcon, pwm->base + REG_TCON);
  123 + __raw_writel(tcon, pwm.base + REG_TCON);
121 124  
122 125 spin_unlock_irqrestore(&samsung_pwm_lock, flags);
123 126 }
124 127  
... ... @@ -133,16 +136,16 @@
133 136  
134 137 spin_lock_irqsave(&samsung_pwm_lock, flags);
135 138  
136   - tcon = __raw_readl(pwm->base + REG_TCON);
  139 + tcon = __raw_readl(pwm.base + REG_TCON);
137 140  
138 141 tcnt--;
139 142  
140 143 tcon &= ~(TCON_START(tcon_chan) | TCON_AUTORELOAD(tcon_chan));
141 144 tcon |= TCON_MANUALUPDATE(tcon_chan);
142 145  
143   - __raw_writel(tcnt, pwm->base + REG_TCNTB(channel));
144   - __raw_writel(tcnt, pwm->base + REG_TCMPB(channel));
145   - __raw_writel(tcon, pwm->base + REG_TCON);
  146 + __raw_writel(tcnt, pwm.base + REG_TCNTB(channel));
  147 + __raw_writel(tcnt, pwm.base + REG_TCMPB(channel));
  148 + __raw_writel(tcon, pwm.base + REG_TCON);
146 149  
147 150 spin_unlock_irqrestore(&samsung_pwm_lock, flags);
148 151 }
... ... @@ -157,7 +160,7 @@
157 160  
158 161 spin_lock_irqsave(&samsung_pwm_lock, flags);
159 162  
160   - tcon = __raw_readl(pwm->base + REG_TCON);
  163 + tcon = __raw_readl(pwm.base + REG_TCON);
161 164  
162 165 tcon &= ~TCON_MANUALUPDATE(channel);
163 166 tcon |= TCON_START(channel);
... ... @@ -167,7 +170,7 @@
167 170 else
168 171 tcon &= ~TCON_AUTORELOAD(channel);
169 172  
170   - __raw_writel(tcon, pwm->base + REG_TCON);
  173 + __raw_writel(tcon, pwm.base + REG_TCON);
171 174  
172 175 spin_unlock_irqrestore(&samsung_pwm_lock, flags);
173 176 }
... ... @@ -175,8 +178,8 @@
175 178 static int samsung_set_next_event(unsigned long cycles,
176 179 struct clock_event_device *evt)
177 180 {
178   - samsung_time_setup(timer_source.event_id, cycles);
179   - samsung_time_start(timer_source.event_id, false);
  181 + samsung_time_setup(pwm.event_id, cycles);
  182 + samsung_time_start(pwm.event_id, false);
180 183  
181 184 return 0;
182 185 }
183 186  
184 187  
185 188  
... ... @@ -184,23 +187,23 @@
184 187 static void samsung_timer_resume(void)
185 188 {
186 189 /* event timer restart */
187   - samsung_time_setup(timer_source.event_id, clock_count_per_tick);
188   - samsung_time_start(timer_source.event_id, true);
  190 + samsung_time_setup(pwm.event_id, pwm.clock_count_per_tick);
  191 + samsung_time_start(pwm.event_id, true);
189 192  
190 193 /* source timer restart */
191   - samsung_time_setup(timer_source.source_id, timer_source.tcnt_max);
192   - samsung_time_start(timer_source.source_id, true);
  194 + samsung_time_setup(pwm.source_id, pwm.tcnt_max);
  195 + samsung_time_start(pwm.source_id, true);
193 196 }
194 197  
195 198 static void samsung_set_mode(enum clock_event_mode mode,
196 199 struct clock_event_device *evt)
197 200 {
198   - samsung_time_stop(timer_source.event_id);
  201 + samsung_time_stop(pwm.event_id);
199 202  
200 203 switch (mode) {
201 204 case CLOCK_EVT_MODE_PERIODIC:
202   - samsung_time_setup(timer_source.event_id, clock_count_per_tick);
203   - samsung_time_start(timer_source.event_id, true);
  205 + samsung_time_setup(pwm.event_id, pwm.clock_count_per_tick);
  206 + samsung_time_start(pwm.event_id, true);
204 207 break;
205 208  
206 209 case CLOCK_EVT_MODE_ONESHOT:
... ... @@ -228,9 +231,9 @@
228 231 {
229 232 struct clock_event_device *evt = dev_id;
230 233  
231   - if (pwm->variant.has_tint_cstat) {
232   - u32 mask = (1 << timer_source.event_id);
233   - writel(mask | (mask << 5), pwm->base + REG_TINT_CSTAT);
  234 + if (pwm.variant.has_tint_cstat) {
  235 + u32 mask = (1 << pwm.event_id);
  236 + writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT);
234 237 }
235 238  
236 239 evt->event_handler(evt);
237 240  
238 241  
239 242  
240 243  
241 244  
242 245  
243 246  
... ... @@ -251,39 +254,37 @@
251 254 unsigned long clock_rate;
252 255 unsigned int irq_number;
253 256  
254   - pclk = clk_get_rate(timerclk);
  257 + pclk = clk_get_rate(pwm.timerclk);
255 258  
256   - samsung_timer_set_prescale(pwm, timer_source.event_id,
257   - timer_source.tscaler_div);
258   - samsung_timer_set_divisor(pwm, timer_source.event_id,
259   - timer_source.tdiv);
  259 + samsung_timer_set_prescale(pwm.event_id, pwm.tscaler_div);
  260 + samsung_timer_set_divisor(pwm.event_id, pwm.tdiv);
260 261  
261   - clock_rate = pclk / (timer_source.tscaler_div * timer_source.tdiv);
262   - clock_count_per_tick = clock_rate / HZ;
  262 + clock_rate = pclk / (pwm.tscaler_div * pwm.tdiv);
  263 + pwm.clock_count_per_tick = clock_rate / HZ;
263 264  
264 265 time_event_device.cpumask = cpumask_of(0);
265 266 clockevents_config_and_register(&time_event_device, clock_rate, 1, -1);
266 267  
267   - irq_number = pwm->irq[timer_source.event_id];
  268 + irq_number = pwm.irq[pwm.event_id];
268 269 setup_irq(irq_number, &samsung_clock_event_irq);
269 270  
270   - if (pwm->variant.has_tint_cstat) {
271   - u32 mask = (1 << timer_source.event_id);
272   - writel(mask | (mask << 5), pwm->base + REG_TINT_CSTAT);
  271 + if (pwm.variant.has_tint_cstat) {
  272 + u32 mask = (1 << pwm.event_id);
  273 + writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT);
273 274 }
274 275 }
275 276  
276 277 static void __iomem *samsung_timer_reg(void)
277 278 {
278   - switch (timer_source.source_id) {
  279 + switch (pwm.source_id) {
279 280 case 0:
280 281 case 1:
281 282 case 2:
282 283 case 3:
283   - return pwm->base + timer_source.source_id * 0x0c + 0x14;
  284 + return pwm.base + pwm.source_id * 0x0c + 0x14;
284 285  
285 286 case 4:
286   - return pwm->base + 0x40;
  287 + return pwm.base + 0x40;
287 288  
288 289 default:
289 290 BUG();
290 291  
291 292  
292 293  
293 294  
294 295  
... ... @@ -314,23 +315,21 @@
314 315 unsigned long clock_rate;
315 316 int ret;
316 317  
317   - pclk = clk_get_rate(timerclk);
  318 + pclk = clk_get_rate(pwm.timerclk);
318 319  
319   - samsung_timer_set_prescale(pwm, timer_source.source_id,
320   - timer_source.tscaler_div);
321   - samsung_timer_set_divisor(pwm, timer_source.source_id,
322   - timer_source.tdiv);
  320 + samsung_timer_set_prescale(pwm.source_id, pwm.tscaler_div);
  321 + samsung_timer_set_divisor(pwm.source_id, pwm.tdiv);
323 322  
324   - clock_rate = pclk / (timer_source.tscaler_div * timer_source.tdiv);
  323 + clock_rate = pclk / (pwm.tscaler_div * pwm.tdiv);
325 324  
326   - samsung_time_setup(timer_source.source_id, timer_source.tcnt_max);
327   - samsung_time_start(timer_source.source_id, true);
  325 + samsung_time_setup(pwm.source_id, pwm.tcnt_max);
  326 + samsung_time_start(pwm.source_id, true);
328 327  
329 328 setup_sched_clock(samsung_read_sched_clock,
330   - pwm->variant.bits, clock_rate);
  329 + pwm.variant.bits, clock_rate);
331 330  
332 331 ret = clocksource_mmio_init(reg, "samsung_clocksource_timer",
333   - clock_rate, 250, pwm->variant.bits,
  332 + clock_rate, 250, pwm.variant.bits,
334 333 clocksource_mmio_readl_down);
335 334 if (ret)
336 335 panic("samsung_clocksource_timer: can't register clocksource\n");
337 336  
338 337  
339 338  
... ... @@ -338,19 +337,19 @@
338 337  
339 338 static void __init samsung_timer_resources(void)
340 339 {
341   - timerclk = clk_get(NULL, "timers");
342   - if (IS_ERR(timerclk))
  340 + pwm.timerclk = clk_get(NULL, "timers");
  341 + if (IS_ERR(pwm.timerclk))
343 342 panic("failed to get timers clock for timer");
344 343  
345   - clk_prepare_enable(timerclk);
  344 + clk_prepare_enable(pwm.timerclk);
346 345  
347   - timer_source.tcnt_max = (1UL << pwm->variant.bits) - 1;
348   - if (pwm->variant.bits == 16) {
349   - timer_source.tscaler_div = 25;
350   - timer_source.tdiv = 2;
  346 + pwm.tcnt_max = (1UL << pwm.variant.bits) - 1;
  347 + if (pwm.variant.bits == 16) {
  348 + pwm.tscaler_div = 25;
  349 + pwm.tdiv = 2;
351 350 } else {
352   - timer_source.tscaler_div = 2;
353   - timer_source.tdiv = 1;
  351 + pwm.tscaler_div = 2;
  352 + pwm.tdiv = 1;
354 353 }
355 354 }
356 355  
357 356  
358 357  
... ... @@ -362,20 +361,17 @@
362 361 u8 mask;
363 362 int channel;
364 363  
365   - if (!pwm)
366   - panic("no pwm clocksource device found");
367   -
368   - mask = ~pwm->variant.output_mask & ((1 << SAMSUNG_PWM_NUM) - 1);
  364 + mask = ~pwm.variant.output_mask & ((1 << SAMSUNG_PWM_NUM) - 1);
369 365 channel = fls(mask) - 1;
370 366 if (channel < 0)
371 367 panic("failed to find PWM channel for clocksource");
372   - timer_source.source_id = channel;
  368 + pwm.source_id = channel;
373 369  
374 370 mask &= ~(1 << channel);
375 371 channel = fls(mask) - 1;
376 372 if (channel < 0)
377 373 panic("failed to find PWM channel for clock event");
378   - timer_source.event_id = channel;
  374 + pwm.event_id = channel;
379 375  
380 376 samsung_timer_resources();
381 377 samsung_clockevent_init();
382 378  
... ... @@ -391,14 +387,9 @@
391 387 u32 val;
392 388 int i;
393 389  
394   - pwm = kzalloc(sizeof(*pwm), GFP_KERNEL);
395   - if (!pwm) {
396   - pr_err("%s: could not allocate PWM device struct\n", __func__);
397   - return;
398   - }
399   - memcpy(&pwm->variant, variant, sizeof(pwm->variant));
  390 + memcpy(&pwm.variant, variant, sizeof(pwm.variant));
400 391 for (i = 0; i < SAMSUNG_PWM_NUM; ++i)
401   - pwm->irq[i] = irq_of_parse_and_map(np, i);
  392 + pwm.irq[i] = irq_of_parse_and_map(np, i);
402 393  
403 394 of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur, val) {
404 395 if (val >= SAMSUNG_PWM_NUM) {
... ... @@ -406,7 +397,7 @@
406 397 __func__);
407 398 continue;
408 399 }
409   - pwm->variant.output_mask |= 1 << val;
  400 + pwm.variant.output_mask |= 1 << val;
410 401 }
411 402  
412 403 of_address_to_resource(np, 0, &res);
... ... @@ -416,8 +407,8 @@
416 407 return;
417 408 }
418 409  
419   - pwm->base = ioremap(res.start, resource_size(&res));
420   - if (!pwm->base) {
  410 + pwm.base = ioremap(res.start, resource_size(&res));
  411 + if (!pwm.base) {
421 412 pr_err("%s: failed to map PWM registers\n", __func__);
422 413 release_mem_region(res.start, resource_size(&res));
423 414 return;