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Commit 033b8a333c66e0a7dc63132c1bd65175dc98bc25

Authored by Liu Yu
Committed by Kumar Gala
1 parent 463a8c01e1
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

powerpc/math-emu: Remove redundant 'ret' 

FP_DECL_EX is already used, so ret is redundant.
And FP_SET_EXCEPTION will add status into return value.

Signed-off-by: Liu Yu <yu.liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Showing 18 changed files with 34 additions and 52 deletions Side-by-side Diff

arch/powerpc/math-emu/fadd.c
Diff comments   View file @ 033b8a3
... ... @@ -13,7 +13,6 @@
13 13 FP_DECL_D(B);
14 14 FP_DECL_D(R);
15 15 FP_DECL_EX;
16   - int ret = 0;
17 16  
18 17 #ifdef DEBUG
19 18 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
arch/powerpc/math-emu/fcmpo.c
Diff comments   View file @ 033b8a3
... ... @@ -14,7 +14,6 @@
14 14 FP_DECL_EX;
15 15 int code[4] = { (1 << 3), (1 << 1), (1 << 2), (1 << 0) };
16 16 long cmp;
17   - int ret = 0;
18 17  
19 18 #ifdef DEBUG
20 19 printk("%s: %p (%08x) %d %p %p\n", __func__, ccr, *ccr, crfD, frA, frB);
... ... @@ -29,7 +28,7 @@
29 28 #endif
30 29  
31 30 if (A_c == FP_CLS_NAN || B_c == FP_CLS_NAN)
32   - ret |= EFLAG_VXVC;
  31 + FP_SET_EXCEPTION(EFLAG_VXVC);
33 32  
34 33 FP_CMP_D(cmp, A, B, 2);
35 34 cmp = code[(cmp + 1) & 3];
... ... @@ -44,6 +43,6 @@
44 43 printk("CR: %08x\n", *ccr);
45 44 #endif
46 45  
47   - return ret;
  46 + return FP_CUR_EXCEPTIONS;
48 47 }
arch/powerpc/math-emu/fdiv.c
Diff comments   View file @ 033b8a3
... ... @@ -13,7 +13,6 @@
13 13 FP_DECL_D(B);
14 14 FP_DECL_D(R);
15 15 FP_DECL_EX;
16   - int ret = 0;
17 16  
18 17 #ifdef DEBUG
19 18 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
20 19  
21 20  
22 21  
... ... @@ -28,22 +27,22 @@
28 27 #endif
29 28  
30 29 if (A_c == FP_CLS_ZERO && B_c == FP_CLS_ZERO) {
31   - ret |= EFLAG_VXZDZ;
  30 + FP_SET_EXCEPTION(EFLAG_VXZDZ);
32 31 #ifdef DEBUG
33 32 printk("%s: FPSCR_VXZDZ raised\n", __func__);
34 33 #endif
35 34 }
36 35 if (A_c == FP_CLS_INF && B_c == FP_CLS_INF) {
37   - ret |= EFLAG_VXIDI;
  36 + FP_SET_EXCEPTION(EFLAG_VXIDI);
38 37 #ifdef DEBUG
39 38 printk("%s: FPSCR_VXIDI raised\n", __func__);
40 39 #endif
41 40 }
42 41  
43 42 if (B_c == FP_CLS_ZERO && A_c != FP_CLS_ZERO) {
44   - ret |= EFLAG_DIVZERO;
  43 + FP_SET_EXCEPTION(EFLAG_DIVZERO);
45 44 if (__FPU_TRAP_P(EFLAG_DIVZERO))
46   - return ret;
  45 + return FP_CUR_EXCEPTIONS;
47 46 }
48 47 FP_DIV_D(R, A, B);
49 48  
arch/powerpc/math-emu/fdivs.c
Diff comments   View file @ 033b8a3
... ... @@ -14,7 +14,6 @@
14 14 FP_DECL_D(B);
15 15 FP_DECL_D(R);
16 16 FP_DECL_EX;
17   - int ret = 0;
18 17  
19 18 #ifdef DEBUG
20 19 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
21 20  
22 21  
23 22  
... ... @@ -29,22 +28,22 @@
29 28 #endif
30 29  
31 30 if (A_c == FP_CLS_ZERO && B_c == FP_CLS_ZERO) {
32   - ret |= EFLAG_VXZDZ;
  31 + FP_SET_EXCEPTION(EFLAG_VXZDZ);
33 32 #ifdef DEBUG
34 33 printk("%s: FPSCR_VXZDZ raised\n", __func__);
35 34 #endif
36 35 }
37 36 if (A_c == FP_CLS_INF && B_c == FP_CLS_INF) {
38   - ret |= EFLAG_VXIDI;
  37 + FP_SET_EXCEPTION(EFLAG_VXIDI);
39 38 #ifdef DEBUG
40 39 printk("%s: FPSCR_VXIDI raised\n", __func__);
41 40 #endif
42 41 }
43 42  
44 43 if (B_c == FP_CLS_ZERO && A_c != FP_CLS_ZERO) {
45   - ret |= EFLAG_DIVZERO;
  44 + FP_SET_EXCEPTION(EFLAG_DIVZERO);
46 45 if (__FPU_TRAP_P(EFLAG_DIVZERO))
47   - return ret;
  46 + return FP_CUR_EXCEPTIONS;
48 47 }
49 48  
50 49 FP_DIV_D(R, A, B);
arch/powerpc/math-emu/fmadd.c
Diff comments   View file @ 033b8a3
... ... @@ -15,7 +15,6 @@
15 15 FP_DECL_D(C);
16 16 FP_DECL_D(T);
17 17 FP_DECL_EX;
18   - int ret = 0;
19 18  
20 19 #ifdef DEBUG
21 20 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
22 21  
... ... @@ -33,12 +32,12 @@
33 32  
34 33 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
35 34 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
36   - ret |= EFLAG_VXIMZ;
  35 + FP_SET_EXCEPTION(EFLAG_VXIMZ);
37 36  
38 37 FP_MUL_D(T, A, C);
39 38  
40 39 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
41   - ret |= EFLAG_VXISI;
  40 + FP_SET_EXCEPTION(EFLAG_VXISI);
42 41  
43 42 FP_ADD_D(R, T, B);
44 43  
arch/powerpc/math-emu/fmadds.c
Diff comments   View file @ 033b8a3
... ... @@ -16,7 +16,6 @@
16 16 FP_DECL_D(C);
17 17 FP_DECL_D(T);
18 18 FP_DECL_EX;
19   - int ret = 0;
20 19  
21 20 #ifdef DEBUG
22 21 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
23 22  
... ... @@ -34,12 +33,12 @@
34 33  
35 34 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
36 35 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
37   - ret |= EFLAG_VXIMZ;
  36 + FP_SET_EXCEPTION(EFLAG_VXIMZ);
38 37  
39 38 FP_MUL_D(T, A, C);
40 39  
41 40 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
42   - ret |= EFLAG_VXISI;
  41 + FP_SET_EXCEPTION(EFLAG_VXISI);
43 42  
44 43 FP_ADD_D(R, T, B);
45 44  
arch/powerpc/math-emu/fmsub.c
Diff comments   View file @ 033b8a3
... ... @@ -15,7 +15,6 @@
15 15 FP_DECL_D(C);
16 16 FP_DECL_D(T);
17 17 FP_DECL_EX;
18   - int ret = 0;
19 18  
20 19 #ifdef DEBUG
21 20 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
... ... @@ -33,7 +32,7 @@
33 32  
34 33 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
35 34 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
36   - ret |= EFLAG_VXIMZ;
  35 + FP_SET_EXCEPTION(EFLAG_VXIMZ);
37 36  
38 37 FP_MUL_D(T, A, C);
39 38  
... ... @@ -41,7 +40,7 @@
41 40 B_s ^= 1;
42 41  
43 42 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
44   - ret |= EFLAG_VXISI;
  43 + FP_SET_EXCEPTION(EFLAG_VXISI);
45 44  
46 45 FP_ADD_D(R, T, B);
47 46  
arch/powerpc/math-emu/fmsubs.c
Diff comments   View file @ 033b8a3
... ... @@ -16,7 +16,6 @@
16 16 FP_DECL_D(C);
17 17 FP_DECL_D(T);
18 18 FP_DECL_EX;
19   - int ret = 0;
20 19  
21 20 #ifdef DEBUG
22 21 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
... ... @@ -34,7 +33,7 @@
34 33  
35 34 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
36 35 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
37   - ret |= EFLAG_VXIMZ;
  36 + FP_SET_EXCEPTION(EFLAG_VXIMZ);
38 37  
39 38 FP_MUL_D(T, A, C);
40 39  
... ... @@ -42,7 +41,7 @@
42 41 B_s ^= 1;
43 42  
44 43 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
45   - ret |= EFLAG_VXISI;
  44 + FP_SET_EXCEPTION(EFLAG_VXISI);
46 45  
47 46 FP_ADD_D(R, T, B);
48 47  
arch/powerpc/math-emu/fmul.c
Diff comments   View file @ 033b8a3
... ... @@ -13,7 +13,6 @@
13 13 FP_DECL_D(B);
14 14 FP_DECL_D(R);
15 15 FP_DECL_EX;
16   - int ret = 0;
17 16  
18 17 #ifdef DEBUG
19 18 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
... ... @@ -31,7 +30,7 @@
31 30  
32 31 if ((A_c == FP_CLS_INF && B_c == FP_CLS_ZERO) ||
33 32 (A_c == FP_CLS_ZERO && B_c == FP_CLS_INF))
34   - ret |= EFLAG_VXIMZ;
  33 + FP_SET_EXCEPTION(EFLAG_VXIMZ);
35 34  
36 35 FP_MUL_D(R, A, B);
37 36  
arch/powerpc/math-emu/fmuls.c
Diff comments   View file @ 033b8a3
... ... @@ -14,7 +14,6 @@
14 14 FP_DECL_D(B);
15 15 FP_DECL_D(R);
16 16 FP_DECL_EX;
17   - int ret = 0;
18 17  
19 18 #ifdef DEBUG
20 19 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
... ... @@ -32,7 +31,7 @@
32 31  
33 32 if ((A_c == FP_CLS_INF && B_c == FP_CLS_ZERO) ||
34 33 (A_c == FP_CLS_ZERO && B_c == FP_CLS_INF))
35   - ret |= EFLAG_VXIMZ;
  34 + FP_SET_EXCEPTION(EFLAG_VXIMZ);
36 35  
37 36 FP_MUL_D(R, A, B);
38 37  
arch/powerpc/math-emu/fnmadd.c
Diff comments   View file @ 033b8a3
... ... @@ -15,7 +15,6 @@
15 15 FP_DECL_D(C);
16 16 FP_DECL_D(T);
17 17 FP_DECL_EX;
18   - int ret = 0;
19 18  
20 19 #ifdef DEBUG
21 20 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
22 21  
... ... @@ -33,12 +32,12 @@
33 32  
34 33 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
35 34 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
36   - ret |= EFLAG_VXIMZ;
  35 + FP_SET_EXCEPTION(EFLAG_VXIMZ);
37 36  
38 37 FP_MUL_D(T, A, C);
39 38  
40 39 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
41   - ret |= EFLAG_VXISI;
  40 + FP_SET_EXCEPTION(EFLAG_VXISI);
42 41  
43 42 FP_ADD_D(R, T, B);
44 43  
arch/powerpc/math-emu/fnmadds.c
Diff comments   View file @ 033b8a3
... ... @@ -16,7 +16,6 @@
16 16 FP_DECL_D(C);
17 17 FP_DECL_D(T);
18 18 FP_DECL_EX;
19   - int ret = 0;
20 19  
21 20 #ifdef DEBUG
22 21 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
23 22  
... ... @@ -34,12 +33,12 @@
34 33  
35 34 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
36 35 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
37   - ret |= EFLAG_VXIMZ;
  36 + FP_SET_EXCEPTION(EFLAG_VXIMZ);
38 37  
39 38 FP_MUL_D(T, A, C);
40 39  
41 40 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
42   - ret |= EFLAG_VXISI;
  41 + FP_SET_EXCEPTION(EFLAG_VXISI);
43 42  
44 43 FP_ADD_D(R, T, B);
45 44  
arch/powerpc/math-emu/fnmsub.c
Diff comments   View file @ 033b8a3
... ... @@ -15,7 +15,6 @@
15 15 FP_DECL_D(C);
16 16 FP_DECL_D(T);
17 17 FP_DECL_EX;
18   - int ret = 0;
19 18  
20 19 #ifdef DEBUG
21 20 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
... ... @@ -33,7 +32,7 @@
33 32  
34 33 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
35 34 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
36   - ret |= EFLAG_VXIMZ;
  35 + FP_SET_EXCEPTION(EFLAG_VXIMZ);
37 36  
38 37 FP_MUL_D(T, A, C);
39 38  
... ... @@ -41,7 +40,7 @@
41 40 B_s ^= 1;
42 41  
43 42 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
44   - ret |= EFLAG_VXISI;
  43 + FP_SET_EXCEPTION(EFLAG_VXISI);
45 44  
46 45 FP_ADD_D(R, T, B);
47 46  
arch/powerpc/math-emu/fnmsubs.c
Diff comments   View file @ 033b8a3
... ... @@ -16,7 +16,6 @@
16 16 FP_DECL_D(C);
17 17 FP_DECL_D(T);
18 18 FP_DECL_EX;
19   - int ret = 0;
20 19  
21 20 #ifdef DEBUG
22 21 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
... ... @@ -34,7 +33,7 @@
34 33  
35 34 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
36 35 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
37   - ret |= EFLAG_VXIMZ;
  36 + FP_SET_EXCEPTION(EFLAG_VXIMZ);
38 37  
39 38 FP_MUL_D(T, A, C);
40 39  
... ... @@ -42,7 +41,7 @@
42 41 B_s ^= 1;
43 42  
44 43 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
45   - ret |= EFLAG_VXISI;
  44 + FP_SET_EXCEPTION(EFLAG_VXISI);
46 45  
47 46 FP_ADD_D(R, T, B);
48 47  
arch/powerpc/math-emu/fsqrt.c
Diff comments   View file @ 033b8a3
... ... @@ -12,7 +12,6 @@
12 12 FP_DECL_D(B);
13 13 FP_DECL_D(R);
14 14 FP_DECL_EX;
15   - int ret = 0;
16 15  
17 16 #ifdef DEBUG
18 17 printk("%s: %p %p %p %p\n", __func__, frD, frB);
19 18  
... ... @@ -25,9 +24,9 @@
25 24 #endif
26 25  
27 26 if (B_s && B_c != FP_CLS_ZERO)
28   - ret |= EFLAG_VXSQRT;
  27 + FP_SET_EXCEPTION(EFLAG_VXSQRT);
29 28 if (B_c == FP_CLS_NAN)
30   - ret |= EFLAG_VXSNAN;
  29 + FP_SET_EXCEPTION(EFLAG_VXSNAN);
31 30  
32 31 FP_SQRT_D(R, B);
33 32  
arch/powerpc/math-emu/fsqrts.c
Diff comments   View file @ 033b8a3
... ... @@ -13,7 +13,6 @@
13 13 FP_DECL_D(B);
14 14 FP_DECL_D(R);
15 15 FP_DECL_EX;
16   - int ret = 0;
17 16  
18 17 #ifdef DEBUG
19 18 printk("%s: %p %p %p %p\n", __func__, frD, frB);
20 19  
... ... @@ -26,9 +25,9 @@
26 25 #endif
27 26  
28 27 if (B_s && B_c != FP_CLS_ZERO)
29   - ret |= EFLAG_VXSQRT;
  28 + FP_SET_EXCEPTION(EFLAG_VXSQRT);
30 29 if (B_c == FP_CLS_NAN)
31   - ret |= EFLAG_VXSNAN;
  30 + FP_SET_EXCEPTION(EFLAG_VXSNAN);
32 31  
33 32 FP_SQRT_D(R, B);
34 33  
arch/powerpc/math-emu/fsub.c
Diff comments   View file @ 033b8a3
... ... @@ -13,7 +13,6 @@
13 13 FP_DECL_D(B);
14 14 FP_DECL_D(R);
15 15 FP_DECL_EX;
16   - int ret = 0;
17 16  
18 17 #ifdef DEBUG
19 18 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
... ... @@ -31,7 +30,7 @@
31 30 B_s ^= 1;
32 31  
33 32 if (A_s != B_s && A_c == FP_CLS_INF && B_c == FP_CLS_INF)
34   - ret |= EFLAG_VXISI;
  33 + FP_SET_EXCEPTION(EFLAG_VXISI);
35 34  
36 35 FP_ADD_D(R, A, B);
37 36  
arch/powerpc/math-emu/fsubs.c
Diff comments   View file @ 033b8a3
... ... @@ -14,7 +14,6 @@
14 14 FP_DECL_D(B);
15 15 FP_DECL_D(R);
16 16 FP_DECL_EX;
17   - int ret = 0;
18 17  
19 18 #ifdef DEBUG
20 19 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
... ... @@ -32,7 +31,7 @@
32 31 B_s ^= 1;
33 32  
34 33 if (A_s != B_s && A_c == FP_CLS_INF && B_c == FP_CLS_INF)
35   - ret |= EFLAG_VXISI;
  34 + FP_SET_EXCEPTION(EFLAG_VXISI);
36 35  
37 36 FP_ADD_D(R, A, B);
38 37