Doug / smarc-fsl-linux-kernel

Download as
Browse Code ยป

Commit 037fd9b6473393c35a31f0c43e26eb7e874e901d

Authored by Sven Eckelmann
Committed by John W. Linville
1 parent ed9f0ed3b9
Exists in smarc-l5.0.0_1.0.0-ga and in 5 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga

ath_hw: Use common REG_WRITE parameter order 

All defines for REG_WRITE in Atheros wireless drivers use the order "ah",
"register" and "value". hw.c is the only file using the order "ah", "value" and
"register".

drivers/net/wireless/ath/ath9k/hw.h:#define REG_WRITE(_ah, _reg, _val) \
drivers/net/wireless/ath/key.c:#define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg)

This inconsistent definition can easily lead to implementation errors. The
modification doesn't change the behavior of the driver or the generated code.

Signed-off-by: Sven Eckelmann <sven@narfation.org>
Signed-off-by: Simon Wunderlich <siwu@hrz.tu-chemnitz.de>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

Showing 1 changed file with 10 additions and 10 deletions Side-by-side Diff

drivers/net/wireless/ath/hw.c
Diff comments   View file @ 037fd9b
... ... @@ -20,8 +20,8 @@
20 20 #include "ath.h"
21 21 #include "reg.h"
22 22  
23   -#define REG_READ (common->ops->read)
24   -#define REG_WRITE (common->ops->write)
  23 +#define REG_READ (common->ops->read)
  24 +#define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg)
25 25  
26 26 /**
27 27 * ath_hw_set_bssid_mask - filter out bssids we listen
... ... @@ -119,8 +119,8 @@
119 119 {
120 120 void *ah = common->ah;
121 121  
122   - REG_WRITE(ah, get_unaligned_le32(common->bssidmask), AR_BSSMSKL);
123   - REG_WRITE(ah, get_unaligned_le16(common->bssidmask + 4), AR_BSSMSKU);
  122 + REG_WRITE(ah, AR_BSSMSKL, get_unaligned_le32(common->bssidmask));
  123 + REG_WRITE(ah, AR_BSSMSKU, get_unaligned_le16(common->bssidmask + 4));
124 124 }
125 125 EXPORT_SYMBOL(ath_hw_setbssidmask);
126 126  
... ... @@ -139,7 +139,7 @@
139 139 void *ah = common->ah;
140 140  
141 141 /* freeze */
142   - REG_WRITE(ah, AR_MIBC_FMC, AR_MIBC);
  142 + REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC);
143 143  
144 144 /* read */
145 145 cycles = REG_READ(ah, AR_CCCNT);
146 146  
... ... @@ -148,13 +148,13 @@
148 148 tx = REG_READ(ah, AR_TFCNT);
149 149  
150 150 /* clear */
151   - REG_WRITE(ah, 0, AR_CCCNT);
152   - REG_WRITE(ah, 0, AR_RFCNT);
153   - REG_WRITE(ah, 0, AR_RCCNT);
154   - REG_WRITE(ah, 0, AR_TFCNT);
  151 + REG_WRITE(ah, AR_CCCNT, 0);
  152 + REG_WRITE(ah, AR_RFCNT, 0);
  153 + REG_WRITE(ah, AR_RCCNT, 0);
  154 + REG_WRITE(ah, AR_TFCNT, 0);
155 155  
156 156 /* unfreeze */
157   - REG_WRITE(ah, 0, AR_MIBC);
  157 + REG_WRITE(ah, AR_MIBC, 0);
158 158  
159 159 /* update all cycle counters here */
160 160 common->cc_ani.cycles += cycles;