uml: customize tlb.h

Customize the hooks in tlb.h to optimize TLB flushing some more. Add start and end fields to tlb_gather_mmu, which are used to limit the address space range scanned when a region is unmapped. The interfaces which just free page tables, without actually changing mappings, don't need to cause a TLB flush. Signed-off-by: Jeff Dike <jdike@linux.intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

uml: customize tlb.h
Customize the hooks in tlb.h to optimize TLB flushing some more. Add start and end fields to tlb_gather_mmu, which are used to limit the address space range scanned when a region is unmapped. The interfaces which just free page tables, without actually changing mappings, don't need to cause a TLB flush. Signed-off-by: Jeff Dike <jdike@linux.intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Jeff Dike · Linus Torvalds
1 parent 909e90d3c4
Showing 2 changed files with 139 additions and 8 deletions Side-by-side Diff
arch/um/kernel/tlb.c
include/asm-um/tlb.h
@@ -193,18 +193,18 @@
 		if (!pte_young(*pte)) {
 			r = 0;
 			w = 0;
-		} else if (!pte_dirty(*pte)) {
+		} else if (!pte_dirty(*pte))
 			w = 0;
-		}
+
 		prot = ((r ? UM_PROT_READ : 0) | (w ? UM_PROT_WRITE : 0) |
 			(x ? UM_PROT_EXEC : 0));
 		if (hvc->force || pte_newpage(*pte)) {
 			if (pte_present(*pte))
 				ret = add_mmap(addr, pte_val(*pte) & PAGE_MASK,
 					       PAGE_SIZE, prot, hvc);
-			else ret = add_munmap(addr, PAGE_SIZE, hvc);
-		}
-		else if (pte_newprot(*pte))
+			else
+				ret = add_munmap(addr, PAGE_SIZE, hvc);
+		} else if (pte_newprot(*pte))
 			ret = add_mprotect(addr, PAGE_SIZE, prot, hvc);
 		*pte = pte_mkuptodate(*pte);
 	} while (pte++, addr += PAGE_SIZE, ((addr < end) && !ret));
@@ -500,7 +500,8 @@
 	else fix_range(vma->vm_mm, start, end, 0);
 }
  
-void flush_tlb_mm(struct mm_struct *mm)
+void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
+			unsigned long end)
 {
 	/*
 	 * Don't bother flushing if this address space is about to be
@@ -509,7 +510,17 @@
 	if (atomic_read(&mm->mm_users) == 0)
 		return;
  
-	fix_range(mm, 0, TASK_SIZE, 0);
+	fix_range(mm, start, end, 0);
+}
+
+void flush_tlb_mm(struct mm_struct *mm)
+{
+	struct vm_area_struct *vma = mm->mmap;
+
+	while (vma != NULL) {
+		fix_range(mm, vma->vm_start, vma->vm_end, 0);
+		vma = vma->vm_next;
+	}
 }
  
 void force_flush_all(void)
 #ifndef __UM_TLB_H
 #define __UM_TLB_H
  
-#include <asm/arch/tlb.h>
+#include <linux/swap.h>
+#include <asm/percpu.h>
+#include <asm/pgalloc.h>
+#include <asm/tlbflush.h>
+
+#define tlb_start_vma(tlb, vma) do { } while (0)
+#define tlb_end_vma(tlb, vma) do { } while (0)
+#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
+
+/* struct mmu_gather is an opaque type used by the mm code for passing around
+ * any data needed by arch specific code for tlb_remove_page.
+ */
+struct mmu_gather {
+	struct mm_struct	*mm;
+	unsigned int		need_flush; /* Really unmapped some ptes? */
+	unsigned long		start;
+	unsigned long		end;
+	unsigned int		fullmm; /* non-zero means full mm flush */
+};
+
+/* Users of the generic TLB shootdown code must declare this storage space. */
+DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
+
+static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep,
+					  unsigned long address)
+{
+	if (tlb->start > address)
+		tlb->start = address;
+	if (tlb->end < address + PAGE_SIZE)
+		tlb->end = address + PAGE_SIZE;
+}
+
+static inline void init_tlb_gather(struct mmu_gather *tlb)
+{
+	tlb->need_flush = 0;
+
+	tlb->start = TASK_SIZE;
+	tlb->end = 0;
+
+	if (tlb->fullmm) {
+		tlb->start = 0;
+		tlb->end = TASK_SIZE;
+	}
+}
+
+/* tlb_gather_mmu
+ *	Return a pointer to an initialized struct mmu_gather.
+ */
+static inline struct mmu_gather *
+tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush)
+{
+	struct mmu_gather *tlb = &get_cpu_var(mmu_gathers);
+
+	tlb->mm = mm;
+	tlb->fullmm = full_mm_flush;
+
+	init_tlb_gather(tlb);
+
+	return tlb;
+}
+
+extern void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
+			       unsigned long end);
+
+static inline void
+tlb_flush_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
+{
+	if (!tlb->need_flush)
+		return;
+
+	flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end);
+	init_tlb_gather(tlb);
+}
+
+/* tlb_finish_mmu
+ *	Called at the end of the shootdown operation to free up any resources
+ *	that were required.
+ */
+static inline void
+tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
+{
+	tlb_flush_mmu(tlb, start, end);
+
+	/* keep the page table cache within bounds */
+	check_pgt_cache();
+
+	put_cpu_var(mmu_gathers);
+}
+
+/* tlb_remove_page
+ *	Must perform the equivalent to __free_pte(pte_get_and_clear(ptep)),
+ *	while handling the additional races in SMP caused by other CPUs
+ *	caching valid mappings in their TLBs.
+ */
+static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
+{
+	tlb->need_flush = 1;
+	free_page_and_swap_cache(page);
+	return;
+}
+
+/**
+ * tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation.
+ *
+ * Record the fact that pte's were really umapped in ->need_flush, so we can
+ * later optimise away the tlb invalidate.   This helps when userspace is
+ * unmapping already-unmapped pages, which happens quite a lot.
+ */
+#define tlb_remove_tlb_entry(tlb, ptep, address)		\
+	do {							\
+		tlb->need_flush = 1;				\
+		__tlb_remove_tlb_entry(tlb, ptep, address);	\
+	} while (0)
+
+#define pte_free_tlb(tlb, ptep) __pte_free_tlb(tlb, ptep)
+
+#define pud_free_tlb(tlb, pudp) __pud_free_tlb(tlb, pudp)
+
+#define pmd_free_tlb(tlb, pmdp) __pmd_free_tlb(tlb, pmdp)
+
+#define tlb_migrate_finish(mm) do {} while (0)
  
 #endif
...	...	@@ -193,18 +193,18 @@
193	193	if (!pte_young(*pte)) {
194	194	r = 0;
195	195	w = 0;
196		- } else if (!pte_dirty(*pte)) {
	196	+ } else if (!pte_dirty(*pte))
197	197	w = 0;
198		- }
	198	+
199	199	prot = ((r ? UM_PROT_READ : 0) \| (w ? UM_PROT_WRITE : 0) \|
200	200	(x ? UM_PROT_EXEC : 0));
201	201	if (hvc->force \|\| pte_newpage(*pte)) {
202	202	if (pte_present(*pte))
203	203	ret = add_mmap(addr, pte_val(*pte) & PAGE_MASK,
204	204	PAGE_SIZE, prot, hvc);
205		- else ret = add_munmap(addr, PAGE_SIZE, hvc);
206		- }
207		- else if (pte_newprot(*pte))
	205	+ else
	206	+ ret = add_munmap(addr, PAGE_SIZE, hvc);
	207	+ } else if (pte_newprot(*pte))
208	208	ret = add_mprotect(addr, PAGE_SIZE, prot, hvc);
209	209	pte = pte_mkuptodate(pte);
210	210	} while (pte++, addr += PAGE_SIZE, ((addr < end) && !ret));
...	...	@@ -500,7 +500,8 @@
500	500	else fix_range(vma->vm_mm, start, end, 0);
501	501	}
502	502
503		-void flush_tlb_mm(struct mm_struct *mm)
	503	+void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
	504	+ unsigned long end)
504	505	{
505	506	/*
506	507	* Don't bother flushing if this address space is about to be
...	...	@@ -509,7 +510,17 @@
509	510	if (atomic_read(&mm->mm_users) == 0)
510	511	return;
511	512
512		- fix_range(mm, 0, TASK_SIZE, 0);
	513	+ fix_range(mm, start, end, 0);
	514	+}
	515	+
	516	+void flush_tlb_mm(struct mm_struct *mm)
	517	+{
	518	+ struct vm_area_struct *vma = mm->mmap;
	519	+
	520	+ while (vma != NULL) {
	521	+ fix_range(mm, vma->vm_start, vma->vm_end, 0);
	522	+ vma = vma->vm_next;
	523	+ }
513	524	}
514	525
515	526	void force_flush_all(void)
1	1	#ifndef __UM_TLB_H
2	2	#define __UM_TLB_H
3	3
4		-#include <asm/arch/tlb.h>
	4	+#include <linux/swap.h>
	5	+#include <asm/percpu.h>
	6	+#include <asm/pgalloc.h>
	7	+#include <asm/tlbflush.h>
	8	+
	9	+#define tlb_start_vma(tlb, vma) do { } while (0)
	10	+#define tlb_end_vma(tlb, vma) do { } while (0)
	11	+#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
	12	+
	13	+/* struct mmu_gather is an opaque type used by the mm code for passing around
	14	+ * any data needed by arch specific code for tlb_remove_page.
	15	+ */
	16	+struct mmu_gather {
	17	+ struct mm_struct *mm;
	18	+ unsigned int need_flush; /* Really unmapped some ptes? */
	19	+ unsigned long start;
	20	+ unsigned long end;
	21	+ unsigned int fullmm; /* non-zero means full mm flush */
	22	+};
	23	+
	24	+/* Users of the generic TLB shootdown code must declare this storage space. */
	25	+DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
	26	+
	27	+static inline void __tlb_remove_tlb_entry(struct mmu_gather tlb, pte_t ptep,
	28	+ unsigned long address)
	29	+{
	30	+ if (tlb->start > address)
	31	+ tlb->start = address;
	32	+ if (tlb->end < address + PAGE_SIZE)
	33	+ tlb->end = address + PAGE_SIZE;
	34	+}
	35	+
	36	+static inline void init_tlb_gather(struct mmu_gather *tlb)
	37	+{
	38	+ tlb->need_flush = 0;
	39	+
	40	+ tlb->start = TASK_SIZE;
	41	+ tlb->end = 0;
	42	+
	43	+ if (tlb->fullmm) {
	44	+ tlb->start = 0;
	45	+ tlb->end = TASK_SIZE;
	46	+ }
	47	+}
	48	+
	49	+/* tlb_gather_mmu
	50	+ * Return a pointer to an initialized struct mmu_gather.
	51	+ */
	52	+static inline struct mmu_gather *
	53	+tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush)
	54	+{
	55	+ struct mmu_gather *tlb = &get_cpu_var(mmu_gathers);
	56	+
	57	+ tlb->mm = mm;
	58	+ tlb->fullmm = full_mm_flush;
	59	+
	60	+ init_tlb_gather(tlb);
	61	+
	62	+ return tlb;
	63	+}
	64	+
	65	+extern void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
	66	+ unsigned long end);
	67	+
	68	+static inline void
	69	+tlb_flush_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
	70	+{
	71	+ if (!tlb->need_flush)
	72	+ return;
	73	+
	74	+ flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end);
	75	+ init_tlb_gather(tlb);
	76	+}
	77	+
	78	+/* tlb_finish_mmu
	79	+ * Called at the end of the shootdown operation to free up any resources
	80	+ * that were required.
	81	+ */
	82	+static inline void
	83	+tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
	84	+{
	85	+ tlb_flush_mmu(tlb, start, end);
	86	+
	87	+ /* keep the page table cache within bounds */
	88	+ check_pgt_cache();
	89	+
	90	+ put_cpu_var(mmu_gathers);
	91	+}
	92	+
	93	+/* tlb_remove_page
	94	+ * Must perform the equivalent to __free_pte(pte_get_and_clear(ptep)),
	95	+ * while handling the additional races in SMP caused by other CPUs
	96	+ * caching valid mappings in their TLBs.
	97	+ */
	98	+static inline void tlb_remove_page(struct mmu_gather tlb, struct page page)
	99	+{
	100	+ tlb->need_flush = 1;
	101	+ free_page_and_swap_cache(page);
	102	+ return;
	103	+}
	104	+
	105	+/**
	106	+ * tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation.
	107	+ *
	108	+ * Record the fact that pte's were really umapped in ->need_flush, so we can
	109	+ * later optimise away the tlb invalidate. This helps when userspace is
	110	+ * unmapping already-unmapped pages, which happens quite a lot.
	111	+ */
	112	+#define tlb_remove_tlb_entry(tlb, ptep, address) \
	113	+ do { \
	114	+ tlb->need_flush = 1; \
	115	+ __tlb_remove_tlb_entry(tlb, ptep, address); \
	116	+ } while (0)
	117	+
	118	+#define pte_free_tlb(tlb, ptep) __pte_free_tlb(tlb, ptep)
	119	+
	120	+#define pud_free_tlb(tlb, pudp) __pud_free_tlb(tlb, pudp)
	121	+
	122	+#define pmd_free_tlb(tlb, pmdp) __pmd_free_tlb(tlb, pmdp)
	123	+
	124	+#define tlb_migrate_finish(mm) do {} while (0)
5	125
6	126	#endif