Merge remote branch 'anholt/drm-intel-next' into drm-linus

Pull more Intel changes in, especially one to init the GTT properly

Merge remote branch 'anholt/drm-intel-next' into drm-linus
Pull more Intel changes in, especially one to init the GTT properly
Dave Airlie
2 parents 7b0a9e8302 4f8d619cc3
Showing 8 changed files Side-by-side Diff
drivers/char/agp/intel-agp.c
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/i915_irq.c
drivers/gpu/drm/i915/i915_suspend.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_drv.h
@@ -178,6 +178,7 @@
 	 * popup and for the GTT.
 	 */
 	int gtt_entries;			/* i830+ */
+	int gtt_total_size;
 	union {
 		void __iomem *i9xx_flush_page;
 		void *i8xx_flush_page;
@@ -1153,7 +1154,7 @@
 	readl(intel_private.registers+I810_PGETBL_CTL);	/* PCI Posting. */
  
 	if (agp_bridge->driver->needs_scratch_page) {
-		for (i = intel_private.gtt_entries; i < current_size->num_entries; i++) {
+		for (i = intel_private.gtt_entries; i < intel_private.gtt_total_size; i++) {
 			writel(agp_bridge->scratch_page, intel_private.gtt+i);
 		}
 		readl(intel_private.gtt+i-1);	/* PCI Posting. */
@@ -1308,6 +1309,8 @@
 	if (!intel_private.gtt)
 		return -ENOMEM;
  
+	intel_private.gtt_total_size = gtt_map_size / 4;
+
 	temp &= 0xfff80000;
  
 	intel_private.registers = ioremap(temp, 128 * 4096);
@@ -1394,6 +1397,8 @@
  
 	if (!intel_private.gtt)
 		return -ENOMEM;
+
+	intel_private.gtt_total_size = gtt_size / 4;
  
 	intel_private.registers = ioremap(temp, 128 * 4096);
 	if (!intel_private.registers) {
@@ -97,13 +97,14 @@
 	{
 		struct drm_gem_object *obj = obj_priv->obj;
  
-		seq_printf(m, "    %p: %s %8zd %08x %08x %d %s",
+		seq_printf(m, "    %p: %s %8zd %08x %08x %d%s%s",
 			   obj,
 			   get_pin_flag(obj_priv),
 			   obj->size,
 			   obj->read_domains, obj->write_domain,
 			   obj_priv->last_rendering_seqno,
-			   obj_priv->dirty ? "dirty" : "");
+			   obj_priv->dirty ? " dirty" : "",
+			   obj_priv->madv == I915_MADV_DONTNEED ? " purgeable" : "");
  
 		if (obj->name)
 			seq_printf(m, " (name: %d)", obj->name);
@@ -383,8 +383,6 @@
 	u32 saveFDI_RXA_IMR;
 	u32 saveFDI_RXB_IMR;
 	u32 saveCACHE_MODE_0;
-	u32 saveD_STATE;
-	u32 saveDSPCLK_GATE_D;
 	u32 saveMI_ARB_STATE;
 	u32 saveSWF0[16];
 	u32 saveSWF1[16];
@@ -1288,6 +1288,7 @@
 	list->hash.key = list->file_offset_node->start;
 	if (drm_ht_insert_item(&mm->offset_hash, &list->hash)) {
 		DRM_ERROR("failed to add to map hash\n");
+		ret = -ENOMEM;
 		goto out_free_mm;
 	}
  
@@ -546,7 +546,6 @@
 		/*
 		 * Wakeup waiting processes so they don't hang
 		 */
-		printk("i915: Waking up sleeping processes\n");
 		DRM_WAKEUP(&dev_priv->irq_queue);
 	}
  
@@ -756,10 +756,6 @@
 		dev_priv->saveIMR = I915_READ(IMR);
 	}
  
-	/* Clock gating state */
-	dev_priv->saveD_STATE = I915_READ(D_STATE);
-	dev_priv->saveDSPCLK_GATE_D = I915_READ(DSPCLK_GATE_D); /* Not sure about this */
-
 	/* Cache mode state */
 	dev_priv->saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
  
@@ -834,8 +830,7 @@
 	}
  
 	/* Clock gating state */
-	I915_WRITE (D_STATE, dev_priv->saveD_STATE);
-	I915_WRITE (DSPCLK_GATE_D, dev_priv->saveDSPCLK_GATE_D);
+	intel_init_clock_gating(dev);
  
 	/* Cache mode state */
 	I915_WRITE (CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0xffff0000);
@@ -4584,28 +4584,33 @@
 		struct drm_i915_gem_object *obj_priv;
 		int ret;
  
-		pwrctx = drm_gem_object_alloc(dev, 4096);
-		if (!pwrctx) {
-			DRM_DEBUG("failed to alloc power context, RC6 disabled\n");
-			goto out;
-		}
+		if (dev_priv->pwrctx) {
+			obj_priv = dev_priv->pwrctx->driver_private;
+		} else {
+			pwrctx = drm_gem_object_alloc(dev, 4096);
+			if (!pwrctx) {
+				DRM_DEBUG("failed to alloc power context, "
+					  "RC6 disabled\n");
+				goto out;
+			}
  
-		ret = i915_gem_object_pin(pwrctx, 4096);
-		if (ret) {
-			DRM_ERROR("failed to pin power context: %d\n", ret);
-			drm_gem_object_unreference(pwrctx);
-			goto out;
-		}
+			ret = i915_gem_object_pin(pwrctx, 4096);
+			if (ret) {
+				DRM_ERROR("failed to pin power context: %d\n",
+					  ret);
+				drm_gem_object_unreference(pwrctx);
+				goto out;
+			}
  
-		i915_gem_object_set_to_gtt_domain(pwrctx, 1);
+			i915_gem_object_set_to_gtt_domain(pwrctx, 1);
  
-		obj_priv = pwrctx->driver_private;
+			dev_priv->pwrctx = pwrctx;
+			obj_priv = pwrctx->driver_private;
+		}
  
 		I915_WRITE(PWRCTXA, obj_priv->gtt_offset | PWRCTX_EN);
 		I915_WRITE(MCHBAR_RENDER_STANDBY,
 			   I915_READ(MCHBAR_RENDER_STANDBY) & ~RCX_SW_EXIT);
-
-		dev_priv->pwrctx = pwrctx;
 	}
  
 out:
@@ -208,6 +208,7 @@
 				    u16 blue, int regno);
 extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
 				    u16 *blue, int regno);
+extern void intel_init_clock_gating(struct drm_device *dev);
  
 extern int intel_framebuffer_create(struct drm_device *dev,
 				    struct drm_mode_fb_cmd *mode_cmd,
...	...	@@ -178,6 +178,7 @@
178	178	* popup and for the GTT.
179	179	*/
180	180	int gtt_entries; /* i830+ */
	181	+ int gtt_total_size;
181	182	union {
182	183	void __iomem *i9xx_flush_page;
183	184	void *i8xx_flush_page;
...	...	@@ -1153,7 +1154,7 @@
1153	1154	readl(intel_private.registers+I810_PGETBL_CTL); /* PCI Posting. */
1154	1155
1155	1156	if (agp_bridge->driver->needs_scratch_page) {
1156		- for (i = intel_private.gtt_entries; i < current_size->num_entries; i++) {
	1157	+ for (i = intel_private.gtt_entries; i < intel_private.gtt_total_size; i++) {
1157	1158	writel(agp_bridge->scratch_page, intel_private.gtt+i);
1158	1159	}
1159	1160	readl(intel_private.gtt+i-1); /* PCI Posting. */
...	...	@@ -1308,6 +1309,8 @@
1308	1309	if (!intel_private.gtt)
1309	1310	return -ENOMEM;
1310	1311
	1312	+ intel_private.gtt_total_size = gtt_map_size / 4;
	1313	+
1311	1314	temp &= 0xfff80000;
1312	1315
1313	1316	intel_private.registers = ioremap(temp, 128 * 4096);
...	...	@@ -1394,6 +1397,8 @@
1394	1397
1395	1398	if (!intel_private.gtt)
1396	1399	return -ENOMEM;
	1400	+
	1401	+ intel_private.gtt_total_size = gtt_size / 4;
1397	1402
1398	1403	intel_private.registers = ioremap(temp, 128 * 4096);
1399	1404	if (!intel_private.registers) {
...	...	@@ -97,13 +97,14 @@
97	97	{
98	98	struct drm_gem_object *obj = obj_priv->obj;
99	99
100		- seq_printf(m, " %p: %s %8zd %08x %08x %d %s",
	100	+ seq_printf(m, " %p: %s %8zd %08x %08x %d%s%s",
101	101	obj,
102	102	get_pin_flag(obj_priv),
103	103	obj->size,
104	104	obj->read_domains, obj->write_domain,
105	105	obj_priv->last_rendering_seqno,
106		- obj_priv->dirty ? "dirty" : "");
	106	+ obj_priv->dirty ? " dirty" : "",
	107	+ obj_priv->madv == I915_MADV_DONTNEED ? " purgeable" : "");
107	108
108	109	if (obj->name)
109	110	seq_printf(m, " (name: %d)", obj->name);
...	...	@@ -383,8 +383,6 @@
383	383	u32 saveFDI_RXA_IMR;
384	384	u32 saveFDI_RXB_IMR;
385	385	u32 saveCACHE_MODE_0;
386		- u32 saveD_STATE;
387		- u32 saveDSPCLK_GATE_D;
388	386	u32 saveMI_ARB_STATE;
389	387	u32 saveSWF0[16];
390	388	u32 saveSWF1[16];
...	...	@@ -1288,6 +1288,7 @@
1288	1288	list->hash.key = list->file_offset_node->start;
1289	1289	if (drm_ht_insert_item(&mm->offset_hash, &list->hash)) {
1290	1290	DRM_ERROR("failed to add to map hash\n");
	1291	+ ret = -ENOMEM;
1291	1292	goto out_free_mm;
1292	1293	}
1293	1294
...	...	@@ -546,7 +546,6 @@
546	546	/*
547	547	* Wakeup waiting processes so they don't hang
548	548	*/
549		- printk("i915: Waking up sleeping processes\n");
550	549	DRM_WAKEUP(&dev_priv->irq_queue);
551	550	}
552	551
...	...	@@ -756,10 +756,6 @@
756	756	dev_priv->saveIMR = I915_READ(IMR);
757	757	}
758	758
759		- /* Clock gating state */
760		- dev_priv->saveD_STATE = I915_READ(D_STATE);
761		- dev_priv->saveDSPCLK_GATE_D = I915_READ(DSPCLK_GATE_D); /* Not sure about this */
762		-
763	759	/* Cache mode state */
764	760	dev_priv->saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
765	761
...	...	@@ -834,8 +830,7 @@
834	830	}
835	831
836	832	/* Clock gating state */
837		- I915_WRITE (D_STATE, dev_priv->saveD_STATE);
838		- I915_WRITE (DSPCLK_GATE_D, dev_priv->saveDSPCLK_GATE_D);
	833	+ intel_init_clock_gating(dev);
839	834
840	835	/* Cache mode state */
841	836	I915_WRITE (CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 \| 0xffff0000);
...	...	@@ -4584,28 +4584,33 @@
4584	4584	struct drm_i915_gem_object *obj_priv;
4585	4585	int ret;
4586	4586
4587		- pwrctx = drm_gem_object_alloc(dev, 4096);
4588		- if (!pwrctx) {
4589		- DRM_DEBUG("failed to alloc power context, RC6 disabled\n");
4590		- goto out;
4591		- }
	4587	+ if (dev_priv->pwrctx) {
	4588	+ obj_priv = dev_priv->pwrctx->driver_private;
	4589	+ } else {
	4590	+ pwrctx = drm_gem_object_alloc(dev, 4096);
	4591	+ if (!pwrctx) {
	4592	+ DRM_DEBUG("failed to alloc power context, "
	4593	+ "RC6 disabled\n");
	4594	+ goto out;
	4595	+ }
4592	4596
4593		- ret = i915_gem_object_pin(pwrctx, 4096);
4594		- if (ret) {
4595		- DRM_ERROR("failed to pin power context: %d\n", ret);
4596		- drm_gem_object_unreference(pwrctx);
4597		- goto out;
4598		- }
	4597	+ ret = i915_gem_object_pin(pwrctx, 4096);
	4598	+ if (ret) {
	4599	+ DRM_ERROR("failed to pin power context: %d\n",
	4600	+ ret);
	4601	+ drm_gem_object_unreference(pwrctx);
	4602	+ goto out;
	4603	+ }
4599	4604
4600		- i915_gem_object_set_to_gtt_domain(pwrctx, 1);
	4605	+ i915_gem_object_set_to_gtt_domain(pwrctx, 1);
4601	4606
4602		- obj_priv = pwrctx->driver_private;
	4607	+ dev_priv->pwrctx = pwrctx;
	4608	+ obj_priv = pwrctx->driver_private;
	4609	+ }
4603	4610
4604	4611	I915_WRITE(PWRCTXA, obj_priv->gtt_offset \| PWRCTX_EN);
4605	4612	I915_WRITE(MCHBAR_RENDER_STANDBY,
4606	4613	I915_READ(MCHBAR_RENDER_STANDBY) & ~RCX_SW_EXIT);
4607		-
4608		- dev_priv->pwrctx = pwrctx;
4609	4614	}
4610	4615
4611	4616	out:
...	...	@@ -208,6 +208,7 @@
208	208	u16 blue, int regno);
209	209	extern void intel_crtc_fb_gamma_get(struct drm_crtc crtc, u16 red, u16 *green,
210	210	u16 *blue, int regno);
	211	+extern void intel_init_clock_gating(struct drm_device *dev);
211	212
212	213	extern int intel_framebuffer_create(struct drm_device *dev,
213	214	struct drm_mode_fb_cmd *mode_cmd,