Commit 0d624275720a4b01217693eb80d967a0d5f1f3a3

Authored by Vaibhav Bedia
Committed by Mark Brown
1 parent 0865a75d41

ASoC: Davinci: McASP: Flush the FIFO before enabling

FIFO should be flushed before it is enabled for the first time.
This fixes the I/O errors reported by the ASoC core on a fresh boot

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

Showing 1 changed file with 8 additions and 2 deletions Side-by-side Diff

sound/soc/davinci/davinci-mcasp.c
... ... @@ -380,14 +380,20 @@
380 380 static void davinci_mcasp_start(struct davinci_audio_dev *dev, int stream)
381 381 {
382 382 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
383   - if (dev->txnumevt) /* enable FIFO */
  383 + if (dev->txnumevt) { /* enable FIFO */
  384 + mcasp_clr_bits(dev->base + DAVINCI_MCASP_WFIFOCTL,
  385 + FIFO_ENABLE);
384 386 mcasp_set_bits(dev->base + DAVINCI_MCASP_WFIFOCTL,
385 387 FIFO_ENABLE);
  388 + }
386 389 mcasp_start_tx(dev);
387 390 } else {
388   - if (dev->rxnumevt) /* enable FIFO */
  391 + if (dev->rxnumevt) { /* enable FIFO */
  392 + mcasp_clr_bits(dev->base + DAVINCI_MCASP_RFIFOCTL,
  393 + FIFO_ENABLE);
389 394 mcasp_set_bits(dev->base + DAVINCI_MCASP_RFIFOCTL,
390 395 FIFO_ENABLE);
  396 + }
391 397 mcasp_start_rx(dev);
392 398 }
393 399 }