Commit 0dde1a1df9ab0615ed08558fb7144e7739e9f565
Committed by
Kumar Gala
1 parent
b09c16440e
Exists in
master
and in
7 other branches
[POWERPC] 82xx: Embedded Planet EP8248E support
This board is also resold by Freescale under the names "QUICCStart MPC8248 Evaluation System" and "CWH-PPC-8248N-VE". Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Showing 9 changed files with 1425 additions and 2 deletions Side-by-side Diff
arch/powerpc/boot/Makefile
... | ... | @@ -62,7 +62,7 @@ |
62 | 62 | ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \ |
63 | 63 | cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c \ |
64 | 64 | fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c cuboot-taishan.c \ |
65 | - cuboot-katmai.c cuboot-rainier.c redboot-8xx.c | |
65 | + cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c | |
66 | 66 | src-boot := $(src-wlib) $(src-plat) empty.c |
67 | 67 | |
68 | 68 | src-boot := $(addprefix $(obj)/, $(src-boot)) |
... | ... | @@ -195,6 +195,7 @@ |
195 | 195 | image-$(CONFIG_PPC_EP88XC) += zImage.ep88xc |
196 | 196 | image-$(CONFIG_EP405) += zImage.ep405 |
197 | 197 | image-$(CONFIG_8260) += cuImage.pq2 |
198 | +image-$(CONFIG_EP8248E) += zImage.ep8248e | |
198 | 199 | image-$(CONFIG_PPC_MPC52xx) += cuImage.52xx |
199 | 200 | image-$(CONFIG_PPC_83xx) += cuImage.83xx |
200 | 201 | image-$(CONFIG_PPC_85xx) += cuImage.85xx |
arch/powerpc/boot/dts/ep8248e.dts
1 | +/* | |
2 | + * Device Tree for the Embedded Planet EP8248E board running PlanetCore. | |
3 | + * | |
4 | + * Copyright 2007 Freescale Semiconductor Inc. | |
5 | + * | |
6 | + * This program is free software; you can redistribute it and/or modify it | |
7 | + * under the terms of the GNU General Public License as published by the | |
8 | + * Free Software Foundation; either version 2 of the License, or (at your | |
9 | + * option) any later version. | |
10 | + */ | |
11 | + | |
12 | +/dts-v1/; | |
13 | +/ { | |
14 | + model = "EP8248E"; | |
15 | + compatible = "fsl,ep8248e"; | |
16 | + #address-cells = <1>; | |
17 | + #size-cells = <1>; | |
18 | + | |
19 | + aliases { | |
20 | + planetcore-SMC1 = &smc1; | |
21 | + planetcore-SCC1 = &scc1; | |
22 | + ethernet0 = ð0; | |
23 | + ethernet1 = ð1; | |
24 | + serial0 = &smc1; | |
25 | + serial1 = &scc1; | |
26 | + }; | |
27 | + | |
28 | + cpus { | |
29 | + #address-cells = <1>; | |
30 | + #size-cells = <0>; | |
31 | + | |
32 | + PowerPC,8248@0 { | |
33 | + device_type = "cpu"; | |
34 | + reg = <0>; | |
35 | + d-cache-line-size = <32>; | |
36 | + i-cache-line-size = <32>; | |
37 | + d-cache-size = <16384>; | |
38 | + i-cache-size = <16384>; | |
39 | + timebase-frequency = <0>; | |
40 | + clock-frequency = <0>; | |
41 | + }; | |
42 | + }; | |
43 | + | |
44 | + localbus@f0010100 { | |
45 | + compatible = "fsl,mpc8248-localbus", | |
46 | + "fsl,pq2-localbus", | |
47 | + "simple-bus"; | |
48 | + #address-cells = <2>; | |
49 | + #size-cells = <1>; | |
50 | + reg = <0xf0010100 0x40>; | |
51 | + | |
52 | + ranges = <0 0 0xfc000000 0x04000000 | |
53 | + 1 0 0xfa000000 0x00008000>; | |
54 | + | |
55 | + flash@0,3800000 { | |
56 | + compatible = "cfi-flash"; | |
57 | + reg = <0 0x3800000 0x800000>; | |
58 | + bank-width = <4>; | |
59 | + device-width = <2>; | |
60 | + }; | |
61 | + | |
62 | + bcsr@1,0 { | |
63 | + #address-cells = <2>; | |
64 | + #size-cells = <1>; | |
65 | + reg = <1 0 0x10>; | |
66 | + compatible = "fsl,ep8248e-bcsr"; | |
67 | + ranges; | |
68 | + | |
69 | + mdio { | |
70 | + device_type = "mdio"; | |
71 | + compatible = "fsl,ep8248e-mdio-bitbang"; | |
72 | + #address-cells = <1>; | |
73 | + #size-cells = <0>; | |
74 | + reg = <1 8 1>; | |
75 | + | |
76 | + PHY0: ethernet-phy@0 { | |
77 | + interrupt-parent = <&PIC>; | |
78 | + reg = <0>; | |
79 | + device_type = "ethernet-phy"; | |
80 | + }; | |
81 | + | |
82 | + PHY1: ethernet-phy@1 { | |
83 | + interrupt-parent = <&PIC>; | |
84 | + reg = <1>; | |
85 | + device_type = "ethernet-phy"; | |
86 | + }; | |
87 | + }; | |
88 | + }; | |
89 | + }; | |
90 | + | |
91 | + memory { | |
92 | + device_type = "memory"; | |
93 | + reg = <0 0>; | |
94 | + }; | |
95 | + | |
96 | + soc@f0000000 { | |
97 | + #address-cells = <1>; | |
98 | + #size-cells = <1>; | |
99 | + compatible = "fsl,mpc8248-immr", "fsl,pq2-soc", "simple-bus"; | |
100 | + ranges = <0x00000000 0xf0000000 0x00053000>; | |
101 | + | |
102 | + // Temporary until code stops depending on it. | |
103 | + device_type = "soc"; | |
104 | + | |
105 | + // Temporary -- will go away once kernel uses ranges for get_immrbase(). | |
106 | + reg = <0xf0000000 0x00053000>; | |
107 | + | |
108 | + cpm@119c0 { | |
109 | + #address-cells = <1>; | |
110 | + #size-cells = <1>; | |
111 | + #interrupt-cells = <2>; | |
112 | + compatible = "fsl,mpc8248-cpm", "fsl,cpm2", | |
113 | + "simple-bus"; | |
114 | + reg = <0x119c0 0x30>; | |
115 | + ranges; | |
116 | + | |
117 | + muram { | |
118 | + #address-cells = <1>; | |
119 | + #size-cells = <1>; | |
120 | + ranges = <0 0 0x10000>; | |
121 | + | |
122 | + data@0 { | |
123 | + compatible = "fsl,cpm-muram-data"; | |
124 | + reg = <0 0x1100 0x1140 | |
125 | + 0xec0 0x9800 0x800>; | |
126 | + }; | |
127 | + }; | |
128 | + | |
129 | + brg@119f0 { | |
130 | + compatible = "fsl,mpc8248-brg", | |
131 | + "fsl,cpm2-brg", | |
132 | + "fsl,cpm-brg"; | |
133 | + reg = <0x119f0 0x10 0x115f0 0x10>; | |
134 | + }; | |
135 | + | |
136 | + /* Monitor port/SMC1 */ | |
137 | + smc1: serial@11a80 { | |
138 | + device_type = "serial"; | |
139 | + compatible = "fsl,mpc8248-smc-uart", | |
140 | + "fsl,cpm2-smc-uart"; | |
141 | + reg = <0x11a80 0x20 0x1100 0x40>; | |
142 | + interrupts = <4 8>; | |
143 | + interrupt-parent = <&PIC>; | |
144 | + fsl,cpm-brg = <7>; | |
145 | + fsl,cpm-command = <0x1d000000>; | |
146 | + linux,planetcore-label = "SMC1"; | |
147 | + }; | |
148 | + | |
149 | + /* "Serial" port/SCC1 */ | |
150 | + scc1: serial@11a00 { | |
151 | + device_type = "serial"; | |
152 | + compatible = "fsl,mpc8248-scc-uart", | |
153 | + "fsl,cpm2-scc-uart"; | |
154 | + reg = <0x11a00 0x20 0x8000 0x100>; | |
155 | + interrupts = <40 8>; | |
156 | + interrupt-parent = <&PIC>; | |
157 | + fsl,cpm-brg = <1>; | |
158 | + fsl,cpm-command = <0x00800000>; | |
159 | + linux,planetcore-label = "SCC1"; | |
160 | + }; | |
161 | + | |
162 | + eth0: ethernet@11300 { | |
163 | + device_type = "network"; | |
164 | + compatible = "fsl,mpc8248-fcc-enet", | |
165 | + "fsl,cpm2-fcc-enet"; | |
166 | + reg = <0x11300 0x20 0x8400 0x100 0x11390 1>; | |
167 | + local-mac-address = [ 00 00 00 00 00 00 ]; | |
168 | + interrupts = <32 8>; | |
169 | + interrupt-parent = <&PIC>; | |
170 | + phy-handle = <&PHY0>; | |
171 | + linux,network-index = <0>; | |
172 | + fsl,cpm-command = <0x12000300>; | |
173 | + }; | |
174 | + | |
175 | + eth1: ethernet@11320 { | |
176 | + device_type = "network"; | |
177 | + compatible = "fsl,mpc8248-fcc-enet", | |
178 | + "fsl,cpm2-fcc-enet"; | |
179 | + reg = <0x11320 0x20 0x8500 0x100 0x113b0 1>; | |
180 | + local-mac-address = [ 00 00 00 00 00 00 ]; | |
181 | + interrupts = <33 8>; | |
182 | + interrupt-parent = <&PIC>; | |
183 | + phy-handle = <&PHY1>; | |
184 | + linux,network-index = <1>; | |
185 | + fsl,cpm-command = <0x16200300>; | |
186 | + }; | |
187 | + | |
188 | + usb@11b60 { | |
189 | + #address-cells = <1>; | |
190 | + #size-cells = <0>; | |
191 | + compatible = "fsl,mpc8248-usb", | |
192 | + "fsl,cpm2-usb"; | |
193 | + reg = <0x11b60 0x18 0x8b00 0x100>; | |
194 | + interrupt-parent = <&PIC>; | |
195 | + interrupts = <11 8>; | |
196 | + fsl,cpm-command = <0x2e600000>; | |
197 | + }; | |
198 | + }; | |
199 | + | |
200 | + PIC: interrupt-controller@10c00 { | |
201 | + #interrupt-cells = <2>; | |
202 | + interrupt-controller; | |
203 | + reg = <0x10c00 0x80>; | |
204 | + compatible = "fsl,mpc8248-pic", "fsl,pq2-pic"; | |
205 | + }; | |
206 | + }; | |
207 | +}; |
arch/powerpc/boot/ep8248e.c
1 | +/* | |
2 | + * Embedded Planet EP8248E with PlanetCore firmware | |
3 | + * | |
4 | + * Author: Scott Wood <scottwood@freescale.com> | |
5 | + * | |
6 | + * Copyright (c) 2007 Freescale Semiconductor, Inc. | |
7 | + * | |
8 | + * This program is free software; you can redistribute it and/or modify it | |
9 | + * under the terms of the GNU General Public License version 2 as published | |
10 | + * by the Free Software Foundation. | |
11 | + */ | |
12 | + | |
13 | +#include "ops.h" | |
14 | +#include "stdio.h" | |
15 | +#include "planetcore.h" | |
16 | +#include "pq2.h" | |
17 | + | |
18 | +static char *table; | |
19 | +static u64 mem_size; | |
20 | + | |
21 | +#include <io.h> | |
22 | + | |
23 | +static void platform_fixups(void) | |
24 | +{ | |
25 | + u64 val; | |
26 | + | |
27 | + dt_fixup_memory(0, mem_size); | |
28 | + planetcore_set_mac_addrs(table); | |
29 | + | |
30 | + if (!planetcore_get_decimal(table, PLANETCORE_KEY_CRYSTAL_HZ, &val)) { | |
31 | + printf("No PlanetCore crystal frequency key.\r\n"); | |
32 | + return; | |
33 | + } | |
34 | + | |
35 | + pq2_fixup_clocks(val); | |
36 | +} | |
37 | + | |
38 | +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | |
39 | + unsigned long r6, unsigned long r7) | |
40 | +{ | |
41 | + table = (char *)r3; | |
42 | + planetcore_prepare_table(table); | |
43 | + | |
44 | + if (!planetcore_get_decimal(table, PLANETCORE_KEY_MB_RAM, &mem_size)) | |
45 | + return; | |
46 | + | |
47 | + mem_size *= 1024 * 1024; | |
48 | + simple_alloc_init(_end, mem_size - (unsigned long)_end, 32, 64); | |
49 | + | |
50 | + fdt_init(_dtb_start); | |
51 | + | |
52 | + planetcore_set_stdout_path(table); | |
53 | + serial_console_init(); | |
54 | + platform_ops.fixups = platform_fixups; | |
55 | +} |
arch/powerpc/boot/wrapper
arch/powerpc/configs/ep8248e_defconfig
1 | +# | |
2 | +# Automatically generated make config: don't edit | |
3 | +# Linux kernel version: 2.6.24-rc6 | |
4 | +# Fri Jan 11 14:02:06 2008 | |
5 | +# | |
6 | +# CONFIG_PPC64 is not set | |
7 | + | |
8 | +# | |
9 | +# Processor support | |
10 | +# | |
11 | +CONFIG_6xx=y | |
12 | +# CONFIG_PPC_85xx is not set | |
13 | +# CONFIG_PPC_8xx is not set | |
14 | +# CONFIG_40x is not set | |
15 | +# CONFIG_44x is not set | |
16 | +# CONFIG_E200 is not set | |
17 | +CONFIG_PPC_FPU=y | |
18 | +CONFIG_PPC_STD_MMU=y | |
19 | +CONFIG_PPC_STD_MMU_32=y | |
20 | +# CONFIG_PPC_MM_SLICES is not set | |
21 | +# CONFIG_SMP is not set | |
22 | +CONFIG_PPC32=y | |
23 | +CONFIG_WORD_SIZE=32 | |
24 | +CONFIG_PPC_MERGE=y | |
25 | +CONFIG_MMU=y | |
26 | +CONFIG_GENERIC_CMOS_UPDATE=y | |
27 | +CONFIG_GENERIC_TIME=y | |
28 | +CONFIG_GENERIC_TIME_VSYSCALL=y | |
29 | +CONFIG_GENERIC_CLOCKEVENTS=y | |
30 | +CONFIG_GENERIC_HARDIRQS=y | |
31 | +CONFIG_IRQ_PER_CPU=y | |
32 | +CONFIG_RWSEM_XCHGADD_ALGORITHM=y | |
33 | +CONFIG_ARCH_HAS_ILOG2_U32=y | |
34 | +CONFIG_GENERIC_HWEIGHT=y | |
35 | +CONFIG_GENERIC_CALIBRATE_DELAY=y | |
36 | +CONFIG_GENERIC_FIND_NEXT_BIT=y | |
37 | +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set | |
38 | +CONFIG_PPC=y | |
39 | +CONFIG_EARLY_PRINTK=y | |
40 | +CONFIG_GENERIC_NVRAM=y | |
41 | +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | |
42 | +CONFIG_ARCH_MAY_HAVE_PC_FDC=y | |
43 | +CONFIG_PPC_OF=y | |
44 | +CONFIG_OF=y | |
45 | +# CONFIG_PPC_UDBG_16550 is not set | |
46 | +# CONFIG_GENERIC_TBSYNC is not set | |
47 | +CONFIG_AUDIT_ARCH=y | |
48 | +CONFIG_GENERIC_BUG=y | |
49 | +# CONFIG_DEFAULT_UIMAGE is not set | |
50 | +# CONFIG_PPC_DCR_NATIVE is not set | |
51 | +# CONFIG_PPC_DCR_MMIO is not set | |
52 | +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | |
53 | + | |
54 | +# | |
55 | +# General setup | |
56 | +# | |
57 | +# CONFIG_EXPERIMENTAL is not set | |
58 | +CONFIG_BROKEN_ON_SMP=y | |
59 | +CONFIG_INIT_ENV_ARG_LIMIT=32 | |
60 | +CONFIG_LOCALVERSION="" | |
61 | +CONFIG_LOCALVERSION_AUTO=y | |
62 | +CONFIG_SWAP=y | |
63 | +CONFIG_SYSVIPC=y | |
64 | +CONFIG_SYSVIPC_SYSCTL=y | |
65 | +# CONFIG_BSD_PROCESS_ACCT is not set | |
66 | +# CONFIG_TASKSTATS is not set | |
67 | +# CONFIG_AUDIT is not set | |
68 | +CONFIG_IKCONFIG=y | |
69 | +CONFIG_IKCONFIG_PROC=y | |
70 | +CONFIG_LOG_BUF_SHIFT=14 | |
71 | +# CONFIG_CGROUPS is not set | |
72 | +CONFIG_FAIR_GROUP_SCHED=y | |
73 | +CONFIG_FAIR_USER_SCHED=y | |
74 | +# CONFIG_FAIR_CGROUP_SCHED is not set | |
75 | +CONFIG_SYSFS_DEPRECATED=y | |
76 | +# CONFIG_RELAY is not set | |
77 | +# CONFIG_BLK_DEV_INITRD is not set | |
78 | +CONFIG_SYSCTL=y | |
79 | +CONFIG_EMBEDDED=y | |
80 | +CONFIG_SYSCTL_SYSCALL=y | |
81 | +CONFIG_KALLSYMS=y | |
82 | +CONFIG_KALLSYMS_ALL=y | |
83 | +# CONFIG_KALLSYMS_EXTRA_PASS is not set | |
84 | +CONFIG_HOTPLUG=y | |
85 | +CONFIG_PRINTK=y | |
86 | +CONFIG_BUG=y | |
87 | +CONFIG_ELF_CORE=y | |
88 | +CONFIG_BASE_FULL=y | |
89 | +CONFIG_FUTEX=y | |
90 | +CONFIG_ANON_INODES=y | |
91 | +CONFIG_EPOLL=y | |
92 | +CONFIG_SIGNALFD=y | |
93 | +CONFIG_EVENTFD=y | |
94 | +CONFIG_SHMEM=y | |
95 | +CONFIG_VM_EVENT_COUNTERS=y | |
96 | +CONFIG_SLAB=y | |
97 | +# CONFIG_SLUB is not set | |
98 | +# CONFIG_SLOB is not set | |
99 | +CONFIG_RT_MUTEXES=y | |
100 | +# CONFIG_TINY_SHMEM is not set | |
101 | +CONFIG_BASE_SMALL=0 | |
102 | +# CONFIG_MODULES is not set | |
103 | +CONFIG_BLOCK=y | |
104 | +# CONFIG_LBD is not set | |
105 | +# CONFIG_BLK_DEV_IO_TRACE is not set | |
106 | +# CONFIG_LSF is not set | |
107 | + | |
108 | +# | |
109 | +# IO Schedulers | |
110 | +# | |
111 | +CONFIG_IOSCHED_NOOP=y | |
112 | +# CONFIG_IOSCHED_AS is not set | |
113 | +CONFIG_IOSCHED_DEADLINE=y | |
114 | +# CONFIG_IOSCHED_CFQ is not set | |
115 | +# CONFIG_DEFAULT_AS is not set | |
116 | +CONFIG_DEFAULT_DEADLINE=y | |
117 | +# CONFIG_DEFAULT_CFQ is not set | |
118 | +# CONFIG_DEFAULT_NOOP is not set | |
119 | +CONFIG_DEFAULT_IOSCHED="deadline" | |
120 | + | |
121 | +# | |
122 | +# Platform support | |
123 | +# | |
124 | +# CONFIG_PPC_MULTIPLATFORM is not set | |
125 | +CONFIG_PPC_82xx=y | |
126 | +# CONFIG_PPC_83xx is not set | |
127 | +# CONFIG_PPC_86xx is not set | |
128 | +# CONFIG_PPC_MPC52xx is not set | |
129 | +# CONFIG_PPC_MPC5200 is not set | |
130 | +# CONFIG_PPC_CELL is not set | |
131 | +# CONFIG_PPC_CELL_NATIVE is not set | |
132 | +# CONFIG_MPC8272_ADS is not set | |
133 | +# CONFIG_PQ2FADS is not set | |
134 | +CONFIG_EP8248E=y | |
135 | +# CONFIG_PQ2ADS is not set | |
136 | +CONFIG_8260=y | |
137 | +CONFIG_8272=y | |
138 | +# CONFIG_MPIC is not set | |
139 | +# CONFIG_MPIC_WEIRD is not set | |
140 | +# CONFIG_PPC_I8259 is not set | |
141 | +# CONFIG_PPC_RTAS is not set | |
142 | +# CONFIG_MMIO_NVRAM is not set | |
143 | +# CONFIG_PPC_MPC106 is not set | |
144 | +# CONFIG_PPC_970_NAP is not set | |
145 | +# CONFIG_PPC_INDIRECT_IO is not set | |
146 | +# CONFIG_GENERIC_IOMAP is not set | |
147 | +# CONFIG_CPU_FREQ is not set | |
148 | +CONFIG_CPM2=y | |
149 | +CONFIG_PPC_CPM_NEW_BINDING=y | |
150 | +# CONFIG_FSL_ULI1575 is not set | |
151 | +CONFIG_CPM=y | |
152 | + | |
153 | +# | |
154 | +# Kernel options | |
155 | +# | |
156 | +# CONFIG_HIGHMEM is not set | |
157 | +# CONFIG_TICK_ONESHOT is not set | |
158 | +# CONFIG_NO_HZ is not set | |
159 | +# CONFIG_HIGH_RES_TIMERS is not set | |
160 | +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | |
161 | +# CONFIG_HZ_100 is not set | |
162 | +CONFIG_HZ_250=y | |
163 | +# CONFIG_HZ_300 is not set | |
164 | +# CONFIG_HZ_1000 is not set | |
165 | +CONFIG_HZ=250 | |
166 | +CONFIG_PREEMPT_NONE=y | |
167 | +# CONFIG_PREEMPT_VOLUNTARY is not set | |
168 | +# CONFIG_PREEMPT is not set | |
169 | +CONFIG_BINFMT_ELF=y | |
170 | +CONFIG_BINFMT_MISC=y | |
171 | +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | |
172 | +CONFIG_ARCH_FLATMEM_ENABLE=y | |
173 | +CONFIG_ARCH_POPULATES_NODE_MAP=y | |
174 | +CONFIG_FLATMEM=y | |
175 | +CONFIG_FLAT_NODE_MEM_MAP=y | |
176 | +# CONFIG_SPARSEMEM_STATIC is not set | |
177 | +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | |
178 | +CONFIG_SPLIT_PTLOCK_CPUS=4 | |
179 | +# CONFIG_RESOURCES_64BIT is not set | |
180 | +CONFIG_ZONE_DMA_FLAG=1 | |
181 | +CONFIG_BOUNCE=y | |
182 | +CONFIG_VIRT_TO_BUS=y | |
183 | +CONFIG_PROC_DEVICETREE=y | |
184 | +# CONFIG_CMDLINE_BOOL is not set | |
185 | +# CONFIG_PM is not set | |
186 | +CONFIG_SUSPEND_UP_POSSIBLE=y | |
187 | +CONFIG_HIBERNATION_UP_POSSIBLE=y | |
188 | +# CONFIG_SECCOMP is not set | |
189 | +CONFIG_WANT_DEVICE_TREE=y | |
190 | +CONFIG_DEVICE_TREE="ep8248e.dts" | |
191 | +CONFIG_ISA_DMA_API=y | |
192 | + | |
193 | +# | |
194 | +# Bus options | |
195 | +# | |
196 | +CONFIG_ZONE_DMA=y | |
197 | +CONFIG_FSL_SOC=y | |
198 | +# CONFIG_PCI is not set | |
199 | +# CONFIG_PCI_DOMAINS is not set | |
200 | +# CONFIG_PCI_SYSCALL is not set | |
201 | +# CONFIG_ARCH_SUPPORTS_MSI is not set | |
202 | +# CONFIG_PCCARD is not set | |
203 | + | |
204 | +# | |
205 | +# Advanced setup | |
206 | +# | |
207 | +# CONFIG_ADVANCED_OPTIONS is not set | |
208 | + | |
209 | +# | |
210 | +# Default settings for advanced configuration options are used | |
211 | +# | |
212 | +CONFIG_HIGHMEM_START=0xfe000000 | |
213 | +CONFIG_LOWMEM_SIZE=0x30000000 | |
214 | +CONFIG_KERNEL_START=0xc0000000 | |
215 | +CONFIG_TASK_SIZE=0xc0000000 | |
216 | +CONFIG_BOOT_LOAD=0x00400000 | |
217 | + | |
218 | +# | |
219 | +# Networking | |
220 | +# | |
221 | +CONFIG_NET=y | |
222 | + | |
223 | +# | |
224 | +# Networking options | |
225 | +# | |
226 | +CONFIG_PACKET=y | |
227 | +# CONFIG_PACKET_MMAP is not set | |
228 | +CONFIG_UNIX=y | |
229 | +CONFIG_XFRM=y | |
230 | +# CONFIG_XFRM_USER is not set | |
231 | +# CONFIG_NET_KEY is not set | |
232 | +CONFIG_INET=y | |
233 | +CONFIG_IP_MULTICAST=y | |
234 | +# CONFIG_IP_ADVANCED_ROUTER is not set | |
235 | +CONFIG_IP_FIB_HASH=y | |
236 | +CONFIG_IP_PNP=y | |
237 | +CONFIG_IP_PNP_DHCP=y | |
238 | +CONFIG_IP_PNP_BOOTP=y | |
239 | +# CONFIG_IP_PNP_RARP is not set | |
240 | +# CONFIG_NET_IPIP is not set | |
241 | +# CONFIG_NET_IPGRE is not set | |
242 | +# CONFIG_IP_MROUTE is not set | |
243 | +CONFIG_SYN_COOKIES=y | |
244 | +# CONFIG_INET_AH is not set | |
245 | +# CONFIG_INET_ESP is not set | |
246 | +# CONFIG_INET_IPCOMP is not set | |
247 | +# CONFIG_INET_XFRM_TUNNEL is not set | |
248 | +CONFIG_INET_TUNNEL=y | |
249 | +CONFIG_INET_XFRM_MODE_TRANSPORT=y | |
250 | +CONFIG_INET_XFRM_MODE_TUNNEL=y | |
251 | +CONFIG_INET_XFRM_MODE_BEET=y | |
252 | +# CONFIG_INET_LRO is not set | |
253 | +CONFIG_INET_DIAG=y | |
254 | +CONFIG_INET_TCP_DIAG=y | |
255 | +# CONFIG_TCP_CONG_ADVANCED is not set | |
256 | +CONFIG_TCP_CONG_CUBIC=y | |
257 | +CONFIG_DEFAULT_TCP_CONG="cubic" | |
258 | +# CONFIG_IP_VS is not set | |
259 | +CONFIG_IPV6=y | |
260 | +# CONFIG_IPV6_PRIVACY is not set | |
261 | +# CONFIG_IPV6_ROUTER_PREF is not set | |
262 | +# CONFIG_INET6_AH is not set | |
263 | +# CONFIG_INET6_ESP is not set | |
264 | +# CONFIG_INET6_IPCOMP is not set | |
265 | +# CONFIG_INET6_XFRM_TUNNEL is not set | |
266 | +# CONFIG_INET6_TUNNEL is not set | |
267 | +CONFIG_INET6_XFRM_MODE_TRANSPORT=y | |
268 | +CONFIG_INET6_XFRM_MODE_TUNNEL=y | |
269 | +CONFIG_INET6_XFRM_MODE_BEET=y | |
270 | +CONFIG_IPV6_SIT=y | |
271 | +# CONFIG_IPV6_TUNNEL is not set | |
272 | +# CONFIG_NETWORK_SECMARK is not set | |
273 | +CONFIG_NETFILTER=y | |
274 | +# CONFIG_NETFILTER_DEBUG is not set | |
275 | + | |
276 | +# | |
277 | +# Core Netfilter Configuration | |
278 | +# | |
279 | +# CONFIG_NETFILTER_NETLINK is not set | |
280 | +# CONFIG_NF_CONNTRACK_ENABLED is not set | |
281 | +# CONFIG_NF_CONNTRACK is not set | |
282 | +# CONFIG_NETFILTER_XTABLES is not set | |
283 | + | |
284 | +# | |
285 | +# IP: Netfilter Configuration | |
286 | +# | |
287 | +# CONFIG_IP_NF_QUEUE is not set | |
288 | +# CONFIG_IP_NF_IPTABLES is not set | |
289 | +# CONFIG_IP_NF_ARPTABLES is not set | |
290 | +# CONFIG_BRIDGE is not set | |
291 | +# CONFIG_VLAN_8021Q is not set | |
292 | +# CONFIG_DECNET is not set | |
293 | +# CONFIG_LLC2 is not set | |
294 | +# CONFIG_IPX is not set | |
295 | +# CONFIG_ATALK is not set | |
296 | +# CONFIG_NET_SCHED is not set | |
297 | + | |
298 | +# | |
299 | +# Network testing | |
300 | +# | |
301 | +# CONFIG_NET_PKTGEN is not set | |
302 | +# CONFIG_HAMRADIO is not set | |
303 | +# CONFIG_IRDA is not set | |
304 | +# CONFIG_BT is not set | |
305 | + | |
306 | +# | |
307 | +# Wireless | |
308 | +# | |
309 | +# CONFIG_CFG80211 is not set | |
310 | +# CONFIG_WIRELESS_EXT is not set | |
311 | +# CONFIG_IEEE80211 is not set | |
312 | +# CONFIG_RFKILL is not set | |
313 | + | |
314 | +# | |
315 | +# Device Drivers | |
316 | +# | |
317 | + | |
318 | +# | |
319 | +# Generic Driver Options | |
320 | +# | |
321 | +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | |
322 | +CONFIG_STANDALONE=y | |
323 | +CONFIG_PREVENT_FIRMWARE_BUILD=y | |
324 | +# CONFIG_FW_LOADER is not set | |
325 | +# CONFIG_DEBUG_DRIVER is not set | |
326 | +# CONFIG_DEBUG_DEVRES is not set | |
327 | +# CONFIG_SYS_HYPERVISOR is not set | |
328 | +# CONFIG_CONNECTOR is not set | |
329 | +CONFIG_MTD=y | |
330 | +# CONFIG_MTD_DEBUG is not set | |
331 | +# CONFIG_MTD_CONCAT is not set | |
332 | +# CONFIG_MTD_PARTITIONS is not set | |
333 | + | |
334 | +# | |
335 | +# User Modules And Translation Layers | |
336 | +# | |
337 | +CONFIG_MTD_CHAR=y | |
338 | +CONFIG_MTD_BLKDEVS=y | |
339 | +CONFIG_MTD_BLOCK=y | |
340 | +# CONFIG_FTL is not set | |
341 | +# CONFIG_NFTL is not set | |
342 | +# CONFIG_INFTL is not set | |
343 | +# CONFIG_RFD_FTL is not set | |
344 | +# CONFIG_SSFDC is not set | |
345 | +# CONFIG_MTD_OOPS is not set | |
346 | + | |
347 | +# | |
348 | +# RAM/ROM/Flash chip drivers | |
349 | +# | |
350 | +CONFIG_MTD_CFI=y | |
351 | +# CONFIG_MTD_JEDECPROBE is not set | |
352 | +CONFIG_MTD_GEN_PROBE=y | |
353 | +CONFIG_MTD_CFI_ADV_OPTIONS=y | |
354 | +CONFIG_MTD_CFI_NOSWAP=y | |
355 | +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set | |
356 | +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set | |
357 | +CONFIG_MTD_CFI_GEOMETRY=y | |
358 | +# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set | |
359 | +# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set | |
360 | +CONFIG_MTD_MAP_BANK_WIDTH_4=y | |
361 | +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | |
362 | +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | |
363 | +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | |
364 | +# CONFIG_MTD_CFI_I1 is not set | |
365 | +CONFIG_MTD_CFI_I2=y | |
366 | +# CONFIG_MTD_CFI_I4 is not set | |
367 | +# CONFIG_MTD_CFI_I8 is not set | |
368 | +# CONFIG_MTD_OTP is not set | |
369 | +# CONFIG_MTD_CFI_INTELEXT is not set | |
370 | +CONFIG_MTD_CFI_AMDSTD=y | |
371 | +# CONFIG_MTD_CFI_STAA is not set | |
372 | +CONFIG_MTD_CFI_UTIL=y | |
373 | +# CONFIG_MTD_RAM is not set | |
374 | +# CONFIG_MTD_ROM is not set | |
375 | +# CONFIG_MTD_ABSENT is not set | |
376 | + | |
377 | +# | |
378 | +# Mapping drivers for chip access | |
379 | +# | |
380 | +# CONFIG_MTD_COMPLEX_MAPPINGS is not set | |
381 | +# CONFIG_MTD_PHYSMAP is not set | |
382 | +CONFIG_MTD_PHYSMAP_OF=y | |
383 | +# CONFIG_MTD_PLATRAM is not set | |
384 | + | |
385 | +# | |
386 | +# Self-contained MTD device drivers | |
387 | +# | |
388 | +# CONFIG_MTD_SLRAM is not set | |
389 | +# CONFIG_MTD_PHRAM is not set | |
390 | +# CONFIG_MTD_MTDRAM is not set | |
391 | +# CONFIG_MTD_BLOCK2MTD is not set | |
392 | + | |
393 | +# | |
394 | +# Disk-On-Chip Device Drivers | |
395 | +# | |
396 | +# CONFIG_MTD_DOC2000 is not set | |
397 | +# CONFIG_MTD_DOC2001 is not set | |
398 | +# CONFIG_MTD_DOC2001PLUS is not set | |
399 | +# CONFIG_MTD_NAND is not set | |
400 | +# CONFIG_MTD_ONENAND is not set | |
401 | + | |
402 | +# | |
403 | +# UBI - Unsorted block images | |
404 | +# | |
405 | +# CONFIG_MTD_UBI is not set | |
406 | +CONFIG_OF_DEVICE=y | |
407 | +# CONFIG_PARPORT is not set | |
408 | +CONFIG_BLK_DEV=y | |
409 | +# CONFIG_BLK_DEV_FD is not set | |
410 | +# CONFIG_BLK_DEV_COW_COMMON is not set | |
411 | +CONFIG_BLK_DEV_LOOP=y | |
412 | +# CONFIG_BLK_DEV_CRYPTOLOOP is not set | |
413 | +# CONFIG_BLK_DEV_NBD is not set | |
414 | +# CONFIG_BLK_DEV_RAM is not set | |
415 | +# CONFIG_CDROM_PKTCDVD is not set | |
416 | +# CONFIG_ATA_OVER_ETH is not set | |
417 | +# CONFIG_MISC_DEVICES is not set | |
418 | +# CONFIG_IDE is not set | |
419 | + | |
420 | +# | |
421 | +# SCSI device support | |
422 | +# | |
423 | +# CONFIG_RAID_ATTRS is not set | |
424 | +# CONFIG_SCSI is not set | |
425 | +# CONFIG_SCSI_DMA is not set | |
426 | +# CONFIG_SCSI_NETLINK is not set | |
427 | +# CONFIG_ATA is not set | |
428 | +# CONFIG_MD is not set | |
429 | +# CONFIG_MACINTOSH_DRIVERS is not set | |
430 | +CONFIG_NETDEVICES=y | |
431 | +# CONFIG_NETDEVICES_MULTIQUEUE is not set | |
432 | +# CONFIG_DUMMY is not set | |
433 | +# CONFIG_BONDING is not set | |
434 | +# CONFIG_EQUALIZER is not set | |
435 | +# CONFIG_TUN is not set | |
436 | +# CONFIG_VETH is not set | |
437 | +CONFIG_PHYLIB=y | |
438 | + | |
439 | +# | |
440 | +# MII PHY device drivers | |
441 | +# | |
442 | +# CONFIG_MARVELL_PHY is not set | |
443 | +CONFIG_DAVICOM_PHY=y | |
444 | +# CONFIG_QSEMI_PHY is not set | |
445 | +# CONFIG_LXT_PHY is not set | |
446 | +# CONFIG_CICADA_PHY is not set | |
447 | +# CONFIG_VITESSE_PHY is not set | |
448 | +# CONFIG_SMSC_PHY is not set | |
449 | +# CONFIG_BROADCOM_PHY is not set | |
450 | +# CONFIG_ICPLUS_PHY is not set | |
451 | +# CONFIG_FIXED_PHY is not set | |
452 | +CONFIG_MDIO_BITBANG=y | |
453 | +CONFIG_NET_ETHERNET=y | |
454 | +CONFIG_MII=y | |
455 | +# CONFIG_IBM_NEW_EMAC_ZMII is not set | |
456 | +# CONFIG_IBM_NEW_EMAC_RGMII is not set | |
457 | +# CONFIG_IBM_NEW_EMAC_TAH is not set | |
458 | +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set | |
459 | +# CONFIG_B44 is not set | |
460 | +CONFIG_FS_ENET=y | |
461 | +# CONFIG_FS_ENET_HAS_SCC is not set | |
462 | +CONFIG_FS_ENET_HAS_FCC=y | |
463 | +# CONFIG_FS_ENET_MDIO_FCC is not set | |
464 | +CONFIG_NETDEV_1000=y | |
465 | +CONFIG_NETDEV_10000=y | |
466 | + | |
467 | +# | |
468 | +# Wireless LAN | |
469 | +# | |
470 | +# CONFIG_WLAN_PRE80211 is not set | |
471 | +# CONFIG_WLAN_80211 is not set | |
472 | +# CONFIG_WAN is not set | |
473 | +# CONFIG_PPP is not set | |
474 | +# CONFIG_SLIP is not set | |
475 | +# CONFIG_NETPOLL is not set | |
476 | +# CONFIG_NET_POLL_CONTROLLER is not set | |
477 | +# CONFIG_ISDN is not set | |
478 | +# CONFIG_PHONE is not set | |
479 | + | |
480 | +# | |
481 | +# Input device support | |
482 | +# | |
483 | +# CONFIG_INPUT is not set | |
484 | + | |
485 | +# | |
486 | +# Hardware I/O ports | |
487 | +# | |
488 | +# CONFIG_SERIO is not set | |
489 | +# CONFIG_GAMEPORT is not set | |
490 | + | |
491 | +# | |
492 | +# Character devices | |
493 | +# | |
494 | +# CONFIG_VT is not set | |
495 | +# CONFIG_SERIAL_NONSTANDARD is not set | |
496 | + | |
497 | +# | |
498 | +# Serial drivers | |
499 | +# | |
500 | +# CONFIG_SERIAL_8250 is not set | |
501 | + | |
502 | +# | |
503 | +# Non-8250 serial port support | |
504 | +# | |
505 | +# CONFIG_SERIAL_UARTLITE is not set | |
506 | +CONFIG_SERIAL_CORE=y | |
507 | +CONFIG_SERIAL_CORE_CONSOLE=y | |
508 | +CONFIG_SERIAL_CPM=y | |
509 | +CONFIG_SERIAL_CPM_CONSOLE=y | |
510 | +CONFIG_SERIAL_CPM_SCC1=y | |
511 | +# CONFIG_SERIAL_CPM_SCC2 is not set | |
512 | +# CONFIG_SERIAL_CPM_SCC3 is not set | |
513 | +CONFIG_SERIAL_CPM_SCC4=y | |
514 | +# CONFIG_SERIAL_CPM_SMC1 is not set | |
515 | +# CONFIG_SERIAL_CPM_SMC2 is not set | |
516 | +CONFIG_UNIX98_PTYS=y | |
517 | +CONFIG_LEGACY_PTYS=y | |
518 | +CONFIG_LEGACY_PTY_COUNT=256 | |
519 | +# CONFIG_IPMI_HANDLER is not set | |
520 | +CONFIG_HW_RANDOM=y | |
521 | +# CONFIG_NVRAM is not set | |
522 | +# CONFIG_GEN_RTC is not set | |
523 | +# CONFIG_R3964 is not set | |
524 | +# CONFIG_RAW_DRIVER is not set | |
525 | +# CONFIG_I2C is not set | |
526 | + | |
527 | +# | |
528 | +# SPI support | |
529 | +# | |
530 | +# CONFIG_SPI is not set | |
531 | +# CONFIG_SPI_MASTER is not set | |
532 | +# CONFIG_W1 is not set | |
533 | +# CONFIG_POWER_SUPPLY is not set | |
534 | +# CONFIG_HWMON is not set | |
535 | +# CONFIG_WATCHDOG is not set | |
536 | + | |
537 | +# | |
538 | +# Sonics Silicon Backplane | |
539 | +# | |
540 | +CONFIG_SSB_POSSIBLE=y | |
541 | +# CONFIG_SSB is not set | |
542 | + | |
543 | +# | |
544 | +# Multifunction device drivers | |
545 | +# | |
546 | +# CONFIG_MFD_SM501 is not set | |
547 | + | |
548 | +# | |
549 | +# Multimedia devices | |
550 | +# | |
551 | +# CONFIG_VIDEO_DEV is not set | |
552 | +# CONFIG_DVB_CORE is not set | |
553 | +CONFIG_DAB=y | |
554 | + | |
555 | +# | |
556 | +# Graphics support | |
557 | +# | |
558 | +# CONFIG_VGASTATE is not set | |
559 | +# CONFIG_VIDEO_OUTPUT_CONTROL is not set | |
560 | +# CONFIG_FB is not set | |
561 | +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set | |
562 | + | |
563 | +# | |
564 | +# Display device support | |
565 | +# | |
566 | +# CONFIG_DISPLAY_SUPPORT is not set | |
567 | + | |
568 | +# | |
569 | +# Sound | |
570 | +# | |
571 | +# CONFIG_SOUND is not set | |
572 | +# CONFIG_USB_SUPPORT is not set | |
573 | +# CONFIG_MMC is not set | |
574 | +# CONFIG_NEW_LEDS is not set | |
575 | +# CONFIG_RTC_CLASS is not set | |
576 | + | |
577 | +# | |
578 | +# Userspace I/O | |
579 | +# | |
580 | +# CONFIG_UIO is not set | |
581 | + | |
582 | +# | |
583 | +# File systems | |
584 | +# | |
585 | +CONFIG_EXT2_FS=y | |
586 | +# CONFIG_EXT2_FS_XATTR is not set | |
587 | +# CONFIG_EXT2_FS_XIP is not set | |
588 | +CONFIG_EXT3_FS=y | |
589 | +# CONFIG_EXT3_FS_XATTR is not set | |
590 | +CONFIG_JBD=y | |
591 | +# CONFIG_REISERFS_FS is not set | |
592 | +# CONFIG_JFS_FS is not set | |
593 | +# CONFIG_FS_POSIX_ACL is not set | |
594 | +# CONFIG_XFS_FS is not set | |
595 | +# CONFIG_OCFS2_FS is not set | |
596 | +# CONFIG_MINIX_FS is not set | |
597 | +# CONFIG_ROMFS_FS is not set | |
598 | +CONFIG_INOTIFY=y | |
599 | +CONFIG_INOTIFY_USER=y | |
600 | +# CONFIG_QUOTA is not set | |
601 | +CONFIG_DNOTIFY=y | |
602 | +# CONFIG_AUTOFS_FS is not set | |
603 | +CONFIG_AUTOFS4_FS=y | |
604 | +# CONFIG_FUSE_FS is not set | |
605 | + | |
606 | +# | |
607 | +# CD-ROM/DVD Filesystems | |
608 | +# | |
609 | +# CONFIG_ISO9660_FS is not set | |
610 | +# CONFIG_UDF_FS is not set | |
611 | + | |
612 | +# | |
613 | +# DOS/FAT/NT Filesystems | |
614 | +# | |
615 | +# CONFIG_MSDOS_FS is not set | |
616 | +# CONFIG_VFAT_FS is not set | |
617 | +# CONFIG_NTFS_FS is not set | |
618 | + | |
619 | +# | |
620 | +# Pseudo filesystems | |
621 | +# | |
622 | +CONFIG_PROC_FS=y | |
623 | +CONFIG_PROC_KCORE=y | |
624 | +CONFIG_PROC_SYSCTL=y | |
625 | +CONFIG_SYSFS=y | |
626 | +CONFIG_TMPFS=y | |
627 | +# CONFIG_TMPFS_POSIX_ACL is not set | |
628 | +# CONFIG_HUGETLB_PAGE is not set | |
629 | + | |
630 | +# | |
631 | +# Miscellaneous filesystems | |
632 | +# | |
633 | +# CONFIG_HFSPLUS_FS is not set | |
634 | +# CONFIG_JFFS2_FS is not set | |
635 | +CONFIG_CRAMFS=y | |
636 | +# CONFIG_VXFS_FS is not set | |
637 | +# CONFIG_HPFS_FS is not set | |
638 | +# CONFIG_QNX4FS_FS is not set | |
639 | +# CONFIG_SYSV_FS is not set | |
640 | +# CONFIG_UFS_FS is not set | |
641 | +CONFIG_NETWORK_FILESYSTEMS=y | |
642 | +CONFIG_NFS_FS=y | |
643 | +CONFIG_NFS_V3=y | |
644 | +# CONFIG_NFS_V3_ACL is not set | |
645 | +# CONFIG_NFS_DIRECTIO is not set | |
646 | +# CONFIG_NFSD is not set | |
647 | +CONFIG_ROOT_NFS=y | |
648 | +CONFIG_LOCKD=y | |
649 | +CONFIG_LOCKD_V4=y | |
650 | +CONFIG_NFS_COMMON=y | |
651 | +CONFIG_SUNRPC=y | |
652 | +# CONFIG_SMB_FS is not set | |
653 | +# CONFIG_CIFS is not set | |
654 | +# CONFIG_NCP_FS is not set | |
655 | +# CONFIG_CODA_FS is not set | |
656 | + | |
657 | +# | |
658 | +# Partition Types | |
659 | +# | |
660 | +CONFIG_PARTITION_ADVANCED=y | |
661 | +# CONFIG_ACORN_PARTITION is not set | |
662 | +# CONFIG_OSF_PARTITION is not set | |
663 | +# CONFIG_AMIGA_PARTITION is not set | |
664 | +# CONFIG_ATARI_PARTITION is not set | |
665 | +# CONFIG_MAC_PARTITION is not set | |
666 | +CONFIG_MSDOS_PARTITION=y | |
667 | +# CONFIG_BSD_DISKLABEL is not set | |
668 | +# CONFIG_MINIX_SUBPARTITION is not set | |
669 | +# CONFIG_SOLARIS_X86_PARTITION is not set | |
670 | +# CONFIG_UNIXWARE_DISKLABEL is not set | |
671 | +# CONFIG_LDM_PARTITION is not set | |
672 | +# CONFIG_SGI_PARTITION is not set | |
673 | +# CONFIG_ULTRIX_PARTITION is not set | |
674 | +# CONFIG_SUN_PARTITION is not set | |
675 | +# CONFIG_KARMA_PARTITION is not set | |
676 | +# CONFIG_EFI_PARTITION is not set | |
677 | +# CONFIG_SYSV68_PARTITION is not set | |
678 | +CONFIG_NLS=y | |
679 | +CONFIG_NLS_DEFAULT="iso8859-1" | |
680 | +CONFIG_NLS_CODEPAGE_437=y | |
681 | +# CONFIG_NLS_CODEPAGE_737 is not set | |
682 | +# CONFIG_NLS_CODEPAGE_775 is not set | |
683 | +# CONFIG_NLS_CODEPAGE_850 is not set | |
684 | +# CONFIG_NLS_CODEPAGE_852 is not set | |
685 | +# CONFIG_NLS_CODEPAGE_855 is not set | |
686 | +# CONFIG_NLS_CODEPAGE_857 is not set | |
687 | +# CONFIG_NLS_CODEPAGE_860 is not set | |
688 | +# CONFIG_NLS_CODEPAGE_861 is not set | |
689 | +# CONFIG_NLS_CODEPAGE_862 is not set | |
690 | +# CONFIG_NLS_CODEPAGE_863 is not set | |
691 | +# CONFIG_NLS_CODEPAGE_864 is not set | |
692 | +# CONFIG_NLS_CODEPAGE_865 is not set | |
693 | +# CONFIG_NLS_CODEPAGE_866 is not set | |
694 | +# CONFIG_NLS_CODEPAGE_869 is not set | |
695 | +# CONFIG_NLS_CODEPAGE_936 is not set | |
696 | +# CONFIG_NLS_CODEPAGE_950 is not set | |
697 | +# CONFIG_NLS_CODEPAGE_932 is not set | |
698 | +# CONFIG_NLS_CODEPAGE_949 is not set | |
699 | +# CONFIG_NLS_CODEPAGE_874 is not set | |
700 | +# CONFIG_NLS_ISO8859_8 is not set | |
701 | +# CONFIG_NLS_CODEPAGE_1250 is not set | |
702 | +# CONFIG_NLS_CODEPAGE_1251 is not set | |
703 | +CONFIG_NLS_ASCII=y | |
704 | +CONFIG_NLS_ISO8859_1=y | |
705 | +# CONFIG_NLS_ISO8859_2 is not set | |
706 | +# CONFIG_NLS_ISO8859_3 is not set | |
707 | +# CONFIG_NLS_ISO8859_4 is not set | |
708 | +# CONFIG_NLS_ISO8859_5 is not set | |
709 | +# CONFIG_NLS_ISO8859_6 is not set | |
710 | +# CONFIG_NLS_ISO8859_7 is not set | |
711 | +# CONFIG_NLS_ISO8859_9 is not set | |
712 | +# CONFIG_NLS_ISO8859_13 is not set | |
713 | +# CONFIG_NLS_ISO8859_14 is not set | |
714 | +# CONFIG_NLS_ISO8859_15 is not set | |
715 | +# CONFIG_NLS_KOI8_R is not set | |
716 | +# CONFIG_NLS_KOI8_U is not set | |
717 | +CONFIG_NLS_UTF8=y | |
718 | +# CONFIG_UCC_SLOW is not set | |
719 | + | |
720 | +# | |
721 | +# Library routines | |
722 | +# | |
723 | +# CONFIG_CRC_CCITT is not set | |
724 | +# CONFIG_CRC16 is not set | |
725 | +# CONFIG_CRC_ITU_T is not set | |
726 | +# CONFIG_CRC32 is not set | |
727 | +# CONFIG_CRC7 is not set | |
728 | +# CONFIG_LIBCRC32C is not set | |
729 | +CONFIG_ZLIB_INFLATE=y | |
730 | +CONFIG_PLIST=y | |
731 | +CONFIG_HAS_IOMEM=y | |
732 | +CONFIG_HAS_IOPORT=y | |
733 | +CONFIG_HAS_DMA=y | |
734 | +CONFIG_INSTRUMENTATION=y | |
735 | +# CONFIG_PROFILING is not set | |
736 | +# CONFIG_MARKERS is not set | |
737 | + | |
738 | +# | |
739 | +# Kernel hacking | |
740 | +# | |
741 | +# CONFIG_PRINTK_TIME is not set | |
742 | +CONFIG_ENABLE_WARN_DEPRECATED=y | |
743 | +CONFIG_ENABLE_MUST_CHECK=y | |
744 | +CONFIG_MAGIC_SYSRQ=y | |
745 | +# CONFIG_UNUSED_SYMBOLS is not set | |
746 | +# CONFIG_DEBUG_FS is not set | |
747 | +# CONFIG_HEADERS_CHECK is not set | |
748 | +CONFIG_DEBUG_KERNEL=y | |
749 | +# CONFIG_DEBUG_SHIRQ is not set | |
750 | +# CONFIG_DETECT_SOFTLOCKUP is not set | |
751 | +# CONFIG_SCHED_DEBUG is not set | |
752 | +# CONFIG_SCHEDSTATS is not set | |
753 | +# CONFIG_TIMER_STATS is not set | |
754 | +# CONFIG_DEBUG_SLAB is not set | |
755 | +# CONFIG_DEBUG_RT_MUTEXES is not set | |
756 | +# CONFIG_RT_MUTEX_TESTER is not set | |
757 | +# CONFIG_DEBUG_SPINLOCK is not set | |
758 | +# CONFIG_DEBUG_MUTEXES is not set | |
759 | +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set | |
760 | +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | |
761 | +# CONFIG_DEBUG_KOBJECT is not set | |
762 | +CONFIG_DEBUG_BUGVERBOSE=y | |
763 | +CONFIG_DEBUG_INFO=y | |
764 | +# CONFIG_DEBUG_VM is not set | |
765 | +# CONFIG_DEBUG_LIST is not set | |
766 | +# CONFIG_DEBUG_SG is not set | |
767 | +CONFIG_FORCED_INLINING=y | |
768 | +# CONFIG_BOOT_PRINTK_DELAY is not set | |
769 | +# CONFIG_FAULT_INJECTION is not set | |
770 | +# CONFIG_SAMPLES is not set | |
771 | +# CONFIG_DEBUG_STACKOVERFLOW is not set | |
772 | +# CONFIG_DEBUG_STACK_USAGE is not set | |
773 | +# CONFIG_DEBUG_PAGEALLOC is not set | |
774 | +# CONFIG_DEBUGGER is not set | |
775 | +# CONFIG_KGDB_CONSOLE is not set | |
776 | +CONFIG_BDI_SWITCH=y | |
777 | +# CONFIG_PPC_EARLY_DEBUG is not set | |
778 | + | |
779 | +# | |
780 | +# Security options | |
781 | +# | |
782 | +# CONFIG_KEYS is not set | |
783 | +# CONFIG_SECURITY is not set | |
784 | +CONFIG_CRYPTO=y | |
785 | +CONFIG_CRYPTO_ALGAPI=y | |
786 | +CONFIG_CRYPTO_BLKCIPHER=y | |
787 | +CONFIG_CRYPTO_MANAGER=y | |
788 | +# CONFIG_CRYPTO_HMAC is not set | |
789 | +# CONFIG_CRYPTO_NULL is not set | |
790 | +# CONFIG_CRYPTO_MD4 is not set | |
791 | +CONFIG_CRYPTO_MD5=y | |
792 | +# CONFIG_CRYPTO_SHA1 is not set | |
793 | +# CONFIG_CRYPTO_SHA256 is not set | |
794 | +# CONFIG_CRYPTO_SHA512 is not set | |
795 | +# CONFIG_CRYPTO_WP512 is not set | |
796 | +# CONFIG_CRYPTO_TGR192 is not set | |
797 | +CONFIG_CRYPTO_ECB=y | |
798 | +CONFIG_CRYPTO_CBC=y | |
799 | +CONFIG_CRYPTO_PCBC=y | |
800 | +# CONFIG_CRYPTO_CRYPTD is not set | |
801 | +CONFIG_CRYPTO_DES=y | |
802 | +# CONFIG_CRYPTO_FCRYPT is not set | |
803 | +# CONFIG_CRYPTO_BLOWFISH is not set | |
804 | +# CONFIG_CRYPTO_TWOFISH is not set | |
805 | +# CONFIG_CRYPTO_SERPENT is not set | |
806 | +# CONFIG_CRYPTO_AES is not set | |
807 | +# CONFIG_CRYPTO_CAST5 is not set | |
808 | +# CONFIG_CRYPTO_CAST6 is not set | |
809 | +# CONFIG_CRYPTO_TEA is not set | |
810 | +# CONFIG_CRYPTO_ARC4 is not set | |
811 | +# CONFIG_CRYPTO_KHAZAD is not set | |
812 | +# CONFIG_CRYPTO_ANUBIS is not set | |
813 | +# CONFIG_CRYPTO_SEED is not set | |
814 | +# CONFIG_CRYPTO_DEFLATE is not set | |
815 | +# CONFIG_CRYPTO_MICHAEL_MIC is not set | |
816 | +# CONFIG_CRYPTO_CRC32C is not set | |
817 | +# CONFIG_CRYPTO_CAMELLIA is not set | |
818 | +# CONFIG_CRYPTO_AUTHENC is not set | |
819 | +# CONFIG_CRYPTO_HW is not set | |
820 | +# CONFIG_PPC_CLOCK is not set | |
821 | +CONFIG_PPC_LIB_RHEAP=y |
arch/powerpc/platforms/82xx/Kconfig
... | ... | @@ -26,6 +26,19 @@ |
26 | 26 | help |
27 | 27 | This option enables support for the PQ2FADS board |
28 | 28 | |
29 | +config EP8248E | |
30 | + bool "Embedded Planet EP8248E (a.k.a. CWH-PPC-8248N-VE)" | |
31 | + select 8272 | |
32 | + select 8260 | |
33 | + select FSL_SOC | |
34 | + select PPC_CPM_NEW_BINDING | |
35 | + select MDIO_BITBANG | |
36 | + help | |
37 | + This enables support for the Embedded Planet EP8248E board. | |
38 | + | |
39 | + This board is also resold by Freescale as the QUICCStart | |
40 | + MPC8248 Evaluation System and/or the CWH-PPC-8248N-VE. | |
41 | + | |
29 | 42 | endchoice |
30 | 43 | |
31 | 44 | config PQ2ADS |
arch/powerpc/platforms/82xx/Makefile
arch/powerpc/platforms/82xx/ep8248e.c
1 | +/* | |
2 | + * Embedded Planet EP8248E support | |
3 | + * | |
4 | + * Copyright 2007 Freescale Semiconductor, Inc. | |
5 | + * Author: Scott Wood <scottwood@freescale.com> | |
6 | + * | |
7 | + * This program is free software; you can redistribute it and/or modify it | |
8 | + * under the terms of the GNU General Public License as published by the | |
9 | + * Free Software Foundation; either version 2 of the License, or (at your | |
10 | + * option) any later version. | |
11 | + */ | |
12 | + | |
13 | +#include <linux/init.h> | |
14 | +#include <linux/interrupt.h> | |
15 | +#include <linux/fsl_devices.h> | |
16 | +#include <linux/mdio-bitbang.h> | |
17 | +#include <linux/of_platform.h> | |
18 | + | |
19 | +#include <asm/io.h> | |
20 | +#include <asm/cpm2.h> | |
21 | +#include <asm/udbg.h> | |
22 | +#include <asm/machdep.h> | |
23 | +#include <asm/time.h> | |
24 | +#include <asm/mpc8260.h> | |
25 | +#include <asm/prom.h> | |
26 | + | |
27 | +#include <sysdev/fsl_soc.h> | |
28 | +#include <sysdev/cpm2_pic.h> | |
29 | + | |
30 | +#include "pq2.h" | |
31 | + | |
32 | +static u8 __iomem *ep8248e_bcsr; | |
33 | +static struct device_node *ep8248e_bcsr_node; | |
34 | + | |
35 | +#define BCSR7_SCC2_ENABLE 0x10 | |
36 | + | |
37 | +#define BCSR8_PHY1_ENABLE 0x80 | |
38 | +#define BCSR8_PHY1_POWER 0x40 | |
39 | +#define BCSR8_PHY2_ENABLE 0x20 | |
40 | +#define BCSR8_PHY2_POWER 0x10 | |
41 | +#define BCSR8_MDIO_READ 0x04 | |
42 | +#define BCSR8_MDIO_CLOCK 0x02 | |
43 | +#define BCSR8_MDIO_DATA 0x01 | |
44 | + | |
45 | +#define BCSR9_USB_ENABLE 0x80 | |
46 | +#define BCSR9_USB_POWER 0x40 | |
47 | +#define BCSR9_USB_HOST 0x20 | |
48 | +#define BCSR9_USB_FULL_SPEED_TARGET 0x10 | |
49 | + | |
50 | +static void __init ep8248e_pic_init(void) | |
51 | +{ | |
52 | + struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,pq2-pic"); | |
53 | + if (!np) { | |
54 | + printk(KERN_ERR "PIC init: can not find cpm-pic node\n"); | |
55 | + return; | |
56 | + } | |
57 | + | |
58 | + cpm2_pic_init(np); | |
59 | + of_node_put(np); | |
60 | +} | |
61 | + | |
62 | +static void ep8248e_set_mdc(struct mdiobb_ctrl *ctrl, int level) | |
63 | +{ | |
64 | + if (level) | |
65 | + setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_CLOCK); | |
66 | + else | |
67 | + clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_CLOCK); | |
68 | + | |
69 | + /* Read back to flush the write. */ | |
70 | + in_8(&ep8248e_bcsr[8]); | |
71 | +} | |
72 | + | |
73 | +static void ep8248e_set_mdio_dir(struct mdiobb_ctrl *ctrl, int output) | |
74 | +{ | |
75 | + if (output) | |
76 | + clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_READ); | |
77 | + else | |
78 | + setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_READ); | |
79 | + | |
80 | + /* Read back to flush the write. */ | |
81 | + in_8(&ep8248e_bcsr[8]); | |
82 | +} | |
83 | + | |
84 | +static void ep8248e_set_mdio_data(struct mdiobb_ctrl *ctrl, int data) | |
85 | +{ | |
86 | + if (data) | |
87 | + setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_DATA); | |
88 | + else | |
89 | + clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_DATA); | |
90 | + | |
91 | + /* Read back to flush the write. */ | |
92 | + in_8(&ep8248e_bcsr[8]); | |
93 | +} | |
94 | + | |
95 | +static int ep8248e_get_mdio_data(struct mdiobb_ctrl *ctrl) | |
96 | +{ | |
97 | + return in_8(&ep8248e_bcsr[8]) & BCSR8_MDIO_DATA; | |
98 | +} | |
99 | + | |
100 | +static const struct mdiobb_ops ep8248e_mdio_ops = { | |
101 | + .set_mdc = ep8248e_set_mdc, | |
102 | + .set_mdio_dir = ep8248e_set_mdio_dir, | |
103 | + .set_mdio_data = ep8248e_set_mdio_data, | |
104 | + .get_mdio_data = ep8248e_get_mdio_data, | |
105 | + .owner = THIS_MODULE, | |
106 | +}; | |
107 | + | |
108 | +static struct mdiobb_ctrl ep8248e_mdio_ctrl = { | |
109 | + .ops = &ep8248e_mdio_ops, | |
110 | +}; | |
111 | + | |
112 | +static int __devinit ep8248e_mdio_probe(struct of_device *ofdev, | |
113 | + const struct of_device_id *match) | |
114 | +{ | |
115 | + struct mii_bus *bus; | |
116 | + struct resource res; | |
117 | + struct device_node *node; | |
118 | + int ret, i; | |
119 | + | |
120 | + node = of_get_parent(ofdev->node); | |
121 | + of_node_put(node); | |
122 | + if (node != ep8248e_bcsr_node) | |
123 | + return -ENODEV; | |
124 | + | |
125 | + ret = of_address_to_resource(ofdev->node, 0, &res); | |
126 | + if (ret) | |
127 | + return ret; | |
128 | + | |
129 | + bus = alloc_mdio_bitbang(&ep8248e_mdio_ctrl); | |
130 | + if (!bus) | |
131 | + return -ENOMEM; | |
132 | + | |
133 | + bus->phy_mask = 0; | |
134 | + bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL); | |
135 | + | |
136 | + for (i = 0; i < PHY_MAX_ADDR; i++) | |
137 | + bus->irq[i] = -1; | |
138 | + | |
139 | + bus->name = "ep8248e-mdio-bitbang"; | |
140 | + bus->dev = &ofdev->dev; | |
141 | + bus->id = res.start; | |
142 | + | |
143 | + return mdiobus_register(bus); | |
144 | +} | |
145 | + | |
146 | +static int ep8248e_mdio_remove(struct of_device *ofdev) | |
147 | +{ | |
148 | + BUG(); | |
149 | + return 0; | |
150 | +} | |
151 | + | |
152 | +static const struct of_device_id ep8248e_mdio_match[] = { | |
153 | + { | |
154 | + .compatible = "fsl,ep8248e-mdio-bitbang", | |
155 | + }, | |
156 | + {}, | |
157 | +}; | |
158 | + | |
159 | +static struct of_platform_driver ep8248e_mdio_driver = { | |
160 | + .driver = { | |
161 | + .name = "ep8248e-mdio-bitbang", | |
162 | + }, | |
163 | + .match_table = ep8248e_mdio_match, | |
164 | + .probe = ep8248e_mdio_probe, | |
165 | + .remove = ep8248e_mdio_remove, | |
166 | +}; | |
167 | + | |
168 | +struct cpm_pin { | |
169 | + int port, pin, flags; | |
170 | +}; | |
171 | + | |
172 | +static __initdata struct cpm_pin ep8248e_pins[] = { | |
173 | + /* SMC1 */ | |
174 | + {2, 4, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
175 | + {2, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
176 | + | |
177 | + /* SCC1 */ | |
178 | + {2, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
179 | + {2, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
180 | + {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
181 | + {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, | |
182 | + {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
183 | + | |
184 | + /* FCC1 */ | |
185 | + {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
186 | + {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
187 | + {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
188 | + {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
189 | + {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
190 | + {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
191 | + {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
192 | + {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
193 | + {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, | |
194 | + {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, | |
195 | + {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, | |
196 | + {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, | |
197 | + {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, | |
198 | + {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, | |
199 | + {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
200 | + {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
201 | + | |
202 | + /* FCC2 */ | |
203 | + {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
204 | + {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
205 | + {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
206 | + {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
207 | + {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
208 | + {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
209 | + {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
210 | + {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
211 | + {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
212 | + {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
213 | + {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
214 | + {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, | |
215 | + {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
216 | + {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
217 | + {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
218 | + {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
219 | + | |
220 | + /* I2C */ | |
221 | + {4, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, | |
222 | + {4, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, | |
223 | + | |
224 | + /* USB */ | |
225 | + {2, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
226 | + {2, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
227 | + {2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
228 | + {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
229 | + {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
230 | + {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
231 | + {3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
232 | +}; | |
233 | + | |
234 | +static void __init init_ioports(void) | |
235 | +{ | |
236 | + int i; | |
237 | + | |
238 | + for (i = 0; i < ARRAY_SIZE(ep8248e_pins); i++) { | |
239 | + const struct cpm_pin *pin = &ep8248e_pins[i]; | |
240 | + cpm2_set_pin(pin->port, pin->pin, pin->flags); | |
241 | + } | |
242 | + | |
243 | + cpm2_smc_clk_setup(CPM_CLK_SMC1, CPM_BRG7); | |
244 | + cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX); | |
245 | + cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX); | |
246 | + cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK8, CPM_CLK_TX); /* USB */ | |
247 | + cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_RX); | |
248 | + cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX); | |
249 | + cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX); | |
250 | + cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX); | |
251 | +} | |
252 | + | |
253 | +static void __init ep8248e_setup_arch(void) | |
254 | +{ | |
255 | + if (ppc_md.progress) | |
256 | + ppc_md.progress("ep8248e_setup_arch()", 0); | |
257 | + | |
258 | + cpm2_reset(); | |
259 | + | |
260 | + /* When this is set, snooping CPM DMA from RAM causes | |
261 | + * machine checks. See erratum SIU18. | |
262 | + */ | |
263 | + clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP); | |
264 | + | |
265 | + ep8248e_bcsr_node = | |
266 | + of_find_compatible_node(NULL, NULL, "fsl,ep8248e-bcsr"); | |
267 | + if (!ep8248e_bcsr_node) { | |
268 | + printk(KERN_ERR "No bcsr in device tree\n"); | |
269 | + return; | |
270 | + } | |
271 | + | |
272 | + ep8248e_bcsr = of_iomap(ep8248e_bcsr_node, 0); | |
273 | + if (!ep8248e_bcsr) { | |
274 | + printk(KERN_ERR "Cannot map BCSR registers\n"); | |
275 | + of_node_put(ep8248e_bcsr_node); | |
276 | + ep8248e_bcsr_node = NULL; | |
277 | + return; | |
278 | + } | |
279 | + | |
280 | + setbits8(&ep8248e_bcsr[7], BCSR7_SCC2_ENABLE); | |
281 | + setbits8(&ep8248e_bcsr[8], BCSR8_PHY1_ENABLE | BCSR8_PHY1_POWER | | |
282 | + BCSR8_PHY2_ENABLE | BCSR8_PHY2_POWER); | |
283 | + | |
284 | + init_ioports(); | |
285 | + | |
286 | + if (ppc_md.progress) | |
287 | + ppc_md.progress("ep8248e_setup_arch(), finish", 0); | |
288 | +} | |
289 | + | |
290 | +static __initdata struct of_device_id of_bus_ids[] = { | |
291 | + { .compatible = "simple-bus", }, | |
292 | + { .compatible = "fsl,ep8248e-bcsr", }, | |
293 | + {}, | |
294 | +}; | |
295 | + | |
296 | +static int __init declare_of_platform_devices(void) | |
297 | +{ | |
298 | + of_platform_bus_probe(NULL, of_bus_ids, NULL); | |
299 | + of_register_platform_driver(&ep8248e_mdio_driver); | |
300 | + | |
301 | + return 0; | |
302 | +} | |
303 | +machine_device_initcall(ep8248e, declare_of_platform_devices); | |
304 | + | |
305 | +/* | |
306 | + * Called very early, device-tree isn't unflattened | |
307 | + */ | |
308 | +static int __init ep8248e_probe(void) | |
309 | +{ | |
310 | + unsigned long root = of_get_flat_dt_root(); | |
311 | + return of_flat_dt_is_compatible(root, "fsl,ep8248e"); | |
312 | +} | |
313 | + | |
314 | +define_machine(ep8248e) | |
315 | +{ | |
316 | + .name = "Embedded Planet EP8248E", | |
317 | + .probe = ep8248e_probe, | |
318 | + .setup_arch = ep8248e_setup_arch, | |
319 | + .init_IRQ = ep8248e_pic_init, | |
320 | + .get_irq = cpm2_get_irq, | |
321 | + .calibrate_decr = generic_calibrate_decr, | |
322 | + .restart = pq2_restart, | |
323 | + .progress = udbg_progress, | |
324 | +}; |