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Commit 134fbadf028a5977a1b06b0253d3ee33e6f0c642

Authored by Vince Weaver
Committed by Ingo Molnar
1 parent 8c40041f75
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

perf, x86: Enable Nehalem-EX support 

According to Intel Software Devel Manual Volume 3B, the
Nehalem-EX PMU is just like regular Nehalem (except for the
uncore support, which is completely different).

Signed-off-by:  Vince Weaver <vweaver1@eecs.utk.edu>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Lin Ming <ming.m.lin@intel.com>
LKML-Reference: <alpine.DEB.2.00.1004060956580.1417@cl320.eecs.utk.edu>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

Showing 1 changed file with 1 additions and 0 deletions Side-by-side Diff

arch/x86/kernel/cpu/perf_event_intel.c
Diff comments   View file @ 134fbad
... ... @@ -936,6 +936,7 @@
936 936  
937 937 case 26: /* 45 nm nehalem, "Bloomfield" */
938 938 case 30: /* 45 nm nehalem, "Lynnfield" */
  939 + case 46: /* 45 nm nehalem-ex, "Beckton" */
939 940 memcpy(hw_cache_event_ids, nehalem_hw_cache_event_ids,
940 941 sizeof(hw_cache_event_ids));
941 942