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Commit 1400eb656760d14274ed08e45824ccbcc366585b

Authored by Gregory Fong
Committed by Ralf Baechle
1 parent 36ecafc5ad
Exists in smarc-imx_3.14.28_1.0.0_ga and in 1 other branch imx_3.14.28_1.0.0_ga

MIPS: r4k,octeon,r2300: stack protector: change canary per task 

For non-SMP, uses the new random canary value that is stored in the
task struct whenever a new task is forked.  Based on ARM version in
df0698be14c6683606d5df2d83e3ae40f85ed0d9 and subject to the same
limitations: the variable GCC expects, __stack_chk_guard, is global,
so this will not work on SMP.

Quoting Nicolas Pitre <nico@fluxnic.net>: "One way to overcome this
GCC limitation would be to locate the __stack_chk_guard variable into
a memory page of its own for each CPU, and then use TLB locking to
have each CPU see its own page at the same virtual address for each of
them."

Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5488/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Showing 4 changed files with 23 additions and 0 deletions Side-by-side Diff

arch/mips/kernel/asm-offsets.c
Diff comments   View file @ 1400eb6
... ... @@ -82,6 +82,9 @@
82 82 OFFSET(TASK_FLAGS, task_struct, flags);
83 83 OFFSET(TASK_MM, task_struct, mm);
84 84 OFFSET(TASK_PID, task_struct, pid);
  85 +#if defined(CONFIG_CC_STACKPROTECTOR)
  86 + OFFSET(TASK_STACK_CANARY, task_struct, stack_canary);
  87 +#endif
85 88 DEFINE(TASK_STRUCT_SIZE, sizeof(struct task_struct));
86 89 BLANK();
87 90 }
arch/mips/kernel/octeon_switch.S
Diff comments   View file @ 1400eb6
... ... @@ -71,6 +71,13 @@
71 71 mtc0 t0, $11,7 /* CvmMemCtl */
72 72 #endif
73 73 3:
  74 +
  75 +#if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP)
  76 + PTR_L t8, __stack_chk_guard
  77 + LONG_L t9, TASK_STACK_CANARY(a1)
  78 + LONG_S t9, 0(t8)
  79 +#endif
  80 +
74 81 /*
75 82 * The order of restoring the registers takes care of the race
76 83 * updating $28, $29 and kernelsp without disabling ints.
arch/mips/kernel/r2300_switch.S
Diff comments   View file @ 1400eb6
... ... @@ -65,6 +65,13 @@
65 65 fpu_save_single a0, t0 # clobbers t0
66 66  
67 67 1:
  68 +
  69 +#if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP)
  70 + PTR_L t8, __stack_chk_guard
  71 + LONG_L t9, TASK_STACK_CANARY(a1)
  72 + LONG_S t9, 0(t8)
  73 +#endif
  74 +
68 75 /*
69 76 * The order of restoring the registers takes care of the race
70 77 * updating $28, $29 and kernelsp without disabling ints.
arch/mips/kernel/r4k_switch.S
Diff comments   View file @ 1400eb6
... ... @@ -68,6 +68,12 @@
68 68 # clobbers t1
69 69 1:
70 70  
  71 +#if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP)
  72 + PTR_L t8, __stack_chk_guard
  73 + LONG_L t9, TASK_STACK_CANARY(a1)
  74 + LONG_S t9, 0(t8)
  75 +#endif
  76 +
71 77 /*
72 78 * The order of restoring the registers takes care of the race
73 79 * updating $28, $29 and kernelsp without disabling ints.