Commit 140455fa007a618d2d1bf5e6e888206534035e6f
1 parent
a8eb7ca0cb
Exists in
master
and in
7 other branches
omap2/3/4: Replace orred CONFIG_ARCH_OMAP2/3/4 with CONFIG_ARCH_OMAP2PLUS
omap: Replace orred CONFIG_ARCH_OMAP2/3/4 with CONFIG_ARCH_OMAP2PLUS Signed-off-by: Tony Lindgren <tony@atomide.com>
Showing 9 changed files with 25 additions and 47 deletions Side-by-side Diff
arch/arm/mach-omap2/Kconfig
arch/arm/plat-omap/Kconfig
... | ... | @@ -125,7 +125,7 @@ |
125 | 125 | |
126 | 126 | config OMAP_32K_TIMER |
127 | 127 | bool "Use 32KHz timer" |
128 | - depends on ARCH_OMAP16XX || ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP4 | |
128 | + depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS | |
129 | 129 | help |
130 | 130 | Select this option if you want to enable the OMAP 32KHz timer. |
131 | 131 | This timer saves power compared to the OMAP_MPU_TIMER, and has |
... | ... | @@ -146,7 +146,7 @@ |
146 | 146 | |
147 | 147 | config OMAP_DM_TIMER |
148 | 148 | bool "Use dual-mode timer" |
149 | - depends on ARCH_OMAP16XX || ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP4 | |
149 | + depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS | |
150 | 150 | help |
151 | 151 | Select this option if you want to use OMAP Dual-Mode timers. |
152 | 152 |
arch/arm/plat-omap/dma.c
... | ... | @@ -1870,8 +1870,7 @@ |
1870 | 1870 | #define omap1_dma_irq_handler NULL |
1871 | 1871 | #endif |
1872 | 1872 | |
1873 | -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | |
1874 | - defined(CONFIG_ARCH_OMAP4) | |
1873 | +#ifdef CONFIG_ARCH_OMAP2PLUS | |
1875 | 1874 | |
1876 | 1875 | static int omap2_dma_handle_ch(int ch) |
1877 | 1876 | { |
arch/arm/plat-omap/dmtimer.c
... | ... | @@ -153,8 +153,7 @@ |
153 | 153 | struct omap_dm_timer { |
154 | 154 | unsigned long phys_base; |
155 | 155 | int irq; |
156 | -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | |
157 | - defined(CONFIG_ARCH_OMAP4) | |
156 | +#ifdef CONFIG_ARCH_OMAP2PLUS | |
158 | 157 | struct clk *iclk, *fclk; |
159 | 158 | #endif |
160 | 159 | void __iomem *io_base; |
... | ... | @@ -490,8 +489,7 @@ |
490 | 489 | } |
491 | 490 | EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask); |
492 | 491 | |
493 | -#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | |
494 | - defined(CONFIG_ARCH_OMAP4) | |
492 | +#else | |
495 | 493 | |
496 | 494 | struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer) |
497 | 495 | { |
... | ... | @@ -535,8 +533,7 @@ |
535 | 533 | if (l & OMAP_TIMER_CTRL_ST) { |
536 | 534 | l &= ~0x1; |
537 | 535 | omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); |
538 | -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | |
539 | - defined(CONFIG_ARCH_OMAP4) | |
536 | +#ifdef CONFIG_ARCH_OMAP2PLUS | |
540 | 537 | /* Readback to make sure write has completed */ |
541 | 538 | omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); |
542 | 539 | /* |
... | ... | @@ -781,8 +778,7 @@ |
781 | 778 | timer->io_base = ioremap(timer->phys_base, map_size); |
782 | 779 | BUG_ON(!timer->io_base); |
783 | 780 | |
784 | -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | |
785 | - defined(CONFIG_ARCH_OMAP4) | |
781 | +#ifdef CONFIG_ARCH_OMAP2PLUS | |
786 | 782 | if (cpu_class_is_omap2()) { |
787 | 783 | char clk_name[16]; |
788 | 784 | sprintf(clk_name, "gpt%d_ick", i + 1); |
arch/arm/plat-omap/gpio.c
... | ... | @@ -177,13 +177,11 @@ |
177 | 177 | u16 irq; |
178 | 178 | u16 virtual_irq_start; |
179 | 179 | int method; |
180 | -#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2) || \ | |
181 | - defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) | |
180 | +#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS) | |
182 | 181 | u32 suspend_wakeup; |
183 | 182 | u32 saved_wakeup; |
184 | 183 | #endif |
185 | -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | |
186 | - defined(CONFIG_ARCH_OMAP4) | |
184 | +#ifdef CONFIG_ARCH_OMAP2PLUS | |
187 | 185 | u32 non_wakeup_gpios; |
188 | 186 | u32 enabled_non_wakeup_gpios; |
189 | 187 | |
... | ... | @@ -592,8 +590,7 @@ |
592 | 590 | reg += OMAP7XX_GPIO_DATA_OUTPUT; |
593 | 591 | break; |
594 | 592 | #endif |
595 | -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | |
596 | - defined(CONFIG_ARCH_OMAP4) | |
593 | +#ifdef CONFIG_ARCH_OMAP2PLUS | |
597 | 594 | case METHOD_GPIO_24XX: |
598 | 595 | reg += OMAP24XX_GPIO_DATAOUT; |
599 | 596 | break; |
... | ... | @@ -684,8 +681,7 @@ |
684 | 681 | } |
685 | 682 | EXPORT_SYMBOL(omap_set_gpio_debounce_time); |
686 | 683 | |
687 | -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | |
688 | - defined(CONFIG_ARCH_OMAP4) | |
684 | +#ifdef CONFIG_ARCH_OMAP2PLUS | |
689 | 685 | static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, |
690 | 686 | int trigger) |
691 | 687 | { |
... | ... | @@ -856,8 +852,7 @@ |
856 | 852 | goto bad; |
857 | 853 | break; |
858 | 854 | #endif |
859 | -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | |
860 | - defined(CONFIG_ARCH_OMAP4) | |
855 | +#ifdef CONFIG_ARCH_OMAP2PLUS | |
861 | 856 | case METHOD_GPIO_24XX: |
862 | 857 | set_24xx_gpio_triggering(bank, gpio, trigger); |
863 | 858 | break; |
... | ... | @@ -1131,8 +1126,7 @@ |
1131 | 1126 | spin_unlock_irqrestore(&bank->lock, flags); |
1132 | 1127 | return 0; |
1133 | 1128 | #endif |
1134 | -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | |
1135 | - defined(CONFIG_ARCH_OMAP4) | |
1129 | +#ifdef CONFIG_ARCH_OMAP2PLUS | |
1136 | 1130 | case METHOD_GPIO_24XX: |
1137 | 1131 | if (bank->non_wakeup_gpios & (1 << gpio)) { |
1138 | 1132 | printk(KERN_ERR "Unable to modify wakeup on " |
... | ... | @@ -1227,8 +1221,7 @@ |
1227 | 1221 | __raw_writel(1 << offset, reg); |
1228 | 1222 | } |
1229 | 1223 | #endif |
1230 | -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | |
1231 | - defined(CONFIG_ARCH_OMAP4) | |
1224 | +#ifdef CONFIG_ARCH_OMAP2PLUS | |
1232 | 1225 | if (bank->method == METHOD_GPIO_24XX) { |
1233 | 1226 | /* Disable wake-up during idle for dynamic tick */ |
1234 | 1227 | void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA; |
... | ... | @@ -1809,8 +1802,7 @@ |
1809 | 1802 | gpio_count = 32; /* 7xx has 32-bit GPIOs */ |
1810 | 1803 | } |
1811 | 1804 | |
1812 | -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | |
1813 | - defined(CONFIG_ARCH_OMAP4) | |
1805 | +#ifdef CONFIG_ARCH_OMAP2PLUS | |
1814 | 1806 | if (bank->method == METHOD_GPIO_24XX) { |
1815 | 1807 | static const u32 non_wakeup_gpios[] = { |
1816 | 1808 | 0xe203ffc0, 0x08700040 |
... | ... | @@ -1903,8 +1895,7 @@ |
1903 | 1895 | return 0; |
1904 | 1896 | } |
1905 | 1897 | |
1906 | -#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2) || \ | |
1907 | - defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) | |
1898 | +#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS) | |
1908 | 1899 | static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg) |
1909 | 1900 | { |
1910 | 1901 | int i; |
... | ... | @@ -2013,8 +2004,7 @@ |
2013 | 2004 | |
2014 | 2005 | #endif |
2015 | 2006 | |
2016 | -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | |
2017 | - defined(CONFIG_ARCH_OMAP4) | |
2007 | +#ifdef CONFIG_ARCH_OMAP2PLUS | |
2018 | 2008 | |
2019 | 2009 | static int workaround_enabled; |
2020 | 2010 | |
... | ... | @@ -2240,8 +2230,7 @@ |
2240 | 2230 | |
2241 | 2231 | mpuio_init(); |
2242 | 2232 | |
2243 | -#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2) || \ | |
2244 | - defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) | |
2233 | +#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS) | |
2245 | 2234 | if (cpu_is_omap16xx() || cpu_class_is_omap2()) { |
2246 | 2235 | if (ret == 0) { |
2247 | 2236 | ret = sysdev_class_register(&omap_gpio_sysclass); |
... | ... | @@ -2300,8 +2289,7 @@ |
2300 | 2289 | /* FIXME for at least omap2, show pullup/pulldown state */ |
2301 | 2290 | |
2302 | 2291 | irqstat = irq_desc[irq].status; |
2303 | -#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2) || \ | |
2304 | - defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) | |
2292 | +#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS) | |
2305 | 2293 | if (is_in && ((bank->suspend_wakeup & mask) |
2306 | 2294 | || irqstat & IRQ_TYPE_SENSE_MASK)) { |
2307 | 2295 | char *trigger = NULL; |
arch/arm/plat-omap/include/plat/clock.h
... | ... | @@ -26,8 +26,7 @@ |
26 | 26 | void (*find_companion)(struct clk *, void __iomem **, u8 *); |
27 | 27 | }; |
28 | 28 | |
29 | -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | |
30 | - defined(CONFIG_ARCH_OMAP4) | |
29 | +#ifdef CONFIG_ARCH_OMAP2PLUS | |
31 | 30 | |
32 | 31 | struct clksel_rate { |
33 | 32 | u32 val; |
... | ... | @@ -89,8 +88,7 @@ |
89 | 88 | __u8 enable_bit; |
90 | 89 | __s8 usecount; |
91 | 90 | u8 fixed_div; |
92 | -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | |
93 | - defined(CONFIG_ARCH_OMAP4) | |
91 | +#ifdef CONFIG_ARCH_OMAP2PLUS | |
94 | 92 | void __iomem *clksel_reg; |
95 | 93 | u32 clksel_mask; |
96 | 94 | const struct clksel *clksel; |
arch/arm/plat-omap/include/plat/control.h
... | ... | @@ -309,8 +309,7 @@ |
309 | 309 | |
310 | 310 | |
311 | 311 | #ifndef __ASSEMBLY__ |
312 | -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | |
313 | - defined(CONFIG_ARCH_OMAP4) | |
312 | +#ifdef CONFIG_ARCH_OMAP2PLUS | |
314 | 313 | extern void __iomem *omap_ctrl_base_get(void); |
315 | 314 | extern u8 omap_ctrl_readb(u16 offset); |
316 | 315 | extern u16 omap_ctrl_readw(u16 offset); |
arch/arm/plat-omap/include/plat/mcbsp.h
... | ... | @@ -103,8 +103,7 @@ |
103 | 103 | #define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX |
104 | 104 | #define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX |
105 | 105 | |
106 | -#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | |
107 | - defined(CONFIG_ARCH_OMAP4) | |
106 | +#else | |
108 | 107 | |
109 | 108 | #define OMAP_MCBSP_REG_DRR2 0x00 |
110 | 109 | #define OMAP_MCBSP_REG_DRR1 0x04 |
arch/arm/plat-omap/include/plat/memory.h