Commit 152831be91dfe864e06c3b3ff2bf994e04df4cdf
Exists in
master
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Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (30 commits) ARM: Update mach-types ARM: Partially revert "Auto calculate ZRELADDR and provide option for exceptions" ARM: Ensure PTE modifications via dma_alloc_coherent are visible ARM: 6359/1: ep93xx: move clock initialization earlier Revert "[ARM] pxa: remove now unnecessary dma_needs_bounce()" ARM: 6352/1: perf: fix event validation ARM: 6344/1: Mark CPU_32v6K as depended on CPU_V7 ARM: 6343/1: wire up fanotify and prlimit64 syscalls on ARM ARM: 6330/1: perf: reword comments relating to perf_event_do_pending ARM: pxa168fb: fix section mismatch ARM: pxa: Make id const in pwm_probe() ARM: pxa: fix CI_HSYNC and CI_VSYNC MFP defines for pxa300 ARM: pxa: remove __init from cpufreq_driver->init() ARM: imx: set cache line size to 64 bytes for i.MX5 mx5/clock: fix clear bit fields issue in _clk_ccgr_disable function mxc/tzic: add base address when accessing TZIC registers ARM: mach-shmobile: ap4evb: fix write protect for SDHI1 ARM: mach-shmobile: ap4evb: modify FSI2 ID ARM: mach-shmobile: do not enable the PLLC2 clock on init ARM: mach-shmobile: Clock framework comment fix ...
Showing 33 changed files Side-by-side Diff
- arch/arm/Kconfig
- arch/arm/boot/Makefile
- arch/arm/boot/compressed/Makefile
- arch/arm/boot/compressed/head.S
- arch/arm/common/it8152.c
- arch/arm/include/asm/dma-mapping.h
- arch/arm/include/asm/perf_event.h
- arch/arm/include/asm/unistd.h
- arch/arm/kernel/calls.S
- arch/arm/kernel/perf_event.c
- arch/arm/mach-ep93xx/clock.c
- arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c
- arch/arm/mach-mx25/mach-cpuimx25.c
- arch/arm/mach-mx3/clock-imx35.c
- arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
- arch/arm/mach-mx3/mach-cpuimx35.c
- arch/arm/mach-mx5/clock-mx51.c
- arch/arm/mach-pxa/cpufreq-pxa2xx.c
- arch/arm/mach-pxa/cpufreq-pxa3xx.c
- arch/arm/mach-pxa/include/mach/mfp-pxa300.h
- arch/arm/mach-shmobile/Makefile
- arch/arm/mach-shmobile/board-ap4evb.c
- arch/arm/mach-shmobile/clock-sh7372.c
- arch/arm/mach-shmobile/clock.c
- arch/arm/mach-shmobile/pm_runtime.c
- arch/arm/mm/Kconfig
- arch/arm/mm/dma-mapping.c
- arch/arm/plat-mxc/Kconfig
- arch/arm/plat-mxc/include/mach/eukrea-baseboards.h
- arch/arm/plat-mxc/tzic.c
- arch/arm/plat-pxa/pwm.c
- arch/arm/tools/mach-types
- drivers/video/pxa168fb.c
arch/arm/Kconfig
... | ... | @@ -1576,97 +1576,6 @@ |
1576 | 1576 | 0xf8000000. This assumes the zImage being placed in the first 128MB |
1577 | 1577 | from start of memory. |
1578 | 1578 | |
1579 | -config ZRELADDR | |
1580 | - hex "Physical address of the decompressed kernel image" | |
1581 | - depends on !AUTO_ZRELADDR | |
1582 | - default 0x00008000 if ARCH_BCMRING ||\ | |
1583 | - ARCH_CNS3XXX ||\ | |
1584 | - ARCH_DOVE ||\ | |
1585 | - ARCH_EBSA110 ||\ | |
1586 | - ARCH_FOOTBRIDGE ||\ | |
1587 | - ARCH_INTEGRATOR ||\ | |
1588 | - ARCH_IOP13XX ||\ | |
1589 | - ARCH_IOP33X ||\ | |
1590 | - ARCH_IXP2000 ||\ | |
1591 | - ARCH_IXP23XX ||\ | |
1592 | - ARCH_IXP4XX ||\ | |
1593 | - ARCH_KIRKWOOD ||\ | |
1594 | - ARCH_KS8695 ||\ | |
1595 | - ARCH_LOKI ||\ | |
1596 | - ARCH_MMP ||\ | |
1597 | - ARCH_MV78XX0 ||\ | |
1598 | - ARCH_NOMADIK ||\ | |
1599 | - ARCH_NUC93X ||\ | |
1600 | - ARCH_NS9XXX ||\ | |
1601 | - ARCH_ORION5X ||\ | |
1602 | - ARCH_SPEAR3XX ||\ | |
1603 | - ARCH_SPEAR6XX ||\ | |
1604 | - ARCH_TEGRA ||\ | |
1605 | - ARCH_U8500 ||\ | |
1606 | - ARCH_VERSATILE ||\ | |
1607 | - ARCH_W90X900 | |
1608 | - default 0x08008000 if ARCH_MX1 ||\ | |
1609 | - ARCH_SHARK | |
1610 | - default 0x10008000 if ARCH_MSM ||\ | |
1611 | - ARCH_OMAP1 ||\ | |
1612 | - ARCH_RPC | |
1613 | - default 0x20008000 if ARCH_S5P6440 ||\ | |
1614 | - ARCH_S5P6442 ||\ | |
1615 | - ARCH_S5PC100 ||\ | |
1616 | - ARCH_S5PV210 | |
1617 | - default 0x30008000 if ARCH_S3C2410 ||\ | |
1618 | - ARCH_S3C2400 ||\ | |
1619 | - ARCH_S3C2412 ||\ | |
1620 | - ARCH_S3C2416 ||\ | |
1621 | - ARCH_S3C2440 ||\ | |
1622 | - ARCH_S3C2443 | |
1623 | - default 0x40008000 if ARCH_STMP378X ||\ | |
1624 | - ARCH_STMP37XX ||\ | |
1625 | - ARCH_SH7372 ||\ | |
1626 | - ARCH_SH7377 ||\ | |
1627 | - ARCH_S5PV310 | |
1628 | - default 0x50008000 if ARCH_S3C64XX ||\ | |
1629 | - ARCH_SH7367 | |
1630 | - default 0x60008000 if ARCH_VEXPRESS | |
1631 | - default 0x80008000 if ARCH_MX25 ||\ | |
1632 | - ARCH_MX3 ||\ | |
1633 | - ARCH_NETX ||\ | |
1634 | - ARCH_OMAP2PLUS ||\ | |
1635 | - ARCH_PNX4008 | |
1636 | - default 0x90008000 if ARCH_MX5 ||\ | |
1637 | - ARCH_MX91231 | |
1638 | - default 0xa0008000 if ARCH_IOP32X ||\ | |
1639 | - ARCH_PXA ||\ | |
1640 | - MACH_MX27 | |
1641 | - default 0xc0008000 if ARCH_LH7A40X ||\ | |
1642 | - MACH_MX21 | |
1643 | - default 0xf0008000 if ARCH_AAEC2000 ||\ | |
1644 | - ARCH_L7200 | |
1645 | - default 0xc0028000 if ARCH_CLPS711X | |
1646 | - default 0x70008000 if ARCH_AT91 && (ARCH_AT91CAP9 || ARCH_AT91SAM9G45) | |
1647 | - default 0x20008000 if ARCH_AT91 && !(ARCH_AT91CAP9 || ARCH_AT91SAM9G45) | |
1648 | - default 0xc0008000 if ARCH_DAVINCI && ARCH_DAVINCI_DA8XX | |
1649 | - default 0x80008000 if ARCH_DAVINCI && !ARCH_DAVINCI_DA8XX | |
1650 | - default 0x00008000 if ARCH_EP93XX && EP93XX_SDCE3_SYNC_PHYS_OFFSET | |
1651 | - default 0xc0008000 if ARCH_EP93XX && EP93XX_SDCE0_PHYS_OFFSET | |
1652 | - default 0xd0008000 if ARCH_EP93XX && EP93XX_SDCE1_PHYS_OFFSET | |
1653 | - default 0xe0008000 if ARCH_EP93XX && EP93XX_SDCE2_PHYS_OFFSET | |
1654 | - default 0xf0008000 if ARCH_EP93XX && EP93XX_SDCE3_ASYNC_PHYS_OFFSET | |
1655 | - default 0x00008000 if ARCH_GEMINI && GEMINI_MEM_SWAP | |
1656 | - default 0x10008000 if ARCH_GEMINI && !GEMINI_MEM_SWAP | |
1657 | - default 0x70008000 if ARCH_REALVIEW && REALVIEW_HIGH_PHYS_OFFSET | |
1658 | - default 0x00008000 if ARCH_REALVIEW && !REALVIEW_HIGH_PHYS_OFFSET | |
1659 | - default 0xc0208000 if ARCH_SA1100 && SA1111 | |
1660 | - default 0xc0008000 if ARCH_SA1100 && !SA1111 | |
1661 | - default 0x30108000 if ARCH_S3C2410 && PM_H1940 | |
1662 | - default 0x28E08000 if ARCH_U300 && MACH_U300_SINGLE_RAM | |
1663 | - default 0x48008000 if ARCH_U300 && !MACH_U300_SINGLE_RAM | |
1664 | - help | |
1665 | - ZRELADDR is the physical address where the decompressed kernel | |
1666 | - image will be placed. ZRELADDR has to be specified when the | |
1667 | - assumption of AUTO_ZRELADDR is not valid, or when ZBOOT_ROM is | |
1668 | - selected. | |
1669 | - | |
1670 | 1579 | endmenu |
1671 | 1580 | |
1672 | 1581 | menu "CPU Power Management" |
arch/arm/boot/Makefile
... | ... | @@ -14,16 +14,18 @@ |
14 | 14 | MKIMAGE := $(srctree)/scripts/mkuboot.sh |
15 | 15 | |
16 | 16 | ifneq ($(MACHINE),) |
17 | --include $(srctree)/$(MACHINE)/Makefile.boot | |
17 | +include $(srctree)/$(MACHINE)/Makefile.boot | |
18 | 18 | endif |
19 | 19 | |
20 | 20 | # Note: the following conditions must always be true: |
21 | +# ZRELADDR == virt_to_phys(PAGE_OFFSET + TEXT_OFFSET) | |
21 | 22 | # PARAMS_PHYS must be within 4MB of ZRELADDR |
22 | 23 | # INITRD_PHYS must be in RAM |
24 | +ZRELADDR := $(zreladdr-y) | |
23 | 25 | PARAMS_PHYS := $(params_phys-y) |
24 | 26 | INITRD_PHYS := $(initrd_phys-y) |
25 | 27 | |
26 | -export INITRD_PHYS PARAMS_PHYS | |
28 | +export ZRELADDR INITRD_PHYS PARAMS_PHYS | |
27 | 29 | |
28 | 30 | targets := Image zImage xipImage bootpImage uImage |
29 | 31 | |
... | ... | @@ -65,7 +67,7 @@ |
65 | 67 | ifeq ($(CONFIG_ZBOOT_ROM),y) |
66 | 68 | $(obj)/uImage: LOADADDR=$(CONFIG_ZBOOT_ROM_TEXT) |
67 | 69 | else |
68 | -$(obj)/uImage: LOADADDR=$(CONFIG_ZRELADDR) | |
70 | +$(obj)/uImage: LOADADDR=$(ZRELADDR) | |
69 | 71 | endif |
70 | 72 | |
71 | 73 | ifeq ($(CONFIG_THUMB2_KERNEL),y) |
arch/arm/boot/compressed/Makefile
... | ... | @@ -79,6 +79,10 @@ |
79 | 79 | EXTRA_CFLAGS := -fpic -fno-builtin |
80 | 80 | EXTRA_AFLAGS := -Wa,-march=all |
81 | 81 | |
82 | +# Supply ZRELADDR to the decompressor via a linker symbol. | |
83 | +ifneq ($(CONFIG_AUTO_ZRELADDR),y) | |
84 | +LDFLAGS_vmlinux := --defsym zreladdr=$(ZRELADDR) | |
85 | +endif | |
82 | 86 | ifeq ($(CONFIG_CPU_ENDIAN_BE8),y) |
83 | 87 | LDFLAGS_vmlinux += --be8 |
84 | 88 | endif |
arch/arm/boot/compressed/head.S
arch/arm/common/it8152.c
... | ... | @@ -263,6 +263,14 @@ |
263 | 263 | return 0; |
264 | 264 | } |
265 | 265 | |
266 | +int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size) | |
267 | +{ | |
268 | + dev_dbg(dev, "%s: dma_addr %08x, size %08x\n", | |
269 | + __func__, dma_addr, size); | |
270 | + return (dev->bus == &pci_bus_type) && | |
271 | + ((dma_addr + size - PHYS_OFFSET) >= SZ_64M); | |
272 | +} | |
273 | + | |
266 | 274 | int __init it8152_pci_setup(int nr, struct pci_sys_data *sys) |
267 | 275 | { |
268 | 276 | it8152_io.start = IT8152_IO_BASE + 0x12000; |
arch/arm/include/asm/dma-mapping.h
... | ... | @@ -288,15 +288,7 @@ |
288 | 288 | * DMA access and 1 if the buffer needs to be bounced. |
289 | 289 | * |
290 | 290 | */ |
291 | -#ifdef CONFIG_SA1111 | |
292 | 291 | extern int dma_needs_bounce(struct device*, dma_addr_t, size_t); |
293 | -#else | |
294 | -static inline int dma_needs_bounce(struct device *dev, dma_addr_t addr, | |
295 | - size_t size) | |
296 | -{ | |
297 | - return 0; | |
298 | -} | |
299 | -#endif | |
300 | 292 | |
301 | 293 | /* |
302 | 294 | * The DMA API, implemented by dmabounce.c. See below for descriptions. |
arch/arm/include/asm/perf_event.h
... | ... | @@ -17,7 +17,7 @@ |
17 | 17 | * counter interrupts are regular interrupts and not an NMI. This |
18 | 18 | * means that when we receive the interrupt we can call |
19 | 19 | * perf_event_do_pending() that handles all of the work with |
20 | - * interrupts enabled. | |
20 | + * interrupts disabled. | |
21 | 21 | */ |
22 | 22 | static inline void |
23 | 23 | set_perf_event_pending(void) |
arch/arm/include/asm/unistd.h
... | ... | @@ -393,6 +393,9 @@ |
393 | 393 | #define __NR_perf_event_open (__NR_SYSCALL_BASE+364) |
394 | 394 | #define __NR_recvmmsg (__NR_SYSCALL_BASE+365) |
395 | 395 | #define __NR_accept4 (__NR_SYSCALL_BASE+366) |
396 | +#define __NR_fanotify_init (__NR_SYSCALL_BASE+367) | |
397 | +#define __NR_fanotify_mark (__NR_SYSCALL_BASE+368) | |
398 | +#define __NR_prlimit64 (__NR_SYSCALL_BASE+369) | |
396 | 399 | |
397 | 400 | /* |
398 | 401 | * The following SWIs are ARM private. |
arch/arm/kernel/calls.S
... | ... | @@ -376,6 +376,9 @@ |
376 | 376 | CALL(sys_perf_event_open) |
377 | 377 | /* 365 */ CALL(sys_recvmmsg) |
378 | 378 | CALL(sys_accept4) |
379 | + CALL(sys_fanotify_init) | |
380 | + CALL(sys_fanotify_mark) | |
381 | + CALL(sys_prlimit64) | |
379 | 382 | #ifndef syscalls_counted |
380 | 383 | .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls |
381 | 384 | #define syscalls_counted |
arch/arm/kernel/perf_event.c
... | ... | @@ -319,8 +319,8 @@ |
319 | 319 | { |
320 | 320 | struct hw_perf_event fake_event = event->hw; |
321 | 321 | |
322 | - if (event->pmu && event->pmu != &pmu) | |
323 | - return 0; | |
322 | + if (event->pmu != &pmu || event->state <= PERF_EVENT_STATE_OFF) | |
323 | + return 1; | |
324 | 324 | |
325 | 325 | return armpmu->get_event_idx(cpuc, &fake_event) >= 0; |
326 | 326 | } |
... | ... | @@ -1041,8 +1041,8 @@ |
1041 | 1041 | /* |
1042 | 1042 | * Handle the pending perf events. |
1043 | 1043 | * |
1044 | - * Note: this call *must* be run with interrupts enabled. For | |
1045 | - * platforms that can have the PMU interrupts raised as a PMI, this | |
1044 | + * Note: this call *must* be run with interrupts disabled. For | |
1045 | + * platforms that can have the PMU interrupts raised as an NMI, this | |
1046 | 1046 | * will not work. |
1047 | 1047 | */ |
1048 | 1048 | perf_event_do_pending(); |
... | ... | @@ -2017,8 +2017,8 @@ |
2017 | 2017 | /* |
2018 | 2018 | * Handle the pending perf events. |
2019 | 2019 | * |
2020 | - * Note: this call *must* be run with interrupts enabled. For | |
2021 | - * platforms that can have the PMU interrupts raised as a PMI, this | |
2020 | + * Note: this call *must* be run with interrupts disabled. For | |
2021 | + * platforms that can have the PMU interrupts raised as an NMI, this | |
2022 | 2022 | * will not work. |
2023 | 2023 | */ |
2024 | 2024 | perf_event_do_pending(); |
arch/arm/mach-ep93xx/clock.c
arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c
... | ... | @@ -215,7 +215,7 @@ |
215 | 215 | * Add platform devices present on this baseboard and init |
216 | 216 | * them from CPU side as far as required to use them later on |
217 | 217 | */ |
218 | -void __init eukrea_mbimxsd_baseboard_init(void) | |
218 | +void __init eukrea_mbimxsd25_baseboard_init(void) | |
219 | 219 | { |
220 | 220 | if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads, |
221 | 221 | ARRAY_SIZE(eukrea_mbimxsd_pads))) |
arch/arm/mach-mx25/mach-cpuimx25.c
... | ... | @@ -147,8 +147,8 @@ |
147 | 147 | if (!otg_mode_host) |
148 | 148 | mxc_register_device(&otg_udc_device, &otg_device_pdata); |
149 | 149 | |
150 | -#ifdef CONFIG_MACH_EUKREA_MBIMXSD_BASEBOARD | |
151 | - eukrea_mbimxsd_baseboard_init(); | |
150 | +#ifdef CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD | |
151 | + eukrea_mbimxsd25_baseboard_init(); | |
152 | 152 | #endif |
153 | 153 | } |
154 | 154 |
arch/arm/mach-mx3/clock-imx35.c
... | ... | @@ -155,7 +155,7 @@ |
155 | 155 | |
156 | 156 | aad = &clk_consumer[(pdr0 >> 16) & 0xf]; |
157 | 157 | if (aad->sel) |
158 | - fref = fref * 2 / 3; | |
158 | + fref = fref * 3 / 4; | |
159 | 159 | |
160 | 160 | return fref / aad->arm; |
161 | 161 | } |
... | ... | @@ -164,7 +164,7 @@ |
164 | 164 | { |
165 | 165 | unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); |
166 | 166 | struct arm_ahb_div *aad; |
167 | - unsigned long fref = get_rate_mpll(); | |
167 | + unsigned long fref = get_rate_arm(); | |
168 | 168 | |
169 | 169 | aad = &clk_consumer[(pdr0 >> 16) & 0xf]; |
170 | 170 | |
171 | 171 | |
... | ... | @@ -176,16 +176,11 @@ |
176 | 176 | return get_rate_ahb(NULL) >> 1; |
177 | 177 | } |
178 | 178 | |
179 | -static unsigned long get_3_3_div(unsigned long in) | |
180 | -{ | |
181 | - return (((in >> 3) & 0x7) + 1) * ((in & 0x7) + 1); | |
182 | -} | |
183 | - | |
184 | 179 | static unsigned long get_rate_uart(struct clk *clk) |
185 | 180 | { |
186 | 181 | unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3); |
187 | 182 | unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); |
188 | - unsigned long div = get_3_3_div(pdr4 >> 10); | |
183 | + unsigned long div = ((pdr4 >> 10) & 0x3f) + 1; | |
189 | 184 | |
190 | 185 | if (pdr3 & (1 << 14)) |
191 | 186 | return get_rate_arm() / div; |
... | ... | @@ -216,7 +211,7 @@ |
216 | 211 | break; |
217 | 212 | } |
218 | 213 | |
219 | - return rate / get_3_3_div(div); | |
214 | + return rate / (div + 1); | |
220 | 215 | } |
221 | 216 | |
222 | 217 | static unsigned long get_rate_mshc(struct clk *clk) |
... | ... | @@ -270,7 +265,7 @@ |
270 | 265 | else |
271 | 266 | rate = get_rate_ppll(); |
272 | 267 | |
273 | - return rate / get_3_3_div((pdr2 >> 16) & 0x3f); | |
268 | + return rate / (((pdr2 >> 16) & 0x3f) + 1); | |
274 | 269 | } |
275 | 270 | |
276 | 271 | static unsigned long get_rate_otg(struct clk *clk) |
277 | 272 | |
278 | 273 | |
279 | 274 | |
280 | 275 | |
... | ... | @@ -283,25 +278,51 @@ |
283 | 278 | else |
284 | 279 | rate = get_rate_ppll(); |
285 | 280 | |
286 | - return rate / get_3_3_div((pdr4 >> 22) & 0x3f); | |
281 | + return rate / (((pdr4 >> 22) & 0x3f) + 1); | |
287 | 282 | } |
288 | 283 | |
289 | 284 | static unsigned long get_rate_ipg_per(struct clk *clk) |
290 | 285 | { |
291 | 286 | unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); |
292 | 287 | unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); |
293 | - unsigned long div1, div2; | |
288 | + unsigned long div; | |
294 | 289 | |
295 | 290 | if (pdr0 & (1 << 26)) { |
296 | - div1 = (pdr4 >> 19) & 0x7; | |
297 | - div2 = (pdr4 >> 16) & 0x7; | |
298 | - return get_rate_arm() / ((div1 + 1) * (div2 + 1)); | |
291 | + div = (pdr4 >> 16) & 0x3f; | |
292 | + return get_rate_arm() / (div + 1); | |
299 | 293 | } else { |
300 | - div1 = (pdr0 >> 12) & 0x7; | |
301 | - return get_rate_ahb(NULL) / div1; | |
294 | + div = (pdr0 >> 12) & 0x7; | |
295 | + return get_rate_ahb(NULL) / (div + 1); | |
302 | 296 | } |
303 | 297 | } |
304 | 298 | |
299 | +static unsigned long get_rate_hsp(struct clk *clk) | |
300 | +{ | |
301 | + unsigned long hsp_podf = (__raw_readl(CCM_BASE + CCM_PDR0) >> 20) & 0x03; | |
302 | + unsigned long fref = get_rate_mpll(); | |
303 | + | |
304 | + if (fref > 400 * 1000 * 1000) { | |
305 | + switch (hsp_podf) { | |
306 | + case 0: | |
307 | + return fref >> 2; | |
308 | + case 1: | |
309 | + return fref >> 3; | |
310 | + case 2: | |
311 | + return fref / 3; | |
312 | + } | |
313 | + } else { | |
314 | + switch (hsp_podf) { | |
315 | + case 0: | |
316 | + case 2: | |
317 | + return fref / 3; | |
318 | + case 1: | |
319 | + return fref / 6; | |
320 | + } | |
321 | + } | |
322 | + | |
323 | + return 0; | |
324 | +} | |
325 | + | |
305 | 326 | static int clk_cgr_enable(struct clk *clk) |
306 | 327 | { |
307 | 328 | u32 reg; |
... | ... | @@ -359,7 +380,7 @@ |
359 | 380 | DEFINE_CLOCK(i2c2_clk, 1, CCM_CGR1, 12, get_rate_ipg_per, NULL); |
360 | 381 | DEFINE_CLOCK(i2c3_clk, 2, CCM_CGR1, 14, get_rate_ipg_per, NULL); |
361 | 382 | DEFINE_CLOCK(iomuxc_clk, 0, CCM_CGR1, 16, NULL, NULL); |
362 | -DEFINE_CLOCK(ipu_clk, 0, CCM_CGR1, 18, get_rate_ahb, NULL); | |
383 | +DEFINE_CLOCK(ipu_clk, 0, CCM_CGR1, 18, get_rate_hsp, NULL); | |
363 | 384 | DEFINE_CLOCK(kpp_clk, 0, CCM_CGR1, 20, get_rate_ipg, NULL); |
364 | 385 | DEFINE_CLOCK(mlb_clk, 0, CCM_CGR1, 22, get_rate_ahb, NULL); |
365 | 386 | DEFINE_CLOCK(mshc_clk, 0, CCM_CGR1, 24, get_rate_mshc, NULL); |
366 | 387 | |
... | ... | @@ -485,10 +506,10 @@ |
485 | 506 | |
486 | 507 | int __init mx35_clocks_init() |
487 | 508 | { |
488 | - unsigned int ll = 0; | |
509 | + unsigned int cgr2 = 3 << 26, cgr3 = 0; | |
489 | 510 | |
490 | 511 | #if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) |
491 | - ll = (3 << 16); | |
512 | + cgr2 |= 3 << 16; | |
492 | 513 | #endif |
493 | 514 | |
494 | 515 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); |
... | ... | @@ -499,8 +520,20 @@ |
499 | 520 | __raw_writel((3 << 18), CCM_BASE + CCM_CGR0); |
500 | 521 | __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16), |
501 | 522 | CCM_BASE + CCM_CGR1); |
502 | - __raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2); | |
503 | - __raw_writel(0, CCM_BASE + CCM_CGR3); | |
523 | + | |
524 | + /* | |
525 | + * Check if we came up in internal boot mode. If yes, we need some | |
526 | + * extra clocks turned on, otherwise the MX35 boot ROM code will | |
527 | + * hang after a watchdog reset. | |
528 | + */ | |
529 | + if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) { | |
530 | + /* Additionally turn on UART1, SCC, and IIM clocks */ | |
531 | + cgr2 |= 3 << 16 | 3 << 4; | |
532 | + cgr3 |= 3 << 2; | |
533 | + } | |
534 | + | |
535 | + __raw_writel(cgr2, CCM_BASE + CCM_CGR2); | |
536 | + __raw_writel(cgr3, CCM_BASE + CCM_CGR3); | |
504 | 537 | |
505 | 538 | mxc_timer_init(&gpt_clk, |
506 | 539 | MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT); |
arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
... | ... | @@ -216,7 +216,7 @@ |
216 | 216 | * Add platform devices present on this baseboard and init |
217 | 217 | * them from CPU side as far as required to use them later on |
218 | 218 | */ |
219 | -void __init eukrea_mbimxsd_baseboard_init(void) | |
219 | +void __init eukrea_mbimxsd35_baseboard_init(void) | |
220 | 220 | { |
221 | 221 | if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads, |
222 | 222 | ARRAY_SIZE(eukrea_mbimxsd_pads))) |
arch/arm/mach-mx3/mach-cpuimx35.c
... | ... | @@ -201,8 +201,8 @@ |
201 | 201 | if (!otg_mode_host) |
202 | 202 | mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); |
203 | 203 | |
204 | -#ifdef CONFIG_MACH_EUKREA_MBIMXSD_BASEBOARD | |
205 | - eukrea_mbimxsd_baseboard_init(); | |
204 | +#ifdef CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD | |
205 | + eukrea_mbimxsd35_baseboard_init(); | |
206 | 206 | #endif |
207 | 207 | } |
208 | 208 |
arch/arm/mach-mx5/clock-mx51.c
arch/arm/mach-pxa/cpufreq-pxa2xx.c
arch/arm/mach-pxa/cpufreq-pxa3xx.c
arch/arm/mach-pxa/include/mach/mfp-pxa300.h
... | ... | @@ -71,10 +71,10 @@ |
71 | 71 | #define GPIO46_CI_DD_7 MFP_CFG_DRV(GPIO46, AF0, DS04X) |
72 | 72 | #define GPIO47_CI_DD_8 MFP_CFG_DRV(GPIO47, AF1, DS04X) |
73 | 73 | #define GPIO48_CI_DD_9 MFP_CFG_DRV(GPIO48, AF1, DS04X) |
74 | -#define GPIO52_CI_HSYNC MFP_CFG_DRV(GPIO52, AF0, DS04X) | |
75 | -#define GPIO51_CI_VSYNC MFP_CFG_DRV(GPIO51, AF0, DS04X) | |
76 | 74 | #define GPIO49_CI_MCLK MFP_CFG_DRV(GPIO49, AF0, DS04X) |
77 | 75 | #define GPIO50_CI_PCLK MFP_CFG_DRV(GPIO50, AF0, DS04X) |
76 | +#define GPIO51_CI_HSYNC MFP_CFG_DRV(GPIO51, AF0, DS04X) | |
77 | +#define GPIO52_CI_VSYNC MFP_CFG_DRV(GPIO52, AF0, DS04X) | |
78 | 78 | |
79 | 79 | /* KEYPAD */ |
80 | 80 | #define GPIO3_KP_DKIN_6 MFP_CFG_LPM(GPIO3, AF2, FLOAT) |
arch/arm/mach-shmobile/Makefile
arch/arm/mach-shmobile/board-ap4evb.c
... | ... | @@ -25,6 +25,7 @@ |
25 | 25 | #include <linux/platform_device.h> |
26 | 26 | #include <linux/delay.h> |
27 | 27 | #include <linux/mfd/sh_mobile_sdhi.h> |
28 | +#include <linux/mfd/tmio.h> | |
28 | 29 | #include <linux/mmc/host.h> |
29 | 30 | #include <linux/mtd/mtd.h> |
30 | 31 | #include <linux/mtd/partitions.h> |
... | ... | @@ -39,6 +40,7 @@ |
39 | 40 | #include <linux/sh_clk.h> |
40 | 41 | #include <linux/gpio.h> |
41 | 42 | #include <linux/input.h> |
43 | +#include <linux/leds.h> | |
42 | 44 | #include <linux/input/sh_keysc.h> |
43 | 45 | #include <linux/usb/r8a66597.h> |
44 | 46 | |
... | ... | @@ -307,6 +309,7 @@ |
307 | 309 | .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX, |
308 | 310 | .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, |
309 | 311 | .tmio_ocr_mask = MMC_VDD_165_195, |
312 | + .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE, | |
310 | 313 | }; |
311 | 314 | |
312 | 315 | static struct resource sdhi1_resources[] = { |
... | ... | @@ -558,7 +561,7 @@ |
558 | 561 | |
559 | 562 | static struct platform_device fsi_device = { |
560 | 563 | .name = "sh_fsi2", |
561 | - .id = 0, | |
564 | + .id = -1, | |
562 | 565 | .num_resources = ARRAY_SIZE(fsi_resources), |
563 | 566 | .resource = fsi_resources, |
564 | 567 | .dev = { |
565 | 568 | |
... | ... | @@ -650,7 +653,44 @@ |
650 | 653 | }, |
651 | 654 | }; |
652 | 655 | |
656 | +static struct gpio_led ap4evb_leds[] = { | |
657 | + { | |
658 | + .name = "led4", | |
659 | + .gpio = GPIO_PORT185, | |
660 | + .default_state = LEDS_GPIO_DEFSTATE_ON, | |
661 | + }, | |
662 | + { | |
663 | + .name = "led2", | |
664 | + .gpio = GPIO_PORT186, | |
665 | + .default_state = LEDS_GPIO_DEFSTATE_ON, | |
666 | + }, | |
667 | + { | |
668 | + .name = "led3", | |
669 | + .gpio = GPIO_PORT187, | |
670 | + .default_state = LEDS_GPIO_DEFSTATE_ON, | |
671 | + }, | |
672 | + { | |
673 | + .name = "led1", | |
674 | + .gpio = GPIO_PORT188, | |
675 | + .default_state = LEDS_GPIO_DEFSTATE_ON, | |
676 | + } | |
677 | +}; | |
678 | + | |
679 | +static struct gpio_led_platform_data ap4evb_leds_pdata = { | |
680 | + .num_leds = ARRAY_SIZE(ap4evb_leds), | |
681 | + .leds = ap4evb_leds, | |
682 | +}; | |
683 | + | |
684 | +static struct platform_device leds_device = { | |
685 | + .name = "leds-gpio", | |
686 | + .id = 0, | |
687 | + .dev = { | |
688 | + .platform_data = &ap4evb_leds_pdata, | |
689 | + }, | |
690 | +}; | |
691 | + | |
653 | 692 | static struct platform_device *ap4evb_devices[] __initdata = { |
693 | + &leds_device, | |
654 | 694 | &nor_flash_device, |
655 | 695 | &smc911x_device, |
656 | 696 | &sdhi0_device, |
... | ... | @@ -839,20 +879,6 @@ |
839 | 879 | /* enable SMSC911X */ |
840 | 880 | gpio_request(GPIO_FN_CS5A, NULL); |
841 | 881 | gpio_request(GPIO_FN_IRQ6_39, NULL); |
842 | - | |
843 | - /* enable LED 1 - 4 */ | |
844 | - gpio_request(GPIO_PORT185, NULL); | |
845 | - gpio_request(GPIO_PORT186, NULL); | |
846 | - gpio_request(GPIO_PORT187, NULL); | |
847 | - gpio_request(GPIO_PORT188, NULL); | |
848 | - gpio_direction_output(GPIO_PORT185, 1); | |
849 | - gpio_direction_output(GPIO_PORT186, 1); | |
850 | - gpio_direction_output(GPIO_PORT187, 1); | |
851 | - gpio_direction_output(GPIO_PORT188, 1); | |
852 | - gpio_export(GPIO_PORT185, 0); | |
853 | - gpio_export(GPIO_PORT186, 0); | |
854 | - gpio_export(GPIO_PORT187, 0); | |
855 | - gpio_export(GPIO_PORT188, 0); | |
856 | 882 | |
857 | 883 | /* enable Debug switch (S6) */ |
858 | 884 | gpio_request(GPIO_PORT32, NULL); |
arch/arm/mach-shmobile/clock-sh7372.c
... | ... | @@ -286,7 +286,6 @@ |
286 | 286 | |
287 | 287 | struct clk pllc2_clk = { |
288 | 288 | .ops = &pllc2_clk_ops, |
289 | - .flags = CLK_ENABLE_ON_INIT, | |
290 | 289 | .parent = &extal1_div2_clk, |
291 | 290 | .freq_table = pllc2_freq_table, |
292 | 291 | .parent_table = pllc2_parent, |
... | ... | @@ -395,7 +394,7 @@ |
395 | 394 | |
396 | 395 | enum { MSTP001, |
397 | 396 | MSTP131, MSTP130, |
398 | - MSTP129, MSTP128, | |
397 | + MSTP129, MSTP128, MSTP127, MSTP126, | |
399 | 398 | MSTP118, MSTP117, MSTP116, |
400 | 399 | MSTP106, MSTP101, MSTP100, |
401 | 400 | MSTP223, |
... | ... | @@ -413,6 +412,8 @@ |
413 | 412 | [MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */ |
414 | 413 | [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */ |
415 | 414 | [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* VEU0 */ |
415 | + [MSTP127] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 27, 0), /* CEU */ | |
416 | + [MSTP126] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 26, 0), /* CSI2 */ | |
416 | 417 | [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX */ |
417 | 418 | [MSTP117] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 17, 0), /* LCDC1 */ |
418 | 419 | [MSTP116] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */ |
... | ... | @@ -428,7 +429,7 @@ |
428 | 429 | [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */ |
429 | 430 | [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */ |
430 | 431 | [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */ |
431 | - [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, CLK_ENABLE_ON_INIT), /* FSIA */ | |
432 | + [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, 0), /* FSIA */ | |
432 | 433 | [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */ |
433 | 434 | [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */ |
434 | 435 | [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */ |
... | ... | @@ -498,6 +499,8 @@ |
498 | 499 | CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */ |
499 | 500 | CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */ |
500 | 501 | CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */ |
502 | + CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU */ | |
503 | + CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2 */ | |
501 | 504 | CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */ |
502 | 505 | CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */ |
503 | 506 | CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */ |
arch/arm/mach-shmobile/clock.c
1 | 1 | /* |
2 | - * SH-Mobile Timer | |
2 | + * SH-Mobile Clock Framework | |
3 | 3 | * |
4 | 4 | * Copyright (C) 2010 Magnus Damm |
5 | + * | |
6 | + * Used together with arch/arm/common/clkdev.c and drivers/sh/clk.c. | |
5 | 7 | * |
6 | 8 | * This program is free software; you can redistribute it and/or modify |
7 | 9 | * it under the terms of the GNU General Public License as published by |
arch/arm/mach-shmobile/pm_runtime.c
1 | +/* | |
2 | + * arch/arm/mach-shmobile/pm_runtime.c | |
3 | + * | |
4 | + * Runtime PM support code for SuperH Mobile ARM | |
5 | + * | |
6 | + * Copyright (C) 2009-2010 Magnus Damm | |
7 | + * | |
8 | + * This file is subject to the terms and conditions of the GNU General Public | |
9 | + * License. See the file "COPYING" in the main directory of this archive | |
10 | + * for more details. | |
11 | + */ | |
12 | + | |
13 | +#include <linux/init.h> | |
14 | +#include <linux/kernel.h> | |
15 | +#include <linux/io.h> | |
16 | +#include <linux/pm_runtime.h> | |
17 | +#include <linux/platform_device.h> | |
18 | +#include <linux/clk.h> | |
19 | +#include <linux/sh_clk.h> | |
20 | +#include <linux/bitmap.h> | |
21 | + | |
22 | +#ifdef CONFIG_PM_RUNTIME | |
23 | +#define BIT_ONCE 0 | |
24 | +#define BIT_ACTIVE 1 | |
25 | +#define BIT_CLK_ENABLED 2 | |
26 | + | |
27 | +struct pm_runtime_data { | |
28 | + unsigned long flags; | |
29 | + struct clk *clk; | |
30 | +}; | |
31 | + | |
32 | +static void __devres_release(struct device *dev, void *res) | |
33 | +{ | |
34 | + struct pm_runtime_data *prd = res; | |
35 | + | |
36 | + dev_dbg(dev, "__devres_release()\n"); | |
37 | + | |
38 | + if (test_bit(BIT_CLK_ENABLED, &prd->flags)) | |
39 | + clk_disable(prd->clk); | |
40 | + | |
41 | + if (test_bit(BIT_ACTIVE, &prd->flags)) | |
42 | + clk_put(prd->clk); | |
43 | +} | |
44 | + | |
45 | +static struct pm_runtime_data *__to_prd(struct device *dev) | |
46 | +{ | |
47 | + return devres_find(dev, __devres_release, NULL, NULL); | |
48 | +} | |
49 | + | |
50 | +static void platform_pm_runtime_init(struct device *dev, | |
51 | + struct pm_runtime_data *prd) | |
52 | +{ | |
53 | + if (prd && !test_and_set_bit(BIT_ONCE, &prd->flags)) { | |
54 | + prd->clk = clk_get(dev, NULL); | |
55 | + if (!IS_ERR(prd->clk)) { | |
56 | + set_bit(BIT_ACTIVE, &prd->flags); | |
57 | + dev_info(dev, "clocks managed by runtime pm\n"); | |
58 | + } | |
59 | + } | |
60 | +} | |
61 | + | |
62 | +static void platform_pm_runtime_bug(struct device *dev, | |
63 | + struct pm_runtime_data *prd) | |
64 | +{ | |
65 | + if (prd && !test_and_set_bit(BIT_ONCE, &prd->flags)) | |
66 | + dev_err(dev, "runtime pm suspend before resume\n"); | |
67 | +} | |
68 | + | |
69 | +int platform_pm_runtime_suspend(struct device *dev) | |
70 | +{ | |
71 | + struct pm_runtime_data *prd = __to_prd(dev); | |
72 | + | |
73 | + dev_dbg(dev, "platform_pm_runtime_suspend()\n"); | |
74 | + | |
75 | + platform_pm_runtime_bug(dev, prd); | |
76 | + | |
77 | + if (prd && test_bit(BIT_ACTIVE, &prd->flags)) { | |
78 | + clk_disable(prd->clk); | |
79 | + clear_bit(BIT_CLK_ENABLED, &prd->flags); | |
80 | + } | |
81 | + | |
82 | + return 0; | |
83 | +} | |
84 | + | |
85 | +int platform_pm_runtime_resume(struct device *dev) | |
86 | +{ | |
87 | + struct pm_runtime_data *prd = __to_prd(dev); | |
88 | + | |
89 | + dev_dbg(dev, "platform_pm_runtime_resume()\n"); | |
90 | + | |
91 | + platform_pm_runtime_init(dev, prd); | |
92 | + | |
93 | + if (prd && test_bit(BIT_ACTIVE, &prd->flags)) { | |
94 | + clk_enable(prd->clk); | |
95 | + set_bit(BIT_CLK_ENABLED, &prd->flags); | |
96 | + } | |
97 | + | |
98 | + return 0; | |
99 | +} | |
100 | + | |
101 | +int platform_pm_runtime_idle(struct device *dev) | |
102 | +{ | |
103 | + /* suspend synchronously to disable clocks immediately */ | |
104 | + return pm_runtime_suspend(dev); | |
105 | +} | |
106 | + | |
107 | +static int platform_bus_notify(struct notifier_block *nb, | |
108 | + unsigned long action, void *data) | |
109 | +{ | |
110 | + struct device *dev = data; | |
111 | + struct pm_runtime_data *prd; | |
112 | + | |
113 | + dev_dbg(dev, "platform_bus_notify() %ld !\n", action); | |
114 | + | |
115 | + if (action == BUS_NOTIFY_BIND_DRIVER) { | |
116 | + prd = devres_alloc(__devres_release, sizeof(*prd), GFP_KERNEL); | |
117 | + if (prd) | |
118 | + devres_add(dev, prd); | |
119 | + else | |
120 | + dev_err(dev, "unable to alloc memory for runtime pm\n"); | |
121 | + } | |
122 | + | |
123 | + return 0; | |
124 | +} | |
125 | + | |
126 | +#else /* CONFIG_PM_RUNTIME */ | |
127 | + | |
128 | +static int platform_bus_notify(struct notifier_block *nb, | |
129 | + unsigned long action, void *data) | |
130 | +{ | |
131 | + struct device *dev = data; | |
132 | + struct clk *clk; | |
133 | + | |
134 | + dev_dbg(dev, "platform_bus_notify() %ld !\n", action); | |
135 | + | |
136 | + switch (action) { | |
137 | + case BUS_NOTIFY_BIND_DRIVER: | |
138 | + clk = clk_get(dev, NULL); | |
139 | + if (!IS_ERR(clk)) { | |
140 | + clk_enable(clk); | |
141 | + clk_put(clk); | |
142 | + dev_info(dev, "runtime pm disabled, clock forced on\n"); | |
143 | + } | |
144 | + break; | |
145 | + case BUS_NOTIFY_UNBOUND_DRIVER: | |
146 | + clk = clk_get(dev, NULL); | |
147 | + if (!IS_ERR(clk)) { | |
148 | + clk_disable(clk); | |
149 | + clk_put(clk); | |
150 | + dev_info(dev, "runtime pm disabled, clock forced off\n"); | |
151 | + } | |
152 | + break; | |
153 | + } | |
154 | + | |
155 | + return 0; | |
156 | +} | |
157 | + | |
158 | +#endif /* CONFIG_PM_RUNTIME */ | |
159 | + | |
160 | +static struct notifier_block platform_bus_notifier = { | |
161 | + .notifier_call = platform_bus_notify | |
162 | +}; | |
163 | + | |
164 | +static int __init sh_pm_runtime_init(void) | |
165 | +{ | |
166 | + bus_register_notifier(&platform_bus_type, &platform_bus_notifier); | |
167 | + return 0; | |
168 | +} | |
169 | +core_initcall(sh_pm_runtime_init); |
arch/arm/mm/Kconfig
... | ... | @@ -398,7 +398,7 @@ |
398 | 398 | # ARMv6k |
399 | 399 | config CPU_32v6K |
400 | 400 | bool "Support ARM V6K processor extensions" if !SMP |
401 | - depends on CPU_V6 | |
401 | + depends on CPU_V6 || CPU_V7 | |
402 | 402 | default y if SMP && !(ARCH_MX3 || ARCH_OMAP2) |
403 | 403 | help |
404 | 404 | Say Y here if your ARMv6 processor supports the 'K' extension. |
arch/arm/mm/dma-mapping.c
arch/arm/plat-mxc/Kconfig
arch/arm/plat-mxc/include/mach/eukrea-baseboards.h
... | ... | @@ -37,9 +37,9 @@ |
37 | 37 | * mach-mx5/eukrea_mbimx51-baseboard.c for cpuimx51 |
38 | 38 | */ |
39 | 39 | |
40 | -extern void eukrea_mbimx25_baseboard_init(void); | |
40 | +extern void eukrea_mbimxsd25_baseboard_init(void); | |
41 | 41 | extern void eukrea_mbimx27_baseboard_init(void); |
42 | -extern void eukrea_mbimx35_baseboard_init(void); | |
42 | +extern void eukrea_mbimxsd35_baseboard_init(void); | |
43 | 43 | extern void eukrea_mbimx51_baseboard_init(void); |
44 | 44 | |
45 | 45 | #endif |
arch/arm/plat-mxc/tzic.c
... | ... | @@ -164,8 +164,9 @@ |
164 | 164 | return -EAGAIN; |
165 | 165 | |
166 | 166 | for (i = 0; i < 4; i++) { |
167 | - v = is_idle ? __raw_readl(TZIC_ENSET0(i)) : wakeup_intr[i]; | |
168 | - __raw_writel(v, TZIC_WAKEUP0(i)); | |
167 | + v = is_idle ? __raw_readl(tzic_base + TZIC_ENSET0(i)) : | |
168 | + wakeup_intr[i]; | |
169 | + __raw_writel(v, tzic_base + TZIC_WAKEUP0(i)); | |
169 | 170 | } |
170 | 171 | |
171 | 172 | return 0; |
arch/arm/plat-pxa/pwm.c
... | ... | @@ -176,7 +176,7 @@ |
176 | 176 | |
177 | 177 | static int __devinit pwm_probe(struct platform_device *pdev) |
178 | 178 | { |
179 | - struct platform_device_id *id = platform_get_device_id(pdev); | |
179 | + const struct platform_device_id *id = platform_get_device_id(pdev); | |
180 | 180 | struct pwm_device *pwm, *secondary = NULL; |
181 | 181 | struct resource *r; |
182 | 182 | int ret = 0; |
arch/arm/tools/mach-types
... | ... | @@ -12,7 +12,7 @@ |
12 | 12 | # |
13 | 13 | # http://www.arm.linux.org.uk/developer/machines/?action=new |
14 | 14 | # |
15 | -# Last update: Mon Jul 12 21:10:14 2010 | |
15 | +# Last update: Thu Sep 9 22:43:01 2010 | |
16 | 16 | # |
17 | 17 | # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number |
18 | 18 | # |
... | ... | @@ -2622,7 +2622,7 @@ |
2622 | 2622 | gw2388 MACH_GW2388 GW2388 2635 |
2623 | 2623 | jadecpu MACH_JADECPU JADECPU 2636 |
2624 | 2624 | carlisle MACH_CARLISLE CARLISLE 2637 |
2625 | -lux_sf9 MACH_LUX_SFT9 LUX_SFT9 2638 | |
2625 | +lux_sf9 MACH_LUX_SF9 LUX_SF9 2638 | |
2626 | 2626 | nemid_tb MACH_NEMID_TB NEMID_TB 2639 |
2627 | 2627 | terrier MACH_TERRIER TERRIER 2640 |
2628 | 2628 | turbot MACH_TURBOT TURBOT 2641 |
... | ... | @@ -2950,4 +2950,98 @@ |
2950 | 2950 | netviz MACH_NETVIZ NETVIZ 2964 |
2951 | 2951 | flexibity MACH_FLEXIBITY FLEXIBITY 2965 |
2952 | 2952 | wlan_computer MACH_WLAN_COMPUTER WLAN_COMPUTER 2966 |
2953 | +lpc24xx MACH_LPC24XX LPC24XX 2967 | |
2954 | +spica MACH_SPICA SPICA 2968 | |
2955 | +gpsdisplay MACH_GPSDISPLAY GPSDISPLAY 2969 | |
2956 | +bipnet MACH_BIPNET BIPNET 2970 | |
2957 | +overo_ctu_inertial MACH_OVERO_CTU_INERTIAL OVERO_CTU_INERTIAL 2971 | |
2958 | +davinci_dm355_mmm MACH_DAVINCI_DM355_MMM DAVINCI_DM355_MMM 2972 | |
2959 | +pc9260_v2 MACH_PC9260_V2 PC9260_V2 2973 | |
2960 | +ptx7545 MACH_PTX7545 PTX7545 2974 | |
2961 | +tm_efdc MACH_TM_EFDC TM_EFDC 2975 | |
2962 | +omap3_waldo1 MACH_OMAP3_WALDO1 OMAP3_WALDO1 2977 | |
2963 | +flyer MACH_FLYER FLYER 2978 | |
2964 | +tornado3240 MACH_TORNADO3240 TORNADO3240 2979 | |
2965 | +soli_01 MACH_SOLI_01 SOLI_01 2980 | |
2966 | +omapl138_europalc MACH_OMAPL138_EUROPALC OMAPL138_EUROPALC 2981 | |
2967 | +helios_v1 MACH_HELIOS_V1 HELIOS_V1 2982 | |
2968 | +netspace_lite_v2 MACH_NETSPACE_LITE_V2 NETSPACE_LITE_V2 2983 | |
2969 | +ssc MACH_SSC SSC 2984 | |
2970 | +premierwave_en MACH_PREMIERWAVE_EN PREMIERWAVE_EN 2985 | |
2971 | +wasabi MACH_WASABI WASABI 2986 | |
2972 | +vivow MACH_VIVOW VIVOW 2987 | |
2973 | +mx50_rdp MACH_MX50_RDP MX50_RDP 2988 | |
2974 | +universal MACH_UNIVERSAL UNIVERSAL 2989 | |
2975 | +real6410 MACH_REAL6410 REAL6410 2990 | |
2976 | +spx_sakura MACH_SPX_SAKURA SPX_SAKURA 2991 | |
2977 | +ij3k_2440 MACH_IJ3K_2440 IJ3K_2440 2992 | |
2978 | +omap3_bc10 MACH_OMAP3_BC10 OMAP3_BC10 2993 | |
2979 | +thebe MACH_THEBE THEBE 2994 | |
2980 | +rv082 MACH_RV082 RV082 2995 | |
2981 | +armlguest MACH_ARMLGUEST ARMLGUEST 2996 | |
2982 | +tjinc1000 MACH_TJINC1000 TJINC1000 2997 | |
2983 | +dockstar MACH_DOCKSTAR DOCKSTAR 2998 | |
2984 | +ax8008 MACH_AX8008 AX8008 2999 | |
2985 | +gnet_sgce MACH_GNET_SGCE GNET_SGCE 3000 | |
2986 | +pxwnas_500_1000 MACH_PXWNAS_500_1000 PXWNAS_500_1000 3001 | |
2987 | +ea20 MACH_EA20 EA20 3002 | |
2988 | +awm2 MACH_AWM2 AWM2 3003 | |
2989 | +ti8148evm MACH_TI8148EVM TI8148EVM 3004 | |
2990 | +tegra_seaboard MACH_TEGRA_SEABOARD TEGRA_SEABOARD 3005 | |
2991 | +linkstation_chlv2 MACH_LINKSTATION_CHLV2 LINKSTATION_CHLV2 3006 | |
2992 | +tera_pro2_rack MACH_TERA_PRO2_RACK TERA_PRO2_RACK 3007 | |
2993 | +rubys MACH_RUBYS RUBYS 3008 | |
2994 | +aquarius MACH_AQUARIUS AQUARIUS 3009 | |
2995 | +mx53_ard MACH_MX53_ARD MX53_ARD 3010 | |
2996 | +mx53_smd MACH_MX53_SMD MX53_SMD 3011 | |
2997 | +lswxl MACH_LSWXL LSWXL 3012 | |
2998 | +dove_avng_v3 MACH_DOVE_AVNG_V3 DOVE_AVNG_V3 3013 | |
2999 | +sdi_ess_9263 MACH_SDI_ESS_9263 SDI_ESS_9263 3014 | |
3000 | +jocpu550 MACH_JOCPU550 JOCPU550 3015 | |
3001 | +msm8x60_rumi3 MACH_MSM8X60_RUMI3 MSM8X60_RUMI3 3016 | |
3002 | +msm8x60_ffa MACH_MSM8X60_FFA MSM8X60_FFA 3017 | |
3003 | +yanomami MACH_YANOMAMI YANOMAMI 3018 | |
3004 | +gta04 MACH_GTA04 GTA04 3019 | |
3005 | +cm_a510 MACH_CM_A510 CM_A510 3020 | |
3006 | +omap3_rfs200 MACH_OMAP3_RFS200 OMAP3_RFS200 3021 | |
3007 | +kx33xx MACH_KX33XX KX33XX 3022 | |
3008 | +ptx7510 MACH_PTX7510 PTX7510 3023 | |
3009 | +top9000 MACH_TOP9000 TOP9000 3024 | |
3010 | +teenote MACH_TEENOTE TEENOTE 3025 | |
3011 | +ts3 MACH_TS3 TS3 3026 | |
3012 | +a0 MACH_A0 A0 3027 | |
3013 | +fsm9xxx_surf MACH_FSM9XXX_SURF FSM9XXX_SURF 3028 | |
3014 | +fsm9xxx_ffa MACH_FSM9XXX_FFA FSM9XXX_FFA 3029 | |
3015 | +frrhwcdma60w MACH_FRRHWCDMA60W FRRHWCDMA60W 3030 | |
3016 | +remus MACH_REMUS REMUS 3031 | |
3017 | +at91cap7xdk MACH_AT91CAP7XDK AT91CAP7XDK 3032 | |
3018 | +at91cap7stk MACH_AT91CAP7STK AT91CAP7STK 3033 | |
3019 | +kt_sbc_sam9_1 MACH_KT_SBC_SAM9_1 KT_SBC_SAM9_1 3034 | |
3020 | +oratisrouter MACH_ORATISROUTER ORATISROUTER 3035 | |
3021 | +armada_xp_db MACH_ARMADA_XP_DB ARMADA_XP_DB 3036 | |
3022 | +spdm MACH_SPDM SPDM 3037 | |
3023 | +gtib MACH_GTIB GTIB 3038 | |
3024 | +dgm3240 MACH_DGM3240 DGM3240 3039 | |
3025 | +atlas_i_lpe MACH_ATLAS_I_LPE ATLAS_I_LPE 3040 | |
3026 | +htcmega MACH_HTCMEGA HTCMEGA 3041 | |
3027 | +tricorder MACH_TRICORDER TRICORDER 3042 | |
3028 | +tx28 MACH_TX28 TX28 3043 | |
3029 | +bstbrd MACH_BSTBRD BSTBRD 3044 | |
3030 | +pwb3090 MACH_PWB3090 PWB3090 3045 | |
3031 | +idea6410 MACH_IDEA6410 IDEA6410 3046 | |
3032 | +qbc9263 MACH_QBC9263 QBC9263 3047 | |
3033 | +borabora MACH_BORABORA BORABORA 3048 | |
3034 | +valdez MACH_VALDEZ VALDEZ 3049 | |
3035 | +ls9g20 MACH_LS9G20 LS9G20 3050 | |
3036 | +mios_v1 MACH_MIOS_V1 MIOS_V1 3051 | |
3037 | +s5pc110_crespo MACH_S5PC110_CRESPO S5PC110_CRESPO 3052 | |
3038 | +controltek9g20 MACH_CONTROLTEK9G20 CONTROLTEK9G20 3053 | |
3039 | +tin307 MACH_TIN307 TIN307 3054 | |
3040 | +tin510 MACH_TIN510 TIN510 3055 | |
3041 | +bluecheese MACH_BLUECHEESE BLUECHEESE 3057 | |
3042 | +tem3x30 MACH_TEM3X30 TEM3X30 3058 | |
3043 | +harvest_desoto MACH_HARVEST_DESOTO HARVEST_DESOTO 3059 | |
3044 | +msm8x60_qrdc MACH_MSM8X60_QRDC MSM8X60_QRDC 3060 | |
3045 | +spear900 MACH_SPEAR900 SPEAR900 3061 | |
3046 | +pcontrol_g20 MACH_PCONTROL_G20 PCONTROL_G20 3062 |
drivers/video/pxa168fb.c
... | ... | @@ -559,7 +559,7 @@ |
559 | 559 | .fb_imageblit = cfb_imageblit, |
560 | 560 | }; |
561 | 561 | |
562 | -static int __init pxa168fb_init_mode(struct fb_info *info, | |
562 | +static int __devinit pxa168fb_init_mode(struct fb_info *info, | |
563 | 563 | struct pxa168fb_mach_info *mi) |
564 | 564 | { |
565 | 565 | struct pxa168fb_info *fbi = info->par; |
... | ... | @@ -599,7 +599,7 @@ |
599 | 599 | return ret; |
600 | 600 | } |
601 | 601 | |
602 | -static int __init pxa168fb_probe(struct platform_device *pdev) | |
602 | +static int __devinit pxa168fb_probe(struct platform_device *pdev) | |
603 | 603 | { |
604 | 604 | struct pxa168fb_mach_info *mi; |
605 | 605 | struct fb_info *info = 0; |
... | ... | @@ -792,7 +792,7 @@ |
792 | 792 | .probe = pxa168fb_probe, |
793 | 793 | }; |
794 | 794 | |
795 | -static int __devinit pxa168fb_init(void) | |
795 | +static int __init pxa168fb_init(void) | |
796 | 796 | { |
797 | 797 | return platform_driver_register(&pxa168fb_driver); |
798 | 798 | } |