Commit 1b93a71755f2b15450b3e3045dab58a633e37b18

Authored by Russell King
Committed by Russell King
1 parent 7999d8d7a6

[ARM] Remove LOADREGS macro

As for RETINSTR, LOADREGS is a left-over from the 26-bit days.
Remove it.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Showing 15 changed files with 30 additions and 41 deletions Side-by-side Diff

arch/arm/boot/compressed/ll_char_wr.S
... ... @@ -77,7 +77,7 @@
77 77 subne r1, r1, #1
78 78 ldrneb r7, [r6, r1]
79 79 bne Lrow4bpplp
80   - LOADREGS(fd, sp!, {r4 - r7, pc})
  80 + ldmfd sp!, {r4 - r7, pc}
81 81  
82 82 @
83 83 @ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc)
... ... @@ -105,7 +105,7 @@
105 105 subne r1, r1, #1
106 106 ldrneb r7, [r6, r1]
107 107 bne Lrow8bpplp
108   - LOADREGS(fd, sp!, {r4 - r7, pc})
  108 + ldmfd sp!, {r4 - r7, pc}
109 109  
110 110 @
111 111 @ Smashable regs: {r0 - r3}, [r4], {r5, r6}, [r7], (r8 - fp), [ip], (sp), [lr], (pc)
... ... @@ -127,7 +127,7 @@
127 127 strb r7, [r0], r5
128 128 mov r7, r7, lsr #8
129 129 strb r7, [r0], r5
130   - LOADREGS(fd, sp!, {r4 - r7, pc})
  130 + ldmfd sp!, {r4 - r7, pc}
131 131  
132 132 .bss
133 133 ENTRY(con_charconvtable)
arch/arm/lib/backtrace.S
... ... @@ -41,7 +41,7 @@
41 41 movne r0, #0
42 42 movs frame, r0
43 43 1: moveq r0, #-2
44   - LOADREGS(eqfd, sp!, {r4 - r8, pc})
  44 + ldmeqfd sp!, {r4 - r8, pc}
45 45  
46 46 2: stmfd sp!, {pc} @ calculate offset of PC in STMIA instruction
47 47 ldr r0, [sp], #4
... ... @@ -85,7 +85,7 @@
85 85 * A zero next framepointer means we're done.
86 86 */
87 87 teq next, #0
88   - LOADREGS(eqfd, sp!, {r4 - r8, pc})
  88 + ldmeqfd sp!, {r4 - r8, pc}
89 89  
90 90 /*
91 91 * The next framepointer must be above the
... ... @@ -104,7 +104,7 @@
104 104 1007: ldr r0, =.Lbad
105 105 mov r1, frame
106 106 bl printk
107   - LOADREGS(fd, sp!, {r4 - r8, pc})
  107 + ldmfd sp!, {r4 - r8, pc}
108 108 .ltorg
109 109 .previous
110 110  
... ... @@ -145,7 +145,7 @@
145 145 adrne r0, .Lcr
146 146 blne printk
147 147 mov r0, stack
148   - LOADREGS(fd, sp!, {instr, reg, stack, r7, r8, pc})
  148 + ldmfd sp!, {instr, reg, stack, r7, r8, pc}
149 149  
150 150 .Lfp: .asciz " r%d = %08X%c"
151 151 .Lcr: .asciz "\n"
arch/arm/lib/clear_user.S
... ... @@ -43,10 +43,10 @@
43 43 tst r1, #1 @ x1 x0 x1 x0 x1 x0 x1
44 44 USER( strnebt r2, [r0], #1)
45 45 mov r0, #0
46   - LOADREGS(fd,sp!, {r1, pc})
  46 + ldmfd sp!, {r1, pc}
47 47  
48 48 .section .fixup,"ax"
49 49 .align 0
50   -9001: LOADREGS(fd,sp!, {r0, pc})
  50 +9001: ldmfd sp!, {r0, pc}
51 51 .previous
arch/arm/lib/copy_page.S
... ... @@ -43,5 +43,5 @@
43 43 bgt 1b @ 1
44 44 PLD( ldmeqia r1!, {r3, r4, ip, lr} )
45 45 PLD( beq 2b )
46   - LOADREGS(fd, sp!, {r4, pc}) @ 3
  46 + ldmfd sp!, {r4, pc} @ 3
arch/arm/lib/csumipv6.S
... ... @@ -28,5 +28,5 @@
28 28 adcs r0, r0, r3
29 29 adcs r0, r0, r2
30 30 adcs r0, r0, #0
31   - LOADREGS(fd, sp!, {pc})
  31 + ldmfd sp!, {pc}
arch/arm/lib/ecard.S
... ... @@ -29,7 +29,7 @@
29 29 CPSR2SPSR(r0)
30 30 mov lr, pc
31 31 mov pc, r2
32   - LOADREGS(fd, sp!, {r4 - r12, pc})
  32 + ldmfd sp!, {r4 - r12, pc}
33 33  
34 34 @ Purpose: call an expansion card loader to reset the card
35 35 @ Proto : void read_loader(int card_base, char *loader);
... ... @@ -41,5 +41,5 @@
41 41 CPSR2SPSR(r0)
42 42 mov lr, pc
43 43 add pc, r1, #8
44   - LOADREGS(fd, sp!, {r4 - r12, pc})
  44 + ldmfd sp!, {r4 - r12, pc}
arch/arm/lib/io-readsb.S
... ... @@ -72,7 +72,7 @@
72 72 bpl .Linsb_16_lp
73 73  
74 74 tst r2, #15
75   - LOADREGS(eqfd, sp!, {r4 - r6, pc})
  75 + ldmeqfd sp!, {r4 - r6, pc}
76 76  
77 77 .Linsb_no_16: tst r2, #8
78 78 beq .Linsb_no_8
... ... @@ -109,7 +109,7 @@
109 109 str r3, [r1], #4
110 110  
111 111 .Linsb_no_4: ands r2, r2, #3
112   - LOADREGS(eqfd, sp!, {r4 - r6, pc})
  112 + ldmeqfd sp!, {r4 - r6, pc}
113 113  
114 114 cmp r2, #2
115 115 ldrb r3, [r0]
... ... @@ -119,5 +119,5 @@
119 119 ldrgtb r3, [r0]
120 120 strgtb r3, [r1]
121 121  
122   - LOADREGS(fd, sp!, {r4 - r6, pc})
  122 + ldmfd sp!, {r4 - r6, pc}
arch/arm/lib/io-readsw-armv3.S
... ... @@ -69,7 +69,7 @@
69 69 bpl .Linsw_8_lp
70 70  
71 71 tst r2, #7
72   - LOADREGS(eqfd, sp!, {r4, r5, r6, pc})
  72 + ldmeqfd sp!, {r4, r5, r6, pc}
73 73  
74 74 .Lno_insw_8: tst r2, #4
75 75 beq .Lno_insw_4
... ... @@ -102,5 +102,5 @@
102 102 movne r3, r3, lsr #8
103 103 strneb r3, [r1]
104 104  
105   - LOADREGS(fd, sp!, {r4, r5, r6, pc})
  105 + ldmfd sp!, {r4, r5, r6, pc}
arch/arm/lib/io-writesb.S
... ... @@ -64,7 +64,7 @@
64 64 bpl .Loutsb_16_lp
65 65  
66 66 tst r2, #15
67   - LOADREGS(eqfd, sp!, {r4, r5, pc})
  67 + ldmeqfd sp!, {r4, r5, pc}
68 68  
69 69 .Loutsb_no_16: tst r2, #8
70 70 beq .Loutsb_no_8
... ... @@ -80,7 +80,7 @@
80 80 outword r3
81 81  
82 82 .Loutsb_no_4: ands r2, r2, #3
83   - LOADREGS(eqfd, sp!, {r4, r5, pc})
  83 + ldmeqfd sp!, {r4, r5, pc}
84 84  
85 85 cmp r2, #2
86 86 ldrb r3, [r1], #1
... ... @@ -90,5 +90,5 @@
90 90 ldrgtb r3, [r1]
91 91 strgtb r3, [r0]
92 92  
93   - LOADREGS(fd, sp!, {r4, r5, pc})
  93 + ldmfd sp!, {r4, r5, pc}
arch/arm/lib/io-writesw-armv3.S
... ... @@ -80,7 +80,7 @@
80 80 bpl .Loutsw_8_lp
81 81  
82 82 tst r2, #7
83   - LOADREGS(eqfd, sp!, {r4, r5, r6, pc})
  83 + ldmeqfd sp!, {r4, r5, r6, pc}
84 84  
85 85 .Lno_outsw_8: tst r2, #4
86 86 beq .Lno_outsw_4
... ... @@ -124,5 +124,5 @@
124 124 orrne ip, ip, ip, lsr #16
125 125 strne ip, [r0]
126 126  
127   - LOADREGS(fd, sp!, {r4, r5, r6, pc})
  127 + ldmfd sp!, {r4, r5, r6, pc}
arch/arm/lib/memset.S
... ... @@ -53,7 +53,7 @@
53 53 stmgeia r0!, {r1, r3, ip, lr}
54 54 stmgeia r0!, {r1, r3, ip, lr}
55 55 bgt 2b
56   - LOADREGS(eqfd, sp!, {pc}) @ Now <64 bytes to go.
  56 + ldmeqfd sp!, {pc} @ Now <64 bytes to go.
57 57 /*
58 58 * No need to correct the count; we're only testing bits from now on
59 59 */
arch/arm/lib/memzero.S
... ... @@ -53,7 +53,7 @@
53 53 stmgeia r0!, {r2, r3, ip, lr} @ 4
54 54 stmgeia r0!, {r2, r3, ip, lr} @ 4
55 55 bgt 3b @ 1
56   - LOADREGS(eqfd, sp!, {pc}) @ 1/2 quick exit
  56 + ldmeqfd sp!, {pc} @ 1/2 quick exit
57 57 /*
58 58 * No need to correct the count; we're only testing bits from now on
59 59 */
arch/arm/lib/uaccess.S
... ... @@ -105,7 +105,7 @@
105 105 movs ip, r2
106 106 bne .Lc2u_nowords
107 107 .Lc2u_finished: mov r0, #0
108   - LOADREGS(fd,sp!,{r2, r4 - r7, pc})
  108 + ldmfd sp!, {r2, r4 - r7, pc}
109 109  
110 110 .Lc2u_src_not_aligned:
111 111 bic r1, r1, #3
... ... @@ -280,7 +280,7 @@
280 280  
281 281 .section .fixup,"ax"
282 282 .align 0
283   -9001: LOADREGS(fd,sp!, {r0, r4 - r7, pc})
  283 +9001: ldmfd sp!, {r0, r4 - r7, pc}
284 284 .previous
285 285  
286 286 /* Prototype: unsigned long __arch_copy_from_user(void *to,const void *from,unsigned long n);
... ... @@ -369,7 +369,7 @@
369 369 bne .Lcfu_nowords
370 370 .Lcfu_finished: mov r0, #0
371 371 add sp, sp, #8
372   - LOADREGS(fd,sp!,{r4 - r7, pc})
  372 + ldmfd sp!, {r4 - r7, pc}
373 373  
374 374 .Lcfu_src_not_aligned:
375 375 bic r1, r1, #3
... ... @@ -556,6 +556,6 @@
556 556 movne r1, r4
557 557 blne __memzero
558 558 mov r0, r4
559   - LOADREGS(fd,sp!, {r4 - r7, pc})
  559 + ldmfd sp!, {r4 - r7, pc}
560 560 .previous
arch/arm/mm/copypage-v3.S
... ... @@ -35,7 +35,7 @@
35 35 stmia r0!, {r3, r4, ip, lr} @ 4
36 36 ldmneia r1!, {r3, r4, ip, lr} @ 4
37 37 bne 1b @ 1
38   - LOADREGS(fd, sp!, {r4, pc}) @ 3
  38 + ldmfd sp!, {r4, pc} @ 3
39 39  
40 40 .align 5
41 41 /*
include/asm-arm/assembler.h
... ... @@ -63,17 +63,6 @@
63 63 #define DEFAULT_FIQ MODE_FIQ
64 64  
65 65 /*
66   - * LOADREGS - ldm with PC in register list (eg, ldmfd sp!, {pc})
67   - */
68   -#ifdef __STDC__
69   -#define LOADREGS(cond, base, reglist...)\
70   - ldm##cond base,reglist
71   -#else
72   -#define LOADREGS(cond, base, reglist...)\
73   - ldm/**/cond base,reglist
74   -#endif
75   -
76   -/*
77 66 * Enable and disable interrupts
78 67 */
79 68 #if __LINUX_ARM_ARCH__ >= 6