ARM: tegra: Remove duplicate code

Remove Tegra legacy clock framework code. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>

ARM: tegra: Remove duplicate code
Remove Tegra legacy clock framework code. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Prashant Gaikwad · Stephen Warren
1 parent 92fe58f07f
Showing 3 changed files with 0 additions and 724 deletions Side-by-side Diff
arch/arm/mach-tegra/clock.c
arch/arm/mach-tegra/clock.h
arch/arm/mach-tegra/common.c
@@ -20,8 +20,6 @@
 #include <linux/kernel.h>
 #include <linux/clk.h>
 #include <linux/clkdev.h>
-#include <linux/debugfs.h>
-#include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/list.h>
 #include <linux/module.h>
  
  
@@ -37,642 +35,13 @@
 /*
  * Locking:
  *
- * Each struct clk has a spinlock.
- *
- * To avoid AB-BA locking problems, locks must always be traversed from child
- * clock to parent clock.  For example, when enabling a clock, the clock's lock
- * is taken, and then clk_enable is called on the parent, which take's the
- * parent clock's lock.  There is one exceptions to this ordering: When dumping
- * the clock tree through debugfs.  In this case, clk_lock_all is called,
- * which attemps to iterate through the entire list of clocks and take every
- * clock lock.  If any call to spin_trylock fails, all locked clocks are
- * unlocked, and the process is retried.  When all the locks are held,
- * the only clock operation that can be called is clk_get_rate_all_locked.
- *
- * Within a single clock, no clock operation can call another clock operation
- * on itself, except for clk_get_rate_locked and clk_set_rate_locked.  Any
- * clock operation can call any other clock operation on any of it's possible
- * parents.
- *
  * An additional mutex, clock_list_lock, is used to protect the list of all
  * clocks.
  *
- * The clock operations must lock internally to protect against
- * read-modify-write on registers that are shared by multiple clocks
  */
 static DEFINE_MUTEX(clock_list_lock);
 static LIST_HEAD(clocks);
  
-#ifndef CONFIG_COMMON_CLK
-struct clk *tegra_get_clock_by_name(const char *name)
-{
-	struct clk *c;
-	struct clk *ret = NULL;
-	mutex_lock(&clock_list_lock);
-	list_for_each_entry(c, &clocks, node) {
-		if (strcmp(c->name, name) == 0) {
-			ret = c;
-			break;
-		}
-	}
-	mutex_unlock(&clock_list_lock);
-	return ret;
-}
-
-/* Must be called with c->spinlock held */
-static unsigned long clk_predict_rate_from_parent(struct clk *c, struct clk *p)
-{
-	u64 rate;
-
-	rate = clk_get_rate(p);
-
-	if (c->mul != 0 && c->div != 0) {
-		rate *= c->mul;
-		rate += c->div - 1; /* round up */
-		do_div(rate, c->div);
-	}
-
-	return rate;
-}
-
-/* Must be called with c->spinlock held */
-unsigned long clk_get_rate_locked(struct clk *c)
-{
-	unsigned long rate;
-
-	if (c->parent)
-		rate = clk_predict_rate_from_parent(c, c->parent);
-	else
-		rate = c->rate;
-
-	return rate;
-}
-
-unsigned long clk_get_rate(struct clk *c)
-{
-	unsigned long flags;
-	unsigned long rate;
-
-	spin_lock_irqsave(&c->spinlock, flags);
-
-	rate = clk_get_rate_locked(c);
-
-	spin_unlock_irqrestore(&c->spinlock, flags);
-
-	return rate;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-int clk_reparent(struct clk *c, struct clk *parent)
-{
-	c->parent = parent;
-	return 0;
-}
-
-void clk_init(struct clk *c)
-{
-	spin_lock_init(&c->spinlock);
-
-	if (c->ops && c->ops->init)
-		c->ops->init(c);
-
-	if (!c->ops || !c->ops->enable) {
-		c->refcnt++;
-		c->set = true;
-		if (c->parent)
-			c->state = c->parent->state;
-		else
-			c->state = ON;
-	}
-
-	mutex_lock(&clock_list_lock);
-	list_add(&c->node, &clocks);
-	mutex_unlock(&clock_list_lock);
-}
-
-int clk_enable(struct clk *c)
-{
-	int ret = 0;
-	unsigned long flags;
-
-	spin_lock_irqsave(&c->spinlock, flags);
-
-	if (c->refcnt == 0) {
-		if (c->parent) {
-			ret = clk_enable(c->parent);
-			if (ret)
-				goto out;
-		}
-
-		if (c->ops && c->ops->enable) {
-			ret = c->ops->enable(c);
-			if (ret) {
-				if (c->parent)
-					clk_disable(c->parent);
-				goto out;
-			}
-			c->state = ON;
-			c->set = true;
-		}
-	}
-	c->refcnt++;
-out:
-	spin_unlock_irqrestore(&c->spinlock, flags);
-	return ret;
-}
-EXPORT_SYMBOL(clk_enable);
-
-void clk_disable(struct clk *c)
-{
-	unsigned long flags;
-
-	spin_lock_irqsave(&c->spinlock, flags);
-
-	if (c->refcnt == 0) {
-		WARN(1, "Attempting to disable clock %s with refcnt 0", c->name);
-		spin_unlock_irqrestore(&c->spinlock, flags);
-		return;
-	}
-	if (c->refcnt == 1) {
-		if (c->ops && c->ops->disable)
-			c->ops->disable(c);
-
-		if (c->parent)
-			clk_disable(c->parent);
-
-		c->state = OFF;
-	}
-	c->refcnt--;
-
-	spin_unlock_irqrestore(&c->spinlock, flags);
-}
-EXPORT_SYMBOL(clk_disable);
-
-int clk_set_parent(struct clk *c, struct clk *parent)
-{
-	int ret;
-	unsigned long flags;
-	unsigned long new_rate;
-	unsigned long old_rate;
-
-	spin_lock_irqsave(&c->spinlock, flags);
-
-	if (!c->ops || !c->ops->set_parent) {
-		ret = -ENOSYS;
-		goto out;
-	}
-
-	new_rate = clk_predict_rate_from_parent(c, parent);
-	old_rate = clk_get_rate_locked(c);
-
-	ret = c->ops->set_parent(c, parent);
-	if (ret)
-		goto out;
-
-out:
-	spin_unlock_irqrestore(&c->spinlock, flags);
-	return ret;
-}
-EXPORT_SYMBOL(clk_set_parent);
-
-struct clk *clk_get_parent(struct clk *c)
-{
-	return c->parent;
-}
-EXPORT_SYMBOL(clk_get_parent);
-
-int clk_set_rate_locked(struct clk *c, unsigned long rate)
-{
-	long new_rate;
-
-	if (!c->ops || !c->ops->set_rate)
-		return -ENOSYS;
-
-	if (rate > c->max_rate)
-		rate = c->max_rate;
-
-	if (c->ops && c->ops->round_rate) {
-		new_rate = c->ops->round_rate(c, rate);
-
-		if (new_rate < 0)
-			return new_rate;
-
-		rate = new_rate;
-	}
-
-	return c->ops->set_rate(c, rate);
-}
-
-int clk_set_rate(struct clk *c, unsigned long rate)
-{
-	int ret;
-	unsigned long flags;
-
-	spin_lock_irqsave(&c->spinlock, flags);
-
-	ret = clk_set_rate_locked(c, rate);
-
-	spin_unlock_irqrestore(&c->spinlock, flags);
-
-	return ret;
-}
-EXPORT_SYMBOL(clk_set_rate);
-
-
-/* Must be called with clocks lock and all indvidual clock locks held */
-unsigned long clk_get_rate_all_locked(struct clk *c)
-{
-	u64 rate;
-	int mul = 1;
-	int div = 1;
-	struct clk *p = c;
-
-	while (p) {
-		c = p;
-		if (c->mul != 0 && c->div != 0) {
-			mul *= c->mul;
-			div *= c->div;
-		}
-		p = c->parent;
-	}
-
-	rate = c->rate;
-	rate *= mul;
-	do_div(rate, div);
-
-	return rate;
-}
-
-long clk_round_rate(struct clk *c, unsigned long rate)
-{
-	unsigned long flags;
-	long ret;
-
-	spin_lock_irqsave(&c->spinlock, flags);
-
-	if (!c->ops || !c->ops->round_rate) {
-		ret = -ENOSYS;
-		goto out;
-	}
-
-	if (rate > c->max_rate)
-		rate = c->max_rate;
-
-	ret = c->ops->round_rate(c, rate);
-
-out:
-	spin_unlock_irqrestore(&c->spinlock, flags);
-	return ret;
-}
-EXPORT_SYMBOL(clk_round_rate);
-
-static int tegra_clk_init_one_from_table(struct tegra_clk_init_table *table)
-{
-	struct clk *c;
-	struct clk *p;
-
-	int ret = 0;
-
-	c = tegra_get_clock_by_name(table->name);
-
-	if (!c) {
-		pr_warning("Unable to initialize clock %s\n",
-			table->name);
-		return -ENODEV;
-	}
-
-	if (table->parent) {
-		p = tegra_get_clock_by_name(table->parent);
-		if (!p) {
-			pr_warning("Unable to find parent %s of clock %s\n",
-				table->parent, table->name);
-			return -ENODEV;
-		}
-
-		if (c->parent != p) {
-			ret = clk_set_parent(c, p);
-			if (ret) {
-				pr_warning("Unable to set parent %s of clock %s: %d\n",
-					table->parent, table->name, ret);
-				return -EINVAL;
-			}
-		}
-	}
-
-	if (table->rate && table->rate != clk_get_rate(c)) {
-		ret = clk_set_rate(c, table->rate);
-		if (ret) {
-			pr_warning("Unable to set clock %s to rate %lu: %d\n",
-				table->name, table->rate, ret);
-			return -EINVAL;
-		}
-	}
-
-	if (table->enabled) {
-		ret = clk_enable(c);
-		if (ret) {
-			pr_warning("Unable to enable clock %s: %d\n",
-				table->name, ret);
-			return -EINVAL;
-		}
-	}
-
-	return 0;
-}
-
-void tegra_clk_init_from_table(struct tegra_clk_init_table *table)
-{
-	for (; table->name; table++)
-		tegra_clk_init_one_from_table(table);
-}
-EXPORT_SYMBOL(tegra_clk_init_from_table);
-
-void tegra_periph_reset_deassert(struct clk *c)
-{
-	BUG_ON(!c->ops->reset);
-	c->ops->reset(c, false);
-}
-EXPORT_SYMBOL(tegra_periph_reset_deassert);
-
-void tegra_periph_reset_assert(struct clk *c)
-{
-	BUG_ON(!c->ops->reset);
-	c->ops->reset(c, true);
-}
-EXPORT_SYMBOL(tegra_periph_reset_assert);
-
-/* Several extended clock configuration bits (e.g., clock routing, clock
- * phase control) are included in PLL and peripheral clock source
- * registers. */
-int tegra_clk_cfg_ex(struct clk *c, enum tegra_clk_ex_param p, u32 setting)
-{
-	int ret = 0;
-	unsigned long flags;
-
-	spin_lock_irqsave(&c->spinlock, flags);
-
-	if (!c->ops || !c->ops->clk_cfg_ex) {
-		ret = -ENOSYS;
-		goto out;
-	}
-	ret = c->ops->clk_cfg_ex(c, p, setting);
-
-out:
-	spin_unlock_irqrestore(&c->spinlock, flags);
-
-	return ret;
-}
-
-#ifdef CONFIG_DEBUG_FS
-
-static int __clk_lock_all_spinlocks(void)
-{
-	struct clk *c;
-
-	list_for_each_entry(c, &clocks, node)
-		if (!spin_trylock(&c->spinlock))
-			goto unlock_spinlocks;
-
-	return 0;
-
-unlock_spinlocks:
-	list_for_each_entry_continue_reverse(c, &clocks, node)
-		spin_unlock(&c->spinlock);
-
-	return -EAGAIN;
-}
-
-static void __clk_unlock_all_spinlocks(void)
-{
-	struct clk *c;
-
-	list_for_each_entry_reverse(c, &clocks, node)
-		spin_unlock(&c->spinlock);
-}
-
-/*
- * This function retries until it can take all locks, and may take
- * an arbitrarily long time to complete.
- * Must be called with irqs enabled, returns with irqs disabled
- * Must be called with clock_list_lock held
- */
-static void clk_lock_all(void)
-{
-	int ret;
-retry:
-	local_irq_disable();
-
-	ret = __clk_lock_all_spinlocks();
-	if (ret)
-		goto failed_spinlocks;
-
-	/* All locks taken successfully, return */
-	return;
-
-failed_spinlocks:
-	local_irq_enable();
-	yield();
-	goto retry;
-}
-
-/*
- * Unlocks all clocks after a clk_lock_all
- * Must be called with irqs disabled, returns with irqs enabled
- * Must be called with clock_list_lock held
- */
-static void clk_unlock_all(void)
-{
-	__clk_unlock_all_spinlocks();
-
-	local_irq_enable();
-}
-
-static struct dentry *clk_debugfs_root;
-
-
-static void clock_tree_show_one(struct seq_file *s, struct clk *c, int level)
-{
-	struct clk *child;
-	const char *state = "uninit";
-	char div[8] = {0};
-
-	if (c->state == ON)
-		state = "on";
-	else if (c->state == OFF)
-		state = "off";
-
-	if (c->mul != 0 && c->div != 0) {
-		if (c->mul > c->div) {
-			int mul = c->mul / c->div;
-			int mul2 = (c->mul * 10 / c->div) % 10;
-			int mul3 = (c->mul * 10) % c->div;
-			if (mul2 == 0 && mul3 == 0)
-				snprintf(div, sizeof(div), "x%d", mul);
-			else if (mul3 == 0)
-				snprintf(div, sizeof(div), "x%d.%d", mul, mul2);
-			else
-				snprintf(div, sizeof(div), "x%d.%d..", mul, mul2);
-		} else {
-			snprintf(div, sizeof(div), "%d%s", c->div / c->mul,
-				(c->div % c->mul) ? ".5" : "");
-		}
-	}
-
-	seq_printf(s, "%*s%c%c%-*s %-6s %-3d %-8s %-10lu\n",
-		level * 3 + 1, "",
-		c->rate > c->max_rate ? '!' : ' ',
-		!c->set ? '*' : ' ',
-		30 - level * 3, c->name,
-		state, c->refcnt, div, clk_get_rate_all_locked(c));
-
-	list_for_each_entry(child, &clocks, node) {
-		if (child->parent != c)
-			continue;
-
-		clock_tree_show_one(s, child, level + 1);
-	}
-}
-
-static int clock_tree_show(struct seq_file *s, void *data)
-{
-	struct clk *c;
-	seq_printf(s, "   clock                          state  ref div      rate\n");
-	seq_printf(s, "--------------------------------------------------------------\n");
-
-	mutex_lock(&clock_list_lock);
-
-	clk_lock_all();
-
-	list_for_each_entry(c, &clocks, node)
-		if (c->parent == NULL)
-			clock_tree_show_one(s, c, 0);
-
-	clk_unlock_all();
-
-	mutex_unlock(&clock_list_lock);
-	return 0;
-}
-
-static int clock_tree_open(struct inode *inode, struct file *file)
-{
-	return single_open(file, clock_tree_show, inode->i_private);
-}
-
-static const struct file_operations clock_tree_fops = {
-	.open		= clock_tree_open,
-	.read		= seq_read,
-	.llseek		= seq_lseek,
-	.release	= single_release,
-};
-
-static int possible_parents_show(struct seq_file *s, void *data)
-{
-	struct clk *c = s->private;
-	int i;
-
-	for (i = 0; c->inputs[i].input; i++) {
-		char *first = (i == 0) ? "" : " ";
-		seq_printf(s, "%s%s", first, c->inputs[i].input->name);
-	}
-	seq_printf(s, "\n");
-	return 0;
-}
-
-static int possible_parents_open(struct inode *inode, struct file *file)
-{
-	return single_open(file, possible_parents_show, inode->i_private);
-}
-
-static const struct file_operations possible_parents_fops = {
-	.open		= possible_parents_open,
-	.read		= seq_read,
-	.llseek		= seq_lseek,
-	.release	= single_release,
-};
-
-static int clk_debugfs_register_one(struct clk *c)
-{
-	struct dentry *d;
-
-	d = debugfs_create_dir(c->name, clk_debugfs_root);
-	if (!d)
-		return -ENOMEM;
-	c->dent = d;
-
-	d = debugfs_create_u8("refcnt", S_IRUGO, c->dent, (u8 *)&c->refcnt);
-	if (!d)
-		goto err_out;
-
-	d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
-	if (!d)
-		goto err_out;
-
-	d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
-	if (!d)
-		goto err_out;
-
-	if (c->inputs) {
-		d = debugfs_create_file("possible_parents", S_IRUGO, c->dent,
-			c, &possible_parents_fops);
-		if (!d)
-			goto err_out;
-	}
-
-	return 0;
-
-err_out:
-	debugfs_remove_recursive(c->dent);
-	return -ENOMEM;
-}
-
-static int clk_debugfs_register(struct clk *c)
-{
-	int err;
-	struct clk *pa = c->parent;
-
-	if (pa && !pa->dent) {
-		err = clk_debugfs_register(pa);
-		if (err)
-			return err;
-	}
-
-	if (!c->dent) {
-		err = clk_debugfs_register_one(c);
-		if (err)
-			return err;
-	}
-	return 0;
-}
-
-int __init tegra_clk_debugfs_init(void)
-{
-	struct clk *c;
-	struct dentry *d;
-	int err = -ENOMEM;
-
-	d = debugfs_create_dir("clock", NULL);
-	if (!d)
-		return -ENOMEM;
-	clk_debugfs_root = d;
-
-	d = debugfs_create_file("clock_tree", S_IRUGO, clk_debugfs_root, NULL,
-		&clock_tree_fops);
-	if (!d)
-		goto err_out;
-
-	list_for_each_entry(c, &clocks, node) {
-		err = clk_debugfs_register(c);
-		if (err)
-			goto err_out;
-	}
-	return 0;
-err_out:
-	debugfs_remove_recursive(clk_debugfs_root);
-	return err;
-}
-#endif
-#else
-
 void tegra_clk_add(struct clk *clk)
 {
 	struct clk_tegra *c = to_clk_tegra(__clk_get_hw(clk));
@@ -793,5 +162,4 @@
 out:
 	return ret;
 }
-#endif /* !CONFIG_COMMON_CLK */
@@ -24,7 +24,6 @@
 #include <linux/clk-provider.h>
 #include <linux/clkdev.h>
 #include <linux/list.h>
-#include <linux/spinlock.h>
  
 #include <mach/clk.h>
  
  
@@ -54,12 +53,8 @@
 #define ENABLE_ON_INIT		(1 << 28)
 #define PERIPH_ON_APB           (1 << 29)
  
-struct clk;
-
-#ifdef CONFIG_COMMON_CLK
 struct clk_tegra;
 #define to_clk_tegra(_hw) container_of(_hw, struct clk_tegra, hw)
-#endif
  
 struct clk_mux_sel {
 	struct clk	*input;
@@ -81,82 +76,6 @@
 	OFF,
 };
  
-#ifndef CONFIG_COMMON_CLK
-struct clk_ops {
-	void		(*init)(struct clk *);
-	int		(*enable)(struct clk *);
-	void		(*disable)(struct clk *);
-	int		(*set_parent)(struct clk *, struct clk *);
-	int		(*set_rate)(struct clk *, unsigned long);
-	long		(*round_rate)(struct clk *, unsigned long);
-	void		(*reset)(struct clk *, bool);
-	int		(*clk_cfg_ex)(struct clk *,
-				enum tegra_clk_ex_param, u32);
-};
-
-struct clk {
-	/* node for master clocks list */
-	struct list_head	node;		/* node for list of all clocks */
-	struct clk_lookup	lookup;
-
-#ifdef CONFIG_DEBUG_FS
-	struct dentry		*dent;
-#endif
-	bool			set;
-	struct clk_ops		*ops;
-	unsigned long		rate;
-	unsigned long		max_rate;
-	unsigned long		min_rate;
-	u32			flags;
-	const char		*name;
-
-	u32			refcnt;
-	enum clk_state		state;
-	struct clk		*parent;
-	u32			div;
-	u32			mul;
-
-	const struct clk_mux_sel	*inputs;
-	u32				reg;
-	u32				reg_shift;
-
-	struct list_head		shared_bus_list;
-
-	union {
-		struct {
-			unsigned int			clk_num;
-		} periph;
-		struct {
-			unsigned long			input_min;
-			unsigned long			input_max;
-			unsigned long			cf_min;
-			unsigned long			cf_max;
-			unsigned long			vco_min;
-			unsigned long			vco_max;
-			const struct clk_pll_freq_table	*freq_table;
-			int				lock_delay;
-			unsigned long			fixed_rate;
-		} pll;
-		struct {
-			u32				sel;
-			u32				reg_mask;
-		} mux;
-		struct {
-			struct clk			*main;
-			struct clk			*backup;
-		} cpu;
-		struct {
-			struct list_head		node;
-			bool				enabled;
-			unsigned long			rate;
-		} shared_bus_user;
-	} u;
-
-	spinlock_t spinlock;
-};
-
-#else
-
 struct clk_tegra {
 	/* node for master clocks list */
 	struct list_head	node;	/* node for list of all clocks */
@@ -212,7 +131,6 @@
 	void (*reset)(struct clk_hw *, bool);
 	int (*clk_cfg_ex)(struct clk_hw *, enum tegra_clk_ex_param, u32);
 };
-#endif /* !CONFIG_COMMON_CLK */
  
 struct clk_duplicate {
 	const char *name;
@@ -225,13 +143,6 @@
 	unsigned long rate;
 	bool enabled;
 };
-
-#ifndef CONFIG_COMMON_CLK
-void clk_init(struct clk *clk);
-unsigned long clk_get_rate_locked(struct clk *c);
-int clk_set_rate_locked(struct clk *c, unsigned long rate);
-int clk_reparent(struct clk *c, struct clk *parent);
-#endif /* !CONFIG_COMMON_CLK */
  
 void tegra_clk_add(struct clk *c);
 void tegra2_init_clocks(void);
@@ -152,9 +152,6 @@
  
 void __init tegra_init_late(void)
 {
-#ifndef CONFIG_COMMON_CLK
-	tegra_clk_debugfs_init();
-#endif
 	tegra_powergate_debugfs_init();
 }
...	...	@@ -20,8 +20,6 @@
20	20	#include <linux/kernel.h>
21	21	#include <linux/clk.h>
22	22	#include <linux/clkdev.h>
23		-#include <linux/debugfs.h>
24		-#include <linux/delay.h>
25	23	#include <linux/init.h>
26	24	#include <linux/list.h>
27	25	#include <linux/module.h>
28	26
29	27
...	...	@@ -37,642 +35,13 @@
37	35	/*
38	36	* Locking:
39	37	*
40		- * Each struct clk has a spinlock.
41		- *
42		- * To avoid AB-BA locking problems, locks must always be traversed from child
43		- * clock to parent clock. For example, when enabling a clock, the clock's lock
44		- * is taken, and then clk_enable is called on the parent, which take's the
45		- * parent clock's lock. There is one exceptions to this ordering: When dumping
46		- * the clock tree through debugfs. In this case, clk_lock_all is called,
47		- * which attemps to iterate through the entire list of clocks and take every
48		- * clock lock. If any call to spin_trylock fails, all locked clocks are
49		- * unlocked, and the process is retried. When all the locks are held,
50		- * the only clock operation that can be called is clk_get_rate_all_locked.
51		- *
52		- * Within a single clock, no clock operation can call another clock operation
53		- * on itself, except for clk_get_rate_locked and clk_set_rate_locked. Any
54		- * clock operation can call any other clock operation on any of it's possible
55		- * parents.
56		- *
57	38	* An additional mutex, clock_list_lock, is used to protect the list of all
58	39	* clocks.
59	40	*
60		- * The clock operations must lock internally to protect against
61		- * read-modify-write on registers that are shared by multiple clocks
62	41	*/
63	42	static DEFINE_MUTEX(clock_list_lock);
64	43	static LIST_HEAD(clocks);
65	44
66		-#ifndef CONFIG_COMMON_CLK
67		-struct clk tegra_get_clock_by_name(const char name)
68		-{
69		- struct clk *c;
70		- struct clk *ret = NULL;
71		- mutex_lock(&clock_list_lock);
72		- list_for_each_entry(c, &clocks, node) {
73		- if (strcmp(c->name, name) == 0) {
74		- ret = c;
75		- break;
76		- }
77		- }
78		- mutex_unlock(&clock_list_lock);
79		- return ret;
80		-}
81		-
82		-/* Must be called with c->spinlock held */
83		-static unsigned long clk_predict_rate_from_parent(struct clk c, struct clk p)
84		-{
85		- u64 rate;
86		-
87		- rate = clk_get_rate(p);
88		-
89		- if (c->mul != 0 && c->div != 0) {
90		- rate *= c->mul;
91		- rate += c->div - 1; /* round up */
92		- do_div(rate, c->div);
93		- }
94		-
95		- return rate;
96		-}
97		-
98		-/* Must be called with c->spinlock held */
99		-unsigned long clk_get_rate_locked(struct clk *c)
100		-{
101		- unsigned long rate;
102		-
103		- if (c->parent)
104		- rate = clk_predict_rate_from_parent(c, c->parent);
105		- else
106		- rate = c->rate;
107		-
108		- return rate;
109		-}
110		-
111		-unsigned long clk_get_rate(struct clk *c)
112		-{
113		- unsigned long flags;
114		- unsigned long rate;
115		-
116		- spin_lock_irqsave(&c->spinlock, flags);
117		-
118		- rate = clk_get_rate_locked(c);
119		-
120		- spin_unlock_irqrestore(&c->spinlock, flags);
121		-
122		- return rate;
123		-}
124		-EXPORT_SYMBOL(clk_get_rate);
125		-
126		-int clk_reparent(struct clk c, struct clk parent)
127		-{
128		- c->parent = parent;
129		- return 0;
130		-}
131		-
132		-void clk_init(struct clk *c)
133		-{
134		- spin_lock_init(&c->spinlock);
135		-
136		- if (c->ops && c->ops->init)
137		- c->ops->init(c);
138		-
139		- if (!c->ops \|\| !c->ops->enable) {
140		- c->refcnt++;
141		- c->set = true;
142		- if (c->parent)
143		- c->state = c->parent->state;
144		- else
145		- c->state = ON;
146		- }
147		-
148		- mutex_lock(&clock_list_lock);
149		- list_add(&c->node, &clocks);
150		- mutex_unlock(&clock_list_lock);
151		-}
152		-
153		-int clk_enable(struct clk *c)
154		-{
155		- int ret = 0;
156		- unsigned long flags;
157		-
158		- spin_lock_irqsave(&c->spinlock, flags);
159		-
160		- if (c->refcnt == 0) {
161		- if (c->parent) {
162		- ret = clk_enable(c->parent);
163		- if (ret)
164		- goto out;
165		- }
166		-
167		- if (c->ops && c->ops->enable) {
168		- ret = c->ops->enable(c);
169		- if (ret) {
170		- if (c->parent)
171		- clk_disable(c->parent);
172		- goto out;
173		- }
174		- c->state = ON;
175		- c->set = true;
176		- }
177		- }
178		- c->refcnt++;
179		-out:
180		- spin_unlock_irqrestore(&c->spinlock, flags);
181		- return ret;
182		-}
183		-EXPORT_SYMBOL(clk_enable);
184		-
185		-void clk_disable(struct clk *c)
186		-{
187		- unsigned long flags;
188		-
189		- spin_lock_irqsave(&c->spinlock, flags);
190		-
191		- if (c->refcnt == 0) {
192		- WARN(1, "Attempting to disable clock %s with refcnt 0", c->name);
193		- spin_unlock_irqrestore(&c->spinlock, flags);
194		- return;
195		- }
196		- if (c->refcnt == 1) {
197		- if (c->ops && c->ops->disable)
198		- c->ops->disable(c);
199		-
200		- if (c->parent)
201		- clk_disable(c->parent);
202		-
203		- c->state = OFF;
204		- }
205		- c->refcnt--;
206		-
207		- spin_unlock_irqrestore(&c->spinlock, flags);
208		-}
209		-EXPORT_SYMBOL(clk_disable);
210		-
211		-int clk_set_parent(struct clk c, struct clk parent)
212		-{
213		- int ret;
214		- unsigned long flags;
215		- unsigned long new_rate;
216		- unsigned long old_rate;
217		-
218		- spin_lock_irqsave(&c->spinlock, flags);
219		-
220		- if (!c->ops \|\| !c->ops->set_parent) {
221		- ret = -ENOSYS;
222		- goto out;
223		- }
224		-
225		- new_rate = clk_predict_rate_from_parent(c, parent);
226		- old_rate = clk_get_rate_locked(c);
227		-
228		- ret = c->ops->set_parent(c, parent);
229		- if (ret)
230		- goto out;
231		-
232		-out:
233		- spin_unlock_irqrestore(&c->spinlock, flags);
234		- return ret;
235		-}
236		-EXPORT_SYMBOL(clk_set_parent);
237		-
238		-struct clk clk_get_parent(struct clk c)
239		-{
240		- return c->parent;
241		-}
242		-EXPORT_SYMBOL(clk_get_parent);
243		-
244		-int clk_set_rate_locked(struct clk *c, unsigned long rate)
245		-{
246		- long new_rate;
247		-
248		- if (!c->ops \|\| !c->ops->set_rate)
249		- return -ENOSYS;
250		-
251		- if (rate > c->max_rate)
252		- rate = c->max_rate;
253		-
254		- if (c->ops && c->ops->round_rate) {
255		- new_rate = c->ops->round_rate(c, rate);
256		-
257		- if (new_rate < 0)
258		- return new_rate;
259		-
260		- rate = new_rate;
261		- }
262		-
263		- return c->ops->set_rate(c, rate);
264		-}
265		-
266		-int clk_set_rate(struct clk *c, unsigned long rate)
267		-{
268		- int ret;
269		- unsigned long flags;
270		-
271		- spin_lock_irqsave(&c->spinlock, flags);
272		-
273		- ret = clk_set_rate_locked(c, rate);
274		-
275		- spin_unlock_irqrestore(&c->spinlock, flags);
276		-
277		- return ret;
278		-}
279		-EXPORT_SYMBOL(clk_set_rate);
280		-
281		-
282		-/* Must be called with clocks lock and all indvidual clock locks held */
283		-unsigned long clk_get_rate_all_locked(struct clk *c)
284		-{
285		- u64 rate;
286		- int mul = 1;
287		- int div = 1;
288		- struct clk *p = c;
289		-
290		- while (p) {
291		- c = p;
292		- if (c->mul != 0 && c->div != 0) {
293		- mul *= c->mul;
294		- div *= c->div;
295		- }
296		- p = c->parent;
297		- }
298		-
299		- rate = c->rate;
300		- rate *= mul;
301		- do_div(rate, div);
302		-
303		- return rate;
304		-}
305		-
306		-long clk_round_rate(struct clk *c, unsigned long rate)
307		-{
308		- unsigned long flags;
309		- long ret;
310		-
311		- spin_lock_irqsave(&c->spinlock, flags);
312		-
313		- if (!c->ops \|\| !c->ops->round_rate) {
314		- ret = -ENOSYS;
315		- goto out;
316		- }
317		-
318		- if (rate > c->max_rate)
319		- rate = c->max_rate;
320		-
321		- ret = c->ops->round_rate(c, rate);
322		-
323		-out:
324		- spin_unlock_irqrestore(&c->spinlock, flags);
325		- return ret;
326		-}
327		-EXPORT_SYMBOL(clk_round_rate);
328		-
329		-static int tegra_clk_init_one_from_table(struct tegra_clk_init_table *table)
330		-{
331		- struct clk *c;
332		- struct clk *p;
333		-
334		- int ret = 0;
335		-
336		- c = tegra_get_clock_by_name(table->name);
337		-
338		- if (!c) {
339		- pr_warning("Unable to initialize clock %s\n",
340		- table->name);
341		- return -ENODEV;
342		- }
343		-
344		- if (table->parent) {
345		- p = tegra_get_clock_by_name(table->parent);
346		- if (!p) {
347		- pr_warning("Unable to find parent %s of clock %s\n",
348		- table->parent, table->name);
349		- return -ENODEV;
350		- }
351		-
352		- if (c->parent != p) {
353		- ret = clk_set_parent(c, p);
354		- if (ret) {
355		- pr_warning("Unable to set parent %s of clock %s: %d\n",
356		- table->parent, table->name, ret);
357		- return -EINVAL;
358		- }
359		- }
360		- }
361		-
362		- if (table->rate && table->rate != clk_get_rate(c)) {
363		- ret = clk_set_rate(c, table->rate);
364		- if (ret) {
365		- pr_warning("Unable to set clock %s to rate %lu: %d\n",
366		- table->name, table->rate, ret);
367		- return -EINVAL;
368		- }
369		- }
370		-
371		- if (table->enabled) {
372		- ret = clk_enable(c);
373		- if (ret) {
374		- pr_warning("Unable to enable clock %s: %d\n",
375		- table->name, ret);
376		- return -EINVAL;
377		- }
378		- }
379		-
380		- return 0;
381		-}
382		-
383		-void tegra_clk_init_from_table(struct tegra_clk_init_table *table)
384		-{
385		- for (; table->name; table++)
386		- tegra_clk_init_one_from_table(table);
387		-}
388		-EXPORT_SYMBOL(tegra_clk_init_from_table);
389		-
390		-void tegra_periph_reset_deassert(struct clk *c)
391		-{
392		- BUG_ON(!c->ops->reset);
393		- c->ops->reset(c, false);
394		-}
395		-EXPORT_SYMBOL(tegra_periph_reset_deassert);
396		-
397		-void tegra_periph_reset_assert(struct clk *c)
398		-{
399		- BUG_ON(!c->ops->reset);
400		- c->ops->reset(c, true);
401		-}
402		-EXPORT_SYMBOL(tegra_periph_reset_assert);
403		-
404		-/* Several extended clock configuration bits (e.g., clock routing, clock
405		- * phase control) are included in PLL and peripheral clock source
406		- * registers. */
407		-int tegra_clk_cfg_ex(struct clk *c, enum tegra_clk_ex_param p, u32 setting)
408		-{
409		- int ret = 0;
410		- unsigned long flags;
411		-
412		- spin_lock_irqsave(&c->spinlock, flags);
413		-
414		- if (!c->ops \|\| !c->ops->clk_cfg_ex) {
415		- ret = -ENOSYS;
416		- goto out;
417		- }
418		- ret = c->ops->clk_cfg_ex(c, p, setting);
419		-
420		-out:
421		- spin_unlock_irqrestore(&c->spinlock, flags);
422		-
423		- return ret;
424		-}
425		-
426		-#ifdef CONFIG_DEBUG_FS
427		-
428		-static int __clk_lock_all_spinlocks(void)
429		-{
430		- struct clk *c;
431		-
432		- list_for_each_entry(c, &clocks, node)
433		- if (!spin_trylock(&c->spinlock))
434		- goto unlock_spinlocks;
435		-
436		- return 0;
437		-
438		-unlock_spinlocks:
439		- list_for_each_entry_continue_reverse(c, &clocks, node)
440		- spin_unlock(&c->spinlock);
441		-
442		- return -EAGAIN;
443		-}
444		-
445		-static void __clk_unlock_all_spinlocks(void)
446		-{
447		- struct clk *c;
448		-
449		- list_for_each_entry_reverse(c, &clocks, node)
450		- spin_unlock(&c->spinlock);
451		-}
452		-
453		-/*
454		- * This function retries until it can take all locks, and may take
455		- * an arbitrarily long time to complete.
456		- * Must be called with irqs enabled, returns with irqs disabled
457		- * Must be called with clock_list_lock held
458		- */
459		-static void clk_lock_all(void)
460		-{
461		- int ret;
462		-retry:
463		- local_irq_disable();
464		-
465		- ret = __clk_lock_all_spinlocks();
466		- if (ret)
467		- goto failed_spinlocks;
468		-
469		- /* All locks taken successfully, return */
470		- return;
471		-
472		-failed_spinlocks:
473		- local_irq_enable();
474		- yield();
475		- goto retry;
476		-}
477		-
478		-/*
479		- * Unlocks all clocks after a clk_lock_all
480		- * Must be called with irqs disabled, returns with irqs enabled
481		- * Must be called with clock_list_lock held
482		- */
483		-static void clk_unlock_all(void)
484		-{
485		- __clk_unlock_all_spinlocks();
486		-
487		- local_irq_enable();
488		-}
489		-
490		-static struct dentry *clk_debugfs_root;
491		-
492		-
493		-static void clock_tree_show_one(struct seq_file s, struct clk c, int level)
494		-{
495		- struct clk *child;
496		- const char *state = "uninit";
497		- char div[8] = {0};
498		-
499		- if (c->state == ON)
500		- state = "on";
501		- else if (c->state == OFF)
502		- state = "off";
503		-
504		- if (c->mul != 0 && c->div != 0) {
505		- if (c->mul > c->div) {
506		- int mul = c->mul / c->div;
507		- int mul2 = (c->mul * 10 / c->div) % 10;
508		- int mul3 = (c->mul * 10) % c->div;
509		- if (mul2 == 0 && mul3 == 0)
510		- snprintf(div, sizeof(div), "x%d", mul);
511		- else if (mul3 == 0)
512		- snprintf(div, sizeof(div), "x%d.%d", mul, mul2);
513		- else
514		- snprintf(div, sizeof(div), "x%d.%d..", mul, mul2);
515		- } else {
516		- snprintf(div, sizeof(div), "%d%s", c->div / c->mul,
517		- (c->div % c->mul) ? ".5" : "");
518		- }
519		- }
520		-
521		- seq_printf(s, "%s%c%c%-s %-6s %-3d %-8s %-10lu\n",
522		- level * 3 + 1, "",
523		- c->rate > c->max_rate ? '!' : ' ',
524		- !c->set ? '*' : ' ',
525		- 30 - level * 3, c->name,
526		- state, c->refcnt, div, clk_get_rate_all_locked(c));
527		-
528		- list_for_each_entry(child, &clocks, node) {
529		- if (child->parent != c)
530		- continue;
531		-
532		- clock_tree_show_one(s, child, level + 1);
533		- }
534		-}
535		-
536		-static int clock_tree_show(struct seq_file s, void data)
537		-{
538		- struct clk *c;
539		- seq_printf(s, " clock state ref div rate\n");
540		- seq_printf(s, "--------------------------------------------------------------\n");
541		-
542		- mutex_lock(&clock_list_lock);
543		-
544		- clk_lock_all();
545		-
546		- list_for_each_entry(c, &clocks, node)
547		- if (c->parent == NULL)
548		- clock_tree_show_one(s, c, 0);
549		-
550		- clk_unlock_all();
551		-
552		- mutex_unlock(&clock_list_lock);
553		- return 0;
554		-}
555		-
556		-static int clock_tree_open(struct inode inode, struct file file)
557		-{
558		- return single_open(file, clock_tree_show, inode->i_private);
559		-}
560		-
561		-static const struct file_operations clock_tree_fops = {
562		- .open = clock_tree_open,
563		- .read = seq_read,
564		- .llseek = seq_lseek,
565		- .release = single_release,
566		-};
567		-
568		-static int possible_parents_show(struct seq_file s, void data)
569		-{
570		- struct clk *c = s->private;
571		- int i;
572		-
573		- for (i = 0; c->inputs[i].input; i++) {
574		- char *first = (i == 0) ? "" : " ";
575		- seq_printf(s, "%s%s", first, c->inputs[i].input->name);
576		- }
577		- seq_printf(s, "\n");
578		- return 0;
579		-}
580		-
581		-static int possible_parents_open(struct inode inode, struct file file)
582		-{
583		- return single_open(file, possible_parents_show, inode->i_private);
584		-}
585		-
586		-static const struct file_operations possible_parents_fops = {
587		- .open = possible_parents_open,
588		- .read = seq_read,
589		- .llseek = seq_lseek,
590		- .release = single_release,
591		-};
592		-
593		-static int clk_debugfs_register_one(struct clk *c)
594		-{
595		- struct dentry *d;
596		-
597		- d = debugfs_create_dir(c->name, clk_debugfs_root);
598		- if (!d)
599		- return -ENOMEM;
600		- c->dent = d;
601		-
602		- d = debugfs_create_u8("refcnt", S_IRUGO, c->dent, (u8 *)&c->refcnt);
603		- if (!d)
604		- goto err_out;
605		-
606		- d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
607		- if (!d)
608		- goto err_out;
609		-
610		- d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
611		- if (!d)
612		- goto err_out;
613		-
614		- if (c->inputs) {
615		- d = debugfs_create_file("possible_parents", S_IRUGO, c->dent,
616		- c, &possible_parents_fops);
617		- if (!d)
618		- goto err_out;
619		- }
620		-
621		- return 0;
622		-
623		-err_out:
624		- debugfs_remove_recursive(c->dent);
625		- return -ENOMEM;
626		-}
627		-
628		-static int clk_debugfs_register(struct clk *c)
629		-{
630		- int err;
631		- struct clk *pa = c->parent;
632		-
633		- if (pa && !pa->dent) {
634		- err = clk_debugfs_register(pa);
635		- if (err)
636		- return err;
637		- }
638		-
639		- if (!c->dent) {
640		- err = clk_debugfs_register_one(c);
641		- if (err)
642		- return err;
643		- }
644		- return 0;
645		-}
646		-
647		-int __init tegra_clk_debugfs_init(void)
648		-{
649		- struct clk *c;
650		- struct dentry *d;
651		- int err = -ENOMEM;
652		-
653		- d = debugfs_create_dir("clock", NULL);
654		- if (!d)
655		- return -ENOMEM;
656		- clk_debugfs_root = d;
657		-
658		- d = debugfs_create_file("clock_tree", S_IRUGO, clk_debugfs_root, NULL,
659		- &clock_tree_fops);
660		- if (!d)
661		- goto err_out;
662		-
663		- list_for_each_entry(c, &clocks, node) {
664		- err = clk_debugfs_register(c);
665		- if (err)
666		- goto err_out;
667		- }
668		- return 0;
669		-err_out:
670		- debugfs_remove_recursive(clk_debugfs_root);
671		- return err;
672		-}
673		-#endif
674		-#else
675		-
676	45	void tegra_clk_add(struct clk *clk)
677	46	{
678	47	struct clk_tegra *c = to_clk_tegra(__clk_get_hw(clk));
...	...	@@ -793,5 +162,4 @@
793	162	out:
794	163	return ret;
795	164	}
796		-#endif /* !CONFIG_COMMON_CLK */
...	...	@@ -24,7 +24,6 @@
24	24	#include <linux/clk-provider.h>
25	25	#include <linux/clkdev.h>
26	26	#include <linux/list.h>
27		-#include <linux/spinlock.h>
28	27
29	28	#include <mach/clk.h>
30	29
31	30
...	...	@@ -54,12 +53,8 @@
54	53	#define ENABLE_ON_INIT (1 << 28)
55	54	#define PERIPH_ON_APB (1 << 29)
56	55
57		-struct clk;
58		-
59		-#ifdef CONFIG_COMMON_CLK
60	56	struct clk_tegra;
61	57	#define to_clk_tegra(_hw) container_of(_hw, struct clk_tegra, hw)
62		-#endif
63	58
64	59	struct clk_mux_sel {
65	60	struct clk *input;
...	...	@@ -81,82 +76,6 @@
81	76	OFF,
82	77	};
83	78
84		-#ifndef CONFIG_COMMON_CLK
85		-struct clk_ops {
86		- void (init)(struct clk );
87		- int (enable)(struct clk );
88		- void (disable)(struct clk );
89		- int (set_parent)(struct clk , struct clk *);
90		- int (set_rate)(struct clk , unsigned long);
91		- long (round_rate)(struct clk , unsigned long);
92		- void (reset)(struct clk , bool);
93		- int (clk_cfg_ex)(struct clk ,
94		- enum tegra_clk_ex_param, u32);
95		-};
96		-
97		-struct clk {
98		- /* node for master clocks list */
99		- struct list_head node; /* node for list of all clocks */
100		- struct clk_lookup lookup;
101		-
102		-#ifdef CONFIG_DEBUG_FS
103		- struct dentry *dent;
104		-#endif
105		- bool set;
106		- struct clk_ops *ops;
107		- unsigned long rate;
108		- unsigned long max_rate;
109		- unsigned long min_rate;
110		- u32 flags;
111		- const char *name;
112		-
113		- u32 refcnt;
114		- enum clk_state state;
115		- struct clk *parent;
116		- u32 div;
117		- u32 mul;
118		-
119		- const struct clk_mux_sel *inputs;
120		- u32 reg;
121		- u32 reg_shift;
122		-
123		- struct list_head shared_bus_list;
124		-
125		- union {
126		- struct {
127		- unsigned int clk_num;
128		- } periph;
129		- struct {
130		- unsigned long input_min;
131		- unsigned long input_max;
132		- unsigned long cf_min;
133		- unsigned long cf_max;
134		- unsigned long vco_min;
135		- unsigned long vco_max;
136		- const struct clk_pll_freq_table *freq_table;
137		- int lock_delay;
138		- unsigned long fixed_rate;
139		- } pll;
140		- struct {
141		- u32 sel;
142		- u32 reg_mask;
143		- } mux;
144		- struct {
145		- struct clk *main;
146		- struct clk *backup;
147		- } cpu;
148		- struct {
149		- struct list_head node;
150		- bool enabled;
151		- unsigned long rate;
152		- } shared_bus_user;
153		- } u;
154		-
155		- spinlock_t spinlock;
156		-};
157		-
158		-#else
159		-
160	79	struct clk_tegra {
161	80	/* node for master clocks list */
162	81	struct list_head node; /* node for list of all clocks */
...	...	@@ -212,7 +131,6 @@
212	131	void (reset)(struct clk_hw , bool);
213	132	int (clk_cfg_ex)(struct clk_hw , enum tegra_clk_ex_param, u32);
214	133	};
215		-#endif /* !CONFIG_COMMON_CLK */
216	134
217	135	struct clk_duplicate {
218	136	const char *name;
...	...	@@ -225,13 +143,6 @@
225	143	unsigned long rate;
226	144	bool enabled;
227	145	};
228		-
229		-#ifndef CONFIG_COMMON_CLK
230		-void clk_init(struct clk *clk);
231		-unsigned long clk_get_rate_locked(struct clk *c);
232		-int clk_set_rate_locked(struct clk *c, unsigned long rate);
233		-int clk_reparent(struct clk c, struct clk parent);
234		-#endif /* !CONFIG_COMMON_CLK */
235	146
236	147	void tegra_clk_add(struct clk *c);
237	148	void tegra2_init_clocks(void);
...	...	@@ -152,9 +152,6 @@
152	152
153	153	void __init tegra_init_late(void)
154	154	{
155		-#ifndef CONFIG_COMMON_CLK
156		- tegra_clk_debugfs_init();
157		-#endif
158	155	tegra_powergate_debugfs_init();
159	156	}