Commit 1f37a3a32b86c443396293b1f9d3e23b0a0344e5

Authored by Alexandre Pereira da Silva
Committed by Roland Stigge
1 parent e39942f527

ARM: LPC32xx: Add PWM clock

Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>

Showing 1 changed file with 14 additions and 0 deletions Side-by-side Diff

arch/arm/mach-lpc32xx/clock.c
... ... @@ -607,6 +607,19 @@
607 607 .get_rate = local_return_parent_rate,
608 608 };
609 609  
  610 +static struct clk clk_pwm = {
  611 + .parent = &clk_pclk,
  612 + .enable = local_onoff_enable,
  613 + .enable_reg = LPC32XX_CLKPWR_PWM_CLK_CTRL,
  614 + .enable_mask = LPC32XX_CLKPWR_PWMCLK_PWM1CLK_EN |
  615 + LPC32XX_CLKPWR_PWMCLK_PWM1SEL_PCLK |
  616 + LPC32XX_CLKPWR_PWMCLK_PWM1_DIV(1) |
  617 + LPC32XX_CLKPWR_PWMCLK_PWM2CLK_EN |
  618 + LPC32XX_CLKPWR_PWMCLK_PWM2SEL_PCLK |
  619 + LPC32XX_CLKPWR_PWMCLK_PWM2_DIV(1),
  620 + .get_rate = local_return_parent_rate,
  621 +};
  622 +
610 623 static struct clk clk_uart3 = {
611 624 .parent = &clk_pclk,
612 625 .enable = local_onoff_enable,
... ... @@ -1188,6 +1201,7 @@
1188 1201 CLKDEV_INIT(NULL, "vfp9_ck", &clk_vfp9),
1189 1202 CLKDEV_INIT("pl08xdmac", NULL, &clk_dma),
1190 1203 CLKDEV_INIT("4003c000.watchdog", NULL, &clk_wdt),
  1204 + CLKDEV_INIT("4005c000.pwm", NULL, &clk_pwm),
1191 1205 CLKDEV_INIT(NULL, "uart3_ck", &clk_uart3),
1192 1206 CLKDEV_INIT(NULL, "uart4_ck", &clk_uart4),
1193 1207 CLKDEV_INIT(NULL, "uart5_ck", &clk_uart5),