Commit 22329b511a97557b293583194037d1f4c71e1504

Authored by Brent Casavant
Committed by Linus Torvalds
1 parent e400bae984

[PATCH] ioc4: Core driver rewrite

This series of patches reworks the configuration and internal structure
of the SGI IOC4 I/O controller device drivers.

These changes are motivated by several factors:

- The IOC4 chip PCI resources are of mixed use between functions (i.e.
  multiple functions are handled in the same address range, sometimes
  within the same register), muddling resource ownership and initialization
  issues.  Centralizing this ownership in a core driver is desirable.

- The IOC4 chip implements multiple functions (serial, IDE, others not
  yet implemented in the mainline kernel) but is not a multifunction
  PCI device.  In order to properly handle device addition and removal
  as well as module insertion and deletion, an intermediary IOC4-specific
  driver layer is needed to handle these operations cleanly.

- All IOC4 drivers are currently enabled by a single CONFIG value.  As
  not all systems need all IOC4 functions, it is desireable to enable
  these drivers independently.

- The current IOC4 core driver will trigger loading of all function-level
  drivers, as it makes direct calls to them.  This situation should be
  reversed (i.e. function-level drivers cause loading of core driver)
  in order to maintain a clear and least-surprise driver loading model.

- IOC4 hardware design necessitates some driver-level dependency on
  the PCI bus clock speed.  Current code assumes a 66MHz bus, but the
  speed should be autodetected and appropriate compensation taken.

This patch series effects the above changes by a newly and better designed
IOC4 core driver with which the function-level drivers can register and
deregister themselves upon module insertion/removal.  By tracking these
modules, device addition/removal is also handled properly.  PCI resource
management and ownership issues are centralized in this core driver, and
IOC4-wide configuration actions such as bus speed detection are also
handled in this core driver.

This patch:

The SGI IOC4 I/O controller chip implements multiple functions, though it is
not a multi-function PCI device.  Additionally, various PCI resources of the
IOC4 are shared by multiple hardware functions, and thus resource ownership by
driver is not clearly delineated.  Due to the current driver design, all core
and subordinate drivers must be loaded, or none, which is undesirable if not
all IOC4 hardware features are being used.

This patch reorganizes the IOC4 drivers so that the core driver provides a
subdriver registration service.  Through appropriate callbacks the subdrivers
can now handle device addition and removal, as well as module insertion and
deletion (though the IOC4 IDE driver requires further work before module
deletion will work).  The core driver now takes care of allocating PCI
resources and data which must be shared between subdrivers, to clearly
delineate module ownership of these items.

Signed-off-by: Brent Casavant <bcasavan@sgi.com>
Acked-by: Pat Gefre <pfg@sgi.com
Acked-by: Jeremy Higdon <jeremy@sgi.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

Showing 6 changed files with 617 additions and 236 deletions Side-by-side Diff

Documentation/sgi-ioc4.txt
  1 +The SGI IOC4 PCI device is a bit of a strange beast, so some notes on
  2 +it are in order.
  3 +
  4 +First, even though the IOC4 performs multiple functions, such as an
  5 +IDE controller, a serial controller, a PS/2 keyboard/mouse controller,
  6 +and an external interrupt mechanism, it's not implemented as a
  7 +multifunction device. The consequence of this from a software
  8 +standpoint is that all these functions share a single IRQ, and
  9 +they can't all register to own the same PCI device ID. To make
  10 +matters a bit worse, some of the register blocks (and even registers
  11 +themselves) present in IOC4 are mixed-purpose between these several
  12 +functions, meaning that there's no clear "owning" device driver.
  13 +
  14 +The solution is to organize the IOC4 driver into several independent
  15 +drivers, "ioc4", "sgiioc4", and "ioc4_serial". Note that there is no
  16 +PS/2 controller driver as this functionality has never been wired up
  17 +on a shipping IO card.
  18 +
  19 +ioc4
  20 +====
  21 +This is the core (or shim) driver for IOC4. It is responsible for
  22 +initializing the basic functionality of the chip, and allocating
  23 +the PCI resources that are shared between the IOC4 functions.
  24 +
  25 +This driver also provides registration functions that the other
  26 +IOC4 drivers can call to make their presence known. Each driver
  27 +needs to provide a probe and remove function, which are invoked
  28 +by the core driver at appropriate times. The interface of these
  29 +IOC4 function probe and remove operations isn't precisely the same
  30 +as PCI device probe and remove operations, but is logically the
  31 +same operation.
  32 +
  33 +sgiioc4
  34 +=======
  35 +This is the IDE driver for IOC4. Its name isn't very descriptive
  36 +simply for historical reasons (it used to be the only IOC4 driver
  37 +component). There's not much to say about it other than it hooks
  38 +up to the ioc4 driver via the appropriate registration, probe, and
  39 +remove functions.
  40 +
  41 +ioc4_serial
  42 +===========
  43 +This is the serial driver for IOC4. There's not much to say about it
  44 +other than it hooks up to the ioc4 driver via the appropriate registration,
  45 +probe, and remove functions.
drivers/ide/pci/sgiioc4.c
... ... @@ -34,7 +34,7 @@
34 34 #include <linux/mm.h>
35 35 #include <linux/ioport.h>
36 36 #include <linux/blkdev.h>
37   -#include <linux/ioc4_common.h>
  37 +#include <linux/ioc4.h>
38 38 #include <asm/io.h>
39 39  
40 40 #include <linux/ide.h>
41 41  
42 42  
43 43  
44 44  
... ... @@ -715,15 +715,35 @@
715 715 };
716 716  
717 717 int
718   -ioc4_ide_attach_one(struct pci_dev *dev, const struct pci_device_id *id)
  718 +ioc4_ide_attach_one(struct ioc4_driver_data *idd)
719 719 {
720   - return pci_init_sgiioc4(dev, &sgiioc4_chipsets[id->driver_data]);
  720 + return pci_init_sgiioc4(idd->idd_pdev,
  721 + &sgiioc4_chipsets[idd->idd_pci_id->driver_data]);
721 722 }
722 723  
  724 +static struct ioc4_submodule ioc4_ide_submodule = {
  725 + .is_name = "IOC4_ide",
  726 + .is_owner = THIS_MODULE,
  727 + .is_probe = ioc4_ide_attach_one,
  728 +/* .is_remove = ioc4_ide_remove_one, */
  729 +};
723 730  
  731 +static int __devinit
  732 +ioc4_ide_init(void)
  733 +{
  734 + return ioc4_register_submodule(&ioc4_ide_submodule);
  735 +}
  736 +
  737 +static void __devexit
  738 +ioc4_ide_exit(void)
  739 +{
  740 + ioc4_unregister_submodule(&ioc4_ide_submodule);
  741 +}
  742 +
  743 +module_init(ioc4_ide_init);
  744 +module_exit(ioc4_ide_exit);
  745 +
724 746 MODULE_AUTHOR("Aniket Malatpure - Silicon Graphics Inc. (SGI)");
725 747 MODULE_DESCRIPTION("IDE PCI driver module for SGI IOC4 Base-IO Card");
726 748 MODULE_LICENSE("GPL");
727   -
728   -EXPORT_SYMBOL(ioc4_ide_attach_one);
drivers/serial/ioc4_serial.c
... ... @@ -20,7 +20,7 @@
20 20 #include <linux/serial_reg.h>
21 21 #include <linux/module.h>
22 22 #include <linux/pci.h>
23   -#include <linux/ioc4_common.h>
  23 +#include <linux/ioc4.h>
24 24 #include <linux/serial_core.h>
25 25  
26 26 /*
27 27  
... ... @@ -130,13 +130,20 @@
130 130 IOC4_SIO_IR_S3_TX_EXPLICIT)
131 131  
132 132 /* Bitmasks for IOC4_OTHER_IR, IOC4_OTHER_IEC, and IOC4_OTHER_IES */
133   -#define IOC4_OTHER_IR_ATA_INT 0x00000001 /* ATAPI intr pass-thru */
134   -#define IOC4_OTHER_IR_ATA_MEMERR 0x00000002 /* ATAPI DMA PCI error */
135   -#define IOC4_OTHER_IR_S0_MEMERR 0x00000004 /* Port 0 PCI error */
136   -#define IOC4_OTHER_IR_S1_MEMERR 0x00000008 /* Port 1 PCI error */
137   -#define IOC4_OTHER_IR_S2_MEMERR 0x00000010 /* Port 2 PCI error */
138   -#define IOC4_OTHER_IR_S3_MEMERR 0x00000020 /* Port 3 PCI error */
  133 +#define IOC4_OTHER_IR_ATA_INT 0x00000001 /* ATAPI intr pass-thru */
  134 +#define IOC4_OTHER_IR_ATA_MEMERR 0x00000002 /* ATAPI DMA PCI error */
  135 +#define IOC4_OTHER_IR_S0_MEMERR 0x00000004 /* Port 0 PCI error */
  136 +#define IOC4_OTHER_IR_S1_MEMERR 0x00000008 /* Port 1 PCI error */
  137 +#define IOC4_OTHER_IR_S2_MEMERR 0x00000010 /* Port 2 PCI error */
  138 +#define IOC4_OTHER_IR_S3_MEMERR 0x00000020 /* Port 3 PCI error */
  139 +#define IOC4_OTHER_IR_KBD_INT 0x00000040 /* Keyboard/mouse */
  140 +#define IOC4_OTHER_IR_RESERVED 0x007fff80 /* Reserved */
  141 +#define IOC4_OTHER_IR_RT_INT 0x00800000 /* INT_OUT section output */
  142 +#define IOC4_OTHER_IR_GEN_INT 0xff000000 /* Generic pins */
139 143  
  144 +#define IOC4_OTHER_IR_SER_MEMERR (IOC4_OTHER_IR_S0_MEMERR | IOC4_OTHER_IR_S1_MEMERR | \
  145 + IOC4_OTHER_IR_S2_MEMERR | IOC4_OTHER_IR_S3_MEMERR)
  146 +
140 147 /* Bitmasks for IOC4_SIO_CR */
141 148 #define IOC4_SIO_CR_CMD_PULSE_SHIFT 0 /* byte bus strobe shift */
142 149 #define IOC4_SIO_CR_ARB_DIAG_TX0 0x00000000
143 150  
144 151  
... ... @@ -274,68 +281,23 @@
274 281 #define i4u_dlm u2.dlm
275 282 #define i4u_fcr u3.fcr
276 283  
277   -/* PCI memory space register map addressed using pci_bar0 */
278   -struct ioc4_memregs {
279   - struct ioc4_mem {
280   - /* Miscellaneous IOC4 registers */
281   - uint32_t pci_err_addr_l;
282   - uint32_t pci_err_addr_h;
283   - uint32_t sio_ir;
284   - uint32_t other_ir;
  284 +/* Serial port registers used for DMA serial I/O */
  285 +struct ioc4_serial {
  286 + uint32_t sbbr01_l;
  287 + uint32_t sbbr01_h;
  288 + uint32_t sbbr23_l;
  289 + uint32_t sbbr23_h;
285 290  
286   - /* These registers are read-only for general kernel code. */
287   - uint32_t sio_ies_ro;
288   - uint32_t other_ies_ro;
289   - uint32_t sio_iec_ro;
290   - uint32_t other_iec_ro;
291   - uint32_t sio_cr;
292   - uint32_t misc_fill1;
293   - uint32_t int_out;
294   - uint32_t misc_fill2;
295   - uint32_t gpcr_s;
296   - uint32_t gpcr_c;
297   - uint32_t gpdr;
298   - uint32_t misc_fill3;
299   - uint32_t gppr_0;
300   - uint32_t gppr_1;
301   - uint32_t gppr_2;
302   - uint32_t gppr_3;
303   - uint32_t gppr_4;
304   - uint32_t gppr_5;
305   - uint32_t gppr_6;
306   - uint32_t gppr_7;
307   - } ioc4_mem;
  291 + struct ioc4_serialregs port_0;
  292 + struct ioc4_serialregs port_1;
  293 + struct ioc4_serialregs port_2;
  294 + struct ioc4_serialregs port_3;
  295 + struct ioc4_uartregs uart_0;
  296 + struct ioc4_uartregs uart_1;
  297 + struct ioc4_uartregs uart_2;
  298 + struct ioc4_uartregs uart_3;
  299 +} ioc4_serial;
308 300  
309   - char misc_fill4[0x100 - 0x5C - 4];
310   -
311   - /* ATA/ATAP registers */
312   - uint32_t ata_notused[9];
313   - char ata_fill1[0x140 - 0x120 - 4];
314   - uint32_t ata_notused1[8];
315   - char ata_fill2[0x200 - 0x15C - 4];
316   -
317   - /* Keyboard and mouse registers */
318   - uint32_t km_notused[5];;
319   - char km_fill1[0x300 - 0x210 - 4];
320   -
321   - /* Serial port registers used for DMA serial I/O */
322   - struct ioc4_serial {
323   - uint32_t sbbr01_l;
324   - uint32_t sbbr01_h;
325   - uint32_t sbbr23_l;
326   - uint32_t sbbr23_h;
327   -
328   - struct ioc4_serialregs port_0;
329   - struct ioc4_serialregs port_1;
330   - struct ioc4_serialregs port_2;
331   - struct ioc4_serialregs port_3;
332   - struct ioc4_uartregs uart_0;
333   - struct ioc4_uartregs uart_1;
334   - struct ioc4_uartregs uart_2;
335   - struct ioc4_uartregs uart_3;
336   - } ioc4_serial;
337   -};
338   -
339 301 /* UART clock speed */
340 302 #define IOC4_SER_XIN_CLK IOC4_SER_XIN_CLK_66
341 303 #define IOC4_SER_XIN_CLK_66 66666667
... ... @@ -412,8 +374,8 @@
412 374 | UART_LCR_WLEN7 | UART_LCR_WLEN8)
413 375 #define LCR_MASK_STOP_BITS (UART_LCR_STOP)
414 376  
415   -#define PENDING(_p) (readl(&(_p)->ip_mem->sio_ir) & _p->ip_ienb)
416   -#define READ_SIO_IR(_p) readl(&(_p)->ip_mem->sio_ir)
  377 +#define PENDING(_p) (readl(&(_p)->ip_mem->sio_ir.raw) & _p->ip_ienb)
  378 +#define READ_SIO_IR(_p) readl(&(_p)->ip_mem->sio_ir.raw)
417 379  
418 380 /* Default to 4k buffers */
419 381 #ifdef IOC4_1K_BUFFERS
... ... @@ -447,7 +409,7 @@
447 409 */
448 410 #define MAX_IOC4_INTR_ENTS (8 * sizeof(uint32_t))
449 411 struct ioc4_soft {
450   - struct ioc4_mem __iomem *is_ioc4_mem_addr;
  412 + struct ioc4_misc_regs __iomem *is_ioc4_misc_addr;
451 413 struct ioc4_serial __iomem *is_ioc4_serial_addr;
452 414  
453 415 /* Each interrupt type has an entry in the array */
... ... @@ -486,7 +448,7 @@
486 448 struct ioc4_soft *ip_ioc4_soft;
487 449  
488 450 /* pci mem addresses */
489   - struct ioc4_mem __iomem *ip_mem;
  451 + struct ioc4_misc_regs __iomem *ip_mem;
490 452 struct ioc4_serial __iomem *ip_serial;
491 453 struct ioc4_serialregs __iomem *ip_serial_regs;
492 454 struct ioc4_uartregs __iomem *ip_uart_regs;
... ... @@ -553,7 +515,7 @@
553 515 uint32_t intr_dma_error;
554 516 uint32_t intr_clear;
555 517 uint32_t intr_all;
556   - char rs422_select_pin;
  518 + int rs422_select_pin;
557 519 };
558 520  
559 521 static struct hooks hooks_array[IOC4_NUM_SERIAL_PORTS] = {
... ... @@ -669,7 +631,7 @@
669 631 static inline void
670 632 write_ireg(struct ioc4_soft *ioc4_soft, uint32_t val, int which, int type)
671 633 {
672   - struct ioc4_mem __iomem *mem = ioc4_soft->is_ioc4_mem_addr;
  634 + struct ioc4_misc_regs __iomem *mem = ioc4_soft->is_ioc4_misc_addr;
673 635 unsigned long flags;
674 636  
675 637 spin_lock_irqsave(&ioc4_soft->is_ir_lock, flags);
676 638  
... ... @@ -678,11 +640,11 @@
678 640 case IOC4_SIO_INTR_TYPE:
679 641 switch (which) {
680 642 case IOC4_W_IES:
681   - writel(val, &mem->sio_ies_ro);
  643 + writel(val, &mem->sio_ies.raw);
682 644 break;
683 645  
684 646 case IOC4_W_IEC:
685   - writel(val, &mem->sio_iec_ro);
  647 + writel(val, &mem->sio_iec.raw);
686 648 break;
687 649 }
688 650 break;
689 651  
... ... @@ -690,11 +652,11 @@
690 652 case IOC4_OTHER_INTR_TYPE:
691 653 switch (which) {
692 654 case IOC4_W_IES:
693   - writel(val, &mem->other_ies_ro);
  655 + writel(val, &mem->other_ies.raw);
694 656 break;
695 657  
696 658 case IOC4_W_IEC:
697   - writel(val, &mem->other_iec_ro);
  659 + writel(val, &mem->other_iec.raw);
698 660 break;
699 661 }
700 662 break;
... ... @@ -747,7 +709,8 @@
747 709 */
748 710 static struct ioc4_port *get_ioc4_port(struct uart_port *the_port)
749 711 {
750   - struct ioc4_control *control = dev_get_drvdata(the_port->dev);
  712 + struct ioc4_driver_data *idd = dev_get_drvdata(the_port->dev);
  713 + struct ioc4_control *control = idd->idd_serial_data;
751 714 int ii;
752 715  
753 716 if (control) {
... ... @@ -782,7 +745,7 @@
782 745 static inline uint32_t
783 746 pending_intrs(struct ioc4_soft *soft, int type)
784 747 {
785   - struct ioc4_mem __iomem *mem = soft->is_ioc4_mem_addr;
  748 + struct ioc4_misc_regs __iomem *mem = soft->is_ioc4_misc_addr;
786 749 unsigned long flag;
787 750 uint32_t intrs = 0;
788 751  
789 752  
... ... @@ -793,11 +756,11 @@
793 756  
794 757 switch (type) {
795 758 case IOC4_SIO_INTR_TYPE:
796   - intrs = readl(&mem->sio_ir) & readl(&mem->sio_ies_ro);
  759 + intrs = readl(&mem->sio_ir.raw) & readl(&mem->sio_ies.raw);
797 760 break;
798 761  
799 762 case IOC4_OTHER_INTR_TYPE:
800   - intrs = readl(&mem->other_ir) & readl(&mem->other_ies_ro);
  763 + intrs = readl(&mem->other_ir.raw) & readl(&mem->other_ies.raw);
801 764  
802 765 /* Don't process any ATA interrupte */
803 766 intrs &= ~(IOC4_OTHER_IR_ATA_INT | IOC4_OTHER_IR_ATA_MEMERR);
... ... @@ -826,7 +789,7 @@
826 789  
827 790 /* Wait until any pending bus activity for this port has ceased */
828 791 do
829   - sio_cr = readl(&port->ip_mem->sio_cr);
  792 + sio_cr = readl(&port->ip_mem->sio_cr.raw);
830 793 while (!(sio_cr & IOC4_SIO_CR_SIO_DIAG_IDLE));
831 794  
832 795 /* Finish reset sequence */
... ... @@ -899,7 +862,7 @@
899 862 write_ireg(port->ip_ioc4_soft, hooks->intr_clear,
900 863 IOC4_W_IEC, IOC4_SIO_INTR_TYPE);
901 864 port->ip_ienb &= ~hooks->intr_clear;
902   - writel(hooks->intr_clear, &port->ip_mem->sio_ir);
  865 + writel(hooks->intr_clear, &port->ip_mem->sio_ir.raw);
903 866 return 0;
904 867 }
905 868  
906 869  
907 870  
908 871  
909 872  
910 873  
... ... @@ -918,23 +881,23 @@
918 881 spin_lock_irqsave(&port->ip_lock, flags);
919 882  
920 883 /* ACK the interrupt */
921   - writel(hooks->intr_dma_error, &port->ip_mem->other_ir);
  884 + writel(hooks->intr_dma_error, &port->ip_mem->other_ir.raw);
922 885  
923   - if (readl(&port->ip_mem->pci_err_addr_l) & IOC4_PCI_ERR_ADDR_VLD) {
  886 + if (readl(&port->ip_mem->pci_err_addr_l.raw) & IOC4_PCI_ERR_ADDR_VLD) {
924 887 printk(KERN_ERR
925 888 "PCI error address is 0x%lx, "
926 889 "master is serial port %c %s\n",
927 890 (((uint64_t)readl(&port->ip_mem->pci_err_addr_h)
928 891 << 32)
929   - | readl(&port->ip_mem->pci_err_addr_l))
  892 + | readl(&port->ip_mem->pci_err_addr_l.raw))
930 893 & IOC4_PCI_ERR_ADDR_ADDR_MSK, '1' +
931   - ((char)(readl(&port->ip_mem-> pci_err_addr_l) &
  894 + ((char)(readl(&port->ip_mem->pci_err_addr_l.raw) &
932 895 IOC4_PCI_ERR_ADDR_MST_NUM_MSK) >> 1),
933   - (readl(&port->ip_mem->pci_err_addr_l)
  896 + (readl(&port->ip_mem->pci_err_addr_l.raw)
934 897 & IOC4_PCI_ERR_ADDR_MST_TYP_MSK)
935 898 ? "RX" : "TX");
936 899  
937   - if (readl(&port->ip_mem->pci_err_addr_l)
  900 + if (readl(&port->ip_mem->pci_err_addr_l.raw)
938 901 & IOC4_PCI_ERR_ADDR_MUL_ERR) {
939 902 printk(KERN_ERR
940 903 "Multiple errors occurred\n");
941 904  
942 905  
943 906  
... ... @@ -1018,26 +981,26 @@
1018 981 "other_ies = 0x%x\n",
1019 982 (intr_type == IOC4_SIO_INTR_TYPE) ? "sio" :
1020 983 "other", this_ir,
1021   - readl(&soft->is_ioc4_mem_addr->sio_ir),
1022   - readl(&soft->is_ioc4_mem_addr->sio_ies_ro),
1023   - readl(&soft->is_ioc4_mem_addr->other_ir),
1024   - readl(&soft->is_ioc4_mem_addr->other_ies_ro));
  984 + readl(&soft->is_ioc4_misc_addr->sio_ir.raw),
  985 + readl(&soft->is_ioc4_misc_addr->sio_ies.raw),
  986 + readl(&soft->is_ioc4_misc_addr->other_ir.raw),
  987 + readl(&soft->is_ioc4_misc_addr->other_ies.raw));
1025 988 }
1026 989 }
1027 990 #ifdef DEBUG_INTERRUPTS
1028 991 {
1029   - struct ioc4_mem __iomem *mem = soft->is_ioc4_mem_addr;
  992 + struct ioc4_misc_regs __iomem *mem = soft->is_ioc4_misc_addr;
1030 993 spinlock_t *lp = &soft->is_ir_lock;
1031 994 unsigned long flag;
1032 995  
1033 996 spin_lock_irqsave(&soft->is_ir_lock, flag);
1034   - printk ("%s : %d : mem 0x%p sio_ir 0x%x sio_ies_ro 0x%x "
1035   - "other_ir 0x%x other_ies_ro 0x%x mask 0x%x\n",
  997 + printk ("%s : %d : mem 0x%p sio_ir 0x%x sio_ies 0x%x "
  998 + "other_ir 0x%x other_ies 0x%x mask 0x%x\n",
1036 999 __FUNCTION__, __LINE__,
1037   - (void *)mem, readl(&mem->sio_ir),
1038   - readl(&mem->sio_ies_ro),
1039   - readl(&mem->other_ir),
1040   - readl(&mem->other_ies_ro),
  1000 + (void *)mem, readl(&mem->sio_ir.raw),
  1001 + readl(&mem->sio_ies.raw),
  1002 + readl(&mem->other_ir.raw),
  1003 + readl(&mem->other_ies.raw),
1041 1004 IOC4_OTHER_IR_ATA_INT | IOC4_OTHER_IR_ATA_MEMERR);
1042 1005 spin_unlock_irqrestore(&soft->is_ir_lock, flag);
1043 1006 }
... ... @@ -1056,7 +1019,7 @@
1056 1019 */
1057 1020 static int inline ioc4_attach_local(struct pci_dev *pdev,
1058 1021 struct ioc4_control *control,
1059   - struct ioc4_soft *soft, void __iomem *ioc4_mem,
  1022 + struct ioc4_soft *soft, void __iomem *ioc4_misc,
1060 1023 void __iomem *ioc4_serial)
1061 1024 {
1062 1025 struct ioc4_port *port;
... ... @@ -1076,7 +1039,7 @@
1076 1039 ioc4_revid, ioc4_revid_min);
1077 1040 return -EPERM;
1078 1041 }
1079   - BUG_ON(ioc4_mem == NULL);
  1042 + BUG_ON(ioc4_misc == NULL);
1080 1043 BUG_ON(ioc4_serial == NULL);
1081 1044  
1082 1045 /* Create port structures for each port */
... ... @@ -1103,7 +1066,7 @@
1103 1066 port->ip_pci_bus_speed = IOC4_SER_XIN_CLK;
1104 1067 port->ip_baud = 9600;
1105 1068 port->ip_control = control;
1106   - port->ip_mem = ioc4_mem;
  1069 + port->ip_mem = ioc4_misc;
1107 1070 port->ip_serial = ioc4_serial;
1108 1071  
1109 1072 /* point to the right hook */
1110 1073  
... ... @@ -1604,14 +1567,12 @@
1604 1567 switch (proto) {
1605 1568 case PROTO_RS232:
1606 1569 /* Clear the appropriate GIO pin */
1607   - writel(0, (&port->ip_mem->gppr_0 +
1608   - hooks->rs422_select_pin));
  1570 + writel(0, (&port->ip_mem->gppr[hooks->rs422_select_pin].raw));
1609 1571 break;
1610 1572  
1611 1573 case PROTO_RS422:
1612 1574 /* Set the appropriate GIO pin */
1613   - writel(1, (&port->ip_mem->gppr_0 +
1614   - hooks->rs422_select_pin));
  1575 + writel(1, (&port->ip_mem->gppr[hooks->rs422_select_pin].raw));
1615 1576 break;
1616 1577  
1617 1578 default:
... ... @@ -1885,7 +1846,7 @@
1885 1846 if (sio_ir & hooks->intr_delta_dcd) {
1886 1847 /* ACK the interrupt */
1887 1848 writel(hooks->intr_delta_dcd,
1888   - &port->ip_mem->sio_ir);
  1849 + &port->ip_mem->sio_ir.raw);
1889 1850  
1890 1851 shadow = readl(&port->ip_serial_regs->shadow);
1891 1852  
... ... @@ -1907,7 +1868,7 @@
1907 1868 if (sio_ir & hooks->intr_delta_cts) {
1908 1869 /* ACK the interrupt */
1909 1870 writel(hooks->intr_delta_cts,
1910   - &port->ip_mem->sio_ir);
  1871 + &port->ip_mem->sio_ir.raw);
1911 1872  
1912 1873 shadow = readl(&port->ip_serial_regs->shadow);
1913 1874  
... ... @@ -1928,7 +1889,7 @@
1928 1889 if (sio_ir & hooks->intr_rx_timer) {
1929 1890 /* ACK the interrupt */
1930 1891 writel(hooks->intr_rx_timer,
1931   - &port->ip_mem->sio_ir);
  1892 + &port->ip_mem->sio_ir.raw);
1932 1893  
1933 1894 if ((port->ip_notify & N_DATA_READY)
1934 1895 && (port->ip_port)) {
... ... @@ -1974,7 +1935,7 @@
1974 1935  
1975 1936 /* ACK the interrupt */
1976 1937 writel(hooks->intr_tx_explicit,
1977   - &port->ip_mem->sio_ir);
  1938 + &port->ip_mem->sio_ir.raw);
1978 1939  
1979 1940 if (port->ip_notify & N_OUTPUT_LOWAT)
1980 1941 ioc4_cb_output_lowat(port);
... ... @@ -2634,7 +2595,8 @@
2634 2595 {
2635 2596 struct ioc4_port *port;
2636 2597 struct uart_port *the_port;
2637   - struct ioc4_control *control = pci_get_drvdata(pdev);
  2598 + struct ioc4_driver_data *idd = pci_get_drvdata(pdev);
  2599 + struct ioc4_control *control = idd->idd_serial_data;
2638 2600 int ii;
2639 2601  
2640 2602 DPRINT_CONFIG(("%s: attach pdev 0x%p - control 0x%p\n",
2641 2603  
2642 2604  
2643 2605  
2644 2606  
2645 2607  
2646 2608  
2647 2609  
... ... @@ -2680,55 +2642,29 @@
2680 2642  
2681 2643 /**
2682 2644 * ioc4_serial_attach_one - register attach function
2683   - * called per card found from ioc4_serial_detect as part
2684   - * of module_init().
2685   - * @pdev: handle for this card
2686   - * @pci_id: pci id for this card
  2645 + * called per card found from IOC4 master module.
  2646 + * @idd: Master module data for this IOC4
2687 2647 */
2688 2648 int
2689   -ioc4_serial_attach_one(struct pci_dev *pdev, const struct pci_device_id *pci_id)
  2649 +ioc4_serial_attach_one(struct ioc4_driver_data *idd)
2690 2650 {
2691   - struct ioc4_mem __iomem *mem;
2692   - unsigned long tmp_addr, tmp_addr1;
  2651 + unsigned long tmp_addr1;
2693 2652 struct ioc4_serial __iomem *serial;
2694 2653 struct ioc4_soft *soft;
2695 2654 struct ioc4_control *control;
2696   - int tmp, ret = 0;
  2655 + int ret = 0;
2697 2656  
2698 2657  
2699   - DPRINT_CONFIG(("%s (0x%p, 0x%p)\n", __FUNCTION__, pdev, pci_id));
  2658 + DPRINT_CONFIG(("%s (0x%p, 0x%p)\n", __FUNCTION__, idd->idd_pdev, idd->idd_pci_id));
2700 2659  
2701   - /* Map in the ioc4 memory */
2702   - tmp_addr = pci_resource_start(pdev, 0);
2703   - if (!tmp_addr) {
2704   - printk(KERN_WARNING
2705   - "ioc4 (%p) : unable to get PIO mapping for "
2706   - "MEM space\n", (void *)pdev);
2707   - return -ENODEV;
2708   - }
2709   - if (!request_region(tmp_addr, sizeof(struct ioc4_mem), "sioc4_mem")) {
2710   - printk(KERN_ALERT
2711   - "ioc4 (%p): unable to get request region for "
2712   - "MEM space\n", (void *)pdev);
2713   - return -ENODEV;
2714   - }
2715   - mem = ioremap(tmp_addr, sizeof(struct ioc4_mem));
2716   - if (!mem) {
2717   - printk(KERN_WARNING
2718   - "ioc4 (%p) : unable to remap ioc4 memory\n",
2719   - (void *)pdev);
2720   - ret = -ENODEV;
2721   - goto out1;
2722   - }
2723   -
2724 2660 /* request serial registers */
2725   - tmp_addr1 = pci_resource_start(pdev, 0) + IOC4_SERIAL_OFFSET;
  2661 + tmp_addr1 = idd->idd_bar0 + IOC4_SERIAL_OFFSET;
2726 2662  
2727 2663 if (!request_region(tmp_addr1, sizeof(struct ioc4_serial),
2728 2664 "sioc4_uart")) {
2729 2665 printk(KERN_WARNING
2730 2666 "ioc4 (%p): unable to get request region for "
2731   - "uart space\n", (void *)pdev);
  2667 + "uart space\n", (void *)idd->idd_pdev);
2732 2668 ret = -ENODEV;
2733 2669 goto out1;
2734 2670 }
2735 2671  
... ... @@ -2736,12 +2672,12 @@
2736 2672 if (!serial) {
2737 2673 printk(KERN_WARNING
2738 2674 "ioc4 (%p) : unable to remap ioc4 serial register\n",
2739   - (void *)pdev);
  2675 + (void *)idd->idd_pdev);
2740 2676 ret = -ENODEV;
2741 2677 goto out2;
2742 2678 }
2743 2679 DPRINT_CONFIG(("%s : mem 0x%p, serial 0x%p\n",
2744   - __FUNCTION__, (void *)mem, (void *)serial));
  2680 + __FUNCTION__, (void *)idd->idd_misc_regs, (void *)serial));
2745 2681  
2746 2682 /* Get memory for the new card */
2747 2683 control = kmalloc(sizeof(struct ioc4_control) * IOC4_NUM_SERIAL_PORTS,
2748 2684  
2749 2685  
2750 2686  
2751 2687  
2752 2688  
2753 2689  
2754 2690  
2755 2691  
2756 2692  
2757 2693  
2758 2694  
2759 2695  
... ... @@ -2754,59 +2690,57 @@
2754 2690 goto out2;
2755 2691 }
2756 2692 memset(control, 0, sizeof(struct ioc4_control));
2757   - pci_set_drvdata(pdev, control);
  2693 + idd->idd_serial_data = control;
2758 2694  
2759 2695 /* Allocate the soft structure */
2760 2696 soft = kmalloc(sizeof(struct ioc4_soft), GFP_KERNEL);
2761 2697 if (!soft) {
2762 2698 printk(KERN_WARNING
2763 2699 "ioc4 (%p): unable to get memory for the soft struct\n",
2764   - (void *)pdev);
  2700 + (void *)idd->idd_pdev);
2765 2701 ret = -ENOMEM;
2766 2702 goto out3;
2767 2703 }
2768 2704 memset(soft, 0, sizeof(struct ioc4_soft));
2769 2705  
2770 2706 spin_lock_init(&soft->is_ir_lock);
2771   - soft->is_ioc4_mem_addr = mem;
  2707 + soft->is_ioc4_misc_addr = idd->idd_misc_regs;
2772 2708 soft->is_ioc4_serial_addr = serial;
2773 2709  
2774 2710 /* Init the IOC4 */
2775   - pci_read_config_dword(pdev, PCI_COMMAND, &tmp);
2776   - pci_write_config_dword(pdev, PCI_COMMAND,
2777   - tmp | PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  2711 + writel(0xf << IOC4_SIO_CR_CMD_PULSE_SHIFT,
  2712 + &idd->idd_misc_regs->sio_cr.raw);
2778 2713  
2779   - writel(0xf << IOC4_SIO_CR_CMD_PULSE_SHIFT, &mem->sio_cr);
2780   -
2781 2714 /* Enable serial port mode select generic PIO pins as outputs */
2782 2715 writel(IOC4_GPCR_UART0_MODESEL | IOC4_GPCR_UART1_MODESEL
2783 2716 | IOC4_GPCR_UART2_MODESEL | IOC4_GPCR_UART3_MODESEL,
2784   - &mem->gpcr_s);
  2717 + &idd->idd_misc_regs->gpcr_s.raw);
2785 2718  
2786   - /* Clear and disable all interrupts */
  2719 + /* Clear and disable all serial interrupts */
2787 2720 write_ireg(soft, ~0, IOC4_W_IEC, IOC4_SIO_INTR_TYPE);
2788   - writel(~0, &mem->sio_ir);
2789   - write_ireg(soft, ~(IOC4_OTHER_IR_ATA_INT | IOC4_OTHER_IR_ATA_MEMERR),
2790   - IOC4_W_IEC, IOC4_OTHER_INTR_TYPE);
2791   - writel(~(IOC4_OTHER_IR_ATA_MEMERR | IOC4_OTHER_IR_ATA_MEMERR),
2792   - &mem->other_ir);
  2721 + writel(~0, &idd->idd_misc_regs->sio_ir.raw);
  2722 + write_ireg(soft, IOC4_OTHER_IR_SER_MEMERR, IOC4_W_IEC,
  2723 + IOC4_OTHER_INTR_TYPE);
  2724 + writel(IOC4_OTHER_IR_SER_MEMERR, &idd->idd_misc_regs->other_ir.raw);
2793 2725 control->ic_soft = soft;
2794   - if (!request_irq(pdev->irq, ioc4_intr, SA_SHIRQ,
  2726 +
  2727 + /* Hook up interrupt handler */
  2728 + if (!request_irq(idd->idd_pdev->irq, ioc4_intr, SA_SHIRQ,
2795 2729 "sgi-ioc4serial", (void *)soft)) {
2796   - control->ic_irq = pdev->irq;
  2730 + control->ic_irq = idd->idd_pdev->irq;
2797 2731 } else {
2798 2732 printk(KERN_WARNING
2799 2733 "%s : request_irq fails for IRQ 0x%x\n ",
2800   - __FUNCTION__, pdev->irq);
  2734 + __FUNCTION__, idd->idd_pdev->irq);
2801 2735 }
2802   - if ((ret = ioc4_attach_local(pdev, control, soft,
2803   - soft->is_ioc4_mem_addr,
  2736 + if ((ret = ioc4_attach_local(idd->idd_pdev, control, soft,
  2737 + soft->is_ioc4_misc_addr,
2804 2738 soft->is_ioc4_serial_addr)))
2805 2739 goto out4;
2806 2740  
2807 2741 /* register port with the serial core */
2808 2742  
2809   - if ((ret = ioc4_serial_core_attach(pdev)))
  2743 + if ((ret = ioc4_serial_core_attach(idd->idd_pdev)))
2810 2744 goto out4;
2811 2745  
2812 2746 return ret;
... ... @@ -2819,7 +2753,6 @@
2819 2753 out2:
2820 2754 release_region(tmp_addr1, sizeof(struct ioc4_serial));
2821 2755 out1:
2822   - release_region(tmp_addr, sizeof(struct ioc4_mem));
2823 2756  
2824 2757 return ret;
2825 2758 }
2826 2759  
... ... @@ -2828,11 +2761,10 @@
2828 2761 /**
2829 2762 * ioc4_serial_remove_one - detach function
2830 2763 *
2831   - * @pdev: handle for this card
  2764 + * @idd: IOC4 master module data for this IOC4
2832 2765 */
2833 2766  
2834   -#if 0
2835   -void ioc4_serial_remove_one(struct pci_dev *pdev)
  2767 +int ioc4_serial_remove_one(struct ioc4_driver_data *idd)
2836 2768 {
2837 2769 int ii;
2838 2770 struct ioc4_control *control;
... ... @@ -2840,7 +2772,7 @@
2840 2772 struct ioc4_port *port;
2841 2773 struct ioc4_soft *soft;
2842 2774  
2843   - control = pci_get_drvdata(pdev);
  2775 + control = idd->idd_serial_data;
2844 2776  
2845 2777 for (ii = 0; ii < IOC4_NUM_SERIAL_PORTS; ii++) {
2846 2778 the_port = &control->ic_port[ii].icp_uart_port;
2847 2779  
2848 2780  
... ... @@ -2867,11 +2799,18 @@
2867 2799 kfree(soft);
2868 2800 }
2869 2801 kfree(control);
2870   - pci_set_drvdata(pdev, NULL);
2871   - uart_unregister_driver(&ioc4_uart);
  2802 + idd->idd_serial_data = NULL;
  2803 +
  2804 + return 0;
2872 2805 }
2873   -#endif
2874 2806  
  2807 +static struct ioc4_submodule ioc4_serial_submodule = {
  2808 + .is_name = "IOC4_serial",
  2809 + .is_owner = THIS_MODULE,
  2810 + .is_probe = ioc4_serial_attach_one,
  2811 + .is_remove = ioc4_serial_remove_one,
  2812 +};
  2813 +
2875 2814 /**
2876 2815 * ioc4_serial_init - module init
2877 2816 */
2878 2817  
2879 2818  
... ... @@ -2886,13 +2825,21 @@
2886 2825 __FUNCTION__);
2887 2826 return ret;
2888 2827 }
2889   - return 0;
  2828 +
  2829 + /* register with IOC4 main module */
  2830 + return ioc4_register_submodule(&ioc4_serial_submodule);
2890 2831 }
2891 2832  
  2833 +static void __devexit ioc4_serial_exit(void)
  2834 +{
  2835 + ioc4_unregister_submodule(&ioc4_serial_submodule);
  2836 + uart_unregister_driver(&ioc4_uart);
  2837 +}
  2838 +
  2839 +module_init(ioc4_serial_init);
  2840 +module_exit(ioc4_serial_exit);
  2841 +
2892 2842 MODULE_AUTHOR("Pat Gefre - Silicon Graphics Inc. (SGI) <pfg@sgi.com>");
2893 2843 MODULE_DESCRIPTION("Serial PCI driver module for SGI IOC4 Base-IO Card");
2894 2844 MODULE_LICENSE("GPL");
2895   -
2896   -EXPORT_SYMBOL(ioc4_serial_init);
2897   -EXPORT_SYMBOL(ioc4_serial_attach_one);
... ... @@ -6,61 +6,295 @@
6 6 * Copyright (C) 2005 Silicon Graphics, Inc. All Rights Reserved.
7 7 */
8 8  
9   -/*
10   - * This file contains a shim driver for the IOC4 IDE and serial drivers.
  9 +/* This file contains the master driver module for use by SGI IOC4 subdrivers.
  10 + *
  11 + * It allocates any resources shared between multiple subdevices, and
  12 + * provides accessor functions (where needed) and the like for those
  13 + * resources. It also provides a mechanism for the subdevice modules
  14 + * to support loading and unloading.
  15 + *
  16 + * Non-shared resources (e.g. external interrupt A_INT_OUT register page
  17 + * alias, serial port and UART registers) are handled by the subdevice
  18 + * modules themselves.
  19 + *
  20 + * This is all necessary because IOC4 is not implemented as a multi-function
  21 + * PCI device, but an amalgamation of disparate registers for several
  22 + * types of device (ATA, serial, external interrupts). The normal
  23 + * resource management in the kernel doesn't have quite the right interfaces
  24 + * to handle this situation (e.g. multiple modules can't claim the same
  25 + * PCI ID), thus this IOC4 master module.
11 26 */
12 27  
13 28 #include <linux/errno.h>
14 29 #include <linux/module.h>
15 30 #include <linux/pci.h>
16   -#include <linux/ioc4_common.h>
17   -#include <linux/ide.h>
  31 +#include <linux/ioc4.h>
  32 +#include <linux/rwsem.h>
18 33  
  34 +/************************
  35 + * Submodule management *
  36 + ************************/
19 37  
20   -static int __devinit
21   -ioc4_probe_one(struct pci_dev *pdev, const struct pci_device_id *pci_id)
  38 +static LIST_HEAD(ioc4_devices);
  39 +static DECLARE_RWSEM(ioc4_devices_rwsem);
  40 +
  41 +static LIST_HEAD(ioc4_submodules);
  42 +static DECLARE_RWSEM(ioc4_submodules_rwsem);
  43 +
  44 +/* Register an IOC4 submodule */
  45 +int
  46 +ioc4_register_submodule(struct ioc4_submodule *is)
22 47 {
  48 + struct ioc4_driver_data *idd;
  49 +
  50 + down_write(&ioc4_submodules_rwsem);
  51 + list_add(&is->is_list, &ioc4_submodules);
  52 + up_write(&ioc4_submodules_rwsem);
  53 +
  54 + /* Initialize submodule for each IOC4 */
  55 + if (!is->is_probe)
  56 + return 0;
  57 +
  58 + down_read(&ioc4_devices_rwsem);
  59 + list_for_each_entry(idd, &ioc4_devices, idd_list) {
  60 + if (is->is_probe(idd)) {
  61 + printk(KERN_WARNING
  62 + "%s: IOC4 submodule %s probe failed "
  63 + "for pci_dev %s",
  64 + __FUNCTION__, module_name(is->is_owner),
  65 + pci_name(idd->idd_pdev));
  66 + }
  67 + }
  68 + up_read(&ioc4_devices_rwsem);
  69 +
  70 + return 0;
  71 +}
  72 +
  73 +/* Unregister an IOC4 submodule */
  74 +void
  75 +ioc4_unregister_submodule(struct ioc4_submodule *is)
  76 +{
  77 + struct ioc4_driver_data *idd;
  78 +
  79 + down_write(&ioc4_submodules_rwsem);
  80 + list_del(&is->is_list);
  81 + up_write(&ioc4_submodules_rwsem);
  82 +
  83 + /* Remove submodule for each IOC4 */
  84 + if (!is->is_remove)
  85 + return;
  86 +
  87 + down_read(&ioc4_devices_rwsem);
  88 + list_for_each_entry(idd, &ioc4_devices, idd_list) {
  89 + if (is->is_remove(idd)) {
  90 + printk(KERN_WARNING
  91 + "%s: IOC4 submodule %s remove failed "
  92 + "for pci_dev %s.\n",
  93 + __FUNCTION__, module_name(is->is_owner),
  94 + pci_name(idd->idd_pdev));
  95 + }
  96 + }
  97 + up_read(&ioc4_devices_rwsem);
  98 +}
  99 +
  100 +/*********************
  101 + * Device management *
  102 + *********************/
  103 +
  104 +/* Adds a new instance of an IOC4 card */
  105 +static int
  106 +ioc4_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id)
  107 +{
  108 + struct ioc4_driver_data *idd;
  109 + struct ioc4_submodule *is;
  110 + uint32_t pcmd;
23 111 int ret;
24 112  
  113 + /* Enable IOC4 and take ownership of it */
25 114 if ((ret = pci_enable_device(pdev))) {
26 115 printk(KERN_WARNING
27   - "%s: Failed to enable device with "
28   - "pci_dev 0x%p... returning\n",
29   - __FUNCTION__, (void *)pdev);
30   - return ret;
  116 + "%s: Failed to enable IOC4 device for pci_dev %s.\n",
  117 + __FUNCTION__, pci_name(pdev));
  118 + goto out;
31 119 }
32 120 pci_set_master(pdev);
33 121  
34   - /* attach each sub-device */
35   - ret = ioc4_ide_attach_one(pdev, pci_id);
36   - if (ret)
37   - return ret;
38   - return ioc4_serial_attach_one(pdev, pci_id);
  122 + /* Set up per-IOC4 data */
  123 + idd = kmalloc(sizeof(struct ioc4_driver_data), GFP_KERNEL);
  124 + if (!idd) {
  125 + printk(KERN_WARNING
  126 + "%s: Failed to allocate IOC4 data for pci_dev %s.\n",
  127 + __FUNCTION__, pci_name(pdev));
  128 + ret = -ENODEV;
  129 + goto out_idd;
  130 + }
  131 + idd->idd_pdev = pdev;
  132 + idd->idd_pci_id = pci_id;
  133 +
  134 + /* Map IOC4 misc registers. These are shared between subdevices
  135 + * so the main IOC4 module manages them.
  136 + */
  137 + idd->idd_bar0 = pci_resource_start(idd->idd_pdev, 0);
  138 + if (!idd->idd_bar0) {
  139 + printk(KERN_WARNING
  140 + "%s: Unable to find IOC4 misc resource "
  141 + "for pci_dev %s.\n",
  142 + __FUNCTION__, pci_name(idd->idd_pdev));
  143 + ret = -ENODEV;
  144 + goto out_pci;
  145 + }
  146 + if (!request_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs),
  147 + "ioc4_misc")) {
  148 + printk(KERN_WARNING
  149 + "%s: Unable to request IOC4 misc region "
  150 + "for pci_dev %s.\n",
  151 + __FUNCTION__, pci_name(idd->idd_pdev));
  152 + ret = -ENODEV;
  153 + goto out_pci;
  154 + }
  155 + idd->idd_misc_regs = ioremap(idd->idd_bar0,
  156 + sizeof(struct ioc4_misc_regs));
  157 + if (!idd->idd_misc_regs) {
  158 + printk(KERN_WARNING
  159 + "%s: Unable to remap IOC4 misc region "
  160 + "for pci_dev %s.\n",
  161 + __FUNCTION__, pci_name(idd->idd_pdev));
  162 + ret = -ENODEV;
  163 + goto out_misc_region;
  164 + }
  165 +
  166 + /* Failsafe portion of per-IOC4 initialization */
  167 +
  168 + /* Initialize IOC4 */
  169 + pci_read_config_dword(idd->idd_pdev, PCI_COMMAND, &pcmd);
  170 + pci_write_config_dword(idd->idd_pdev, PCI_COMMAND,
  171 + pcmd | PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  172 +
  173 + /* Disable/clear all interrupts. Need to do this here lest
  174 + * one submodule request the shared IOC4 IRQ, but interrupt
  175 + * is generated by a different subdevice.
  176 + */
  177 + /* Disable */
  178 + writel(~0, &idd->idd_misc_regs->other_iec.raw);
  179 + writel(~0, &idd->idd_misc_regs->sio_iec);
  180 + /* Clear (i.e. acknowledge) */
  181 + writel(~0, &idd->idd_misc_regs->other_ir.raw);
  182 + writel(~0, &idd->idd_misc_regs->sio_ir);
  183 +
  184 + /* Track PCI-device specific data */
  185 + idd->idd_serial_data = NULL;
  186 + pci_set_drvdata(idd->idd_pdev, idd);
  187 + down_write(&ioc4_devices_rwsem);
  188 + list_add(&idd->idd_list, &ioc4_devices);
  189 + up_write(&ioc4_devices_rwsem);
  190 +
  191 + /* Add this IOC4 to all submodules */
  192 + down_read(&ioc4_submodules_rwsem);
  193 + list_for_each_entry(is, &ioc4_submodules, is_list) {
  194 + if (is->is_probe && is->is_probe(idd)) {
  195 + printk(KERN_WARNING
  196 + "%s: IOC4 submodule 0x%s probe failed "
  197 + "for pci_dev %s.\n",
  198 + __FUNCTION__, module_name(is->is_owner),
  199 + pci_name(idd->idd_pdev));
  200 + }
  201 + }
  202 + up_read(&ioc4_submodules_rwsem);
  203 +
  204 + return 0;
  205 +
  206 +out_misc_region:
  207 + release_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));
  208 +out_pci:
  209 + kfree(idd);
  210 +out_idd:
  211 + pci_disable_device(pdev);
  212 +out:
  213 + return ret;
39 214 }
40 215  
41   -/* pci device struct */
42   -static struct pci_device_id ioc4_s_id_table[] = {
  216 +/* Removes a particular instance of an IOC4 card. */
  217 +static void
  218 +ioc4_remove(struct pci_dev *pdev)
  219 +{
  220 + struct ioc4_submodule *is;
  221 + struct ioc4_driver_data *idd;
  222 +
  223 + idd = pci_get_drvdata(pdev);
  224 +
  225 + /* Remove this IOC4 from all submodules */
  226 + down_read(&ioc4_submodules_rwsem);
  227 + list_for_each_entry(is, &ioc4_submodules, is_list) {
  228 + if (is->is_remove && is->is_remove(idd)) {
  229 + printk(KERN_WARNING
  230 + "%s: IOC4 submodule 0x%s remove failed "
  231 + "for pci_dev %s.\n",
  232 + __FUNCTION__, module_name(is->is_owner),
  233 + pci_name(idd->idd_pdev));
  234 + }
  235 + }
  236 + up_read(&ioc4_submodules_rwsem);
  237 +
  238 + /* Release resources */
  239 + iounmap(idd->idd_misc_regs);
  240 + if (!idd->idd_bar0) {
  241 + printk(KERN_WARNING
  242 + "%s: Unable to get IOC4 misc mapping for pci_dev %s. "
  243 + "Device removal may be incomplete.\n",
  244 + __FUNCTION__, pci_name(idd->idd_pdev));
  245 + }
  246 + release_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));
  247 +
  248 + /* Disable IOC4 and relinquish */
  249 + pci_disable_device(pdev);
  250 +
  251 + /* Remove and free driver data */
  252 + down_write(&ioc4_devices_rwsem);
  253 + list_del(&idd->idd_list);
  254 + up_write(&ioc4_devices_rwsem);
  255 + kfree(idd);
  256 +}
  257 +
  258 +static struct pci_device_id ioc4_id_table[] = {
43 259 {PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC4, PCI_ANY_ID,
44 260 PCI_ANY_ID, 0x0b4000, 0xFFFFFF},
45 261 {0}
46 262 };
47   -MODULE_DEVICE_TABLE(pci, ioc4_s_id_table);
48 263  
49   -static struct pci_driver __devinitdata ioc4_s_driver = {
50   - .name = "IOC4",
51   - .id_table = ioc4_s_id_table,
52   - .probe = ioc4_probe_one,
  264 +static struct pci_driver __devinitdata ioc4_driver = {
  265 + .name = "IOC4",
  266 + .id_table = ioc4_id_table,
  267 + .probe = ioc4_probe,
  268 + .remove = ioc4_remove,
53 269 };
54 270  
55   -static int __devinit ioc4_detect(void)
  271 +MODULE_DEVICE_TABLE(pci, ioc4_id_table);
  272 +
  273 +/*********************
  274 + * Module management *
  275 + *********************/
  276 +
  277 +/* Module load */
  278 +static int __devinit
  279 +ioc4_init(void)
56 280 {
57   - ioc4_serial_init();
  281 + return pci_register_driver(&ioc4_driver);
  282 +}
58 283  
59   - return pci_register_driver(&ioc4_s_driver);
  284 +/* Module unload */
  285 +static void __devexit
  286 +ioc4_exit(void)
  287 +{
  288 + pci_unregister_driver(&ioc4_driver);
60 289 }
61   -module_init(ioc4_detect);
62 290  
63   -MODULE_AUTHOR("Pat Gefre - Silicon Graphics Inc. (SGI) <pfg@sgi.com>");
64   -MODULE_DESCRIPTION("PCI driver module for SGI IOC4 Base-IO Card");
  291 +module_init(ioc4_init);
  292 +module_exit(ioc4_exit);
  293 +
  294 +MODULE_AUTHOR("Brent Casavant - Silicon Graphics, Inc. <bcasavan@sgi.com>");
  295 +MODULE_DESCRIPTION("PCI driver master module for SGI IOC4 Base-IO Card");
65 296 MODULE_LICENSE("GPL");
  297 +
  298 +EXPORT_SYMBOL(ioc4_register_submodule);
  299 +EXPORT_SYMBOL(ioc4_unregister_submodule);
include/linux/ioc4.h
  1 +/*
  2 + * This file is subject to the terms and conditions of the GNU General Public
  3 + * License. See the file "COPYING" in the main directory of this archive
  4 + * for more details.
  5 + *
  6 + * Copyright (c) 2005 Silicon Graphics, Inc. All Rights Reserved.
  7 + */
  8 +
  9 +#ifndef _LINUX_IOC4_H
  10 +#define _LINUX_IOC4_H
  11 +
  12 +#include <linux/interrupt.h>
  13 +
  14 +/***********************************
  15 + * Structures needed by subdrivers *
  16 + ***********************************/
  17 +
  18 +/* This structure fully describes the IOC4 miscellaneous registers which
  19 + * appear at bar[0]+0x00000 through bar[0]+0x0005c. The corresponding
  20 + * PCI resource is managed by the main IOC4 driver because it contains
  21 + * registers of interest to many different IOC4 subdrivers.
  22 + */
  23 +struct ioc4_misc_regs {
  24 + /* Miscellaneous IOC4 registers */
  25 + union ioc4_pci_err_addr_l {
  26 + uint32_t raw;
  27 + struct {
  28 + uint32_t valid:1; /* Address captured */
  29 + uint32_t master_id:4; /* Unit causing error
  30 + * 0/1: Serial port 0 TX/RX
  31 + * 2/3: Serial port 1 TX/RX
  32 + * 4/5: Serial port 2 TX/RX
  33 + * 6/7: Serial port 3 TX/RX
  34 + * 8: ATA/ATAPI
  35 + * 9-15: Undefined
  36 + */
  37 + uint32_t mul_err:1; /* Multiple errors occurred */
  38 + uint32_t addr:26; /* Bits 31-6 of error addr */
  39 + } fields;
  40 + } pci_err_addr_l;
  41 + uint32_t pci_err_addr_h; /* Bits 63-32 of error addr */
  42 + union ioc4_sio_int {
  43 + uint32_t raw;
  44 + struct {
  45 + uint8_t tx_mt:1; /* TX ring buffer empty */
  46 + uint8_t rx_full:1; /* RX ring buffer full */
  47 + uint8_t rx_high:1; /* RX high-water exceeded */
  48 + uint8_t rx_timer:1; /* RX timer has triggered */
  49 + uint8_t delta_dcd:1; /* DELTA_DCD seen */
  50 + uint8_t delta_cts:1; /* DELTA_CTS seen */
  51 + uint8_t intr_pass:1; /* Interrupt pass-through */
  52 + uint8_t tx_explicit:1; /* TX, MCW, or delay complete */
  53 + } fields[4];
  54 + } sio_ir; /* Serial interrupt state */
  55 + union ioc4_other_int {
  56 + uint32_t raw;
  57 + struct {
  58 + uint32_t ata_int:1; /* ATA port passthru */
  59 + uint32_t ata_memerr:1; /* ATA halted by mem error */
  60 + uint32_t memerr:4; /* Serial halted by mem err */
  61 + uint32_t kbd_int:1; /* kbd/mouse intr asserted */
  62 + uint32_t reserved:16; /* zero */
  63 + uint32_t rt_int:1; /* INT_OUT section latch */
  64 + uint32_t gen_int:8; /* Intr. from generic pins */
  65 + } fields;
  66 + } other_ir; /* Other interrupt state */
  67 + union ioc4_sio_int sio_ies; /* Serial interrupt enable set */
  68 + union ioc4_other_int other_ies; /* Other interrupt enable set */
  69 + union ioc4_sio_int sio_iec; /* Serial interrupt enable clear */
  70 + union ioc4_other_int other_iec; /* Other interrupt enable clear */
  71 + union ioc4_sio_cr {
  72 + uint32_t raw;
  73 + struct {
  74 + uint32_t cmd_pulse:4; /* Bytebus strobe width */
  75 + uint32_t arb_diag:3; /* PCI bus requester */
  76 + uint32_t sio_diag_idle:1; /* Active ser req? */
  77 + uint32_t ata_diag_idle:1; /* Active ATA req? */
  78 + uint32_t ata_diag_active:1; /* ATA req is winner */
  79 + uint32_t reserved:22; /* zero */
  80 + } fields;
  81 + } sio_cr;
  82 + uint32_t unused1;
  83 + union ioc4_int_out {
  84 + uint32_t raw;
  85 + struct {
  86 + uint32_t count:16; /* Period control */
  87 + uint32_t mode:3; /* Output signal shape */
  88 + uint32_t reserved:11; /* zero */
  89 + uint32_t diag:1; /* Timebase control */
  90 + uint32_t int_out:1; /* Current value */
  91 + } fields;
  92 + } int_out; /* External interrupt output control */
  93 + uint32_t unused2;
  94 + union ioc4_gpcr {
  95 + uint32_t raw;
  96 + struct {
  97 + uint32_t dir:8; /* Pin direction */
  98 + uint32_t edge:8; /* Edge/level mode */
  99 + uint32_t reserved1:4; /* zero */
  100 + uint32_t int_out_en:1; /* INT_OUT enable */
  101 + uint32_t reserved2:11; /* zero */
  102 + } fields;
  103 + } gpcr_s; /* Generic PIO control set */
  104 + union ioc4_gpcr gpcr_c; /* Generic PIO control clear */
  105 + union ioc4_gpdr {
  106 + uint32_t raw;
  107 + struct {
  108 + uint32_t gen_pin:8; /* State of pins */
  109 + uint32_t reserved:24;
  110 + } fields;
  111 + } gpdr; /* Generic PIO data */
  112 + uint32_t unused3;
  113 + union ioc4_gppr {
  114 + uint32_t raw;
  115 + struct {
  116 + uint32_t gen_pin:1; /* Single pin state */
  117 + uint32_t reserved:31;
  118 + } fields;
  119 + } gppr[8]; /* Generic PIO pins */
  120 +};
  121 +
  122 +/* One of these per IOC4
  123 + *
  124 + * The idd_serial_data field is present here, even though it's used
  125 + * solely by the serial subdriver, because the main IOC4 module
  126 + * properly owns pci_{get,set}_drvdata functionality. This field
  127 + * allows that subdriver to stash its own drvdata somewhere.
  128 + */
  129 +struct ioc4_driver_data {
  130 + struct list_head idd_list;
  131 + unsigned long idd_bar0;
  132 + struct pci_dev *idd_pdev;
  133 + const struct pci_device_id *idd_pci_id;
  134 + struct __iomem ioc4_misc_regs *idd_misc_regs;
  135 + void *idd_serial_data;
  136 +};
  137 +
  138 +/* One per submodule */
  139 +struct ioc4_submodule {
  140 + struct list_head is_list;
  141 + char *is_name;
  142 + struct module *is_owner;
  143 + int (*is_probe) (struct ioc4_driver_data *);
  144 + int (*is_remove) (struct ioc4_driver_data *);
  145 +};
  146 +
  147 +#define IOC4_NUM_CARDS 8 /* max cards per partition */
  148 +
  149 +/**********************************
  150 + * Functions needed by submodules *
  151 + **********************************/
  152 +
  153 +extern int ioc4_register_submodule(struct ioc4_submodule *);
  154 +extern void ioc4_unregister_submodule(struct ioc4_submodule *);
  155 +
  156 +#endif /* _LINUX_IOC4_H */
include/linux/ioc4_common.h
1   -/*
2   - * This file is subject to the terms and conditions of the GNU General Public
3   - * License. See the file "COPYING" in the main directory of this archive
4   - * for more details.
5   - *
6   - * Copyright (c) 2005 Silicon Graphics, Inc. All Rights Reserved.
7   - */
8   -
9   -#ifndef _LINUX_IOC4_COMMON_H
10   -#define _LINUX_IOC4_COMMON_H
11   -
12   -/* prototypes */
13   -
14   -int ioc4_serial_init(void);
15   -
16   -int ioc4_serial_attach_one(struct pci_dev *pdev, const struct
17   - pci_device_id *pci_id);
18   -int ioc4_ide_attach_one(struct pci_dev *pdev, const struct
19   - pci_device_id *pci_id);
20   -
21   -#endif /* _LINUX_IOC4_COMMON_H */