Commit 2298169418f43ba5e0919762a4bab95a1227872a
1 parent
130e886708
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ide: pass command to ide_map_sg()
* Set IDE_TFLAG_WRITE flag and ->rq also for ATA_CMD_PACKET commands. * Pass command to ->dma_setup method and update all its implementations accordingly. * Pass command instead of request to ide_build_sglist(), *_build_dmatable() and ide_map_sg(). While at it: * Fix scc_dma_setup() documentation + use ATA_DMA_WR define. * Rename sgiioc4_build_dma_table() to sgiioc4_build_dmatable(), change return value type to 'int' and drop unused 'ddir' argument. * Do some minor cleanups in [tx4939]ide_dma_setup(). There should be no functional changes caused by this patch. Acked-by: Borislav Petkov <petkovbb@gmail.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Showing 17 changed files with 101 additions and 114 deletions Side-by-side Diff
- drivers/ide/alim15x3.c
- drivers/ide/au1xxx-ide.c
- drivers/ide/icside.c
- drivers/ide/ide-atapi.c
- drivers/ide/ide-disk.c
- drivers/ide/ide-dma-sff.c
- drivers/ide/ide-dma.c
- drivers/ide/ide-floppy.c
- drivers/ide/ide-io.c
- drivers/ide/ide-taskfile.c
- drivers/ide/ns87415.c
- drivers/ide/pmac.c
- drivers/ide/scc_pata.c
- drivers/ide/sgiioc4.c
- drivers/ide/trm290.c
- drivers/ide/tx4939ide.c
- include/linux/ide.h
drivers/ide/alim15x3.c
... | ... | @@ -191,17 +191,18 @@ |
191 | 191 | /** |
192 | 192 | * ali15x3_dma_setup - begin a DMA phase |
193 | 193 | * @drive: target device |
194 | + * @cmd: command | |
194 | 195 | * |
195 | 196 | * Returns 1 if the DMA cannot be performed, zero on success. |
196 | 197 | */ |
197 | 198 | |
198 | -static int ali15x3_dma_setup(ide_drive_t *drive) | |
199 | +static int ali15x3_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) | |
199 | 200 | { |
200 | 201 | if (m5229_revision < 0xC2 && drive->media != ide_disk) { |
201 | - if (rq_data_dir(drive->hwif->rq)) | |
202 | + if (cmd->tf_flags & IDE_TFLAG_WRITE) | |
202 | 203 | return 1; /* try PIO instead of DMA */ |
203 | 204 | } |
204 | - return ide_dma_setup(drive); | |
205 | + return ide_dma_setup(drive, cmd); | |
205 | 206 | } |
206 | 207 | |
207 | 208 | /** |
drivers/ide/au1xxx-ide.c
... | ... | @@ -209,15 +209,14 @@ |
209 | 209 | */ |
210 | 210 | |
211 | 211 | #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA |
212 | -static int auide_build_dmatable(ide_drive_t *drive) | |
212 | +static int auide_build_dmatable(ide_drive_t *drive, struct ide_cmd *cmd) | |
213 | 213 | { |
214 | 214 | ide_hwif_t *hwif = drive->hwif; |
215 | - struct request *rq = hwif->rq; | |
216 | 215 | _auide_hwif *ahwif = &auide_hwif; |
217 | 216 | struct scatterlist *sg; |
218 | - int i = hwif->cmd.sg_nents, iswrite, count = 0; | |
217 | + int i = cmd->sg_nents, count = 0; | |
218 | + int iswrite = !!(cmd->tf_flags & IDE_TFLAG_WRITE); | |
219 | 219 | |
220 | - iswrite = (rq_data_dir(rq) == WRITE); | |
221 | 220 | /* Save for interrupt context */ |
222 | 221 | ahwif->drive = drive; |
223 | 222 | |
224 | 223 | |
... | ... | @@ -298,12 +297,10 @@ |
298 | 297 | (2*WAIT_CMD), NULL); |
299 | 298 | } |
300 | 299 | |
301 | -static int auide_dma_setup(ide_drive_t *drive) | |
300 | +static int auide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) | |
302 | 301 | { |
303 | - struct request *rq = drive->hwif->rq; | |
304 | - | |
305 | - if (!auide_build_dmatable(drive)) { | |
306 | - ide_map_sg(drive, rq); | |
302 | + if (auide_build_dmatable(drive, cmd) == 0) { | |
303 | + ide_map_sg(drive, cmd); | |
307 | 304 | return 1; |
308 | 305 | } |
309 | 306 |
drivers/ide/icside.c
... | ... | @@ -307,15 +307,14 @@ |
307 | 307 | enable_dma(ec->dma); |
308 | 308 | } |
309 | 309 | |
310 | -static int icside_dma_setup(ide_drive_t *drive) | |
310 | +static int icside_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) | |
311 | 311 | { |
312 | 312 | ide_hwif_t *hwif = drive->hwif; |
313 | 313 | struct expansion_card *ec = ECARD_DEV(hwif->dev); |
314 | 314 | struct icside_state *state = ecard_get_drvdata(ec); |
315 | - struct request *rq = hwif->rq; | |
316 | 315 | unsigned int dma_mode; |
317 | 316 | |
318 | - if (rq_data_dir(rq)) | |
317 | + if (cmd->tf_flags & IDE_TFLAG_WRITE) | |
319 | 318 | dma_mode = DMA_MODE_WRITE; |
320 | 319 | else |
321 | 320 | dma_mode = DMA_MODE_READ; |
... | ... | @@ -344,7 +343,7 @@ |
344 | 343 | * Tell the DMA engine about the SG table and |
345 | 344 | * data direction. |
346 | 345 | */ |
347 | - set_dma_sg(ec->dma, hwif->sg_table, hwif->cmd.sg_nents); | |
346 | + set_dma_sg(ec->dma, hwif->sg_table, cmd->sg_nents); | |
348 | 347 | set_dma_mode(ec->dma, dma_mode); |
349 | 348 | |
350 | 349 | drive->waiting_for_dma = 1; |
drivers/ide/ide-atapi.c
... | ... | @@ -638,12 +638,20 @@ |
638 | 638 | { |
639 | 639 | struct ide_atapi_pc *pc; |
640 | 640 | ide_hwif_t *hwif = drive->hwif; |
641 | + const struct ide_dma_ops *dma_ops = hwif->dma_ops; | |
642 | + struct ide_cmd *cmd = &hwif->cmd; | |
641 | 643 | ide_expiry_t *expiry = NULL; |
642 | 644 | struct request *rq = hwif->rq; |
643 | 645 | unsigned int timeout; |
644 | 646 | u32 tf_flags; |
645 | 647 | u16 bcount; |
646 | 648 | |
649 | + if (drive->media != ide_floppy) { | |
650 | + if (rq_data_dir(rq)) | |
651 | + cmd->tf_flags |= IDE_TFLAG_WRITE; | |
652 | + cmd->rq = rq; | |
653 | + } | |
654 | + | |
647 | 655 | if (dev_is_idecd(drive)) { |
648 | 656 | tf_flags = IDE_TFLAG_OUT_NSECT | IDE_TFLAG_OUT_LBAL; |
649 | 657 | bcount = ide_cd_get_xferlen(rq); |
... | ... | @@ -651,8 +659,8 @@ |
651 | 659 | timeout = ATAPI_WAIT_PC; |
652 | 660 | |
653 | 661 | if (drive->dma) { |
654 | - if (ide_build_sglist(drive, rq)) | |
655 | - drive->dma = !hwif->dma_ops->dma_setup(drive); | |
662 | + if (ide_build_sglist(drive, cmd)) | |
663 | + drive->dma = !dma_ops->dma_setup(drive, cmd); | |
656 | 664 | else |
657 | 665 | drive->dma = 0; |
658 | 666 | } |
... | ... | @@ -675,8 +683,8 @@ |
675 | 683 | |
676 | 684 | if ((pc->flags & PC_FLAG_DMA_OK) && |
677 | 685 | (drive->dev_flags & IDE_DFLAG_USING_DMA)) { |
678 | - if (ide_build_sglist(drive, rq)) | |
679 | - drive->dma = !hwif->dma_ops->dma_setup(drive); | |
686 | + if (ide_build_sglist(drive, cmd)) | |
687 | + drive->dma = !dma_ops->dma_setup(drive, cmd); | |
680 | 688 | else |
681 | 689 | drive->dma = 0; |
682 | 690 | } |
drivers/ide/ide-disk.c
... | ... | @@ -99,11 +99,6 @@ |
99 | 99 | memset(&cmd, 0, sizeof(cmd)); |
100 | 100 | cmd.tf_flags = IDE_TFLAG_TF | IDE_TFLAG_DEVICE; |
101 | 101 | |
102 | - if (dma == 0) { | |
103 | - ide_init_sg_cmd(&cmd, nsectors); | |
104 | - ide_map_sg(drive, rq); | |
105 | - } | |
106 | - | |
107 | 102 | if (drive->dev_flags & IDE_DFLAG_LBA) { |
108 | 103 | if (lba48) { |
109 | 104 | pr_debug("%s: LBA=0x%012llx\n", drive->name, |
... | ... | @@ -155,6 +150,11 @@ |
155 | 150 | |
156 | 151 | ide_tf_set_cmd(drive, &cmd, dma); |
157 | 152 | cmd.rq = rq; |
153 | + | |
154 | + if (dma == 0) { | |
155 | + ide_init_sg_cmd(&cmd, nsectors); | |
156 | + ide_map_sg(drive, &cmd); | |
157 | + } | |
158 | 158 | |
159 | 159 | rc = do_rw_taskfile(drive, &cmd); |
160 | 160 |
drivers/ide/ide-dma-sff.c
... | ... | @@ -111,7 +111,7 @@ |
111 | 111 | * May also be invoked from trm290.c |
112 | 112 | */ |
113 | 113 | |
114 | -int ide_build_dmatable(ide_drive_t *drive, struct request *rq) | |
114 | +int ide_build_dmatable(ide_drive_t *drive, struct ide_cmd *cmd) | |
115 | 115 | { |
116 | 116 | ide_hwif_t *hwif = drive->hwif; |
117 | 117 | __le32 *table = (__le32 *)hwif->dmatable_cpu; |
... | ... | @@ -120,7 +120,7 @@ |
120 | 120 | struct scatterlist *sg; |
121 | 121 | u8 is_trm290 = !!(hwif->host_flags & IDE_HFLAG_TRM290); |
122 | 122 | |
123 | - for_each_sg(hwif->sg_table, sg, hwif->cmd.sg_nents, i) { | |
123 | + for_each_sg(hwif->sg_table, sg, cmd->sg_nents, i) { | |
124 | 124 | u32 cur_addr, cur_len, xcount, bcount; |
125 | 125 | |
126 | 126 | cur_addr = sg_dma_address(sg); |
... | ... | @@ -175,6 +175,7 @@ |
175 | 175 | /** |
176 | 176 | * ide_dma_setup - begin a DMA phase |
177 | 177 | * @drive: target device |
178 | + * @cmd: command | |
178 | 179 | * |
179 | 180 | * Build an IDE DMA PRD (IDE speak for scatter gather table) |
180 | 181 | * and then set up the DMA transfer registers for a device |
181 | 182 | |
182 | 183 | |
183 | 184 | |
... | ... | @@ -185,17 +186,16 @@ |
185 | 186 | * is returned. |
186 | 187 | */ |
187 | 188 | |
188 | -int ide_dma_setup(ide_drive_t *drive) | |
189 | +int ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) | |
189 | 190 | { |
190 | 191 | ide_hwif_t *hwif = drive->hwif; |
191 | - struct request *rq = hwif->rq; | |
192 | - unsigned int reading = rq_data_dir(rq) ? 0 : ATA_DMA_WR; | |
193 | 192 | u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; |
193 | + u8 rw = (cmd->tf_flags & IDE_TFLAG_WRITE) ? 0 : ATA_DMA_WR; | |
194 | 194 | u8 dma_stat; |
195 | 195 | |
196 | 196 | /* fall back to pio! */ |
197 | - if (!ide_build_dmatable(drive, rq)) { | |
198 | - ide_map_sg(drive, rq); | |
197 | + if (ide_build_dmatable(drive, cmd) == 0) { | |
198 | + ide_map_sg(drive, cmd); | |
199 | 199 | return 1; |
200 | 200 | } |
201 | 201 | |
202 | 202 | |
... | ... | @@ -208,9 +208,9 @@ |
208 | 208 | |
209 | 209 | /* specify r/w */ |
210 | 210 | if (mmio) |
211 | - writeb(reading, (void __iomem *)(hwif->dma_base + ATA_DMA_CMD)); | |
211 | + writeb(rw, (void __iomem *)(hwif->dma_base + ATA_DMA_CMD)); | |
212 | 212 | else |
213 | - outb(reading, hwif->dma_base + ATA_DMA_CMD); | |
213 | + outb(rw, hwif->dma_base + ATA_DMA_CMD); | |
214 | 214 | |
215 | 215 | /* read DMA status for INTR & ERROR flags */ |
216 | 216 | dma_stat = hwif->dma_ops->dma_sff_read_status(hwif); |
drivers/ide/ide-dma.c
... | ... | @@ -120,7 +120,7 @@ |
120 | 120 | /** |
121 | 121 | * ide_build_sglist - map IDE scatter gather for DMA I/O |
122 | 122 | * @drive: the drive to build the DMA table for |
123 | - * @rq: the request holding the sg list | |
123 | + * @cmd: command | |
124 | 124 | * |
125 | 125 | * Perform the DMA mapping magic necessary to access the source or |
126 | 126 | * target buffers of a request via DMA. The lower layers of the |
127 | 127 | |
128 | 128 | |
129 | 129 | |
130 | 130 | |
131 | 131 | |
... | ... | @@ -128,23 +128,22 @@ |
128 | 128 | * operate in a portable fashion. |
129 | 129 | */ |
130 | 130 | |
131 | -int ide_build_sglist(ide_drive_t *drive, struct request *rq) | |
131 | +int ide_build_sglist(ide_drive_t *drive, struct ide_cmd *cmd) | |
132 | 132 | { |
133 | 133 | ide_hwif_t *hwif = drive->hwif; |
134 | 134 | struct scatterlist *sg = hwif->sg_table; |
135 | - struct ide_cmd *cmd = &hwif->cmd; | |
136 | 135 | int i; |
137 | 136 | |
138 | - ide_map_sg(drive, rq); | |
137 | + ide_map_sg(drive, cmd); | |
139 | 138 | |
140 | - if (rq_data_dir(rq) == READ) | |
141 | - cmd->sg_dma_direction = DMA_FROM_DEVICE; | |
142 | - else | |
139 | + if (cmd->tf_flags & IDE_TFLAG_WRITE) | |
143 | 140 | cmd->sg_dma_direction = DMA_TO_DEVICE; |
141 | + else | |
142 | + cmd->sg_dma_direction = DMA_FROM_DEVICE; | |
144 | 143 | |
145 | 144 | i = dma_map_sg(hwif->dev, sg, cmd->sg_nents, cmd->sg_dma_direction); |
146 | 145 | if (i == 0) |
147 | - ide_map_sg(drive, rq); | |
146 | + ide_map_sg(drive, cmd); | |
148 | 147 | else { |
149 | 148 | cmd->orig_sg_nents = cmd->sg_nents; |
150 | 149 | cmd->sg_nents = i; |
drivers/ide/ide-floppy.c
... | ... | @@ -285,9 +285,13 @@ |
285 | 285 | goto out_end; |
286 | 286 | } |
287 | 287 | |
288 | + if (rq_data_dir(rq)) | |
289 | + cmd->tf_flags |= IDE_TFLAG_WRITE; | |
290 | + cmd->rq = rq; | |
291 | + | |
288 | 292 | if (blk_fs_request(rq) || pc->req_xfer) { |
289 | 293 | ide_init_sg_cmd(cmd, rq->nr_sectors); |
290 | - ide_map_sg(drive, rq); | |
294 | + ide_map_sg(drive, cmd); | |
291 | 295 | } |
292 | 296 | |
293 | 297 | pc->sg = hwif->sg_table; |
drivers/ide/ide-io.c
... | ... | @@ -228,11 +228,11 @@ |
228 | 228 | return ide_stopped; |
229 | 229 | } |
230 | 230 | |
231 | -void ide_map_sg(ide_drive_t *drive, struct request *rq) | |
231 | +void ide_map_sg(ide_drive_t *drive, struct ide_cmd *cmd) | |
232 | 232 | { |
233 | 233 | ide_hwif_t *hwif = drive->hwif; |
234 | - struct ide_cmd *cmd = &hwif->cmd; | |
235 | 234 | struct scatterlist *sg = hwif->sg_table; |
235 | + struct request *rq = cmd->rq; | |
236 | 236 | |
237 | 237 | if (rq->cmd_type == REQ_TYPE_ATA_TASKFILE) { |
238 | 238 | sg_init_one(sg, rq->buffer, rq->nr_sectors * SECTOR_SIZE); |
... | ... | @@ -273,7 +273,7 @@ |
273 | 273 | if (cmd) { |
274 | 274 | if (cmd->protocol == ATA_PROT_PIO) { |
275 | 275 | ide_init_sg_cmd(cmd, rq->nr_sectors); |
276 | - ide_map_sg(drive, rq); | |
276 | + ide_map_sg(drive, cmd); | |
277 | 277 | } |
278 | 278 | |
279 | 279 | return do_rw_taskfile(drive, cmd); |
drivers/ide/ide-taskfile.c
... | ... | @@ -102,8 +102,8 @@ |
102 | 102 | return ide_started; |
103 | 103 | default: |
104 | 104 | if ((drive->dev_flags & IDE_DFLAG_USING_DMA) == 0 || |
105 | - ide_build_sglist(drive, hwif->rq) == 0 || | |
106 | - dma_ops->dma_setup(drive)) | |
105 | + ide_build_sglist(drive, cmd) == 0 || | |
106 | + dma_ops->dma_setup(drive, cmd)) | |
107 | 107 | return ide_stopped; |
108 | 108 | dma_ops->dma_exec_cmd(drive, tf->command); |
109 | 109 | dma_ops->dma_start(drive); |
drivers/ide/ns87415.c
... | ... | @@ -216,11 +216,11 @@ |
216 | 216 | return (dma_stat & 7) != 4; |
217 | 217 | } |
218 | 218 | |
219 | -static int ns87415_dma_setup(ide_drive_t *drive) | |
219 | +static int ns87415_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) | |
220 | 220 | { |
221 | 221 | /* select DMA xfer */ |
222 | 222 | ns87415_prepare_drive(drive, 1); |
223 | - if (!ide_dma_setup(drive)) | |
223 | + if (ide_dma_setup(drive, cmd) == 0) | |
224 | 224 | return 0; |
225 | 225 | /* DMA failed: select PIO xfer */ |
226 | 226 | ns87415_prepare_drive(drive, 0); |
drivers/ide/pmac.c
... | ... | @@ -404,7 +404,6 @@ |
404 | 404 | #define IDE_WAKEUP_DELAY (1*HZ) |
405 | 405 | |
406 | 406 | static int pmac_ide_init_dma(ide_hwif_t *, const struct ide_port_info *); |
407 | -static int pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq); | |
408 | 407 | static void pmac_ide_selectproc(ide_drive_t *drive); |
409 | 408 | static void pmac_ide_kauai_selectproc(ide_drive_t *drive); |
410 | 409 | |
... | ... | @@ -1422,8 +1421,7 @@ |
1422 | 1421 | * pmac_ide_build_dmatable builds the DBDMA command list |
1423 | 1422 | * for a transfer and sets the DBDMA channel to point to it. |
1424 | 1423 | */ |
1425 | -static int | |
1426 | -pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq) | |
1424 | +static int pmac_ide_build_dmatable(ide_drive_t *drive, struct ide_cmd *cmd) | |
1427 | 1425 | { |
1428 | 1426 | ide_hwif_t *hwif = drive->hwif; |
1429 | 1427 | pmac_ide_hwif_t *pmif = |
... | ... | @@ -1431,8 +1429,8 @@ |
1431 | 1429 | struct dbdma_cmd *table; |
1432 | 1430 | volatile struct dbdma_regs __iomem *dma = pmif->dma_regs; |
1433 | 1431 | struct scatterlist *sg; |
1434 | - int wr = (rq_data_dir(rq) == WRITE); | |
1435 | - int i = hwif->cmd.sg_nents, count = 0; | |
1432 | + int wr = !!(cmd->tf_flags & IDE_TFLAG_WRITE); | |
1433 | + int i = cmd->sg_nents, count = 0; | |
1436 | 1434 | |
1437 | 1435 | /* DMA table is already aligned */ |
1438 | 1436 | table = (struct dbdma_cmd *) pmif->dma_table_cpu; |
1439 | 1437 | |
1440 | 1438 | |
1441 | 1439 | |
1442 | 1440 | |
... | ... | @@ -1504,23 +1502,22 @@ |
1504 | 1502 | * Prepare a DMA transfer. We build the DMA table, adjust the timings for |
1505 | 1503 | * a read on KeyLargo ATA/66 and mark us as waiting for DMA completion |
1506 | 1504 | */ |
1507 | -static int | |
1508 | -pmac_ide_dma_setup(ide_drive_t *drive) | |
1505 | +static int pmac_ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) | |
1509 | 1506 | { |
1510 | 1507 | ide_hwif_t *hwif = drive->hwif; |
1511 | 1508 | pmac_ide_hwif_t *pmif = |
1512 | 1509 | (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent); |
1513 | - struct request *rq = hwif->rq; | |
1514 | 1510 | u8 unit = drive->dn & 1, ata4 = (pmif->kind == controller_kl_ata4); |
1511 | + u8 write = !!(cmd->tf_flags & IDE_TFLAG_WRITE); | |
1515 | 1512 | |
1516 | - if (!pmac_ide_build_dmatable(drive, rq)) { | |
1517 | - ide_map_sg(drive, rq); | |
1513 | + if (pmac_ide_build_dmatable(drive, cmd) == 0) { | |
1514 | + ide_map_sg(drive, cmd); | |
1518 | 1515 | return 1; |
1519 | 1516 | } |
1520 | 1517 | |
1521 | 1518 | /* Apple adds 60ns to wrDataSetup on reads */ |
1522 | 1519 | if (ata4 && (pmif->timings[unit] & TR_66_UDMA_EN)) { |
1523 | - writel(pmif->timings[unit] + (!rq_data_dir(rq) ? 0x00800000UL : 0), | |
1520 | + writel(pmif->timings[unit] + (write ? 0 : 0x00800000UL), | |
1524 | 1521 | PMAC_IDE_REG(IDE_TIMING_CONFIG)); |
1525 | 1522 | (void)readl(PMAC_IDE_REG(IDE_TIMING_CONFIG)); |
1526 | 1523 | } |
drivers/ide/scc_pata.c
... | ... | @@ -303,8 +303,9 @@ |
303 | 303 | } |
304 | 304 | |
305 | 305 | /** |
306 | - * scc_ide_dma_setup - begin a DMA phase | |
306 | + * scc_dma_setup - begin a DMA phase | |
307 | 307 | * @drive: target device |
308 | + * @cmd: command | |
308 | 309 | * |
309 | 310 | * Build an IDE DMA PRD (IDE speak for scatter gather table) |
310 | 311 | * and then set up the DMA transfer registers. |
311 | 312 | |
312 | 313 | |
313 | 314 | |
... | ... | @@ -313,21 +314,15 @@ |
313 | 314 | * is returned. |
314 | 315 | */ |
315 | 316 | |
316 | -static int scc_dma_setup(ide_drive_t *drive) | |
317 | +static int scc_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) | |
317 | 318 | { |
318 | 319 | ide_hwif_t *hwif = drive->hwif; |
319 | - struct request *rq = hwif->rq; | |
320 | - unsigned int reading; | |
320 | + u32 rw = (cmd->tf_flags & IDE_TFLAG_WRITE) ? 0 : ATA_DMA_WR; | |
321 | 321 | u8 dma_stat; |
322 | 322 | |
323 | - if (rq_data_dir(rq)) | |
324 | - reading = 0; | |
325 | - else | |
326 | - reading = 1 << 3; | |
327 | - | |
328 | 323 | /* fall back to pio! */ |
329 | - if (!ide_build_dmatable(drive, rq)) { | |
330 | - ide_map_sg(drive, rq); | |
324 | + if (ide_build_dmatable(drive, cmd) == 0) { | |
325 | + ide_map_sg(drive, cmd); | |
331 | 326 | return 1; |
332 | 327 | } |
333 | 328 | |
... | ... | @@ -335,7 +330,7 @@ |
335 | 330 | out_be32((void __iomem *)(hwif->dma_base + 8), hwif->dmatable_dma); |
336 | 331 | |
337 | 332 | /* specify r/w */ |
338 | - out_be32((void __iomem *)hwif->dma_base, reading); | |
333 | + out_be32((void __iomem *)hwif->dma_base, rw); | |
339 | 334 | |
340 | 335 | /* read DMA status for INTR & ERROR flags */ |
341 | 336 | dma_stat = scc_dma_sff_read_status(hwif); |
drivers/ide/sgiioc4.c
... | ... | @@ -424,12 +424,11 @@ |
424 | 424 | /* | Upper 32 bits - Zero |EOL| 15 unused | 16 Bit Length| */ |
425 | 425 | /* --------------------------------------------------------------------- */ |
426 | 426 | /* Creates the scatter gather list, DMA Table */ |
427 | -static unsigned int | |
428 | -sgiioc4_build_dma_table(ide_drive_t * drive, struct request *rq, int ddir) | |
427 | +static int sgiioc4_build_dmatable(ide_drive_t *drive, struct ide_cmd *cmd) | |
429 | 428 | { |
430 | 429 | ide_hwif_t *hwif = drive->hwif; |
431 | 430 | unsigned int *table = hwif->dmatable_cpu; |
432 | - unsigned int count = 0, i = hwif->cmd.sg_nents; | |
431 | + unsigned int count = 0, i = cmd->sg_nents; | |
433 | 432 | struct scatterlist *sg = hwif->sg_table; |
434 | 433 | |
435 | 434 | while (i && sg_dma_len(sg)) { |
436 | 435 | |
437 | 436 | |
438 | 437 | |
439 | 438 | |
440 | 439 | |
... | ... | @@ -484,24 +483,18 @@ |
484 | 483 | return 0; /* revert to PIO for this request */ |
485 | 484 | } |
486 | 485 | |
487 | -static int sgiioc4_dma_setup(ide_drive_t *drive) | |
486 | +static int sgiioc4_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) | |
488 | 487 | { |
489 | - struct request *rq = drive->hwif->rq; | |
490 | - unsigned int count = 0; | |
491 | 488 | int ddir; |
489 | + u8 write = !!(cmd->tf_flags & IDE_TFLAG_WRITE); | |
492 | 490 | |
493 | - if (rq_data_dir(rq)) | |
494 | - ddir = PCI_DMA_TODEVICE; | |
495 | - else | |
496 | - ddir = PCI_DMA_FROMDEVICE; | |
497 | - | |
498 | - if (!(count = sgiioc4_build_dma_table(drive, rq, ddir))) { | |
491 | + if (sgiioc4_build_dmatable(drive, cmd) == 0) { | |
499 | 492 | /* try PIO instead of DMA */ |
500 | - ide_map_sg(drive, rq); | |
493 | + ide_map_sg(drive, cmd); | |
501 | 494 | return 1; |
502 | 495 | } |
503 | 496 | |
504 | - if (rq_data_dir(rq)) | |
497 | + if (write) | |
505 | 498 | /* Writes TO the IOC4 FROM Main Memory */ |
506 | 499 | ddir = IOC4_DMA_READ; |
507 | 500 | else |
drivers/ide/trm290.c
... | ... | @@ -181,13 +181,12 @@ |
181 | 181 | ide_execute_command(drive, command, &ide_dma_intr, WAIT_CMD, NULL); |
182 | 182 | } |
183 | 183 | |
184 | -static int trm290_dma_setup(ide_drive_t *drive) | |
184 | +static int trm290_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) | |
185 | 185 | { |
186 | 186 | ide_hwif_t *hwif = drive->hwif; |
187 | - struct request *rq = hwif->rq; | |
188 | 187 | unsigned int count, rw; |
189 | 188 | |
190 | - if (rq_data_dir(rq)) { | |
189 | + if (cmd->tf_flags & IDE_TFLAG_WRITE) { | |
191 | 190 | #ifdef TRM290_NO_DMA_WRITES |
192 | 191 | /* always use PIO for writes */ |
193 | 192 | trm290_prepare_drive(drive, 0); /* select PIO xfer */ |
... | ... | @@ -197,8 +196,9 @@ |
197 | 196 | } else |
198 | 197 | rw = 2; |
199 | 198 | |
200 | - if (!(count = ide_build_dmatable(drive, rq))) { | |
201 | - ide_map_sg(drive, rq); | |
199 | + count = ide_build_dmatable(drive, cmd); | |
200 | + if (count == 0) { | |
201 | + ide_map_sg(drive, cmd); | |
202 | 202 | /* try PIO instead of DMA */ |
203 | 203 | trm290_prepare_drive(drive, 0); /* select PIO xfer */ |
204 | 204 | return 1; |
drivers/ide/tx4939ide.c
... | ... | @@ -232,7 +232,7 @@ |
232 | 232 | |
233 | 233 | #ifdef __BIG_ENDIAN |
234 | 234 | /* custom ide_build_dmatable to handle swapped layout */ |
235 | -static int tx4939ide_build_dmatable(ide_drive_t *drive, struct request *rq) | |
235 | +static int tx4939ide_build_dmatable(ide_drive_t *drive, struct ide_cmd *cmd) | |
236 | 236 | { |
237 | 237 | ide_hwif_t *hwif = drive->hwif; |
238 | 238 | u32 *table = (u32 *)hwif->dmatable_cpu; |
... | ... | @@ -240,7 +240,7 @@ |
240 | 240 | int i; |
241 | 241 | struct scatterlist *sg; |
242 | 242 | |
243 | - for_each_sg(hwif->sg_table, sg, hwif->cmd.sg_nents, i) { | |
243 | + for_each_sg(hwif->sg_table, sg, cmd->sg_nents, i) { | |
244 | 244 | u32 cur_addr, cur_len, bcount; |
245 | 245 | |
246 | 246 | cur_addr = sg_dma_address(sg); |
247 | 247 | |
248 | 248 | |
249 | 249 | |
... | ... | @@ -287,23 +287,15 @@ |
287 | 287 | #define tx4939ide_build_dmatable ide_build_dmatable |
288 | 288 | #endif |
289 | 289 | |
290 | -static int tx4939ide_dma_setup(ide_drive_t *drive) | |
290 | +static int tx4939ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) | |
291 | 291 | { |
292 | 292 | ide_hwif_t *hwif = drive->hwif; |
293 | 293 | void __iomem *base = TX4939IDE_BASE(hwif); |
294 | - struct request *rq = hwif->rq; | |
295 | - u8 reading; | |
296 | - int nent; | |
294 | + u8 rw = (cmd->tf_flags & IDE_TFLAG_WRITE) ? 0 : ATA_DMA_WR; | |
297 | 295 | |
298 | - if (rq_data_dir(rq)) | |
299 | - reading = 0; | |
300 | - else | |
301 | - reading = ATA_DMA_WR; | |
302 | - | |
303 | 296 | /* fall back to PIO! */ |
304 | - nent = tx4939ide_build_dmatable(drive, rq); | |
305 | - if (!nent) { | |
306 | - ide_map_sg(drive, rq); | |
297 | + if (tx4939ide_build_dmatable(drive, cmd) == 0) { | |
298 | + ide_map_sg(drive, cmd); | |
307 | 299 | return 1; |
308 | 300 | } |
309 | 301 | |
... | ... | @@ -311,7 +303,7 @@ |
311 | 303 | tx4939ide_writel(hwif->dmatable_dma, base, TX4939IDE_PRD_Ptr); |
312 | 304 | |
313 | 305 | /* specify r/w */ |
314 | - tx4939ide_writeb(reading, base, TX4939IDE_DMA_Cmd); | |
306 | + tx4939ide_writeb(rw, base, TX4939IDE_DMA_Cmd); | |
315 | 307 | |
316 | 308 | /* clear INTR & ERROR flags */ |
317 | 309 | tx4939ide_clear_dma_status(base); |
... | ... | @@ -320,7 +312,9 @@ |
320 | 312 | |
321 | 313 | tx4939ide_writew(SECTOR_SIZE / 2, base, drive->dn ? |
322 | 314 | TX4939IDE_Xfer_Cnt_2 : TX4939IDE_Xfer_Cnt_1); |
323 | - tx4939ide_writew(rq->nr_sectors, base, TX4939IDE_Sec_Cnt); | |
315 | + | |
316 | + tx4939ide_writew(cmd->rq->nr_sectors, base, TX4939IDE_Sec_Cnt); | |
317 | + | |
324 | 318 | return 0; |
325 | 319 | } |
326 | 320 |
include/linux/ide.h
... | ... | @@ -714,7 +714,7 @@ |
714 | 714 | |
715 | 715 | struct ide_dma_ops { |
716 | 716 | void (*dma_host_set)(struct ide_drive_s *, int); |
717 | - int (*dma_setup)(struct ide_drive_s *); | |
717 | + int (*dma_setup)(struct ide_drive_s *, struct ide_cmd *); | |
718 | 718 | void (*dma_exec_cmd)(struct ide_drive_s *, u8); |
719 | 719 | void (*dma_start)(struct ide_drive_s *); |
720 | 720 | int (*dma_end)(struct ide_drive_s *); |
... | ... | @@ -1412,7 +1412,7 @@ |
1412 | 1412 | #define ide_pci_resume NULL |
1413 | 1413 | #endif |
1414 | 1414 | |
1415 | -void ide_map_sg(ide_drive_t *, struct request *); | |
1415 | +void ide_map_sg(ide_drive_t *, struct ide_cmd *); | |
1416 | 1416 | void ide_init_sg_cmd(struct ide_cmd *, int); |
1417 | 1417 | |
1418 | 1418 | #define BAD_DMA_DRIVE 0 |
1419 | 1419 | |
1420 | 1420 | |
... | ... | @@ -1447,14 +1447,14 @@ |
1447 | 1447 | int ide_allocate_dma_engine(ide_hwif_t *); |
1448 | 1448 | void ide_release_dma_engine(ide_hwif_t *); |
1449 | 1449 | |
1450 | -int ide_build_sglist(ide_drive_t *, struct request *); | |
1450 | +int ide_build_sglist(ide_drive_t *, struct ide_cmd *); | |
1451 | 1451 | void ide_destroy_dmatable(ide_drive_t *); |
1452 | 1452 | |
1453 | 1453 | #ifdef CONFIG_BLK_DEV_IDEDMA_SFF |
1454 | 1454 | int config_drive_for_dma(ide_drive_t *); |
1455 | -extern int ide_build_dmatable(ide_drive_t *, struct request *); | |
1455 | +int ide_build_dmatable(ide_drive_t *, struct ide_cmd *); | |
1456 | 1456 | void ide_dma_host_set(ide_drive_t *, int); |
1457 | -extern int ide_dma_setup(ide_drive_t *); | |
1457 | +int ide_dma_setup(ide_drive_t *, struct ide_cmd *); | |
1458 | 1458 | void ide_dma_exec_cmd(ide_drive_t *, u8); |
1459 | 1459 | extern void ide_dma_start(ide_drive_t *); |
1460 | 1460 | int ide_dma_end(ide_drive_t *); |
... | ... | @@ -1482,7 +1482,7 @@ |
1482 | 1482 | static inline ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error) { return ide_stopped; } |
1483 | 1483 | static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; } |
1484 | 1484 | static inline int ide_build_sglist(ide_drive_t *drive, |
1485 | - struct request *rq) { return 0; } | |
1485 | + struct ide_cmd *cmd) { return 0; } | |
1486 | 1486 | #endif /* CONFIG_BLK_DEV_IDEDMA */ |
1487 | 1487 | |
1488 | 1488 | #ifdef CONFIG_BLK_DEV_IDEACPI |