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Commit 26febf8ef14a3682eb99af3805c1f8149ed8eb6c

Authored by Kukjin Kim
1 parent 85e2a26f3d
Exists in smarc-l5.0.0_1.0.0-ga and in 5 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga

ARM: S3C2416: move mach-s3c2416/* into mach-s3c24xx/ 

This patch moves S3C2416 stuff into mach-s3c24xx/ directory
so that we can merge the s3c24 series' directories to the
just one mach-s3c24xx/ directory.

Cc: Ben Dooks <ben-linux@fluff.org>
Tested-by: Heiko Stuebner <heiko@sntech.de>
[kgene.kim@samsung.com: removed compiling s3c2416 as per Heiko's suggestion]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

Showing 17 changed files with 1006 additions and 1006 deletions Side-by-side Diff

... ... @@ -175,7 +175,7 @@
175 175 machine-$(CONFIG_ARCH_PXA) := pxa
176 176 machine-$(CONFIG_ARCH_REALVIEW) := realview
177 177 machine-$(CONFIG_ARCH_RPC) := rpc
178   -machine-$(CONFIG_ARCH_S3C24XX) := s3c24xx s3c2412 s3c2416 s3c2440 s3c2443
  178 +machine-$(CONFIG_ARCH_S3C24XX) := s3c24xx s3c2412 s3c2440 s3c2443
179 179 machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx
180 180 machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0
181 181 machine-$(CONFIG_ARCH_S5PC100) := s5pc100
arch/arm/mach-s3c2416/Kconfig
Diff comments   View file @ 26febf8
... ... @@ -7,55 +7,9 @@
7 7 # note, this also supports the S3C2450 which is so similar it has the same
8 8 # ID code as the S3C2416.
9 9  
10   -config CPU_S3C2416
11   - bool
12   - depends on ARCH_S3C24XX
13   - select CPU_ARM926T
14   - select S3C2416_DMA if S3C2410_DMA
15   - select CPU_LLSERIAL_S3C2440
16   - select SAMSUNG_CLKSRC
17   - select S3C2443_CLOCK
18   - help
19   - Support for the S3C2416 SoC from the S3C24XX line
20   -
21 10 config S3C2416_DMA
22 11 bool
23 12 depends on CPU_S3C2416
24 13 help
25 14 Internal config node for S3C2416 DMA support
26   -
27   -config S3C2416_PM
28   - bool
29   - select S3C2412_PM_SLEEP
30   - help
31   - Internal config node to apply S3C2416 power management
32   -
33   -config S3C2416_SETUP_SDHCI
34   - bool
35   - select S3C2416_SETUP_SDHCI_GPIO
36   - help
37   - Internal helper functions for S3C2416 based SDHCI systems
38   -
39   -config S3C2416_SETUP_SDHCI_GPIO
40   - bool
41   - help
42   - Common setup code for SDHCI gpio.
43   -
44   -menu "S3C2416 Machines"
45   -
46   -config MACH_SMDK2416
47   - bool "SMDK2416"
48   - select CPU_S3C2416
49   - select MACH_SMDK
50   - select S3C_DEV_FB
51   - select S3C_DEV_HSMMC
52   - select S3C_DEV_HSMMC1
53   - select S3C_DEV_NAND
54   - select S3C_DEV_USB_HOST
55   - select S3C2416_SETUP_SDHCI
56   - select S3C2416_PM if PM
57   - help
58   - Say Y here if you are using an SMDK2416
59   -
60   -endmenu
arch/arm/mach-s3c2416/Makefile
Diff comments   View file @ 26febf8
... ... @@ -9,15 +9,5 @@
9 9 obj-n :=
10 10 obj- :=
11 11  
12   -obj-$(CONFIG_CPU_S3C2416) += s3c2416.o clock.o
13   -obj-$(CONFIG_CPU_S3C2416) += irq.o
14   -obj-$(CONFIG_S3C2416_PM) += pm.o
15 12 #obj-$(CONFIG_S3C2416_DMA) += dma.o
16   -
17   -# Device setup
18   -obj-$(CONFIG_S3C2416_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
19   -
20   -# Machine support
21   -
22   -obj-$(CONFIG_MACH_SMDK2416) += mach-smdk2416.o
arch/arm/mach-s3c2416/clock.c
View file @ 26febf8
1   -/* linux/arch/arm/mach-s3c2416/clock.c
2   - *
3   - * Copyright (c) 2010 Simtec Electronics
4   - * Copyright (c) 2010 Ben Dooks <ben-linux@fluff.org>
5   - *
6   - * S3C2416 Clock control support
7   - *
8   - * This program is free software; you can redistribute it and/or modify
9   - * it under the terms of the GNU General Public License as published by
10   - * the Free Software Foundation; either version 2 of the License, or
11   - * (at your option) any later version.
12   - */
13   -
14   -#include <linux/init.h>
15   -#include <linux/clk.h>
16   -
17   -#include <plat/s3c2416.h>
18   -#include <plat/clock.h>
19   -#include <plat/clock-clksrc.h>
20   -#include <plat/cpu.h>
21   -
22   -#include <plat/cpu-freq.h>
23   -#include <plat/pll.h>
24   -
25   -#include <asm/mach/map.h>
26   -
27   -#include <mach/regs-clock.h>
28   -#include <mach/regs-s3c2443-clock.h>
29   -
30   -/* armdiv
31   - *
32   - * this clock is sourced from msysclk and can have a number of
33   - * divider values applied to it to then be fed into armclk.
34   - * The real clock definition is done in s3c2443-clock.c,
35   - * only the armdiv divisor table must be defined here.
36   -*/
37   -
38   -static unsigned int armdiv[8] = {
39   - [0] = 1,
40   - [1] = 2,
41   - [2] = 3,
42   - [3] = 4,
43   - [5] = 6,
44   - [7] = 8,
45   -};
46   -
47   -static struct clksrc_clk hsspi_eplldiv = {
48   - .clk = {
49   - .name = "hsspi-eplldiv",
50   - .parent = &clk_esysclk.clk,
51   - .ctrlbit = (1 << 14),
52   - .enable = s3c2443_clkcon_enable_s,
53   - },
54   - .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 24 },
55   -};
56   -
57   -static struct clk *hsspi_sources[] = {
58   - [0] = &hsspi_eplldiv.clk,
59   - [1] = NULL, /* to fix */
60   -};
61   -
62   -static struct clksrc_clk hsspi_mux = {
63   - .clk = {
64   - .name = "hsspi-if",
65   - },
66   - .sources = &(struct clksrc_sources) {
67   - .sources = hsspi_sources,
68   - .nr_sources = ARRAY_SIZE(hsspi_sources),
69   - },
70   - .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 18 },
71   -};
72   -
73   -static struct clksrc_clk hsmmc_div[] = {
74   - [0] = {
75   - .clk = {
76   - .name = "hsmmc-div",
77   - .devname = "s3c-sdhci.0",
78   - .parent = &clk_esysclk.clk,
79   - },
80   - .reg_div = { .reg = S3C2416_CLKDIV2, .size = 2, .shift = 6 },
81   - },
82   - [1] = {
83   - .clk = {
84   - .name = "hsmmc-div",
85   - .devname = "s3c-sdhci.1",
86   - .parent = &clk_esysclk.clk,
87   - },
88   - .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 },
89   - },
90   -};
91   -
92   -static struct clksrc_clk hsmmc_mux0 = {
93   - .clk = {
94   - .name = "hsmmc-if",
95   - .devname = "s3c-sdhci.0",
96   - .ctrlbit = (1 << 6),
97   - .enable = s3c2443_clkcon_enable_s,
98   - },
99   - .sources = &(struct clksrc_sources) {
100   - .nr_sources = 2,
101   - .sources = (struct clk * []) {
102   - [0] = &hsmmc_div[0].clk,
103   - [1] = NULL, /* to fix */
104   - },
105   - },
106   - .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 16 },
107   -};
108   -
109   -static struct clksrc_clk hsmmc_mux1 = {
110   - .clk = {
111   - .name = "hsmmc-if",
112   - .devname = "s3c-sdhci.1",
113   - .ctrlbit = (1 << 12),
114   - .enable = s3c2443_clkcon_enable_s,
115   - },
116   - .sources = &(struct clksrc_sources) {
117   - .nr_sources = 2,
118   - .sources = (struct clk * []) {
119   - [0] = &hsmmc_div[1].clk,
120   - [1] = NULL, /* to fix */
121   - },
122   - },
123   - .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 17 },
124   -};
125   -
126   -static struct clk hsmmc0_clk = {
127   - .name = "hsmmc",
128   - .devname = "s3c-sdhci.0",
129   - .parent = &clk_h,
130   - .enable = s3c2443_clkcon_enable_h,
131   - .ctrlbit = S3C2416_HCLKCON_HSMMC0,
132   -};
133   -
134   -void __init_or_cpufreq s3c2416_setup_clocks(void)
135   -{
136   - s3c2443_common_setup_clocks(s3c2416_get_pll);
137   -}
138   -
139   -
140   -static struct clksrc_clk *clksrcs[] __initdata = {
141   - &hsspi_eplldiv,
142   - &hsspi_mux,
143   - &hsmmc_div[0],
144   - &hsmmc_div[1],
145   - &hsmmc_mux0,
146   - &hsmmc_mux1,
147   -};
148   -
149   -static struct clk_lookup s3c2416_clk_lookup[] = {
150   - CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &hsmmc0_clk),
151   - CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &hsmmc_mux0.clk),
152   - CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &hsmmc_mux1.clk),
153   -};
154   -
155   -void __init s3c2416_init_clocks(int xtal)
156   -{
157   - u32 epllcon = __raw_readl(S3C2443_EPLLCON);
158   - u32 epllcon1 = __raw_readl(S3C2443_EPLLCON+4);
159   - int ptr;
160   -
161   - /* s3c2416 EPLL compatible with s3c64xx */
162   - clk_epll.rate = s3c_get_pll6553x(xtal, epllcon, epllcon1);
163   -
164   - clk_epll.parent = &clk_epllref.clk;
165   -
166   - s3c2443_common_init_clocks(xtal, s3c2416_get_pll,
167   - armdiv, ARRAY_SIZE(armdiv),
168   - S3C2416_CLKDIV0_ARMDIV_MASK);
169   -
170   - for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
171   - s3c_register_clksrc(clksrcs[ptr], 1);
172   -
173   - s3c24xx_register_clock(&hsmmc0_clk);
174   - clkdev_add_table(s3c2416_clk_lookup, ARRAY_SIZE(s3c2416_clk_lookup));
175   -
176   - s3c_pwmclk_init();
177   -
178   -}
arch/arm/mach-s3c2416/irq.c
View file @ 26febf8
1   -/* linux/arch/arm/mach-s3c2416/irq.c
2   - *
3   - * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
4   - * as part of OpenInkpot project
5   - * Copyright (c) 2009 Promwad Innovation Company
6   - * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
7   - *
8   - * This program is free software; you can redistribute it and/or modify
9   - * it under the terms of the GNU General Public License as published by
10   - * the Free Software Foundation; either version 2 of the License, or
11   - * (at your option) any later version.
12   - *
13   - * This program is distributed in the hope that it will be useful,
14   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
15   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16   - * GNU General Public License for more details.
17   - *
18   - * You should have received a copy of the GNU General Public License
19   - * along with this program; if not, write to the Free Software
20   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21   - *
22   -*/
23   -
24   -#include <linux/init.h>
25   -#include <linux/module.h>
26   -#include <linux/interrupt.h>
27   -#include <linux/ioport.h>
28   -#include <linux/device.h>
29   -#include <linux/io.h>
30   -
31   -#include <mach/hardware.h>
32   -#include <asm/irq.h>
33   -
34   -#include <asm/mach/irq.h>
35   -
36   -#include <mach/regs-irq.h>
37   -#include <mach/regs-gpio.h>
38   -
39   -#include <plat/cpu.h>
40   -#include <plat/pm.h>
41   -#include <plat/irq.h>
42   -
43   -#define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1)
44   -
45   -static inline void s3c2416_irq_demux(unsigned int irq, unsigned int len)
46   -{
47   - unsigned int subsrc, submsk;
48   - unsigned int end;
49   -
50   - /* read the current pending interrupts, and the mask
51   - * for what it is available */
52   -
53   - subsrc = __raw_readl(S3C2410_SUBSRCPND);
54   - submsk = __raw_readl(S3C2410_INTSUBMSK);
55   -
56   - subsrc &= ~submsk;
57   - subsrc >>= (irq - S3C2410_IRQSUB(0));
58   - subsrc &= (1 << len)-1;
59   -
60   - end = len + irq;
61   -
62   - for (; irq < end && subsrc; irq++) {
63   - if (subsrc & 1)
64   - generic_handle_irq(irq);
65   -
66   - subsrc >>= 1;
67   - }
68   -}
69   -
70   -/* WDT/AC97 sub interrupts */
71   -
72   -static void s3c2416_irq_demux_wdtac97(unsigned int irq, struct irq_desc *desc)
73   -{
74   - s3c2416_irq_demux(IRQ_S3C2443_WDT, 4);
75   -}
76   -
77   -#define INTMSK_WDTAC97 (1UL << (IRQ_WDT - IRQ_EINT0))
78   -#define SUBMSK_WDTAC97 INTMSK(IRQ_S3C2443_WDT, IRQ_S3C2443_AC97)
79   -
80   -static void s3c2416_irq_wdtac97_mask(struct irq_data *data)
81   -{
82   - s3c_irqsub_mask(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
83   -}
84   -
85   -static void s3c2416_irq_wdtac97_unmask(struct irq_data *data)
86   -{
87   - s3c_irqsub_unmask(data->irq, INTMSK_WDTAC97);
88   -}
89   -
90   -static void s3c2416_irq_wdtac97_ack(struct irq_data *data)
91   -{
92   - s3c_irqsub_maskack(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
93   -}
94   -
95   -static struct irq_chip s3c2416_irq_wdtac97 = {
96   - .irq_mask = s3c2416_irq_wdtac97_mask,
97   - .irq_unmask = s3c2416_irq_wdtac97_unmask,
98   - .irq_ack = s3c2416_irq_wdtac97_ack,
99   -};
100   -
101   -/* LCD sub interrupts */
102   -
103   -static void s3c2416_irq_demux_lcd(unsigned int irq, struct irq_desc *desc)
104   -{
105   - s3c2416_irq_demux(IRQ_S3C2443_LCD1, 4);
106   -}
107   -
108   -#define INTMSK_LCD (1UL << (IRQ_LCD - IRQ_EINT0))
109   -#define SUBMSK_LCD INTMSK(IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4)
110   -
111   -static void s3c2416_irq_lcd_mask(struct irq_data *data)
112   -{
113   - s3c_irqsub_mask(data->irq, INTMSK_LCD, SUBMSK_LCD);
114   -}
115   -
116   -static void s3c2416_irq_lcd_unmask(struct irq_data *data)
117   -{
118   - s3c_irqsub_unmask(data->irq, INTMSK_LCD);
119   -}
120   -
121   -static void s3c2416_irq_lcd_ack(struct irq_data *data)
122   -{
123   - s3c_irqsub_maskack(data->irq, INTMSK_LCD, SUBMSK_LCD);
124   -}
125   -
126   -static struct irq_chip s3c2416_irq_lcd = {
127   - .irq_mask = s3c2416_irq_lcd_mask,
128   - .irq_unmask = s3c2416_irq_lcd_unmask,
129   - .irq_ack = s3c2416_irq_lcd_ack,
130   -};
131   -
132   -/* DMA sub interrupts */
133   -
134   -static void s3c2416_irq_demux_dma(unsigned int irq, struct irq_desc *desc)
135   -{
136   - s3c2416_irq_demux(IRQ_S3C2443_DMA0, 6);
137   -}
138   -
139   -#define INTMSK_DMA (1UL << (IRQ_S3C2443_DMA - IRQ_EINT0))
140   -#define SUBMSK_DMA INTMSK(IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5)
141   -
142   -
143   -static void s3c2416_irq_dma_mask(struct irq_data *data)
144   -{
145   - s3c_irqsub_mask(data->irq, INTMSK_DMA, SUBMSK_DMA);
146   -}
147   -
148   -static void s3c2416_irq_dma_unmask(struct irq_data *data)
149   -{
150   - s3c_irqsub_unmask(data->irq, INTMSK_DMA);
151   -}
152   -
153   -static void s3c2416_irq_dma_ack(struct irq_data *data)
154   -{
155   - s3c_irqsub_maskack(data->irq, INTMSK_DMA, SUBMSK_DMA);
156   -}
157   -
158   -static struct irq_chip s3c2416_irq_dma = {
159   - .irq_mask = s3c2416_irq_dma_mask,
160   - .irq_unmask = s3c2416_irq_dma_unmask,
161   - .irq_ack = s3c2416_irq_dma_ack,
162   -};
163   -
164   -/* UART3 sub interrupts */
165   -
166   -static void s3c2416_irq_demux_uart3(unsigned int irq, struct irq_desc *desc)
167   -{
168   - s3c2416_irq_demux(IRQ_S3C2443_RX3, 3);
169   -}
170   -
171   -#define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0))
172   -#define SUBMSK_UART3 (0x7 << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0)))
173   -
174   -static void s3c2416_irq_uart3_mask(struct irq_data *data)
175   -{
176   - s3c_irqsub_mask(data->irq, INTMSK_UART3, SUBMSK_UART3);
177   -}
178   -
179   -static void s3c2416_irq_uart3_unmask(struct irq_data *data)
180   -{
181   - s3c_irqsub_unmask(data->irq, INTMSK_UART3);
182   -}
183   -
184   -static void s3c2416_irq_uart3_ack(struct irq_data *data)
185   -{
186   - s3c_irqsub_maskack(data->irq, INTMSK_UART3, SUBMSK_UART3);
187   -}
188   -
189   -static struct irq_chip s3c2416_irq_uart3 = {
190   - .irq_mask = s3c2416_irq_uart3_mask,
191   - .irq_unmask = s3c2416_irq_uart3_unmask,
192   - .irq_ack = s3c2416_irq_uart3_ack,
193   -};
194   -
195   -/* IRQ initialisation code */
196   -
197   -static int __init s3c2416_add_sub(unsigned int base,
198   - void (*demux)(unsigned int,
199   - struct irq_desc *),
200   - struct irq_chip *chip,
201   - unsigned int start, unsigned int end)
202   -{
203   - unsigned int irqno;
204   -
205   - irq_set_chip_and_handler(base, &s3c_irq_level_chip, handle_level_irq);
206   - irq_set_chained_handler(base, demux);
207   -
208   - for (irqno = start; irqno <= end; irqno++) {
209   - irq_set_chip_and_handler(irqno, chip, handle_level_irq);
210   - set_irq_flags(irqno, IRQF_VALID);
211   - }
212   -
213   - return 0;
214   -}
215   -
216   -static int __init s3c2416_irq_add(struct device *dev)
217   -{
218   - printk(KERN_INFO "S3C2416: IRQ Support\n");
219   -
220   - s3c2416_add_sub(IRQ_LCD, s3c2416_irq_demux_lcd, &s3c2416_irq_lcd,
221   - IRQ_S3C2443_LCD2, IRQ_S3C2443_LCD4);
222   -
223   - s3c2416_add_sub(IRQ_S3C2443_DMA, s3c2416_irq_demux_dma,
224   - &s3c2416_irq_dma, IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5);
225   -
226   - s3c2416_add_sub(IRQ_S3C2443_UART3, s3c2416_irq_demux_uart3,
227   - &s3c2416_irq_uart3,
228   - IRQ_S3C2443_RX3, IRQ_S3C2443_ERR3);
229   -
230   - s3c2416_add_sub(IRQ_WDT, s3c2416_irq_demux_wdtac97,
231   - &s3c2416_irq_wdtac97,
232   - IRQ_S3C2443_WDT, IRQ_S3C2443_AC97);
233   -
234   - return 0;
235   -}
236   -
237   -static struct subsys_interface s3c2416_irq_interface = {
238   - .name = "s3c2416_irq",
239   - .subsys = &s3c2416_subsys,
240   - .add_dev = s3c2416_irq_add,
241   -};
242   -
243   -static int __init s3c2416_irq_init(void)
244   -{
245   - return subsys_interface_register(&s3c2416_irq_interface);
246   -}
247   -
248   -arch_initcall(s3c2416_irq_init);
arch/arm/mach-s3c2416/mach-smdk2416.c
View file @ 26febf8
1   -/* linux/arch/arm/mach-s3c2416/mach-hanlin_v3c.c
2   - *
3   - * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
4   - * as part of OpenInkpot project
5   - * Copyright (c) 2009 Promwad Innovation Company
6   - * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
7   - *
8   - * This program is free software; you can redistribute it and/or modify
9   - * it under the terms of the GNU General Public License version 2 as
10   - * published by the Free Software Foundation.
11   - *
12   -*/
13   -
14   -#include <linux/kernel.h>
15   -#include <linux/types.h>
16   -#include <linux/interrupt.h>
17   -#include <linux/list.h>
18   -#include <linux/timer.h>
19   -#include <linux/init.h>
20   -#include <linux/serial_core.h>
21   -#include <linux/platform_device.h>
22   -#include <linux/io.h>
23   -#include <linux/mtd/partitions.h>
24   -#include <linux/gpio.h>
25   -#include <linux/fb.h>
26   -#include <linux/delay.h>
27   -
28   -#include <asm/mach/arch.h>
29   -#include <asm/mach/map.h>
30   -#include <asm/mach/irq.h>
31   -
32   -#include <mach/hardware.h>
33   -#include <asm/irq.h>
34   -#include <asm/mach-types.h>
35   -
36   -#include <plat/regs-serial.h>
37   -#include <mach/regs-gpio.h>
38   -#include <mach/regs-lcd.h>
39   -#include <mach/regs-s3c2443-clock.h>
40   -
41   -#include <mach/idle.h>
42   -#include <mach/leds-gpio.h>
43   -#include <plat/iic.h>
44   -
45   -#include <plat/s3c2416.h>
46   -#include <plat/gpio-cfg.h>
47   -#include <plat/clock.h>
48   -#include <plat/devs.h>
49   -#include <plat/cpu.h>
50   -#include <plat/nand.h>
51   -#include <plat/sdhci.h>
52   -#include <plat/udc.h>
53   -#include <linux/platform_data/s3c-hsudc.h>
54   -
55   -#include <plat/regs-fb-v4.h>
56   -#include <plat/fb.h>
57   -
58   -#include <plat/common-smdk.h>
59   -
60   -static struct map_desc smdk2416_iodesc[] __initdata = {
61   - /* ISA IO Space map (memory space selected by A24) */
62   -
63   - {
64   - .virtual = (u32)S3C24XX_VA_ISA_WORD,
65   - .pfn = __phys_to_pfn(S3C2410_CS2),
66   - .length = 0x10000,
67   - .type = MT_DEVICE,
68   - }, {
69   - .virtual = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
70   - .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
71   - .length = SZ_4M,
72   - .type = MT_DEVICE,
73   - }, {
74   - .virtual = (u32)S3C24XX_VA_ISA_BYTE,
75   - .pfn = __phys_to_pfn(S3C2410_CS2),
76   - .length = 0x10000,
77   - .type = MT_DEVICE,
78   - }, {
79   - .virtual = (u32)S3C24XX_VA_ISA_BYTE + 0x10000,
80   - .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
81   - .length = SZ_4M,
82   - .type = MT_DEVICE,
83   - }
84   -};
85   -
86   -#define UCON (S3C2410_UCON_DEFAULT | \
87   - S3C2440_UCON_PCLK | \
88   - S3C2443_UCON_RXERR_IRQEN)
89   -
90   -#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
91   -
92   -#define UFCON (S3C2410_UFCON_RXTRIG8 | \
93   - S3C2410_UFCON_FIFOMODE | \
94   - S3C2440_UFCON_TXTRIG16)
95   -
96   -static struct s3c2410_uartcfg smdk2416_uartcfgs[] __initdata = {
97   - [0] = {
98   - .hwport = 0,
99   - .flags = 0,
100   - .ucon = UCON,
101   - .ulcon = ULCON,
102   - .ufcon = UFCON,
103   - },
104   - [1] = {
105   - .hwport = 1,
106   - .flags = 0,
107   - .ucon = UCON,
108   - .ulcon = ULCON,
109   - .ufcon = UFCON,
110   - },
111   - /* IR port */
112   - [2] = {
113   - .hwport = 2,
114   - .flags = 0,
115   - .ucon = UCON,
116   - .ulcon = ULCON | 0x50,
117   - .ufcon = UFCON,
118   - },
119   - [3] = {
120   - .hwport = 3,
121   - .flags = 0,
122   - .ucon = UCON,
123   - .ulcon = ULCON,
124   - .ufcon = UFCON,
125   - }
126   -};
127   -
128   -void smdk2416_hsudc_gpio_init(void)
129   -{
130   - s3c_gpio_setpull(S3C2410_GPH(14), S3C_GPIO_PULL_UP);
131   - s3c_gpio_setpull(S3C2410_GPF(2), S3C_GPIO_PULL_NONE);
132   - s3c_gpio_cfgpin(S3C2410_GPH(14), S3C_GPIO_SFN(1));
133   - s3c2410_modify_misccr(S3C2416_MISCCR_SEL_SUSPND, 0);
134   -}
135   -
136   -void smdk2416_hsudc_gpio_uninit(void)
137   -{
138   - s3c2410_modify_misccr(S3C2416_MISCCR_SEL_SUSPND, 1);
139   - s3c_gpio_setpull(S3C2410_GPH(14), S3C_GPIO_PULL_NONE);
140   - s3c_gpio_cfgpin(S3C2410_GPH(14), S3C_GPIO_SFN(0));
141   -}
142   -
143   -struct s3c24xx_hsudc_platdata smdk2416_hsudc_platdata = {
144   - .epnum = 9,
145   - .gpio_init = smdk2416_hsudc_gpio_init,
146   - .gpio_uninit = smdk2416_hsudc_gpio_uninit,
147   -};
148   -
149   -struct s3c_fb_pd_win smdk2416_fb_win[] = {
150   - [0] = {
151   - /* think this is the same as the smdk6410 */
152   - .win_mode = {
153   - .pixclock = 41094,
154   - .left_margin = 8,
155   - .right_margin = 13,
156   - .upper_margin = 7,
157   - .lower_margin = 5,
158   - .hsync_len = 3,
159   - .vsync_len = 1,
160   - .xres = 800,
161   - .yres = 480,
162   - },
163   - .default_bpp = 16,
164   - .max_bpp = 32,
165   - },
166   -};
167   -
168   -static void s3c2416_fb_gpio_setup_24bpp(void)
169   -{
170   - unsigned int gpio;
171   -
172   - for (gpio = S3C2410_GPC(1); gpio <= S3C2410_GPC(4); gpio++) {
173   - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
174   - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
175   - }
176   -
177   - for (gpio = S3C2410_GPC(8); gpio <= S3C2410_GPC(15); gpio++) {
178   - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
179   - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
180   - }
181   -
182   - for (gpio = S3C2410_GPD(0); gpio <= S3C2410_GPD(15); gpio++) {
183   - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
184   - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
185   - }
186   -}
187   -
188   -static struct s3c_fb_platdata smdk2416_fb_platdata = {
189   - .win[0] = &smdk2416_fb_win[0],
190   - .setup_gpio = s3c2416_fb_gpio_setup_24bpp,
191   - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
192   - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
193   -};
194   -
195   -static struct s3c_sdhci_platdata smdk2416_hsmmc0_pdata __initdata = {
196   - .max_width = 4,
197   - .cd_type = S3C_SDHCI_CD_GPIO,
198   - .ext_cd_gpio = S3C2410_GPF(1),
199   - .ext_cd_gpio_invert = 1,
200   -};
201   -
202   -static struct s3c_sdhci_platdata smdk2416_hsmmc1_pdata __initdata = {
203   - .max_width = 4,
204   - .cd_type = S3C_SDHCI_CD_NONE,
205   -};
206   -
207   -static struct platform_device *smdk2416_devices[] __initdata = {
208   - &s3c_device_fb,
209   - &s3c_device_wdt,
210   - &s3c_device_ohci,
211   - &s3c_device_i2c0,
212   - &s3c_device_hsmmc0,
213   - &s3c_device_hsmmc1,
214   - &s3c_device_usb_hsudc,
215   -};
216   -
217   -static void __init smdk2416_map_io(void)
218   -{
219   - s3c24xx_init_io(smdk2416_iodesc, ARRAY_SIZE(smdk2416_iodesc));
220   - s3c24xx_init_clocks(12000000);
221   - s3c24xx_init_uarts(smdk2416_uartcfgs, ARRAY_SIZE(smdk2416_uartcfgs));
222   -}
223   -
224   -static void __init smdk2416_machine_init(void)
225   -{
226   - s3c_i2c0_set_platdata(NULL);
227   - s3c_fb_set_platdata(&smdk2416_fb_platdata);
228   -
229   - s3c_sdhci0_set_platdata(&smdk2416_hsmmc0_pdata);
230   - s3c_sdhci1_set_platdata(&smdk2416_hsmmc1_pdata);
231   -
232   - s3c24xx_hsudc_set_platdata(&smdk2416_hsudc_platdata);
233   -
234   - gpio_request(S3C2410_GPB(4), "USBHost Power");
235   - gpio_direction_output(S3C2410_GPB(4), 1);
236   -
237   - gpio_request(S3C2410_GPB(3), "Display Power");
238   - gpio_direction_output(S3C2410_GPB(3), 1);
239   -
240   - gpio_request(S3C2410_GPB(1), "Display Reset");
241   - gpio_direction_output(S3C2410_GPB(1), 1);
242   -
243   - platform_add_devices(smdk2416_devices, ARRAY_SIZE(smdk2416_devices));
244   - smdk_machine_init();
245   -}
246   -
247   -MACHINE_START(SMDK2416, "SMDK2416")
248   - /* Maintainer: Yauhen Kharuzhy <jekhor@gmail.com> */
249   - .atag_offset = 0x100,
250   -
251   - .init_irq = s3c24xx_init_irq,
252   - .map_io = smdk2416_map_io,
253   - .init_machine = smdk2416_machine_init,
254   - .timer = &s3c24xx_timer,
255   - .restart = s3c2416_restart,
256   -MACHINE_END
arch/arm/mach-s3c2416/pm.c
View file @ 26febf8
1   -/* linux/arch/arm/mach-s3c2416/pm.c
2   - *
3   - * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4   - * http://www.samsung.com
5   - *
6   - * S3C2416 - PM support (Based on Ben Dooks' S3C2412 PM support)
7   - *
8   - * This program is free software; you can redistribute it and/or modify
9   - * it under the terms of the GNU General Public License version 2 as
10   - * published by the Free Software Foundation.
11   -*/
12   -
13   -#include <linux/device.h>
14   -#include <linux/syscore_ops.h>
15   -#include <linux/io.h>
16   -
17   -#include <asm/cacheflush.h>
18   -
19   -#include <mach/regs-power.h>
20   -#include <mach/regs-s3c2443-clock.h>
21   -
22   -#include <plat/cpu.h>
23   -#include <plat/pm.h>
24   -
25   -extern void s3c2412_sleep_enter(void);
26   -
27   -static int s3c2416_cpu_suspend(unsigned long arg)
28   -{
29   - /* enable wakeup sources regardless of battery state */
30   - __raw_writel(S3C2443_PWRCFG_SLEEP, S3C2443_PWRCFG);
31   -
32   - /* set the mode as sleep, 2BED represents "Go to BED" */
33   - __raw_writel(0x2BED, S3C2443_PWRMODE);
34   -
35   - s3c2412_sleep_enter();
36   -
37   - panic("sleep resumed to originator?");
38   -}
39   -
40   -static void s3c2416_pm_prepare(void)
41   -{
42   - /*
43   - * write the magic value u-boot uses to check for resume into
44   - * the INFORM0 register, and ensure INFORM1 is set to the
45   - * correct address to resume from.
46   - */
47   - __raw_writel(0x2BED, S3C2412_INFORM0);
48   - __raw_writel(virt_to_phys(s3c_cpu_resume), S3C2412_INFORM1);
49   -}
50   -
51   -static int s3c2416_pm_add(struct device *dev)
52   -{
53   - pm_cpu_prep = s3c2416_pm_prepare;
54   - pm_cpu_sleep = s3c2416_cpu_suspend;
55   -
56   - return 0;
57   -}
58   -
59   -static struct subsys_interface s3c2416_pm_interface = {
60   - .name = "s3c2416_pm",
61   - .subsys = &s3c2416_subsys,
62   - .add_dev = s3c2416_pm_add,
63   -};
64   -
65   -static __init int s3c2416_pm_init(void)
66   -{
67   - return subsys_interface_register(&s3c2416_pm_interface);
68   -}
69   -
70   -arch_initcall(s3c2416_pm_init);
71   -
72   -
73   -static void s3c2416_pm_resume(void)
74   -{
75   - /* unset the return-from-sleep amd inform flags */
76   - __raw_writel(0x0, S3C2443_PWRMODE);
77   - __raw_writel(0x0, S3C2412_INFORM0);
78   - __raw_writel(0x0, S3C2412_INFORM1);
79   -}
80   -
81   -struct syscore_ops s3c2416_pm_syscore_ops = {
82   - .resume = s3c2416_pm_resume,
83   -};
arch/arm/mach-s3c2416/s3c2416.c
View file @ 26febf8
1   -/* linux/arch/arm/mach-s3c2416/s3c2416.c
2   - *
3   - * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
4   - * as part of OpenInkpot project
5   - * Copyright (c) 2009 Promwad Innovation Company
6   - * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
7   - *
8   - * Samsung S3C2416 Mobile CPU support
9   - *
10   - * This program is free software; you can redistribute it and/or modify
11   - * it under the terms of the GNU General Public License as published by
12   - * the Free Software Foundation; either version 2 of the License, or
13   - * (at your option) any later version.
14   - *
15   - * This program is distributed in the hope that it will be useful,
16   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
17   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18   - * GNU General Public License for more details.
19   - *
20   - * You should have received a copy of the GNU General Public License
21   - * along with this program; if not, write to the Free Software
22   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23   -*/
24   -
25   -#include <linux/kernel.h>
26   -#include <linux/types.h>
27   -#include <linux/interrupt.h>
28   -#include <linux/list.h>
29   -#include <linux/timer.h>
30   -#include <linux/init.h>
31   -#include <linux/gpio.h>
32   -#include <linux/platform_device.h>
33   -#include <linux/serial_core.h>
34   -#include <linux/device.h>
35   -#include <linux/syscore_ops.h>
36   -#include <linux/clk.h>
37   -#include <linux/io.h>
38   -
39   -#include <asm/mach/arch.h>
40   -#include <asm/mach/map.h>
41   -#include <asm/mach/irq.h>
42   -
43   -#include <mach/hardware.h>
44   -#include <asm/proc-fns.h>
45   -#include <asm/irq.h>
46   -
47   -#include <mach/idle.h>
48   -#include <mach/regs-s3c2443-clock.h>
49   -
50   -#include <plat/gpio-core.h>
51   -#include <plat/gpio-cfg.h>
52   -#include <plat/gpio-cfg-helpers.h>
53   -#include <plat/s3c2416.h>
54   -#include <plat/devs.h>
55   -#include <plat/cpu.h>
56   -#include <plat/sdhci.h>
57   -#include <plat/pm.h>
58   -
59   -#include <plat/iic-core.h>
60   -#include <plat/fb-core.h>
61   -#include <plat/nand-core.h>
62   -#include <plat/adc-core.h>
63   -
64   -static struct map_desc s3c2416_iodesc[] __initdata = {
65   - IODESC_ENT(WATCHDOG),
66   - IODESC_ENT(CLKPWR),
67   - IODESC_ENT(TIMER),
68   -};
69   -
70   -struct bus_type s3c2416_subsys = {
71   - .name = "s3c2416-core",
72   - .dev_name = "s3c2416-core",
73   -};
74   -
75   -static struct device s3c2416_dev = {
76   - .bus = &s3c2416_subsys,
77   -};
78   -
79   -void s3c2416_restart(char mode, const char *cmd)
80   -{
81   - if (mode == 's')
82   - soft_restart(0);
83   -
84   - __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST);
85   -}
86   -
87   -int __init s3c2416_init(void)
88   -{
89   - printk(KERN_INFO "S3C2416: Initializing architecture\n");
90   -
91   - /* s3c24xx_idle = s3c2416_idle; */
92   -
93   - /* change WDT IRQ number */
94   - s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT;
95   - s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT;
96   -
97   - /* the i2c devices are directly compatible with s3c2440 */
98   - s3c_i2c0_setname("s3c2440-i2c");
99   - s3c_i2c1_setname("s3c2440-i2c");
100   -
101   - s3c_fb_setname("s3c2443-fb");
102   -
103   - s3c_adc_setname("s3c2416-adc");
104   -
105   -#ifdef CONFIG_PM
106   - register_syscore_ops(&s3c2416_pm_syscore_ops);
107   -#endif
108   - register_syscore_ops(&s3c24xx_irq_syscore_ops);
109   -
110   - return device_register(&s3c2416_dev);
111   -}
112   -
113   -void __init s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no)
114   -{
115   - s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
116   -
117   - s3c_nand_setname("s3c2412-nand");
118   -}
119   -
120   -/* s3c2416_map_io
121   - *
122   - * register the standard cpu IO areas, and any passed in from the
123   - * machine specific initialisation.
124   - */
125   -
126   -void __init s3c2416_map_io(void)
127   -{
128   - s3c24xx_gpiocfg_default.set_pull = samsung_gpio_setpull_updown;
129   - s3c24xx_gpiocfg_default.get_pull = samsung_gpio_getpull_updown;
130   -
131   - /* initialize device information early */
132   - s3c2416_default_sdhci0();
133   - s3c2416_default_sdhci1();
134   -
135   - iotable_init(s3c2416_iodesc, ARRAY_SIZE(s3c2416_iodesc));
136   -}
137   -
138   -/* need to register the subsystem before we actually register the device, and
139   - * we also need to ensure that it has been initialised before any of the
140   - * drivers even try to use it (even if not on an s3c2416 based system)
141   - * as a driver which may support both 2443 and 2440 may try and use it.
142   -*/
143   -
144   -static int __init s3c2416_core_init(void)
145   -{
146   - return subsys_system_register(&s3c2416_subsys, NULL);
147   -}
148   -
149   -core_initcall(s3c2416_core_init);
arch/arm/mach-s3c2416/setup-sdhci-gpio.c
View file @ 26febf8
1   -/* linux/arch/arm/plat-s3c2416/setup-sdhci-gpio.c
2   - *
3   - * Copyright 2010 Promwad Innovation Company
4   - * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
5   - *
6   - * S3C2416 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
7   - *
8   - * Based on mach-s3c64xx/setup-sdhci-gpio.c
9   - *
10   - * This program is free software; you can redistribute it and/or modify
11   - * it under the terms of the GNU General Public License version 2 as
12   - * published by the Free Software Foundation.
13   -*/
14   -
15   -#include <linux/kernel.h>
16   -#include <linux/types.h>
17   -#include <linux/interrupt.h>
18   -#include <linux/platform_device.h>
19   -#include <linux/io.h>
20   -#include <linux/gpio.h>
21   -
22   -#include <mach/regs-gpio.h>
23   -#include <plat/gpio-cfg.h>
24   -
25   -void s3c2416_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
26   -{
27   - s3c_gpio_cfgrange_nopull(S3C2410_GPE(5), 2 + width, S3C_GPIO_SFN(2));
28   -}
29   -
30   -void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
31   -{
32   - s3c_gpio_cfgrange_nopull(S3C2410_GPL(0), width, S3C_GPIO_SFN(2));
33   - s3c_gpio_cfgrange_nopull(S3C2410_GPL(8), 2, S3C_GPIO_SFN(2));
34   -}
arch/arm/mach-s3c24xx/Kconfig
Diff comments   View file @ 26febf8
... ... @@ -35,6 +35,18 @@
35 35 help
36 36 Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
37 37  
  38 +config CPU_S3C2416
  39 + bool "SAMSUNG S3C2416/S3C2450"
  40 + depends on ARCH_S3C24XX
  41 + select CPU_ARM926T
  42 + select CPU_LLSERIAL_S3C2440
  43 + select SAMSUNG_CLKSRC
  44 + select S3C2443_CLOCK
  45 + select S3C2416_DMA if S3C24XX_DMA
  46 + select S3C2416_PM if PM
  47 + help
  48 + Support for the S3C2416 SoC from the S3C24XX line
  49 +
38 50 if CPU_S3C2410
39 51  
40 52 config S3C2410_DMA
... ... @@ -247,6 +259,41 @@
247 259 Say Y here if you are using an VSTMS board
248 260  
249 261 endif # CPU_S3C2412
  262 +
  263 +if CPU_S3C2416
  264 +
  265 +config S3C2416_PM
  266 + bool
  267 + select S3C2412_PM_SLEEP
  268 + help
  269 + Internal config node to apply S3C2416 power management
  270 +
  271 +config S3C2416_SETUP_SDHCI
  272 + bool
  273 + select S3C2416_SETUP_SDHCI_GPIO
  274 + help
  275 + Internal helper functions for S3C2416 based SDHCI systems
  276 +
  277 +config S3C2416_SETUP_SDHCI_GPIO
  278 + bool
  279 + help
  280 + Common setup code for SDHCI gpio.
  281 +
  282 +comment "S3C2416 Boards"
  283 +
  284 +config MACH_SMDK2416
  285 + bool "SMDK2416"
  286 + select MACH_SMDK
  287 + select S3C_DEV_FB
  288 + select S3C_DEV_HSMMC
  289 + select S3C_DEV_HSMMC1
  290 + select S3C_DEV_NAND
  291 + select S3C_DEV_USB_HOST
  292 + select S3C2416_SETUP_SDHCI
  293 + help
  294 + Say Y here if you are using an SMDK2416
  295 +
  296 +endif # CPU_S3C2416
250 297  
251 298 endmenu # SAMSUNG S3C24XX SoCs Support
252 299  
arch/arm/mach-s3c24xx/Makefile
Diff comments   View file @ 26febf8
... ... @@ -23,6 +23,9 @@
23 23 obj-$(CONFIG_S3C2412_PM) += pm-s3c2412.o
24 24 obj-$(CONFIG_S3C2412_PM_SLEEP) += sleep-s3c2412.o
25 25  
  26 +obj-$(CONFIG_CPU_S3C2416) += s3c2416.o irq-s3c2416.o clock-s3c2416.o
  27 +obj-$(CONFIG_S3C2416_PM) += pm-s3c2416.o
  28 +
26 29 #
27 30 # machine support
28 31 # following is ordered alphabetically by option text.
... ... @@ -45,6 +48,8 @@
45 48 obj-$(CONFIG_MACH_SMDK2413) += mach-smdk2413.o
46 49 obj-$(CONFIG_MACH_VSTMS) += mach-vstms.o
47 50  
  51 +obj-$(CONFIG_MACH_SMDK2416) += mach-smdk2416.o
  52 +
48 53 # common bits of machine support
49 54  
50 55 obj-$(CONFIG_SIMTEC_NOR) += nor-simtec.o
... ... @@ -52,4 +57,8 @@
52 57 # machine additions
53 58  
54 59 obj-$(CONFIG_MACH_BAST_IDE) += bast-ide.o
  60 +
  61 +# device setup
  62 +
  63 +obj-$(CONFIG_S3C2416_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
arch/arm/mach-s3c24xx/clock-s3c2416.c
Diff comments   View file @ 26febf8
  1 +/* linux/arch/arm/mach-s3c2416/clock.c
  2 + *
  3 + * Copyright (c) 2010 Simtec Electronics
  4 + * Copyright (c) 2010 Ben Dooks <ben-linux@fluff.org>
  5 + *
  6 + * S3C2416 Clock control support
  7 + *
  8 + * This program is free software; you can redistribute it and/or modify
  9 + * it under the terms of the GNU General Public License as published by
  10 + * the Free Software Foundation; either version 2 of the License, or
  11 + * (at your option) any later version.
  12 + */
  13 +
  14 +#include <linux/init.h>
  15 +#include <linux/clk.h>
  16 +
  17 +#include <plat/s3c2416.h>
  18 +#include <plat/clock.h>
  19 +#include <plat/clock-clksrc.h>
  20 +#include <plat/cpu.h>
  21 +
  22 +#include <plat/cpu-freq.h>
  23 +#include <plat/pll.h>
  24 +
  25 +#include <asm/mach/map.h>
  26 +
  27 +#include <mach/regs-clock.h>
  28 +#include <mach/regs-s3c2443-clock.h>
  29 +
  30 +/* armdiv
  31 + *
  32 + * this clock is sourced from msysclk and can have a number of
  33 + * divider values applied to it to then be fed into armclk.
  34 + * The real clock definition is done in s3c2443-clock.c,
  35 + * only the armdiv divisor table must be defined here.
  36 +*/
  37 +
  38 +static unsigned int armdiv[8] = {
  39 + [0] = 1,
  40 + [1] = 2,
  41 + [2] = 3,
  42 + [3] = 4,
  43 + [5] = 6,
  44 + [7] = 8,
  45 +};
  46 +
  47 +static struct clksrc_clk hsspi_eplldiv = {
  48 + .clk = {
  49 + .name = "hsspi-eplldiv",
  50 + .parent = &clk_esysclk.clk,
  51 + .ctrlbit = (1 << 14),
  52 + .enable = s3c2443_clkcon_enable_s,
  53 + },
  54 + .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 24 },
  55 +};
  56 +
  57 +static struct clk *hsspi_sources[] = {
  58 + [0] = &hsspi_eplldiv.clk,
  59 + [1] = NULL, /* to fix */
  60 +};
  61 +
  62 +static struct clksrc_clk hsspi_mux = {
  63 + .clk = {
  64 + .name = "hsspi-if",
  65 + },
  66 + .sources = &(struct clksrc_sources) {
  67 + .sources = hsspi_sources,
  68 + .nr_sources = ARRAY_SIZE(hsspi_sources),
  69 + },
  70 + .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 18 },
  71 +};
  72 +
  73 +static struct clksrc_clk hsmmc_div[] = {
  74 + [0] = {
  75 + .clk = {
  76 + .name = "hsmmc-div",
  77 + .devname = "s3c-sdhci.0",
  78 + .parent = &clk_esysclk.clk,
  79 + },
  80 + .reg_div = { .reg = S3C2416_CLKDIV2, .size = 2, .shift = 6 },
  81 + },
  82 + [1] = {
  83 + .clk = {
  84 + .name = "hsmmc-div",
  85 + .devname = "s3c-sdhci.1",
  86 + .parent = &clk_esysclk.clk,
  87 + },
  88 + .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 },
  89 + },
  90 +};
  91 +
  92 +static struct clksrc_clk hsmmc_mux0 = {
  93 + .clk = {
  94 + .name = "hsmmc-if",
  95 + .devname = "s3c-sdhci.0",
  96 + .ctrlbit = (1 << 6),
  97 + .enable = s3c2443_clkcon_enable_s,
  98 + },
  99 + .sources = &(struct clksrc_sources) {
  100 + .nr_sources = 2,
  101 + .sources = (struct clk * []) {
  102 + [0] = &hsmmc_div[0].clk,
  103 + [1] = NULL, /* to fix */
  104 + },
  105 + },
  106 + .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 16 },
  107 +};
  108 +
  109 +static struct clksrc_clk hsmmc_mux1 = {
  110 + .clk = {
  111 + .name = "hsmmc-if",
  112 + .devname = "s3c-sdhci.1",
  113 + .ctrlbit = (1 << 12),
  114 + .enable = s3c2443_clkcon_enable_s,
  115 + },
  116 + .sources = &(struct clksrc_sources) {
  117 + .nr_sources = 2,
  118 + .sources = (struct clk * []) {
  119 + [0] = &hsmmc_div[1].clk,
  120 + [1] = NULL, /* to fix */
  121 + },
  122 + },
  123 + .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 17 },
  124 +};
  125 +
  126 +static struct clk hsmmc0_clk = {
  127 + .name = "hsmmc",
  128 + .devname = "s3c-sdhci.0",
  129 + .parent = &clk_h,
  130 + .enable = s3c2443_clkcon_enable_h,
  131 + .ctrlbit = S3C2416_HCLKCON_HSMMC0,
  132 +};
  133 +
  134 +void __init_or_cpufreq s3c2416_setup_clocks(void)
  135 +{
  136 + s3c2443_common_setup_clocks(s3c2416_get_pll);
  137 +}
  138 +
  139 +
  140 +static struct clksrc_clk *clksrcs[] __initdata = {
  141 + &hsspi_eplldiv,
  142 + &hsspi_mux,
  143 + &hsmmc_div[0],
  144 + &hsmmc_div[1],
  145 + &hsmmc_mux0,
  146 + &hsmmc_mux1,
  147 +};
  148 +
  149 +static struct clk_lookup s3c2416_clk_lookup[] = {
  150 + CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &hsmmc0_clk),
  151 + CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &hsmmc_mux0.clk),
  152 + CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &hsmmc_mux1.clk),
  153 +};
  154 +
  155 +void __init s3c2416_init_clocks(int xtal)
  156 +{
  157 + u32 epllcon = __raw_readl(S3C2443_EPLLCON);
  158 + u32 epllcon1 = __raw_readl(S3C2443_EPLLCON+4);
  159 + int ptr;
  160 +
  161 + /* s3c2416 EPLL compatible with s3c64xx */
  162 + clk_epll.rate = s3c_get_pll6553x(xtal, epllcon, epllcon1);
  163 +
  164 + clk_epll.parent = &clk_epllref.clk;
  165 +
  166 + s3c2443_common_init_clocks(xtal, s3c2416_get_pll,
  167 + armdiv, ARRAY_SIZE(armdiv),
  168 + S3C2416_CLKDIV0_ARMDIV_MASK);
  169 +
  170 + for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
  171 + s3c_register_clksrc(clksrcs[ptr], 1);
  172 +
  173 + s3c24xx_register_clock(&hsmmc0_clk);
  174 + clkdev_add_table(s3c2416_clk_lookup, ARRAY_SIZE(s3c2416_clk_lookup));
  175 +
  176 + s3c_pwmclk_init();
  177 +
  178 +}
arch/arm/mach-s3c24xx/irq-s3c2416.c
Diff comments   View file @ 26febf8
  1 +/* linux/arch/arm/mach-s3c2416/irq.c
  2 + *
  3 + * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
  4 + * as part of OpenInkpot project
  5 + * Copyright (c) 2009 Promwad Innovation Company
  6 + * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
  7 + *
  8 + * This program is free software; you can redistribute it and/or modify
  9 + * it under the terms of the GNU General Public License as published by
  10 + * the Free Software Foundation; either version 2 of the License, or
  11 + * (at your option) any later version.
  12 + *
  13 + * This program is distributed in the hope that it will be useful,
  14 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16 + * GNU General Public License for more details.
  17 + *
  18 + * You should have received a copy of the GNU General Public License
  19 + * along with this program; if not, write to the Free Software
  20 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21 + *
  22 +*/
  23 +
  24 +#include <linux/init.h>
  25 +#include <linux/module.h>
  26 +#include <linux/interrupt.h>
  27 +#include <linux/ioport.h>
  28 +#include <linux/device.h>
  29 +#include <linux/io.h>
  30 +
  31 +#include <mach/hardware.h>
  32 +#include <asm/irq.h>
  33 +
  34 +#include <asm/mach/irq.h>
  35 +
  36 +#include <mach/regs-irq.h>
  37 +#include <mach/regs-gpio.h>
  38 +
  39 +#include <plat/cpu.h>
  40 +#include <plat/pm.h>
  41 +#include <plat/irq.h>
  42 +
  43 +#define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1)
  44 +
  45 +static inline void s3c2416_irq_demux(unsigned int irq, unsigned int len)
  46 +{
  47 + unsigned int subsrc, submsk;
  48 + unsigned int end;
  49 +
  50 + /* read the current pending interrupts, and the mask
  51 + * for what it is available */
  52 +
  53 + subsrc = __raw_readl(S3C2410_SUBSRCPND);
  54 + submsk = __raw_readl(S3C2410_INTSUBMSK);
  55 +
  56 + subsrc &= ~submsk;
  57 + subsrc >>= (irq - S3C2410_IRQSUB(0));
  58 + subsrc &= (1 << len)-1;
  59 +
  60 + end = len + irq;
  61 +
  62 + for (; irq < end && subsrc; irq++) {
  63 + if (subsrc & 1)
  64 + generic_handle_irq(irq);
  65 +
  66 + subsrc >>= 1;
  67 + }
  68 +}
  69 +
  70 +/* WDT/AC97 sub interrupts */
  71 +
  72 +static void s3c2416_irq_demux_wdtac97(unsigned int irq, struct irq_desc *desc)
  73 +{
  74 + s3c2416_irq_demux(IRQ_S3C2443_WDT, 4);
  75 +}
  76 +
  77 +#define INTMSK_WDTAC97 (1UL << (IRQ_WDT - IRQ_EINT0))
  78 +#define SUBMSK_WDTAC97 INTMSK(IRQ_S3C2443_WDT, IRQ_S3C2443_AC97)
  79 +
  80 +static void s3c2416_irq_wdtac97_mask(struct irq_data *data)
  81 +{
  82 + s3c_irqsub_mask(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
  83 +}
  84 +
  85 +static void s3c2416_irq_wdtac97_unmask(struct irq_data *data)
  86 +{
  87 + s3c_irqsub_unmask(data->irq, INTMSK_WDTAC97);
  88 +}
  89 +
  90 +static void s3c2416_irq_wdtac97_ack(struct irq_data *data)
  91 +{
  92 + s3c_irqsub_maskack(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
  93 +}
  94 +
  95 +static struct irq_chip s3c2416_irq_wdtac97 = {
  96 + .irq_mask = s3c2416_irq_wdtac97_mask,
  97 + .irq_unmask = s3c2416_irq_wdtac97_unmask,
  98 + .irq_ack = s3c2416_irq_wdtac97_ack,
  99 +};
  100 +
  101 +/* LCD sub interrupts */
  102 +
  103 +static void s3c2416_irq_demux_lcd(unsigned int irq, struct irq_desc *desc)
  104 +{
  105 + s3c2416_irq_demux(IRQ_S3C2443_LCD1, 4);
  106 +}
  107 +
  108 +#define INTMSK_LCD (1UL << (IRQ_LCD - IRQ_EINT0))
  109 +#define SUBMSK_LCD INTMSK(IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4)
  110 +
  111 +static void s3c2416_irq_lcd_mask(struct irq_data *data)
  112 +{
  113 + s3c_irqsub_mask(data->irq, INTMSK_LCD, SUBMSK_LCD);
  114 +}
  115 +
  116 +static void s3c2416_irq_lcd_unmask(struct irq_data *data)
  117 +{
  118 + s3c_irqsub_unmask(data->irq, INTMSK_LCD);
  119 +}
  120 +
  121 +static void s3c2416_irq_lcd_ack(struct irq_data *data)
  122 +{
  123 + s3c_irqsub_maskack(data->irq, INTMSK_LCD, SUBMSK_LCD);
  124 +}
  125 +
  126 +static struct irq_chip s3c2416_irq_lcd = {
  127 + .irq_mask = s3c2416_irq_lcd_mask,
  128 + .irq_unmask = s3c2416_irq_lcd_unmask,
  129 + .irq_ack = s3c2416_irq_lcd_ack,
  130 +};
  131 +
  132 +/* DMA sub interrupts */
  133 +
  134 +static void s3c2416_irq_demux_dma(unsigned int irq, struct irq_desc *desc)
  135 +{
  136 + s3c2416_irq_demux(IRQ_S3C2443_DMA0, 6);
  137 +}
  138 +
  139 +#define INTMSK_DMA (1UL << (IRQ_S3C2443_DMA - IRQ_EINT0))
  140 +#define SUBMSK_DMA INTMSK(IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5)
  141 +
  142 +
  143 +static void s3c2416_irq_dma_mask(struct irq_data *data)
  144 +{
  145 + s3c_irqsub_mask(data->irq, INTMSK_DMA, SUBMSK_DMA);
  146 +}
  147 +
  148 +static void s3c2416_irq_dma_unmask(struct irq_data *data)
  149 +{
  150 + s3c_irqsub_unmask(data->irq, INTMSK_DMA);
  151 +}
  152 +
  153 +static void s3c2416_irq_dma_ack(struct irq_data *data)
  154 +{
  155 + s3c_irqsub_maskack(data->irq, INTMSK_DMA, SUBMSK_DMA);
  156 +}
  157 +
  158 +static struct irq_chip s3c2416_irq_dma = {
  159 + .irq_mask = s3c2416_irq_dma_mask,
  160 + .irq_unmask = s3c2416_irq_dma_unmask,
  161 + .irq_ack = s3c2416_irq_dma_ack,
  162 +};
  163 +
  164 +/* UART3 sub interrupts */
  165 +
  166 +static void s3c2416_irq_demux_uart3(unsigned int irq, struct irq_desc *desc)
  167 +{
  168 + s3c2416_irq_demux(IRQ_S3C2443_RX3, 3);
  169 +}
  170 +
  171 +#define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0))
  172 +#define SUBMSK_UART3 (0x7 << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0)))
  173 +
  174 +static void s3c2416_irq_uart3_mask(struct irq_data *data)
  175 +{
  176 + s3c_irqsub_mask(data->irq, INTMSK_UART3, SUBMSK_UART3);
  177 +}
  178 +
  179 +static void s3c2416_irq_uart3_unmask(struct irq_data *data)
  180 +{
  181 + s3c_irqsub_unmask(data->irq, INTMSK_UART3);
  182 +}
  183 +
  184 +static void s3c2416_irq_uart3_ack(struct irq_data *data)
  185 +{
  186 + s3c_irqsub_maskack(data->irq, INTMSK_UART3, SUBMSK_UART3);
  187 +}
  188 +
  189 +static struct irq_chip s3c2416_irq_uart3 = {
  190 + .irq_mask = s3c2416_irq_uart3_mask,
  191 + .irq_unmask = s3c2416_irq_uart3_unmask,
  192 + .irq_ack = s3c2416_irq_uart3_ack,
  193 +};
  194 +
  195 +/* IRQ initialisation code */
  196 +
  197 +static int __init s3c2416_add_sub(unsigned int base,
  198 + void (*demux)(unsigned int,
  199 + struct irq_desc *),
  200 + struct irq_chip *chip,
  201 + unsigned int start, unsigned int end)
  202 +{
  203 + unsigned int irqno;
  204 +
  205 + irq_set_chip_and_handler(base, &s3c_irq_level_chip, handle_level_irq);
  206 + irq_set_chained_handler(base, demux);
  207 +
  208 + for (irqno = start; irqno <= end; irqno++) {
  209 + irq_set_chip_and_handler(irqno, chip, handle_level_irq);
  210 + set_irq_flags(irqno, IRQF_VALID);
  211 + }
  212 +
  213 + return 0;
  214 +}
  215 +
  216 +static int __init s3c2416_irq_add(struct device *dev)
  217 +{
  218 + printk(KERN_INFO "S3C2416: IRQ Support\n");
  219 +
  220 + s3c2416_add_sub(IRQ_LCD, s3c2416_irq_demux_lcd, &s3c2416_irq_lcd,
  221 + IRQ_S3C2443_LCD2, IRQ_S3C2443_LCD4);
  222 +
  223 + s3c2416_add_sub(IRQ_S3C2443_DMA, s3c2416_irq_demux_dma,
  224 + &s3c2416_irq_dma, IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5);
  225 +
  226 + s3c2416_add_sub(IRQ_S3C2443_UART3, s3c2416_irq_demux_uart3,
  227 + &s3c2416_irq_uart3,
  228 + IRQ_S3C2443_RX3, IRQ_S3C2443_ERR3);
  229 +
  230 + s3c2416_add_sub(IRQ_WDT, s3c2416_irq_demux_wdtac97,
  231 + &s3c2416_irq_wdtac97,
  232 + IRQ_S3C2443_WDT, IRQ_S3C2443_AC97);
  233 +
  234 + return 0;
  235 +}
  236 +
  237 +static struct subsys_interface s3c2416_irq_interface = {
  238 + .name = "s3c2416_irq",
  239 + .subsys = &s3c2416_subsys,
  240 + .add_dev = s3c2416_irq_add,
  241 +};
  242 +
  243 +static int __init s3c2416_irq_init(void)
  244 +{
  245 + return subsys_interface_register(&s3c2416_irq_interface);
  246 +}
  247 +
  248 +arch_initcall(s3c2416_irq_init);
arch/arm/mach-s3c24xx/mach-smdk2416.c
Diff comments   View file @ 26febf8
  1 +/* linux/arch/arm/mach-s3c2416/mach-hanlin_v3c.c
  2 + *
  3 + * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
  4 + * as part of OpenInkpot project
  5 + * Copyright (c) 2009 Promwad Innovation Company
  6 + * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
  7 + *
  8 + * This program is free software; you can redistribute it and/or modify
  9 + * it under the terms of the GNU General Public License version 2 as
  10 + * published by the Free Software Foundation.
  11 + *
  12 +*/
  13 +
  14 +#include <linux/kernel.h>
  15 +#include <linux/types.h>
  16 +#include <linux/interrupt.h>
  17 +#include <linux/list.h>
  18 +#include <linux/timer.h>
  19 +#include <linux/init.h>
  20 +#include <linux/serial_core.h>
  21 +#include <linux/platform_device.h>
  22 +#include <linux/io.h>
  23 +#include <linux/mtd/partitions.h>
  24 +#include <linux/gpio.h>
  25 +#include <linux/fb.h>
  26 +#include <linux/delay.h>
  27 +
  28 +#include <asm/mach/arch.h>
  29 +#include <asm/mach/map.h>
  30 +#include <asm/mach/irq.h>
  31 +
  32 +#include <mach/hardware.h>
  33 +#include <asm/irq.h>
  34 +#include <asm/mach-types.h>
  35 +
  36 +#include <plat/regs-serial.h>
  37 +#include <mach/regs-gpio.h>
  38 +#include <mach/regs-lcd.h>
  39 +#include <mach/regs-s3c2443-clock.h>
  40 +
  41 +#include <mach/idle.h>
  42 +#include <mach/leds-gpio.h>
  43 +#include <plat/iic.h>
  44 +
  45 +#include <plat/s3c2416.h>
  46 +#include <plat/gpio-cfg.h>
  47 +#include <plat/clock.h>
  48 +#include <plat/devs.h>
  49 +#include <plat/cpu.h>
  50 +#include <plat/nand.h>
  51 +#include <plat/sdhci.h>
  52 +#include <plat/udc.h>
  53 +#include <linux/platform_data/s3c-hsudc.h>
  54 +
  55 +#include <plat/regs-fb-v4.h>
  56 +#include <plat/fb.h>
  57 +
  58 +#include <plat/common-smdk.h>
  59 +
  60 +static struct map_desc smdk2416_iodesc[] __initdata = {
  61 + /* ISA IO Space map (memory space selected by A24) */
  62 +
  63 + {
  64 + .virtual = (u32)S3C24XX_VA_ISA_WORD,
  65 + .pfn = __phys_to_pfn(S3C2410_CS2),
  66 + .length = 0x10000,
  67 + .type = MT_DEVICE,
  68 + }, {
  69 + .virtual = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
  70 + .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
  71 + .length = SZ_4M,
  72 + .type = MT_DEVICE,
  73 + }, {
  74 + .virtual = (u32)S3C24XX_VA_ISA_BYTE,
  75 + .pfn = __phys_to_pfn(S3C2410_CS2),
  76 + .length = 0x10000,
  77 + .type = MT_DEVICE,
  78 + }, {
  79 + .virtual = (u32)S3C24XX_VA_ISA_BYTE + 0x10000,
  80 + .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
  81 + .length = SZ_4M,
  82 + .type = MT_DEVICE,
  83 + }
  84 +};
  85 +
  86 +#define UCON (S3C2410_UCON_DEFAULT | \
  87 + S3C2440_UCON_PCLK | \
  88 + S3C2443_UCON_RXERR_IRQEN)
  89 +
  90 +#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
  91 +
  92 +#define UFCON (S3C2410_UFCON_RXTRIG8 | \
  93 + S3C2410_UFCON_FIFOMODE | \
  94 + S3C2440_UFCON_TXTRIG16)
  95 +
  96 +static struct s3c2410_uartcfg smdk2416_uartcfgs[] __initdata = {
  97 + [0] = {
  98 + .hwport = 0,
  99 + .flags = 0,
  100 + .ucon = UCON,
  101 + .ulcon = ULCON,
  102 + .ufcon = UFCON,
  103 + },
  104 + [1] = {
  105 + .hwport = 1,
  106 + .flags = 0,
  107 + .ucon = UCON,
  108 + .ulcon = ULCON,
  109 + .ufcon = UFCON,
  110 + },
  111 + /* IR port */
  112 + [2] = {
  113 + .hwport = 2,
  114 + .flags = 0,
  115 + .ucon = UCON,
  116 + .ulcon = ULCON | 0x50,
  117 + .ufcon = UFCON,
  118 + },
  119 + [3] = {
  120 + .hwport = 3,
  121 + .flags = 0,
  122 + .ucon = UCON,
  123 + .ulcon = ULCON,
  124 + .ufcon = UFCON,
  125 + }
  126 +};
  127 +
  128 +void smdk2416_hsudc_gpio_init(void)
  129 +{
  130 + s3c_gpio_setpull(S3C2410_GPH(14), S3C_GPIO_PULL_UP);
  131 + s3c_gpio_setpull(S3C2410_GPF(2), S3C_GPIO_PULL_NONE);
  132 + s3c_gpio_cfgpin(S3C2410_GPH(14), S3C_GPIO_SFN(1));
  133 + s3c2410_modify_misccr(S3C2416_MISCCR_SEL_SUSPND, 0);
  134 +}
  135 +
  136 +void smdk2416_hsudc_gpio_uninit(void)
  137 +{
  138 + s3c2410_modify_misccr(S3C2416_MISCCR_SEL_SUSPND, 1);
  139 + s3c_gpio_setpull(S3C2410_GPH(14), S3C_GPIO_PULL_NONE);
  140 + s3c_gpio_cfgpin(S3C2410_GPH(14), S3C_GPIO_SFN(0));
  141 +}
  142 +
  143 +struct s3c24xx_hsudc_platdata smdk2416_hsudc_platdata = {
  144 + .epnum = 9,
  145 + .gpio_init = smdk2416_hsudc_gpio_init,
  146 + .gpio_uninit = smdk2416_hsudc_gpio_uninit,
  147 +};
  148 +
  149 +struct s3c_fb_pd_win smdk2416_fb_win[] = {
  150 + [0] = {
  151 + /* think this is the same as the smdk6410 */
  152 + .win_mode = {
  153 + .pixclock = 41094,
  154 + .left_margin = 8,
  155 + .right_margin = 13,
  156 + .upper_margin = 7,
  157 + .lower_margin = 5,
  158 + .hsync_len = 3,
  159 + .vsync_len = 1,
  160 + .xres = 800,
  161 + .yres = 480,
  162 + },
  163 + .default_bpp = 16,
  164 + .max_bpp = 32,
  165 + },
  166 +};
  167 +
  168 +static void s3c2416_fb_gpio_setup_24bpp(void)
  169 +{
  170 + unsigned int gpio;
  171 +
  172 + for (gpio = S3C2410_GPC(1); gpio <= S3C2410_GPC(4); gpio++) {
  173 + s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
  174 + s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
  175 + }
  176 +
  177 + for (gpio = S3C2410_GPC(8); gpio <= S3C2410_GPC(15); gpio++) {
  178 + s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
  179 + s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
  180 + }
  181 +
  182 + for (gpio = S3C2410_GPD(0); gpio <= S3C2410_GPD(15); gpio++) {
  183 + s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
  184 + s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
  185 + }
  186 +}
  187 +
  188 +static struct s3c_fb_platdata smdk2416_fb_platdata = {
  189 + .win[0] = &smdk2416_fb_win[0],
  190 + .setup_gpio = s3c2416_fb_gpio_setup_24bpp,
  191 + .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  192 + .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  193 +};
  194 +
  195 +static struct s3c_sdhci_platdata smdk2416_hsmmc0_pdata __initdata = {
  196 + .max_width = 4,
  197 + .cd_type = S3C_SDHCI_CD_GPIO,
  198 + .ext_cd_gpio = S3C2410_GPF(1),
  199 + .ext_cd_gpio_invert = 1,
  200 +};
  201 +
  202 +static struct s3c_sdhci_platdata smdk2416_hsmmc1_pdata __initdata = {
  203 + .max_width = 4,
  204 + .cd_type = S3C_SDHCI_CD_NONE,
  205 +};
  206 +
  207 +static struct platform_device *smdk2416_devices[] __initdata = {
  208 + &s3c_device_fb,
  209 + &s3c_device_wdt,
  210 + &s3c_device_ohci,
  211 + &s3c_device_i2c0,
  212 + &s3c_device_hsmmc0,
  213 + &s3c_device_hsmmc1,
  214 + &s3c_device_usb_hsudc,
  215 +};
  216 +
  217 +static void __init smdk2416_map_io(void)
  218 +{
  219 + s3c24xx_init_io(smdk2416_iodesc, ARRAY_SIZE(smdk2416_iodesc));
  220 + s3c24xx_init_clocks(12000000);
  221 + s3c24xx_init_uarts(smdk2416_uartcfgs, ARRAY_SIZE(smdk2416_uartcfgs));
  222 +}
  223 +
  224 +static void __init smdk2416_machine_init(void)
  225 +{
  226 + s3c_i2c0_set_platdata(NULL);
  227 + s3c_fb_set_platdata(&smdk2416_fb_platdata);
  228 +
  229 + s3c_sdhci0_set_platdata(&smdk2416_hsmmc0_pdata);
  230 + s3c_sdhci1_set_platdata(&smdk2416_hsmmc1_pdata);
  231 +
  232 + s3c24xx_hsudc_set_platdata(&smdk2416_hsudc_platdata);
  233 +
  234 + gpio_request(S3C2410_GPB(4), "USBHost Power");
  235 + gpio_direction_output(S3C2410_GPB(4), 1);
  236 +
  237 + gpio_request(S3C2410_GPB(3), "Display Power");
  238 + gpio_direction_output(S3C2410_GPB(3), 1);
  239 +
  240 + gpio_request(S3C2410_GPB(1), "Display Reset");
  241 + gpio_direction_output(S3C2410_GPB(1), 1);
  242 +
  243 + platform_add_devices(smdk2416_devices, ARRAY_SIZE(smdk2416_devices));
  244 + smdk_machine_init();
  245 +}
  246 +
  247 +MACHINE_START(SMDK2416, "SMDK2416")
  248 + /* Maintainer: Yauhen Kharuzhy <jekhor@gmail.com> */
  249 + .atag_offset = 0x100,
  250 +
  251 + .init_irq = s3c24xx_init_irq,
  252 + .map_io = smdk2416_map_io,
  253 + .init_machine = smdk2416_machine_init,
  254 + .timer = &s3c24xx_timer,
  255 + .restart = s3c2416_restart,
  256 +MACHINE_END
arch/arm/mach-s3c24xx/pm-s3c2416.c
Diff comments   View file @ 26febf8
  1 +/* linux/arch/arm/mach-s3c2416/pm.c
  2 + *
  3 + * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4 + * http://www.samsung.com
  5 + *
  6 + * S3C2416 - PM support (Based on Ben Dooks' S3C2412 PM support)
  7 + *
  8 + * This program is free software; you can redistribute it and/or modify
  9 + * it under the terms of the GNU General Public License version 2 as
  10 + * published by the Free Software Foundation.
  11 +*/
  12 +
  13 +#include <linux/device.h>
  14 +#include <linux/syscore_ops.h>
  15 +#include <linux/io.h>
  16 +
  17 +#include <asm/cacheflush.h>
  18 +
  19 +#include <mach/regs-power.h>
  20 +#include <mach/regs-s3c2443-clock.h>
  21 +
  22 +#include <plat/cpu.h>
  23 +#include <plat/pm.h>
  24 +
  25 +extern void s3c2412_sleep_enter(void);
  26 +
  27 +static int s3c2416_cpu_suspend(unsigned long arg)
  28 +{
  29 + /* enable wakeup sources regardless of battery state */
  30 + __raw_writel(S3C2443_PWRCFG_SLEEP, S3C2443_PWRCFG);
  31 +
  32 + /* set the mode as sleep, 2BED represents "Go to BED" */
  33 + __raw_writel(0x2BED, S3C2443_PWRMODE);
  34 +
  35 + s3c2412_sleep_enter();
  36 +
  37 + panic("sleep resumed to originator?");
  38 +}
  39 +
  40 +static void s3c2416_pm_prepare(void)
  41 +{
  42 + /*
  43 + * write the magic value u-boot uses to check for resume into
  44 + * the INFORM0 register, and ensure INFORM1 is set to the
  45 + * correct address to resume from.
  46 + */
  47 + __raw_writel(0x2BED, S3C2412_INFORM0);
  48 + __raw_writel(virt_to_phys(s3c_cpu_resume), S3C2412_INFORM1);
  49 +}
  50 +
  51 +static int s3c2416_pm_add(struct device *dev)
  52 +{
  53 + pm_cpu_prep = s3c2416_pm_prepare;
  54 + pm_cpu_sleep = s3c2416_cpu_suspend;
  55 +
  56 + return 0;
  57 +}
  58 +
  59 +static struct subsys_interface s3c2416_pm_interface = {
  60 + .name = "s3c2416_pm",
  61 + .subsys = &s3c2416_subsys,
  62 + .add_dev = s3c2416_pm_add,
  63 +};
  64 +
  65 +static __init int s3c2416_pm_init(void)
  66 +{
  67 + return subsys_interface_register(&s3c2416_pm_interface);
  68 +}
  69 +
  70 +arch_initcall(s3c2416_pm_init);
  71 +
  72 +
  73 +static void s3c2416_pm_resume(void)
  74 +{
  75 + /* unset the return-from-sleep amd inform flags */
  76 + __raw_writel(0x0, S3C2443_PWRMODE);
  77 + __raw_writel(0x0, S3C2412_INFORM0);
  78 + __raw_writel(0x0, S3C2412_INFORM1);
  79 +}
  80 +
  81 +struct syscore_ops s3c2416_pm_syscore_ops = {
  82 + .resume = s3c2416_pm_resume,
  83 +};
arch/arm/mach-s3c24xx/s3c2416.c
Diff comments   View file @ 26febf8
  1 +/* linux/arch/arm/mach-s3c2416/s3c2416.c
  2 + *
  3 + * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
  4 + * as part of OpenInkpot project
  5 + * Copyright (c) 2009 Promwad Innovation Company
  6 + * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
  7 + *
  8 + * Samsung S3C2416 Mobile CPU support
  9 + *
  10 + * This program is free software; you can redistribute it and/or modify
  11 + * it under the terms of the GNU General Public License as published by
  12 + * the Free Software Foundation; either version 2 of the License, or
  13 + * (at your option) any later version.
  14 + *
  15 + * This program is distributed in the hope that it will be useful,
  16 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18 + * GNU General Public License for more details.
  19 + *
  20 + * You should have received a copy of the GNU General Public License
  21 + * along with this program; if not, write to the Free Software
  22 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23 +*/
  24 +
  25 +#include <linux/kernel.h>
  26 +#include <linux/types.h>
  27 +#include <linux/interrupt.h>
  28 +#include <linux/list.h>
  29 +#include <linux/timer.h>
  30 +#include <linux/init.h>
  31 +#include <linux/gpio.h>
  32 +#include <linux/platform_device.h>
  33 +#include <linux/serial_core.h>
  34 +#include <linux/device.h>
  35 +#include <linux/syscore_ops.h>
  36 +#include <linux/clk.h>
  37 +#include <linux/io.h>
  38 +
  39 +#include <asm/mach/arch.h>
  40 +#include <asm/mach/map.h>
  41 +#include <asm/mach/irq.h>
  42 +
  43 +#include <mach/hardware.h>
  44 +#include <asm/proc-fns.h>
  45 +#include <asm/irq.h>
  46 +
  47 +#include <mach/idle.h>
  48 +#include <mach/regs-s3c2443-clock.h>
  49 +
  50 +#include <plat/gpio-core.h>
  51 +#include <plat/gpio-cfg.h>
  52 +#include <plat/gpio-cfg-helpers.h>
  53 +#include <plat/s3c2416.h>
  54 +#include <plat/devs.h>
  55 +#include <plat/cpu.h>
  56 +#include <plat/sdhci.h>
  57 +#include <plat/pm.h>
  58 +
  59 +#include <plat/iic-core.h>
  60 +#include <plat/fb-core.h>
  61 +#include <plat/nand-core.h>
  62 +#include <plat/adc-core.h>
  63 +
  64 +static struct map_desc s3c2416_iodesc[] __initdata = {
  65 + IODESC_ENT(WATCHDOG),
  66 + IODESC_ENT(CLKPWR),
  67 + IODESC_ENT(TIMER),
  68 +};
  69 +
  70 +struct bus_type s3c2416_subsys = {
  71 + .name = "s3c2416-core",
  72 + .dev_name = "s3c2416-core",
  73 +};
  74 +
  75 +static struct device s3c2416_dev = {
  76 + .bus = &s3c2416_subsys,
  77 +};
  78 +
  79 +void s3c2416_restart(char mode, const char *cmd)
  80 +{
  81 + if (mode == 's')
  82 + soft_restart(0);
  83 +
  84 + __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST);
  85 +}
  86 +
  87 +int __init s3c2416_init(void)
  88 +{
  89 + printk(KERN_INFO "S3C2416: Initializing architecture\n");
  90 +
  91 + /* s3c24xx_idle = s3c2416_idle; */
  92 +
  93 + /* change WDT IRQ number */
  94 + s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT;
  95 + s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT;
  96 +
  97 + /* the i2c devices are directly compatible with s3c2440 */
  98 + s3c_i2c0_setname("s3c2440-i2c");
  99 + s3c_i2c1_setname("s3c2440-i2c");
  100 +
  101 + s3c_fb_setname("s3c2443-fb");
  102 +
  103 + s3c_adc_setname("s3c2416-adc");
  104 +
  105 +#ifdef CONFIG_PM
  106 + register_syscore_ops(&s3c2416_pm_syscore_ops);
  107 +#endif
  108 + register_syscore_ops(&s3c24xx_irq_syscore_ops);
  109 +
  110 + return device_register(&s3c2416_dev);
  111 +}
  112 +
  113 +void __init s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no)
  114 +{
  115 + s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
  116 +
  117 + s3c_nand_setname("s3c2412-nand");
  118 +}
  119 +
  120 +/* s3c2416_map_io
  121 + *
  122 + * register the standard cpu IO areas, and any passed in from the
  123 + * machine specific initialisation.
  124 + */
  125 +
  126 +void __init s3c2416_map_io(void)
  127 +{
  128 + s3c24xx_gpiocfg_default.set_pull = samsung_gpio_setpull_updown;
  129 + s3c24xx_gpiocfg_default.get_pull = samsung_gpio_getpull_updown;
  130 +
  131 + /* initialize device information early */
  132 + s3c2416_default_sdhci0();
  133 + s3c2416_default_sdhci1();
  134 +
  135 + iotable_init(s3c2416_iodesc, ARRAY_SIZE(s3c2416_iodesc));
  136 +}
  137 +
  138 +/* need to register the subsystem before we actually register the device, and
  139 + * we also need to ensure that it has been initialised before any of the
  140 + * drivers even try to use it (even if not on an s3c2416 based system)
  141 + * as a driver which may support both 2443 and 2440 may try and use it.
  142 +*/
  143 +
  144 +static int __init s3c2416_core_init(void)
  145 +{
  146 + return subsys_system_register(&s3c2416_subsys, NULL);
  147 +}
  148 +
  149 +core_initcall(s3c2416_core_init);
arch/arm/mach-s3c24xx/setup-sdhci-gpio.c
Diff comments   View file @ 26febf8
  1 +/* linux/arch/arm/plat-s3c2416/setup-sdhci-gpio.c
  2 + *
  3 + * Copyright 2010 Promwad Innovation Company
  4 + * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
  5 + *
  6 + * S3C2416 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
  7 + *
  8 + * Based on mach-s3c64xx/setup-sdhci-gpio.c
  9 + *
  10 + * This program is free software; you can redistribute it and/or modify
  11 + * it under the terms of the GNU General Public License version 2 as
  12 + * published by the Free Software Foundation.
  13 +*/
  14 +
  15 +#include <linux/kernel.h>
  16 +#include <linux/types.h>
  17 +#include <linux/interrupt.h>
  18 +#include <linux/platform_device.h>
  19 +#include <linux/io.h>
  20 +#include <linux/gpio.h>
  21 +
  22 +#include <mach/regs-gpio.h>
  23 +#include <plat/gpio-cfg.h>
  24 +
  25 +void s3c2416_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
  26 +{
  27 + s3c_gpio_cfgrange_nopull(S3C2410_GPE(5), 2 + width, S3C_GPIO_SFN(2));
  28 +}
  29 +
  30 +void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
  31 +{
  32 + s3c_gpio_cfgrange_nopull(S3C2410_GPL(0), width, S3C_GPIO_SFN(2));
  33 + s3c_gpio_cfgrange_nopull(S3C2410_GPL(8), 2, S3C_GPIO_SFN(2));
  34 +}